Methods for finding and counting GPON GEM frames

Abstract

A lookup method is suitable for gigabit-capable passive optical network (GPON). The lookup method comprises: disassembling a GPON encapsulation method port identifier (GEM Port ID) of a GEM frame into a first part GEM Port ID and a second part GEM Port ID; performing a row lookup in a first memory array by using the first part GEM Port ID and performing a column lookup in the first memory array by using the second part GEM Port ID; and judging a specific bit position of the first memory array according to a result of the row lookup and the column lookup in the first memory array, wherein the specific bit position represents a specific GPON encapsulation method port (GEM Port) used by the GEM frame.

Description

Technical Field

[0001] This invention relates to the technical field of passive optical networks, and more specifically to a method for finding and counting GEM (GPON Encapsulation Mode Frame) in a gigabit passive optical network architecture. Background Technology

[0002] Passive Optical Network (PON), also known as passive fiber optic network, is a pure media network technology that consumes no energy. This technology avoids electromagnetic interference and lightning strikes from external devices, reducing the failure rate of lines and external equipment, thus improving system reliability. The architecture of a PON implements a point-to-multipoint topology. A single optical fiber uses a passive optical fiber splitter to distribute optical energy to multiple optical fibers, or combines the optical energy transmitted from multiple optical fibers into a single fiber, thereby providing services to multiple endpoints.

[0003] Gigabit Passive Optical Network (GPON) is an emerging standard that provides users with faster data services, typically including the Internet, telephone, or television broadcasting.

[0004] Figure 1 This is a system architecture diagram for GPON.

[0005] Figure 2 This is a schematic diagram of the downlink data packet frame structure.

[0006] GPON networks use optical fibers to connect optical line terminals (OLTs), optical splitters, and optical network units (ONUs), using different wavelengths for uplink and downlink data transmission. Uplink uses a 1310nm wavelength, and downlink uses a 1490nm wavelength. GPON systems employ wavelength division multiplexing (WDM) to transmit data on the same optical distribution network using different wavelengths for uplink and downlink. Furthermore, downlink data is transmitted via broadcast, while uplink data is uploaded using time division multiple access (TDMA).

[0007] Each GPON Encapsulation Mode Port (GEM Port) is identified by a unique GPON Encapsulation Mode Port ID, which is globally assigned by the OLT. Each ONU needs to find its own GEM frame based on the GEM Port ID; otherwise, it discards the frame. Furthermore, the International Telecommunication Union (ITU) standard G.988 specifies the need for counting based on GEM frames. The counting attributes include the number of GEM frames transmitted, the number of GEM frames received, the number of bytes of transmitted payload, and the number of bytes of received payload.

[0008] The GEM frame header consists of four parts: a 12-bit Payload Length Indicator (PLI), a 12-bit Port ID, a 3-bit Payload Type Indicator (PTI), and a 13-bit Header Error Control (HEC).

[0009] Considering the multiple ONUs and port multiplexing in PON networks, a GEM Port ID is introduced. Therefore, the GEM Port ID is particularly important for this invention because the ONU is identified based on the GEM Port ID.

[0010] With the development of GPON technology, existing GEM frame lookup and counting methods occupy a relatively large chip area.

[0011] Therefore, there is an urgent need to propose a new method for quickly finding and counting GPON GEM frames in order to eliminate or mitigate the above problems. Summary of the Invention

[0012] This invention aims to provide an innovative method for finding and counting GPON GEM frames, which is achieved through two memory arrays in SRAM. The method of this invention can find the corresponding count group with a relatively small SRAM area.

[0013] According to the present invention, an innovative method for finding GPON GEM frames is provided, and thereby an innovative method for counting GPON GEM frames is provided.

[0014] Specifically, according to one aspect of the present invention, a lookup method is proposed, applicable to gigabit passive optical networks. The lookup method includes:

[0015] The GEM Port ID of the GEM frame is decomposed into a first part GEM Port ID and a second part GEM Port ID;

[0016] A row lookup is performed in the first memory array using the first portion of the GEM Port ID, and a column lookup is performed in the first memory array using the second portion of the GEM Port ID; and

[0017] Based on the results of row and column lookups in the first memory array, a specific bit position in the first memory array is determined, wherein the specific bit position represents a specific GEM Port used by the GEM frame.

[0018] Optionally, or preferably, the method further includes: the ONU using the value of the specific bit position to determine whether the GEM frame belongs to the ONU.

[0019] Optionally, or preferably, the method further includes: using the first portion of the GEM Port ID to perform a row lookup in the first memory array to obtain a specific GPON encapsulation port.

[0020] Optionally, or preferably, the first memory array has multiple memory rows, each memory row having its own row address, and the data stored in the multiple memory rows includes multiple bits, each bit representing a GEM Port.

[0021] Optionally, or preferably, the second memory array is configured such that, except for the data in the 0th memory row, the data in the Mth memory row is... Where M is between 0 and 255, Q N Σ is the number of valid bits in the Nth memory row of the first memory array, Σ is the summation operator, N is the summation subscript, and the second memory array is configured to define the value in the 0th memory row as 0.

[0022] According to another aspect of the present invention, a GPON ONU integrated circuit is proposed, characterized in that the GPON integrated circuit includes a first memory array and a second memory array. The first memory array is composed of first memory rows and includes a plurality of memory cells, each memory cell representing a GEM Port, and the first data stored in each memory cell indicating the validity of the associated GEM Port. The second memory array is composed of second memory rows, wherein the arrangement order of the second memory rows in the second memory array is the same as the arrangement order of the first memory rows in the first memory array, wherein the second data stored in the second memory rows is the total number of valid GEM Ports in all memory rows preceding the first memory rows, and wherein the second data is related to a counter index.

[0023] Optionally, or preferably, the first memory row and the second memory row have the same row address.

[0024] Optionally, or preferably, the number of bits in the second memory row needs to be greater than or equal to the maximum number of GEM Ports supported by the GPON ONU integrated circuit.

[0025] According to another aspect of the present invention, a search method for GPON ONU integrated circuits applied to the aforementioned other aspect is proposed. The search method includes:

[0026] The first memory array is searched by the GEM Port ID to be tested to determine whether the first memory cell is valid;

[0027] In response to the first storage cell being valid, a lookup is performed on the second memory array based on the GEM Port ID to be tested to obtain the second data; and

[0028] The counter pointer is determined based on the second data.

[0029] Optionally, or preferably, determining the counter pointer based on the second data includes: determining the counter pointer based on the GEM Port ID to be tested and the second data.

[0030] Optionally, or preferably, the search method further includes:

[0031] The GEM Port ID to be tested is decomposed into a first part GEM Port ID and a second part GEM Port ID, wherein the first storage cell is determined by searching the first memory array using the GEM Port ID to be tested.

[0032] Perform a row lookup in the first memory array using the first portion of the GEM Port ID; and

[0033] The second part of the GEM Port ID is used to perform a column lookup in the first memory array.

[0034] Optionally, or more preferably, in response to an event that the first storage cell is valid, performing a lookup on the second memory array based on the GEMPort ID to be tested to obtain the second data includes:

[0035] A row lookup is performed in the second memory array using the first portion of the GEM Port ID to determine the second memory row from the second memory array; and

[0036] The second data is provided by the second memory row.

[0037] Optionally, or more preferably, determining the counter pointer based on the GEM Port ID to be tested and the second data further includes:

[0038] A summation result is obtained by summing the second part of the GEM Port ID and the second data; and

[0039] The summation result is used as the counter pointer.

[0040] The other objects, advantages, and novel features of the present invention will become more apparent from the following detailed description with reference to the drawings. Attached Figure Description

[0041] Figure 1 This is a system architecture diagram for GPON.

[0042] Figure 2 This is a schematic diagram of the downlink data packet frame structure.

[0043] Figure 3 This is a schematic diagram of a static random access memory array configuration according to a reference example.

[0044] Figure 4 for Figure 3 A schematic diagram of the data stored in the SRAM array.

[0045] Figure 5This is a schematic diagram illustrating the configuration of the first and second memory arrays in an SRAM according to an embodiment of the present invention.

[0046] Figure 6 A comparison table of reference examples and embodiments. Detailed Implementation

[0047] The following provides different embodiments of the present invention. These embodiments are used to illustrate the technical content of the present invention and are not intended to limit the scope of the invention. A feature of one embodiment can be applied to other embodiments through suitable modifications, substitutions, combinations, or separations.

[0048] It should be noted that, unless otherwise specified, the term "one" in this document is not limited to having a single component, but may include one or more of the components.

[0049] Furthermore, unless otherwise specified, the ordinal numbers such as "first," "second," etc., used in this document are merely for distinguishing multiple components with the same name and do not indicate any hierarchy, order of execution, or process sequence among them. A "first" component and a "second" component may appear together in the same component or separately in different components. The presence of a component with a higher ordinal number does not necessarily indicate the presence of another component with a lower ordinal number.

[0050] The terms "including," "containing," "having," and "containing" refer to, but are not limited to, these.

[0051] Furthermore, in this article, terms such as “system,” “device,” “apparatus,” “module,” or “unit” refer to an electronic component or a digital circuit, an analog circuit, or other circuit in a broader sense composed of multiple electronic components, and unless otherwise specified, they do not necessarily have a hierarchical relationship.

[0052] In addition, either the terminal or the server may include the above-mentioned components or be implemented in the above manner.

[0053] (See example)

[0054] Figure 3 This is a schematic diagram illustrating the configuration of an array of Static Random Access Memory (SRAM) according to a reference example. Figure 4 for Figure 3 A schematic diagram of the data stored in the SRAM array. The following will be based on... Figure 3 and Figure 4 This section describes a method for ONU lookup of GEM frames, as illustrated in the reference example.

[0055] According to the International Telecommunication Union (ITU) standard, it is necessary to count the GEM frames received by a specific ONU's GEM Port. To do this, it is necessary to find the corresponding counter group for the GEM Port and count using that counter group, which includes at least one counter.

[0056] Generally, an OLT supports 4096 GEM Ports. As mentioned earlier, "GEM Port ID" is used to identify GEM Ports, so 4096 GEM Port IDs are required. The row address of SRAM is one possible implementation of GEM Port ID. For this purpose, the ONU provides 4096 SRAM row addresses, each corresponding to one of the 4096 GEM Ports. When the decimal number 4096 is converted to binary, it needs to be represented by 12 bits. The most significant bit (MSB) of these 12 bits is gpid

[11] , the least significant bit (LSB) is gpid[0], and the whole number is represented by gpid[11:0]. In this paper, gpid is taken from the four letters "G", "P", "I" and "D" of "GEM Port ID".

[0057] refer to Figure 3 In the reference example, the ONU's SRAM consists of 4096 SRAM rows. The row address of the 0th SRAM row is 0000-0000-0000, the row address of the 1st SRAM row is 0000-0000-0001, and so on, up to the 4095th SRAM row with a row address of 1111-1111-1111. The symbol "-" is only for readability and may not be included in the row address.

[0058] During operation, if the GEM frame provided by the OLT contains a GEM Port ID of 0000-0000-0000, the ONU can identify that it corresponds to the 0th row of SRAM; similarly, if the GEM frame provided by the OLT contains a GEM Port ID of 0000-0000-0001, the ONU can identify that it corresponds to the 1st row of SRAM, and so on.

[0059] After the ONU identifies the corresponding SRAM row based on the GEM Port ID contained in the GEM frame, it can output the data stored in the corresponding SRAM row from the SRAM.

[0060] Reference Figure 4Each SRAM row stores 9 bits of data, where the MSB is bit[8] and the LSB is bit[0], and the entire array is represented by bits[8:0]. For example, the 0th SRAM row stores 0-XXXX-XXXX, and the 1st SRAM row stores 0-0000-0001. Figure 4 The data stored for SRAM rows is merely an example.

[0061] In the comparative example, bit [8] of the MSB is used to indicate whether a specific GEM frame belongs to a specific ONU. When MSB = 1, it means that the specific GEM Port ID belongs to the specific ONU, that is, the specific GEM frame belongs to the specific ONU. When MSB = 0, it means that the specific GEM Port ID does not belong to the specific ONU, that is, the specific GEM frame does not belong to the specific ONU.

[0062] The remaining 8 bits, namely bits[7:0], are used to indicate the specific counter group used for a specific GEM frame; in other words, bits[7:0] serve as a counter pointer. Since the ONU supports a maximum of 256 GEM ports, and 2 to the power of 8 equals 256, the counter pointer bits[7:0] have a total of 8 bits.

[0063] To illustrate more specifically the method of ONU lookup of GEM frames in the reference example, suppose that in a particular case, a particular ONU only supports 1 GEM Port. In this case, out of the 4096 SRAM rows, only 1 SRAM row will have MSB=1. In the reference example, this is the 31st SRAM row. This is just an example; in other examples, it could be a different row.

[0064] During operation, if the GEM Port ID contained in the GEM frame provided by the OLT is 0, that is, gpid[11:0]=0000-0000-00002=0 10 The ONU can then identify the corresponding SRAM row 0 and output the data stored in the SRAM row 0, "0-XXXX-XXXX". In this data, MSB = 0, so it can be determined that this GEM frame does not belong to this ONU, and therefore there is no need to further determine which counting group this GEM frame uses. It should be noted that the subscript "2" in encodings such as "0000-0000-00002" indicates that the encoding is represented in binary, while subscript "0" indicates that the encoding is represented in binary. 10 The subscript "10" in such an encoding indicates that the encoding is represented in decimal, and the same applies below.

[0065] During operation, if the GEM frame provided by the OLT contains a GEM Port ID of 31, that is, gpid[11:0]=0000-0001-11112=31 10 The ONU can then identify the corresponding SRAM row 31 and output the data "1-0000-0010" stored in the SRAM row 31. In this data, MSB = 1, so it can be determined that this GEM frame belongs to this ONU. Therefore, it is necessary to further determine which counter group this GEM frame uses. Based on the counter pointer bits [7:0] being 0000-0010, for example, it can be used to represent the SRAM row address of another SRAM storage space (not shown in the figure) to find the counter group used by this GEM frame.

[0066] In the specific scenario described above, the ONU supports one GEM Port. However, in all cases, the ONU supports a maximum of 256 GEM Ports, meaning that out of 4096 SRAM rows, at most 256 SRAM rows have an MSB of 1. In other words, the MSB of the remaining 3840 SRAM rows (since 4096 - 256 = 3840) is 0. This invention recognizes that once the MSB = 0, the remaining 8 bits are useless; in other words, at least 3840 × 8 = 30720 bits of memory space are wasted, resulting in low utilization in terms of SRAM area cost.

[0067] Therefore, it is necessary to propose a new method for finding GPON GEM frames and a new method for counting GPON GEM frames.

[0068] (The method for finding GPON GEM frames in this invention)

[0069] The method for locating GPON GEM frames according to the present invention is applicable to GPON systems, which include an OLT, a splitter, an ONU, and multiple user terminals. The ONU includes an integrated circuit, which includes, but is not limited to, SRAM; other memories are also possible. In this invention, the SRAM is configured with a first memory array and a second memory array.

[0070] Figure 5 This is a schematic diagram illustrating the configuration of the first and second memory arrays in an SRAM according to an embodiment of the present invention. The following will be based on... Figure 5 This invention describes a method for finding GPON GEM frames according to an embodiment of the present invention.

[0071] First, the configuration and usage of the first and second memory arrays of the present invention are described below. It should be understood that the following configuration is formed in order to solve the problem of low SRAM area utilization and to meet the requirement of one OLT supporting 4096 GEMPorts.

[0072] (Configuration of the first memory array)

[0073] In a generalized embodiment, the first memory array has a plurality of first memory rows, which are SRAM rows in this invention, each having a corresponding row address. In a particular embodiment, the first memory array is configured to have 256 SRAM rows.

[0074] The decimal number 256 requires 8 bits to represent in binary; therefore, the row address of the first memory array is 8 bits. For example, ... Figure 5 As shown, the row address of the 0th SRAM row is 0000-0000, the row address of the 1st SRAM row is 0000-0001, and so on, until the row address of the 255th SRAM row is 1111-1111.

[0075] The first memory array's SRAM row comprises 16 memory cells, each storing 16 bits of data. These 16 bits, from LSB to MSB, are Bit 0, Bit 1, Bit 2, Bit 3, Bit 4, Bit 5, Bit 6, Bit 7, Bit 8, Bit 9, Bit 10, Bit 11, Bit 12, Bit 13, Bit 14, and Bit 15. Each bit position represents a GEM port. For example, Bit 0 of the 0th SRAM row represents the 1st GEM port of the 0th SRAM row, Bit 15 of the 0th SRAM row represents the 16th GEM port of the 0th SRAM row, and so on.

[0076] Therefore, each SRAM row can be used to represent 16 GEM Ports. The first memory array has a total of 256 SRAM rows, so the first memory array can be used to represent 4096 GEM Ports (because 256 × 16 = 4096).

[0077] (Configuration of the second memory array)

[0078] Before detailing the configuration of the second memory array, it should be noted that the purpose of setting up the second memory array is to sequentially sum the number of valid bits in each SRAM row of the first memory array to obtain the "storage sum", and then store the storage sum in the second memory array.

[0079] In a generalized embodiment, the second memory array has multiple second memory rows, which are SRAM rows in this invention, each with a corresponding row address. In a specific embodiment, the second memory array is configured to have 256 SRAM rows. Similarly, the decimal number 256 requires 8 bits to represent when converted to binary; therefore, the row address of the second memory array is 8 bits. For example, such as... Figure 5 As shown, the row address of the 0th SRAM row is 0000-0000, the row address of the 1st SRAM row is 0000-0001, and so on, up to the 255th SRAM row with row addresses 1111-1111. Therefore, the arrangement order of the second memory rows in the second memory array can be the same as the arrangement order of the first memory rows in the first memory array. Furthermore, the first and second memory rows can have the same row address.

[0080] The second memory array's SRAM row comprises 8 memory cells, each storing 8 bits of data. This 8-bit setting is based on the fact that the ONU supports a maximum of 256 GEM ports, therefore the first memory array will have at most 256 valid bits. More broadly, the number of bits in the second memory row needs to be greater than or equal to the maximum number of GEM ports that the integrated circuit can support.

[0081] In one embodiment, the second memory array is configured such that the data (value) stored in the 0th SRAM row is 0, while the other SRAM rows store a "sum". The sum is calculated as follows: the data (value) stored in the Mth SRAM row of the second memory array is... Where M is between 0 and 255, Q N Σ represents the number of valid bits in the Nth row of the SRAM in the first memory array, where Σ is the summation operator and N is the summation index.

[0082] exist Figure 5 In the example, Q0 is the number of valid bits in the 0th row of the SRAM of the first memory array. The data stored in the 0th row of the SRAM is 0001000010000000, which has two 1s, so Q0 = 2. Similarly, Q1 is the number of valid bits in the 1st row of the SRAM of the first memory array. The data stored in the 1st row of the SRAM is 10000000000000010, so Q1 = 2.

[0083] Next, the total storage of each SRAM row in the second memory array is calculated. First, by definition, the data (value) stored in the 0th SRAM row of the second memory array is 0. 10 Its binary representation is 000000002.

[0084] The data stored in the first row of the SRAM in the second memory array is based on... Calculations show that it is Q0, which is 2. 10 Its binary representation is 000000102. The data stored in the second row of the SRAM in the second memory array is also based on... The calculation yields a sum of Q0 and Q1, which is 4. 10 Its binary representation is 000001002.

[0085] Thus, the first and second memory arrays in the SRAM have been constructed. It should be noted that... Figure 5 The data stored in each SRAM row of the first and second memory arrays are merely exemplary. The specific steps of the method for locating GPON GEM frames according to the present invention will be described below.

[0086] (Detailed instructions on how to locate GPON GEM frames)

[0087] In the following text, as a non-limiting embodiment, the ONU will search for GEM frames with GEM Port ID=0 and GEM frames with GEM Port ID=32 respectively.

[0088] The first example is GEM Port ID = 0, which means gpid[11:0] = 0. 10 =0000000000002. According to the principle of the present invention, gpid[11:0] = 0000000000002 can be decomposed into gpid[11:4] = 000000002 and gpid[3:0] = 00002. It should be understood that gpid[11:0] has 12 bits, gpid[11:4] represents the first 8 bits of these 12 bits, and gpid[3:0] represents the last 4 bits of these 12 bits.

[0089] First, the ONU needs to perform a row lookup. Since gpid[11:4] = 000000002 represents the row address of the first memory array, which is 0 in decimal. 10 Therefore, the ONU identifies it as corresponding to the 0th SRAM row.

[0090] After identifying its corresponding SRAM row 0, the ONU needs to perform a column lookup, based on the decimal value of gpid[3:0] = 00002, which is 0. 10 The ONU identifies it as pointing to Bit 0, which is the position of the first bit (least significant bit) of the 16 bits stored in the SRAM row of the first memory array. For the meaning of Bit 0, ..., Bit 15, please refer to the explanation in the "Configuration of the First Memory Array" section; it will not be repeated here.

[0091] Next, the system determines whether the GEM frame belongs to this ONU based on the bit positions indicated by gpid[3:0]. The criterion is: a value of 1 indicates validity, while a value of 0 indicates invalidity. Therefore, in this example, since the value of Bit 0 in the 0th SRAM row is 0, the GEM frame with GEM Port ID = 0 is determined not to belong to this ONU.

[0092] In this example, since it has been determined that the GEM frame with GEM Port ID=0 does not belong to this ONU, there is no need to further determine which GEM port this GEM frame uses.

[0093] The second example is GEM Port ID = 32, which means gpid[11:0] = 32. 10 =0000001000002. According to the principle of the present invention, gpid[11:0]=0000001000002 can be decomposed into gpid[11:4]=000000102 and gpid[3:0]=00002.

[0094] First, the ONU needs to perform a row lookup. Since gpid[11:4] = 000000102 represents the row address of the first memory array, which is 2 in decimal. 10 Therefore, the ONU identifies it as corresponding to the second SRAM row.

[0095] After identifying that it corresponds to the second row of SRAM, the ONU needs to perform a column lookup. Based on the decimal value of gpid[3:0] = 00002, which is 0, the ONU identifies that it points to Bit 0, that is, the position of the first bit (least significant bit) of the 16 bits stored in the SRAM row of the first memory array.

[0096] Next, it is determined whether this GEM frame belongs to this ONU based on the bit positions indicated by gpid[3:0]. In this example, since the value of Bit 0 in the second SRAM row is 1, it is determined that this ONU has GEM Port ID = 32.

[0097] (Detailed explanation of the method for counting GPON GEM frames)

[0098] Back Figure 5 For example, after determining that the GEM frame with GEM Port ID = 32 belongs to this ONU, it is necessary to further determine the order of the specific GEM Port. First, a search is performed using the first memory array. After determining that it corresponds to the second row of SRAM in the first memory array through gpid[11:4] = 000000102, the search is performed based on gpid[3:0] = 00002 = 0. 10 The ONU identifies the bit it points to, which is the position of the first bit (least significant bit) of the 16 bits stored in the SRAM row of the first memory array. It then determines that the GEM Port is the first GEM Port in the second row of the SRAM of the first memory array (this GEM Port is the first memory cell).

[0099] Next, the second memory array is used for lookup. Since gpid[11:4] = 000000102 represents the row address of the second memory array, which is 2 in decimal. 10 It can be determined that it corresponds to the second SRAM row. Based on this, the data stored in the second SRAM row, 000001002, is output, which is 4 in decimal. 10 This means that in the first memory array, the SRAM rows preceding the second SRAM row have a total of four valid GEM Ports. Since GEM Port ID = 32 is the first GEM Port in the second SRAM row of the first memory array, the GEM Port with GEM Port ID = 32 is the fifth GEM Port.

[0100] In summary, the process of determining a specific GEM Port utilizes the result obtained from the first memory array (in this example, the guide obtained from Bit 0 of the second SRAM row); then it utilizes the result obtained from the second memory array (the second value) to retrieve the specific GEM Port from the GEM Port ID.

[0101] According to the aforementioned counting method, the second part of GEM Port ID and the second data are summed to obtain a summing result, and the summing result is used as the counter pointer. Therefore, according to the calculation 1+4, it can be known that the GEM frame with GEM PortID=32 belongs to the 5th GEM Port of this ONU.

[0102] Next, in terms of finding the count group, the corresponding count group is found by using the binary representation of 5 (000001012) of the 5th GEM Port as the counter pointer.

[0103] In this invention, the space of the first memory array is 256×16 bits, and the space of the second memory array is 256×8 bits, totaling 6144 bits, which is less than the 4096×9=36864 bits required by the memory array in the comparative example. This significantly saves 3840×8=30720 bits of memory space. Based on the ratio of 6144 to 36864, it can be seen that the memory space required by this invention is only one-sixth of that of the comparative example.

[0104] (Comparison of reference examples and embodiments)

[0105] Figure 6 A comparison table of reference examples and embodiments.

[0106] Now, under the same execution performance (i.e., one ONU supporting 256 GEM ports), through Figure 6 The comparison table shows that in the reference example (one memory array), the SRAM area requirement is to accommodate 36,864 bits; in the example presented through the implementation (two memory arrays), the total area required by configuring the first and second memory arrays is only 6,144 bits, requiring only one-sixth of the area of ​​prior art SRAM. Clearly, the present invention has an advantage in reducing the SRAM area.

[0107] In summary, according to the method of the present invention, during the search process, the first memory array is used to find out which row and which position of GEM PortID is located, and the second memory array is used to find the corresponding sum of valid bits, and then the counter pointer is calculated accordingly for counting.

[0108] Thus, the advantage of the present invention is that the method proposed in the present invention significantly reduces the SRAM area, thereby enabling a method for fast lookup and counting of GEM frames.

[0109] Although the invention has been described through various embodiments, it should be understood that many other possible modifications and variations may be made without departing from the spirit of the invention and the claims.

Claims

1. A search method applicable to Gigabit Passive Optical Networks (GPON), characterized in that, The search method includes: The GPON encapsulation method port identifier (GEM Port ID) of the GEM frame is decomposed into the first part GEM Port ID and the second part GEM Port ID; A row lookup is performed in the first memory array using the first portion of the GEM Port ID, and a column lookup is performed in the first memory array using the second portion of the GEM Port ID; and Based on the results of row and column lookups in the first memory array, a specific bit position in the first memory array is determined, wherein the specific bit position represents a specific GPON encapsulation method port (GEM Port) used by the GEM frame.

2. The search method according to claim 1, characterized in that, The method further includes: the ONU using the value of the specific bit position to determine whether the GEM frame belongs to the ONU.

3. The search method according to claim 1, characterized in that, The method further includes: using the first part of the GEM Port ID to perform a row lookup in the first memory array to obtain the specific GPON encapsulation port.

4. The search method according to claim 1, characterized in that, The first memory array has multiple memory rows, each with its own row address, and the data stored in the multiple memory rows includes multiple bits, each bit representing a GEM Port.

5. The search method according to claim 4, characterized in that, The method further includes: performing a search on a second memory array, wherein the second memory array is configured such that, except for the data in the 0th memory row, the data in the Mth memory row is... Where M is between 0 and 255, Σ is the number of valid bits in the Nth memory row of the first memory array, Σ is the summation operator, N is the summation subscript, and the second memory array is configured to define the value in the 0th memory row as 0.

6. A gigabit passive optical network (GPON) optical network unit (ONU) integrated circuit, characterized in that, The GPONONU integrated circuit includes: The first memory array, consisting of first memory rows, includes multiple memory cells, each representing a GPON packaged mode port (GEM Port). The first data stored in each memory cell indicates the validity of the associated GEM Port; and The second memory array is composed of second memory rows, wherein the second memory rows are set in the same order as the first memory rows are set in the first memory array, wherein the second data stored in the second memory rows is the total number of valid GEMPorts of all memory rows set before the first memory rows, and wherein the second data is related to a counter index.

7. The GPON ONU integrated circuit according to claim 6, wherein the first memory row and the second memory row have the same row address.

8. The GPON ONU integrated circuit of claim 6, wherein the number of bits in the second memory row needs to be able to represent the maximum number of GEM Ports that the GPON ONU integrated circuit can support.

9. A search method applied to the GPON ONU integrated circuit of claim 6, characterized in that, The search method includes: The first memory array is searched using the port ID of the GPON package type under test (GEM Port ID) to determine the first memory cell; In response to the first storage cell being valid, a lookup is performed on the second memory array based on the GEM Port ID to be tested to obtain the second data; and The counter pointer is determined based on the second data.

10. The search method according to claim 9, characterized in that, The step of determining the counter pointer based on the second data includes: The counter pointer is determined based on the GEM Port ID to be tested and the second data.

11. The search method according to claim 10, characterized in that, The search method also includes: The GEM Port ID to be tested is decomposed into a first part GEM Port ID and a second part GEM Port ID, wherein the first memory array is searched by the port identifier (GEM Port ID) of the GPON package type under test to determine the first memory cell, which includes: Perform a row lookup in the first memory array using the first portion of the GEM Port ID; and The second part of the GEM Port ID is used to perform a column lookup in the first memory array.

12. The search method according to claim 11, characterized in that, The response to the first storage unit being valid, performing a lookup on the second memory array based on the GEM Port ID to be tested to obtain the second data, includes: A row lookup is performed in the second memory array using the first portion of the GEM Port ID to determine the second memory row from the second memory array; and The second data is provided by the second memory row.

13. The search method according to claim 12, characterized in that, The determination of the counter pointer based on the GEM PortID to be tested and the second data further includes: A summation result is obtained by summing the second part of the GEM Port ID and the second data; and The summation result is used as the counter pointer.

Images