一种存储结构及其调控方法、存储器

By employing a five-layer storage structure and voltage regulation method, the problems of ferroelectric and antiferroelectric memories in terms of scale reduction and reliability are solved, realizing high-density integrated non-volatile multi-value storage with good noise and fatigue resistance characteristics.

CN116234321BActive Publication Date: 2026-07-17BEIJING SUPERSTRING ACAD OF MEMORY TECH +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
BEIJING SUPERSTRING ACAD OF MEMORY TECH
Filing Date
2021-12-02
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

Existing ferroelectric and antiferroelectric memories face challenges in terms of scale reduction and reliability, and existing antiferroelectric memories suffer from high power consumption and insufficient fatigue resistance.

Method used

The storage structure employs a five-layer structure, including a first metal electrode, a first ferroelectric layer, an antiferroelectric layer, a second ferroelectric layer, and a second metal electrode. It can switch between four storage states by applying specific forward and reverse voltages. ZrO2 material is used as the antiferroelectric layer to improve fatigue resistance and breakdown characteristics.

Benefits of technology

It achieves miniaturization of the storage structure, has high noise immunity and fatigue resistance, and realizes non-volatile storage performance without external bias and multi-value storage of 2 bits/cell, making it suitable for high-density integration.

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Abstract

本发明提供了一种存储结构及其调控方法、存储器,该存储结构由第一金属电极、第一铁电层、反铁电层、第二铁电层和第二金属电极构成。由于这五个层次结构都为平面结构,更有利于3D结构的堆叠,即具有了尺寸可微缩性。且这种层次结构的排布使该存储结构中有四个矫顽电场的存在,在用于多值存储时,其具有更高的抗噪声能力,而且可以改善相邻值之间的交叠现象。以ZrO2材料的反铁电层作为存储层,使该存储结构具有更好的抗疲劳特性与击穿特性。并且该存储结构在单个电容中同时实现了无需外部偏置的非易失存储性能和2bit / cell的多值存储,有利于其高密度集成。
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