A PLC control system employing data isolation and multi-core collaboration

Abstract

This invention discloses a multi-core collaborative PLC control system employing data isolation, comprising: a multi-core processor, including a secure core and a real-time core isolated from the secure core; the secure core is used for communication with peripheral interfaces; the real-time core is used for handling runtime system and real-time tasks; multiple memory modules, isolated from each other, including real-time memory, shared memory, and secure memory; the secure memory is used to handle transactions and processes within the secure core, responsible for the operation of basic PLC hardware functions and communication with external interfaces, and protecting user data in the memory; the shared memory is used for data interaction between the real-time core and the secure core, receiving simultaneous access from multiple processes, multiple secure cores, or multiple real-time cores; the real-time memory is used to handle transactions and processes within the real-time core, responsible for runtime tasks and real-time tasks of the PLC hardware. This achieves mutual isolation of data in different areas, preventing interference between them.

Description

Technical Field

[0001] This invention belongs to the field of industrial control automation technology, and in particular relates to a PLC control system that utilizes data isolation and multi-core collaboration. Background Technology

[0002] PLCs (Programmable Logic Controllers) are industrial control devices that have developed rapidly and are widely used since the 1960s. They are one of the three pillars of modern industrial automation. Utilizing programmable memory to store user instructions, they perform specific logical, sequential, timing, counting, arithmetic, and other defined functions through digital or analog inputs / outputs to control various types of machinery or production processes. Due to their extremely high importance, wide application of supporting equipment, broad geographical distribution, diverse control scenarios, and special network connectivity requirements, they bear the crucial responsibility of maintaining the safe and stable operation of equipment in national infrastructure sectors including power, chemical, petroleum, transportation, and manufacturing. Therefore, their security has received considerable attention. In recent years, attacks targeting PLC systems have occurred frequently, characterized by clear targets, professional attack methods, unpredictable attacks, and severe destructive consequences. Developing a safe and reliable domestically produced PLC system is urgently needed.

[0003] Most existing multi-core processors interact with each other by directly reading addresses in memory, which poses a significant risk to the security of data within different cores. Furthermore, they are prone to inter-core contention during operation, which can negatively impact system performance.

[0004] Therefore, it is necessary to propose a PLC control system that utilizes data isolation and multi-core collaboration. Summary of the Invention

[0005] The purpose of this invention is to provide a multi-core collaborative PLC control system that utilizes data isolation. This addresses the problem that traditional PLCs lack password security mechanisms, which can easily lead to information theft and tampering. The system achieves mutual isolation of data in different areas, preventing interference between them.

[0006] This invention provides a multi-core collaborative PLC control system employing data isolation, comprising:

[0007] Multi-core processor;

[0008] The multi-core processor includes a secure core and a real-time core that are isolated from the secure core.

[0009] The security core is used to communicate with peripheral interfaces;

[0010] The real-time kernel is used to process runtime systems and real-time tasks;

[0011] Multiple memory modules, which are isolated from each other, including real-time memory, shared memory, and secure memory;

[0012] The secure memory is used to process transactions and processes within the secure core, is responsible for the operation of the PLC hardware basic functions and communication of external communication interfaces, and protects user data in the memory. The operation of the PLC hardware basic functions and communication of external communication interfaces respectively include the drivers of physical interfaces related to CAN, serial port, and Ethernet attributes and application layer communication protocols.

[0013] The shared memory is used for data interaction between the real-time core and the security core, and can be accessed simultaneously by multiple processes, multiple security cores, or multiple real-time cores.

[0014] The real-time memory is used to process transactions and processes within the real-time core, and is responsible for the runtime tasks and real-time tasks of the PLC hardware. The runtime tasks and real-time tasks respectively include the communication protocols of the FPGA driver layer and the PLC application layer.

[0015] Based on the resource isolation access mechanism between the real-time kernel and the security kernel, the security domain and the real-time domain each have their own exclusive hardware and software resources, and each runs an independent operating system in both domains, which are located in different domains to handle services related to security and real-time requirements.

[0016] Preferably, the security core is also used to control the security encryption module through the operating system, perform reliable verification of key resources during system startup and operation, provide a reliable operating environment for PLC control applications, and form a security domain.

[0017] The real-time core is also used to run real-time control tasks through the operating system, and to achieve limited trust metrics and form a real-time domain by requesting the trusted monitoring agent service on the security core.

[0018] Preferably, the real-time memory, secure memory, and shared memory are a unified physical memory partitioned according to different address regions.

[0019] Preferably, the security core and the real-time core interact with each other through the shared memory, and the security core uses the corresponding security domain, while the real-time core uses the corresponding real-time domain.

[0020] Preferably, before the program starts, the security domain allocates the first system resources to each region for dedicated use, ensuring secure access to memory. The memory of the security domain is independent of that of the real-time domain; and / or,

[0021] Before the program starts, the real-time domain allocates the second system resources to each region for dedicated use, ensuring secure access to memory. The memory of the security domain and the real-time domain are independent of each other.

[0022] The first system resource and the second system resource both include data segment, code segment, stack space, security task and multi-domain shared space, and the first system resource and the second system resource share the multi-domain shared space.

[0023] Preferably, the data communication mechanism between real-time memory, secure memory, and shared memory is jointly implemented based on inter-core interrupts and polling flags to access shared memory.

[0024] Preferably, if the data communication mechanism between the real-time memory, secure memory and shared memory is an asynchronous message mechanism based on the inter-memory message flag mode, that is, when non-critical data polling flag access is performed, the shared memory space is used as the transmission medium, and when the kernel is running, the real-time memory is used to perform operations on the data area, code area and bus core data.

[0025] When communicating with external security kernel applications for non-critical data, the runtime kernel actively switches to shared memory mode, sets up a periodic loop check task to detect whether the shared memory has a data operation flag. If the runtime kernel detects a flag indicating access to data in the shared memory area, it switches to the shared memory data access mode. After the operation is completed, the flag is cleared, and the kernel switches back to real-time memory mode.

[0026] Preferably, if the data communication mechanism between the real-time memory, secure memory, and shared memory is a real-time messaging mechanism that supports a request-response mode, i.e., when critical data is interrupted and accessed in real time, if there is a timely message communicating with the real-time core and the secure core, then the real-time core initiates an inter-core interrupt, notifies the secure core to query the shared memory data flag, and switches to the shared memory access mode.

[0027] Preferably, in a single-user, single-process system, the secure memory mechanism prevents user programs from corrupting the operating system kernel's storage area:

[0028] In a multiprogramming environment, the secure memory isolates the storage areas of each process, preventing unauthorized access to each other's memory space.

[0029] Preferably, when a non-privileged process running in the secure memory-disk-disk-encrypted mode writes to the operating system space, the data on the memory in the embedded system is set to full-disk encryption.

[0030] Because the present invention adopts the above technical solution, it has the following advantages and positive effects compared with the prior art:

[0031] This invention effectively isolates two cores from each other, enabling data interaction through shared memory. It allows the security domain and real-time domain to each have their own dedicated hardware and software resources, facilitating real-time and efficient collaborative processing between the two cores.

[0032] This invention effectively avoids contention between two cores and prevents the secure core from modifying shared memory data without the permission of the real-time core.

[0033] This invention can fundamentally and holistically improve the security defense capabilities of PLC controllers, providing strong protection for the information security of PLC control systems.

[0034] To address the lack of cryptographic security mechanisms in traditional PLCs, which makes them susceptible to information theft and tampering, this invention proposes a PLC control system employing data isolation and multi-core processing. To achieve secure domain-based operation of the operating system on a multi-core processor, it is necessary to overcome the limitations of asymmetric multiprocessing (AMP) operation methods within the specific hardware environment of the PLC. This involves designing a primary core to control the entire system and other cores, incorporating a trust measurement mechanism during startup; secondly, hardware resources are allocated and access permissions are configured, with resource allocation closely related to the functional allocation and security design of the secure PLC; finally, a processing mechanism is needed to achieve communication and resource sharing between the two cores, balancing efficiency and security. This invention, based on the Loongson dual-core processor at the control layer, designs a resource isolation access mechanism between the real-time core and the security core, ensuring that the security domain and real-time domain each have exclusive hardware and software resources, and running an independent operating system instance in each domain. Therefore, services with high security requirements and those with high real-time requirements can be processed in different domains. The research on memory address space isolation technology uses logical partitioning technology to achieve partitioning and isolation of physical memory. A unified physical memory is divided into three independent logical memory areas: real-time memory, safe memory, and shared memory, according to different address regions, so as to achieve mutual isolation of data in different regions and prevent them from interfering with each other. Attached Figure Description

[0035] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings, wherein:

[0036] Figure 1 This is a functional block diagram of a multi-core collaborative PLC control system using data isolation, as described in an embodiment of the present invention.

[0037] Figure 2 This is a schematic diagram of a safe area isolation in a multi-core collaborative PLC control system using data isolation, as described in an embodiment of the present invention.

[0038] Figure 3This is a diagram illustrating the mechanism of kernel instruction parsing during real-time operation in a multi-core collaborative PLC control system employing data isolation, as described in an embodiment of the present invention. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0040] This invention provides a multi-core collaborative PLC control system employing data isolation, comprising:

[0041] Multi-core processor;

[0042] The multi-core processor includes a security core and a real-time core that is isolated from the security core. It can be understood that, in terms of the control layer, this invention is based on the Loongson dual-core processor and designs a resource isolation access mechanism between the real-time core and the security core. This enables the security domain and the real-time domain to each have their own exclusive hardware and software resources, and to run an independent operating system instance in each domain. Therefore, services with high security requirements and services with high real-time requirements can be processed in different domains.

[0043] The security core is used to communicate with peripheral interfaces;

[0044] The real-time kernel is used to process runtime systems and real-time tasks;

[0045] Multiple memory modules, which are isolated from each other, including real-time memory, shared memory, and secure memory;

[0046] The secure memory is used to process transactions and processes within the secure core, is responsible for the operation of the PLC hardware basic functions and communication of external communication interfaces, and protects user data in the memory. The operation of the PLC hardware basic functions and communication of external communication interfaces respectively include the drivers of physical interfaces related to CAN, serial port, and Ethernet attributes and application layer communication protocols.

[0047] The shared memory is used for data interaction between the real-time core and the security core, and can be accessed simultaneously by multiple processes, multiple security cores, or multiple real-time cores.

[0048] The real-time memory is used to process transactions and processes within the real-time core, and is responsible for the runtime tasks and real-time tasks of the PLC hardware. The runtime tasks and real-time tasks respectively include the communication protocols of the FPGA driver layer and the PLC application layer.

[0049] Based on the Loongson dual-core processor, a resource isolation access mechanism between the real-time core and the security core enables the security domain and the real-time domain to each have their own dedicated hardware and software resources. An independent operating system runs in each domain, handling business processes related to security and real-time requirements. This mechanism facilitates communication and resource sharing between the two cores, while also balancing efficiency and security. Here, the resource isolation access mechanism is the same as the data communication mechanism. This invention isolates hardware and software resources in different regions, using shared memory as a medium to achieve collaborative processing between different cores, avoiding contention between cores. It significantly improves the security of the PLC control system, providing strong protection for its information security.

[0050] Those skilled in the art will understand that this invention comprises a multi-core processor chip, multiple isolated memory modules, peripheral interfaces, etc. The main processor has two isolated cores: a security core and a real-time core. The security core handles the peripheral interfaces, while the real-time core handles the runtime system and real-time tasks. The two cores are isolated from each other and interact with each other through shared memory. (See reference...) Figure 1 As shown, the PLC control system in this embodiment of the invention can fundamentally and holistically improve the security and defense capabilities of the PLC controller, providing strong protection for the information security of the PLC control system.

[0051] Specifically, the real-time memory, secure memory, and shared memory are partitions of a unified physical memory based on different address regions. The dual cores of the main processor are isolated, divided into a secure core for handling peripheral interfaces and a real-time core for handling runtime systems and real-time tasks. A unified physical memory is then divided into three independent memory regions: real-time memory, secure memory, and shared memory.

[0052] Specifically, before program startup, the security domain allocates resources to each dedicated area to achieve secure memory access, ensuring that the memory of the security domain and the real-time domain are independent and invisible to each other. The security core and the real-time core interact with each other through the shared memory, with the security core using its corresponding security domain and the real-time core using its corresponding real-time domain. Different cores use different memory areas. This effectively isolates the two cores from each other, enabling data interaction through shared memory. It ensures that the security domain and the real-time domain each have their own dedicated hardware and software resources, allowing for real-time and effective collaborative processing between the two cores. It effectively avoids contention between the two cores and prevents the security core from modifying shared memory data without the permission of the real-time core.

[0053] Specifically, the security core is also used to control the security encryption module through the operating system, perform trusted verification of key resources during system startup and operation, provide a reliable operating environment for PLC control applications, and form a security domain;

[0054] The real-time core is also used to run real-time control tasks through the operating system, and to achieve limited trust metrics and form a real-time domain by requesting the trusted monitoring agent service on the security core.

[0055] Those skilled in the art will understand that the secure memory is used to handle transactions and processes within the secure kernel, and is responsible for the operation of the PLC hardware's basic functions and external communication interfaces, including the drivers for physical interfaces such as CAN, serial ports, and Ethernet, as well as application-layer communication protocols. Secure memory can protect user data stored in the memory. A memory protection unit is the smallest data range in the memory, which can be a word, block, page, surface, or segment. The smaller the protection unit, the higher the storage protection precision. In a single-user, single-process system, the secure memory mechanism prevents user programs from corrupting the operating system kernel's storage area; in a multiprogramming environment, it isolates the storage areas of each process, preventing unauthorized access to each other's memory space. Secure memory prohibits non-privileged processes running in user mode from writing to the operating system space. To protect the security of data on the memory, embedded systems use a method of full-disk encryption for the data on the memory. This encryption is transparent to the user; the user does not need to perform additional encryption or decryption operations. The system automatically encrypts the data before writing it to the memory, and then performs the memory write operation accordingly. After reading the data from the memory, the data is first decrypted, and then the decrypted plaintext is delivered to the system and application program.

[0056] The shared memory is used for data interaction between the real-time core and the security core. This memory data is shared storage data that can be accessed simultaneously by multiple processes or multiple cores. In multi-core systems, relevant measures are taken to protect the shared memory data or synchronize access to the shared data by execution units on different processors.

[0057] The real-time memory is used to process transactions and processes within the real-time core, handling runtime and real-time tasks of the PLC hardware, including communication protocols between the FPGA driver layer and the PLC application layer. These tasks and runtime protocols generate a large number of stack calls and data fragments in the secure memory. Therefore, it is necessary to periodically invoke memory management tasks to defragment the memory.

[0058] The operating system on the security kernel can control the security encryption module (TPM), providing trusted measurement capabilities and performing trusted verification of critical resources during system startup and runtime, providing a reliable operating environment for PLC control applications; this is called the security domain. The operating system on the real-time kernel, however, cannot use the TPM and runs real-time control tasks. It achieves limited trusted measurement by requesting trusted monitoring agent services on the security kernel; this is called the real-time domain. The security domain and the real-time domain each have their own dedicated system resources, including address space, memory, and I / O, such as... Figure 2 As shown.

[0059] Specifically, before the program starts, the security domain allocates the first system resources to each region for dedicated use, ensuring secure access to memory. The memory of the security domain is independent of that of the real-time domain; and / or,

[0060] Before the program starts, the real-time domain allocates the second system resources to each region for dedicated use, ensuring secure access to memory. The memory of the security domain and the real-time domain are independent of each other.

[0061] The first system resource and the second system resource both include data segment, code segment, stack space, security task and multi-domain shared space, and the first system resource and the second system resource share the multi-domain shared space.

[0062] Those skilled in the art will understand that, before program startup, the present invention allocates resources to each region for dedicated use by the security domain, thereby achieving secure memory access and ensuring that the memory of the security domain and the real-time domain are independent and invisible to each other. Simultaneously, similar to TPM, I / O resources can also be allocated to either the security domain or the real-time domain without conflict.

[0063] like Figure 3As shown, the data communication mechanism between real-time memory, secure memory, and shared memory is jointly implemented based on inter-core interrupts and polling flag access to shared memory. It provides two communication mechanisms: a real-time message mechanism supporting a request-response model and an asynchronous message mechanism based on an inter-memory message flag model, using shared memory space as the transmission medium to ensure data transfer between real-time memory and secure memory. The asynchronous message mechanism based on the inter-memory message flag model is essentially a non-critical data polling flag access method. Normally, the runtime kernel's operations on data and code areas are mostly performed in real-time memory. To communicate non-critical data with external secure kernel applications, the runtime kernel can actively switch to shared memory mode, setting a periodic loop check task to detect whether shared memory has a data operation flag. If the runtime kernel detects a shared memory data access flag, it switches to shared memory data access mode, clears the flag after operation, and switches back to real-time memory mode.

[0064] The real-time messaging mechanism supporting the request-response model, also known as the critical data interruption real-time access method, allows either core to initiate an inter-core interrupt if a timely message requires communication between the real-time core and the security core. This interrupt notifies the other core to query the shared memory data flag and switch to shared memory access mode. Although the security core can also initiate an interrupt to the real-time core, the shared memory data flag is managed solely by the real-time core. This means that the operability of the data is entirely determined by the real-time core, avoiding contention between the two cores and preventing the security core from modifying shared memory data without the permission of the real-time core.

[0065] This invention employs a multi-core PLC control system utilizing data isolation. Addressing the lack of cryptographic security mechanisms in traditional PLCs, which makes them susceptible to information theft and tampering, this invention proposes a multi-core PLC control system with data isolation. To achieve secure domain-based operation of the operating system on a multi-core processor, it is necessary to overcome the limitations of asymmetric multiprocessing (AMP) operation methods in the specific hardware environment of the PLC. This involves designing a primary core to control the entire system and other cores, incorporating a trust measurement mechanism during startup; secondly, hardware resources are allocated and access permissions are configured, with resource allocation closely related to the functional allocation and security design of the secure PLC; finally, a processing mechanism is needed to achieve communication and resource sharing between the two cores, balancing efficiency and security. This invention, based on the Loongson dual-core processor at the control layer, designs a resource isolation access mechanism between the real-time core and the security core, ensuring that the security domain and real-time domain each have exclusive hardware and software resources, and running an independent operating system instance in each domain. Therefore, services with high security requirements and those with high real-time requirements can be processed in different domains. The research on memory address space isolation technology uses logical partitioning technology to achieve partitioning and isolation of physical memory. A unified physical memory is divided into three independent logical memory areas: real-time memory, safe memory, and shared memory, according to different address regions, so as to achieve mutual isolation of data in different regions and prevent them from interfering with each other.

[0066] Based on the same concept, the present invention also provides a PLC control device that utilizes data isolation and multi-core collaboration, the device comprising the PLC control system that utilizes data isolation and multi-core collaboration as described in the embodiments of the present invention.

[0067] Based on the same concept, this invention also provides a PLC control device employing data isolation and multi-core collaboration, including a memory and a processor. The memory stores computer-readable instructions, and when the processor executes the computer-readable instructions, it implements the PLC control system employing data isolation and multi-core collaboration as described in the embodiments of this invention. The functions and principles of the device, equipment, or module are as described in the above embodiments and will not be repeated here.

[0068] This multi-core collaborative PLC control device employing data isolation can vary significantly due to differences in configuration or performance. It may include one or more central processing units (CPUs) and memory, and one or more storage media (e.g., one or more mass storage devices) for storing application programs or data. The memory and storage media can be short-term or long-term storage. The program stored on the storage media may include one or more modules, each of which may include a series of instruction operations on the multi-core collaborative PLC control device employing data isolation.

[0069] Furthermore, the processor can be configured to communicate with the storage medium and execute a series of instructions stored in the storage medium on a PLC control device that utilizes data isolation and multi-core collaboration.

[0070] Multi-core collaborative PLC control devices that utilize data isolation can also include one or more power supplies, one or more wired or wireless network interfaces, one or more input / output interfaces, and / or one or more operating systems, such as Windows Server, Vista, etc.

[0071] This invention also provides a computer-readable storage medium storing a computer program. When executed by one or more processors, the computer program implements a multi-core collaborative PLC control system with data isolation as described in the embodiments of this invention. If the modules in the embodiments are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in software form. The computer-readable storage medium can be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. The computer-readable storage medium stores instructions that, when executed on a computer, cause the computer to execute the multi-core collaborative PLC control system with data isolation as described in the embodiments.

[0072] Those skilled in the art will understand that the technical solution of the present invention, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in software. This computer software is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the device described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0073] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A PLC control system employing data isolation and multi-core collaboration, characterized in that, include: Multi-core processor; The multi-core processor includes a secure core and a real-time core that are isolated from the secure core. The security core is used to communicate with peripheral interfaces; The real-time kernel is used to process runtime systems and real-time tasks; Multiple memory modules, which are isolated from each other, including real-time memory, shared memory, and secure memory; The secure memory is used to process transactions and processes within the secure core, is responsible for the operation of the PLC hardware basic functions and communication of external communication interfaces, and protects user data in the memory. The operation of the PLC hardware basic functions and communication of external communication interfaces respectively include the drivers of physical interfaces related to CAN, serial port, and Ethernet attributes and application layer communication protocols. The shared memory is used for data interaction between the real-time core and the security core, and can be accessed simultaneously by multiple processes, multiple security cores, or multiple real-time cores. The real-time memory is used to process transactions and processes within the real-time core, and is responsible for the runtime tasks and real-time tasks of the PLC hardware. The runtime tasks and real-time tasks respectively include the communication protocols of the FPGA driver layer and the PLC application layer. Based on the resource isolation access mechanism between the real-time kernel and the security kernel, the security domain and the real-time domain each have their own exclusive hardware and software resources, and run an independent operating system in each of the two domains, which are located in different domains to process services related to security and real-time requirements. The security core is also used to control the security encryption module through the operating system, perform trusted verification of key resources during system startup and operation, provide a reliable operating environment for PLC control applications, and form a security domain. The real-time core is also used to run real-time control tasks through the operating system, and to achieve limited trust metrics and form a real-time domain by requesting the trusted monitoring agent service on the security core. In this context, the data flags in shared memory are managed solely by the real-time core. This means that whether the data is operable is entirely determined by the real-time core, avoiding competition between the two cores and preventing the security core from modifying shared memory data without the permission of the real-time core.

2. The PLC control system employing data isolation and multi-core collaboration according to claim 1, characterized in that, The real-time memory, secure memory, and shared memory are a unified physical memory partition based on different address regions.

3. The PLC control system employing data isolation and multi-core collaboration according to claim 1, characterized in that, The security core and the real-time core interact with each other through the shared memory, and the security core uses the corresponding security domain, while the real-time core uses the corresponding real-time domain.

4. The PLC control system employing data isolation and multi-core collaboration according to claim 1, characterized in that, Before the program starts, the security domain allocates the first system resources to each region for dedicated use, ensuring secure access to memory. The memory of the security domain is independent of that of the real-time domain; and / or, Before the program starts, the real-time domain allocates the second system resources to each region for dedicated use, ensuring secure access to memory. The memory of the security domain and the real-time domain are independent of each other. The first system resource and the second system resource both include data segment, code segment, stack space, security task and multi-domain shared space, and the first system resource and the second system resource share the multi-domain shared space.

5. The PLC control system employing data isolation and multi-core collaboration according to claim 1, characterized in that, The data communication mechanism between real-time memory, secure memory, and shared memory is jointly implemented based on inter-core interrupts and polling flags to access shared memory.

6. The PLC control system employing data isolation and multi-core collaboration according to claim 1, characterized in that, If the data communication mechanism between real-time memory, secure memory, and shared memory is an asynchronous message mechanism based on the inter-memory message flag mode, that is, when non-critical data polling flag access is performed, the shared memory space is used as the transmission medium, and when the kernel is running, it performs operations on the data area, code area, and bus core data through the real-time memory; When communicating with external security kernel applications for non-critical data, the runtime kernel actively switches to shared memory mode, sets up a periodic loop check task to detect whether the shared memory has a data operation flag. If the runtime kernel detects a flag indicating access to data in the shared memory area, it switches to the shared memory data access mode. After the operation is completed, the flag is cleared, and the kernel switches back to real-time memory mode.

7. The PLC control system employing data isolation and multi-core collaboration according to claim 1, characterized in that, If the data communication mechanism between the real-time memory, secure memory, and shared memory is a real-time messaging mechanism that supports a request-response mode, i.e., when critical data is interrupted and accessed in real time, if there is a timely message communicating with the real-time core and the secure core, the real-time core initiates an inter-core interrupt, notifies the secure core to query the shared memory data flag, and switches to shared memory access mode.

8. The PLC control system employing data isolation and multi-core collaboration according to claim 1, characterized in that, In a single-user, single-process system, the secure memory mechanism prevents user programs from corrupting the operating system kernel's storage area: In a multiprogramming environment, the secure memory isolates the storage areas of each process, preventing unauthorized access to each other's memory space.

9. The PLC control system employing data isolation and multi-core collaboration according to claim 1, characterized in that, When a non-privileged process running in the secure memory-disk-disk-encrypted mode writes to the operating system space, the data on the memory in the embedded system is set to full-disk encryption.

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