Control method and apparatus, device

CN116244247BActive Publication Date: 2026-10-27SMARTER SILICON (SHANGHAI) TECH CO LTD
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Patent Information

Application Number
CN202310182844.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-02-27
Publication Date
2026-10-27
Estimated Expiration
2043-02-27

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Abstract

The embodiment of the application discloses a control method and device and equipment, wherein the method comprises the following steps: determining a task scene currently processed by a first processing module of an electronic device and a storage module currently accessed by the first processing module; if the type of the storage module currently accessed by the first processing module does not match the task scene currently processed, switching an access path of the first processing module to a storage module matched with the task scene currently processed.
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Description

Technical Field

[0001] This application relates to electronic technology, and to, but is not limited to, a control method, apparatus, and device. Background Technology

[0002] Currently, electronic devices are being used more and more widely, and various modules with access initiation functions play an important role in the normal operation of these devices. Furthermore, electronic devices contain various types of storage modules, and these modules with access initiation functions can communicate with various types of storage units. Summary of the Invention

[0003] In view of this, embodiments of this application provide a control method, apparatus, and device.

[0004] The technical solution of this application embodiment is implemented as follows:

[0005] In a first aspect, embodiments of this application provide a control method, the method comprising:

[0006] Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;

[0007] If the type of the storage module currently accessed by the first processing module does not match the current task scenario, the access path of the first processing module is switched to a storage module that matches the current task scenario.

[0008] In some embodiments, the step of controlling the access path of the first processing module to switch to a storage module that matches the current task scenario if the type of the storage module currently accessed by the first processing module does not match the current task scenario includes: controlling the first processing module to enter a sleep mode if the type of the storage module currently accessed by the first processing module does not match the current task scenario; wherein, in the sleep mode, the task of the first processing module is in a suspended state; switching the access path of the first processing module to a storage module that matches the current task scenario; and after the switching is completed, deactivating the sleep mode of the first processing module.

[0009] In some embodiments, the first processing module includes a processing unit and / or a power control unit; correspondingly, controlling the first processing module to enter a sleep mode includes: sending an interrupt command to the processing unit and / or the power control unit to control the clock of the processing unit and / or the power control unit to turn off; if the power consumption of the processing unit and / or the power control unit is less than or equal to a preset power consumption, determining that the processing unit and / or the power control unit enters a sleep mode.

[0010] In some embodiments, switching the access path of the first processing module to a storage module that matches the currently processed task scenario includes: if the bus of the first processing module receives a first flag, the bus of the first processing module controls its own bus switch to switch the access path of the first processing module to a storage module that matches the currently processed task scenario; wherein, the first flag is used to indicate that the first processing module has successfully entered a sleep mode.

[0011] In some embodiments, the method further includes: determining the target storage module to be accessed after the first processing module switches; if the second processing module of the electronic device needs to share data space with the first processing module, controlling the access path of the second processing module to switch to the target storage module.

[0012] In some embodiments, if the type of the storage module currently accessed by the first processing module does not match the currently processed task scenario, controlling the access path of the first processing module to switch to a storage module that matches the currently processed task scenario includes at least one of the following: if the currently processed task scenario is a first scenario, and the storage module currently accessed by the first processing module is a first storage module, controlling the access path of the first processing module to switch to a second storage module; if the currently processed task scenario is a second scenario, and the storage module currently accessed by the first processing module is a second storage module, controlling the access path of the first processing module to switch to the first storage module; wherein the bandwidth requirement of the first scenario is higher than the bandwidth requirement of the second scenario, and the bandwidth of the first storage module is less than the bandwidth of the second storage module.

[0013] In some embodiments, the first storage module includes a memory module, and the second storage module includes a shared cache module.

[0014] Secondly, embodiments of this application provide a control device, the device comprising:

[0015] The determining unit is used to determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;

[0016] The control unit is configured to switch the access path of the first processing module to a storage module that matches the current processing task scenario if the type of the storage module currently accessed by the first processing module does not match the current processing task scenario.

[0017] Thirdly, embodiments of this application provide an electronic device, the electronic device comprising:

[0018] First processing module;

[0019] Multiple storage modules;

[0020] The system control module is used to determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module; if the type of the storage module currently being accessed by the first processing module does not match the current task scenario, the system control module to switch its access path to a storage module that matches the current task scenario.

[0021] In some embodiments, the electronic device further includes: a bus, wherein the first processing module of the electronic device and a plurality of storage modules of the electronic device are all connected to the bus; correspondingly, the system control module includes a control unit and a bus switch located on the bus; the control unit is used to send control commands; the bus switch is used to respond to the control commands sent by the control unit to control the on / off state of the access path between the first processing module and each of the storage modules. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 1 ;

[0023] Figure 2 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 2 ;

[0024] Figure 3 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 3 ;

[0025] Figure 4A This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 1 ;

[0026] Figure 4B This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 2 ;

[0027] Figure 5This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 3 ;

[0028] Figure 6 This is a schematic diagram of the composition of the control device according to an embodiment of this application;

[0029] Figure 7 This is a schematic diagram of a hardware entity of an electronic device according to an embodiment of this application. Detailed Implementation

[0030] The technical solutions of this application will be further described in detail below with reference to the accompanying drawings and embodiments. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0031] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0032] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustration and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.

[0033] It should be noted that the terms "first, second, and third" used in the embodiments of this application are merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first, second, and third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0034] Based on this, this application provides a control method. The function implemented by this method can be achieved by the processor in the electronic device calling program code. Of course, the program code can be stored in the storage medium of the electronic device. Figure 1 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 1 ,like Figure 1 As shown, the method includes:

[0035] Step S101: Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;

[0036] Here, the electronic device can be any type of device with information processing capabilities, such as a navigator, smartphone, tablet, wearable device, laptop, robot vacuum cleaner, smart kitchen and bathroom appliances, smart home devices, automobile, server, or server cluster. The processor in the electronic device may include hardware units such as SCP (System Control Processor).

[0037] In this embodiment, the first processing module refers to a unit in an electronic device capable of actively initiating access, such as a CPU (Central Processing Unit), GPU (Graphics Processing Unit), DSP (Digital Signal Processor), and MPU (Microprocessor Unit). In other words, this embodiment does not limit the type of the first processing module; any type of processing module is within the scope of protection of this application.

[0038] This application embodiment may include multiple task scenarios, such as high-bandwidth scenarios and low-latency scenarios. The task scenario currently being processed by the first processing module can be one of these scenarios. Specifically, in a high-bandwidth scenario, the first processing module needs to access the Shared Cache (SC) together with other processing modules to improve access bandwidth; while in a low-latency scenario, the first processing module can directly access the Double Data Rate (DDR) to reduce the latency of accessing the SC. In this application embodiment, the task scenario currently being processed by the first processing module can be determined by the type of application being processed and its performance requirements, or by other methods. For example, if the first processing module is currently running multi-core applications for classification, games, short videos, or photography, these applications typically have high bandwidth requirements, then the task scenario currently being processed by the first processing module is determined to be a high-bandwidth scenario. Conversely, if the first processing module is currently running a single-core application for classification, or the electronic device is in a startup state, requiring low latency, then the task scenario currently being processed by the first processing module is determined to be a low-latency scenario.

[0039] In other embodiments, the task scenarios can also be divided from other perspectives.

[0040] Here, the electronic device may include multiple storage modules, which can be classified into different types, such as cache, memory, and secondary storage. The storage module currently accessed by the first processing module may belong to one of these types. Of course, this application embodiment does not limit the classification method of multiple storage modules in the electronic device.

[0041] Step S102: If the type of the storage module currently accessed by the first processing module does not match the current processing task scenario, control the access path of the first processing module to switch to a storage module that matches the current processing task scenario.

[0042] Here, different storage modules in electronic devices have different characteristics, and thus can be applied to different task scenarios. For example, SC modules have high bandwidth, which can increase access bandwidth when multiple MASTERs (i.e., the initiators of read / write transfers) access SC at the same time. DDR, on the other hand, has low latency, and direct MASTER access to DDR can reduce latency; therefore, DDR is suitable for time-critical task scenarios. Furthermore, different storage modules can be switched according to the different task requirements of the electronic device.

[0043] In this embodiment, multiple task scenarios can be pre-defined: a first task scenario, a second task scenario, etc., and the type of storage module corresponding to different task scenarios can be determined: the first task scenario corresponds to a first type of storage module, and the second task scenario corresponds to a second type of storage module. For example, the first task scenario is a high-bandwidth scenario, and the first type of storage module is a cache; the second task scenario is a low-latency scenario, and the second type of storage module is memory. Furthermore, the storage module accessed by the first processing module can be dynamically switched according to the task scenario currently being processed by the first processing module.

[0044] For example, if the CPU is currently accessing memory and is running a camera application, the system determines that the type of storage module being accessed does not match the current task and switches the CPU's access path to the cache. Similarly, if the CPU is currently accessing the cache and is running a single-core classification task, the system determines that the type of storage module being accessed does not match the current task and switches the CPU's access path to memory.

[0045] Here, the control methods in steps S101 to S102 above can be used to accommodate different application scenarios of the processing module and dynamically switch the access path of the processing module.

[0046] In some embodiments, if the type of the storage module currently accessed by the first processing module does not match the currently processed task scenario, controlling the access path of the first processing module to switch to a storage module that matches the currently processed task scenario includes at least one of the following:

[0047] In the first scenario, if the current processing task scenario is the first scenario, and the storage module currently accessed by the first processing module is the first storage module, the access path of the first processing module is switched to the second storage module; the performance of the second storage module is better suited to meet the needs of the first scenario compared to the first storage module.

[0048] Secondly, if the current task scenario being processed is the second scenario, and the storage module currently accessed by the first processing module is the second storage module, the access path of the first processing module is switched to the first storage module; the performance of the first storage module is better suited to meet the needs of the second scenario compared to the second storage module.

[0049] In some embodiments, the first scenario includes high bandwidth requirements, the second scenario includes low latency, the bandwidth requirement of the first scenario is higher than the bandwidth requirement of the second scenario, and the bandwidth of the first storage module is less than the bandwidth of the second storage module.

[0050] In some embodiments, the first storage module includes a memory module, and the second storage module includes a shared cache module. The memory module includes DDR, SDRAM (synchronous dynamic random-access memory), etc.; the cache module includes system cache (SC), etc.

[0051] Of course, the embodiments of this application also include three or more types of storage modules, which will result in more corresponding task scenarios and MSTER will also include more switching paths. That is to say, different computer architectures include different storage allocation methods, but the basic principle for the embodiments of this application is consistent: different types of storage modules have different performance distinctions (such as bandwidth, latency, power consumption, etc.), and the storage module access path is switched according to the needs of different task scenarios.

[0052] For example, if the task currently being processed by the first processing module has high bandwidth requirements, the access path of the first processing module will be switched to the shared cache; if the task currently being processed by the first processing module has high time requirements, the access path of the first processing module will be switched to DDR, so that the data is written directly to DDR without accessing the cache, thus shortening the processing time.

[0053] In existing technologies, each master module is typically connected either entirely to the SC or entirely to the DDR, which facilitates control, maintains data consistency, and meets the needs of data sharing. The control method in this application, while maintaining data consistency, can also be compatible with different task scenarios based on the different performance of the storage modules, thereby improving the overall performance of the electronic device.

[0054] Based on the foregoing embodiments, this application further provides a control method, which is applied to an electronic device. Figure 2 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 2 ,like Figure 2 As shown, the method includes:

[0055] Step S201: Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;

[0056] Step S202: If the type of the storage module currently accessed by the first processing module does not match the current processing task scenario, the first processing module is controlled to enter a sleep mode; wherein, in the sleep mode, the task of the first processing module is suspended. Specifically, the sleep mode here may include: sleep mode (kernel stops, peripherals run), stop mode (all clocks stop), or standby mode, etc., as long as it is ensured that there is no data transmission between the first processing module and the storage module.

[0057] In this embodiment, the first processing module can be configured by software to enter a sleep mode, facilitating the subsequent switching of the access path of the first processing module. For example, if the first processing module is a CPU, the CPU and PCU (Power Control Unit) can be configured to enter a fake power-off mode (such as OFF_FAKE mode) before the CPU access path is switched. (Access by either CPU will pass through the PCU, and the switching operation can only be performed when the PCU is also not accessing the CPU; therefore, both the CPU and PCU need to be fake-powered.) Internally running tasks are paused, but the chip remains powered. When the hardware circuit (e.g., the bus circuit of the electronic device) receives a flag indicating that the CPU and PCU have successfully entered the fake power-off mode, the CPU's access path is switched to the storage module that matches the currently processed task scenario. In some embodiments, in ARM architecture electronic devices, other instructions with similar functions, such as WFI (Wait For Interrupu) and WFE (Wait For Event), can be used to make the first processing module enter the sleep mode.

[0058] In some embodiments, path switching can be achieved by switching a hardware logic bus switch on the bus.

[0059] Step S203: Switch the access path of the first processing module to the storage module that matches the current processing task scenario;

[0060] Step S204: After the switching is completed, deactivate the sleep mode of the first processing module.

[0061] In this embodiment, after the switch is completed, the CPU can be woken up using SCP or other external interrupt signals. After the CPU is woken up, the CPU clock is in normal working condition, and the CPU power consumption is also greater than a preset threshold. At this time, the CPU can perform information processing and program execution normally.

[0062] Here, the control methods in steps S201 to S204 above can be used to accommodate different application scenarios of the processing module and to dynamically switch the access path of the processing module in a software manner.

[0063] In some embodiments, the first processing module includes a processing unit and / or a power control unit; correspondingly, step S202, controlling the first processing module to enter a sleep mode, includes:

[0064] Step S2021: Send an interrupt command to the processing unit and / or the power control unit to control the clock of the processing unit and / or the power control unit to turn off;

[0065] Here, the processing unit can be an NPU (Neural-network Processing Unit), a CPU, or other modules with data read / write initiation capabilities. The power control unit can be a PCU. Furthermore, both the CPU and the PCU can be configured to be in sleep mode. The sleep mode includes, but is not limited to, a dummy power-down mode. In some embodiments, such as an ARM (Advanced RISC Machine) architecture, the dummy power-down mode involves entering WFI (Wait for Interrupt) and performing a power-down step, but without notifying the PMU (Power Management Unit) to power down the CPU. This can be understood as the power management unit continuing to supply power, but the CPU's own status flag is changed to a power-down flag.

[0066] Step S2022: If the power consumption of the processing unit and / or the power control unit is less than or equal to the preset power consumption, determine that the processing unit and / or the power control unit enters sleep mode.

[0067] In this embodiment, the processing unit can enter sleep mode by controlling the clock of the processing unit to turn off. Furthermore, the power consumption of the processing unit is used to determine whether the processing module has entered sleep mode.

[0068] For example, the WFI or WFE instructions can be used to control the CPU to enter a low-power state, which shuts down the CPU clock, thereby reducing its dynamic power consumption. When the CPU receives an interrupt, it will be woken up and resume operation.

[0069] Based on the foregoing embodiments, this application further provides a control method, which is applied to an electronic device, and the method includes:

[0070] Step S211: Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;

[0071] For example, different application or process can be pre-defined into corresponding task scenarios, and the mapping relationship between different application or process and different task scenarios can be obtained. This mapping relationship can then be written into a whitelist for invocation.

[0072] Step S212: If the type of the storage module currently accessed by the first processing module does not match the current processing task scenario, control the first processing module to enter a sleep mode; wherein, in the sleep mode, the task of the first processing module is in a suspended state;

[0073] Step S213: If the bus of the electronic device receives the first flag, control the bus switch located on the bus to switch the access path of the first processing module to the storage module that matches the current processing task scenario;

[0074] The first flag is used to indicate that the first processing module has successfully entered sleep mode;

[0075] Here, the first processing module and multiple storage modules of the electronic device are all connected to the bus of the electronic device; when the bus of the electronic device receives that the first processing module is in sleep mode, it controls the bus switch to switch the access path of the first processing module.

[0076] For example, when the bus circuit (including the SCP and the bus) receives a flag indicating that the CPU has successfully entered hibernation mode, the SCP of the bus circuit sends a switching command to the bus switch of the bus. The bus switch controls the CPU's access path to switch from SC to DDR or from DDR to SC.

[0077] Step S214: After the switching is completed, deactivate the sleep mode of the first processing module.

[0078] Here, the control methods in steps S211 to S214 above can be used to accommodate different application scenarios of the processing module, and the dynamic switching of the processing module access path can be achieved through a bus switch in software.

[0079] Based on the foregoing embodiments, this application further provides a control method, which is applied to an electronic device. Figure 3 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 3 ,like Figure 3 As shown, the method includes:

[0080] Step S301: Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;

[0081] Step S302: If the type of the storage module currently accessed by the first processing module does not match the current task scenario, control the access path of the first processing module to switch to a storage module that matches the current task scenario.

[0082] Step S303: If the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module, determine whether the first processing module and the second processing module need to share data space;

[0083] In this embodiment, the second processing module refers to a unit in an electronic device capable of actively initiating access, such as a CPU (Central Processing Unit), GPU (Graphics Processing Unit), DSP (Digital Signal Processor), and MPU (Microprocessor Unit). That is, this embodiment does not limit the type of the second processing module; any type of processing module is within the scope of protection of this application. Furthermore, in this embodiment, the first processing module and the second processing module are different processing modules.

[0084] Here, determining whether the first processing module and the second processing module need to share data space refers to determining whether the first processing module and the second processing module need to access the same storage module simultaneously. Essentially, this means that there needs to be data interaction between the two processing modules. For example, if the second processing module needs to use data from the first processing module, data interaction through the same storage module is necessary to ensure data consistency. For instance, when a user is using a photo editing application on an electronic device, both the CPU and GPU are working, and the CPU needs to use data processed by the GPU. In this case, the CPU and GPU need to share data space.

[0085] It should be noted that in this embodiment of the application, it is necessary to determine whether the first processing module and the second processing module need to share the data space, but this embodiment of the application does not limit the method of determining whether the data space needs to be shared.

[0086] Step S304: If the first processing module and the second processing module need to share data space, control the access path of the second processing module to switch to the storage module currently accessed by the first processing module.

[0087] Here, compared to existing technologies where both the first and second processing modules directly share a certain type of storage module (e.g., the CPU and GPU directly share SC or DDR), the control scheme in this embodiment dynamically switches the path of the storage module accessed by the first processing module according to the task scenario currently being processed by the first processing module. Furthermore, if the first and second processing modules need to share data space, the control scheme in this embodiment controls the access path of the second processing module to be the same as that of the first processing module. For example, if the CPU and GPU of an electronic device are currently accessing DDR storage modules (i.e., the CPU and GPU directly share DDR), and the user opens a photo editing application, the SCP of the electronic device detects that the type of storage module currently accessed by the CPU does not match the task scenario corresponding to the photo editing application, and switches the CPU's access path to the shared cache module. However, if the photo editing application requires the CPU and GPU to share data, the SCP controls the GPU to also switch its access path to the shared cache module.

[0088] In some embodiments, if the access path of the first processing module is switched to the memory module, the second processing module, which was originally connected to the shared cache module, can directly access the memory module without switching the bus connection path of the second processing module, through cache penetration technology, DMA (Direct Memory Access), or other methods.

[0089] In some embodiments, the access path to the second processing module can also be switched by controlling a bus switch.

[0090] Here, through the control methods in steps S301 to S303 above, the access path of the processing module can be dynamically switched in different application scenarios of the compatible processing module, while avoiding the problem of data inconsistency between different processing modules, and achieving the effect of different processing modules sharing data storage space.

[0091] Based on the foregoing embodiments, this application provides an electronic device. Figure 4A This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 1 ,like Figure 4A As shown, the electronic device 40 includes:

[0092] First processing module 41;

[0093] Multiple storage modules 42;

[0094] The system control module 43 is used to determine the task scenario currently being processed by the first processing module 41 of the electronic device 40, and the storage module 421 currently being accessed by the first processing module 41; if the type of the storage module 421 currently being accessed by the first processing module 41 does not match the task scenario being processed, the system control module 43 controls the access path of the first processing module 41 to switch to the storage module 422 that matches the task scenario being processed.

[0095] Here, the multiple storage modules 42 include storage module 421 and storage module 422.

[0096] For example, if the CPU (first processing module 41) of an electronic device is currently accessing the DDR (storage module 421) storage module, and the user opens a photo editing application, the SCP (system control module 43) of the electronic device will detect that the type of the storage module currently accessed by the CPU does not match the task scenario corresponding to the photo editing application, and will switch the CPU's access path to the shared cache module (storage module 422).

[0097] Based on the foregoing embodiments, this application further provides an electronic device. Figure 4B This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 2 ,like Figure 4B As shown, the electronic device 400 includes:

[0098] First processing module 401;

[0099] Multiple storage modules 402;

[0100] The system control module 403 is used to determine the task scenario currently being processed by the first processing module 401 of the electronic device 400, and the storage module 4021 currently being accessed by the first processing module 401; if the type of the storage module 4021 currently being accessed by the first processing module 401 does not match the task scenario being processed, the system control module 403 controls the access path of the first processing module 401 to switch to the storage module 4022 that matches the task scenario being processed.

[0101] Bus 404, the first processing module 401 of the electronic device 400 and the multiple storage modules 402 of the electronic device 400 are all connected to the bus 404;

[0102] Correspondingly, the system control module 403 includes a control unit 4031 and a bus switch 4032 located on the bus 404;

[0103] The control unit 4031 is used to send control commands;

[0104] The bus switch 4032 is used to respond to the control command sent by the control unit 4031 and control the on / off state of the access path between the first processing module 401 and each of the storage modules 402.

[0105] Here, the electronic device has a bus for connecting a first processing module and multiple storage modules of the electronic device. Furthermore, the system control module includes a control unit and a bus switch located on the bus. After determining that the type of storage module currently accessed by the first processing module does not match the current processing task scenario, the control unit sends a switching command to the bus switch. The bus switch, according to the switching command, switches the access path of the first processing module to the first storage module (i.e., controls the access path between the first processing module and the first storage module to be connected, and controls the access path between the first processing module and other storage modules among the multiple storage modules except the first storage module to be disconnected), or switches the access path of the first processing module to a second storage module according to the switching command, wherein the first storage module and the second storage module are different.

[0106] It should be noted that the descriptions of the above device embodiments are similar to those of the above method embodiments, and have similar beneficial effects. For technical details not disclosed in the device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0107] In existing technologies, the CPU and multiple MASTERs (i.e., the initiators of read / write transfers) directly share the SC or DDR. However, the drawback of this approach is that the CPU cannot simultaneously handle high-bandwidth and low-latency application scenarios. Specifically, in high-bandwidth scenarios, the CPU needs to access the SC along with other MASTERs to improve access bandwidth; while in low-latency scenarios, the CPU directly accesses the external DDR memory, which reduces the latency of accessing the SC.

[0108] Based on this, this application embodiment further provides a control method and an electronic device. The control method can realize the dynamic switching of the above two types of application scenarios, that is, it can enable the CPU access path to support dynamic switching.

[0109] Figure 5 This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 3 ,like Figure 5 As shown, the electronic devices include multiple cores of the CPU (i.e., CPU0 to CPUn-1), PCU, SCP, bus switch, SC, and DDR.

[0110] This can be achieved by utilizing the CPU and PCU's own OFF_FAKE mode (fake power-off mode). Before the CPU access path switch, the CPU and PCU are each put into OFF_FAKE mode without being powered down. When the hardware circuit receives a flag indicating that the CPU and PCU have successfully entered OFF_FAKE mode, the hardware logic BUS_SWITCH switches the CPU's access path from SC to DDR or vice versa. After the switch is complete, the CPU is woken up using SCP or an external interrupt.

[0111] Here, OFF_FAKE is the CPU's fake power-down mode, that is, it enters WFI (Wait for Interrupt) and executes the POWER DOWN step, but does not notify the PMU to power down the CPU.

[0112] The solution in this application has the following advantages:

[0113] (1) In high-bandwidth scenarios, the CPU can access the SC along with other MASTERs to increase access bandwidth; while in low-latency scenarios, it can directly access the external memory DDR, thereby reducing the latency of accessing the SC.

[0114] (2) Supports dynamic switching between the two types of application scenarios mentioned above.

[0115] Based on the foregoing embodiments, this application provides a control device, which includes the included units, the modules included in each unit, and the components included in each module. It can be implemented by a processor in an electronic device; of course, it can also be implemented by specific logic circuits. In the implementation process, the processor can be an SCP (System Control Processor), a CPU (Central Processing Unit), an MPU, a DSP, or an FPGA (Field Programmable Gate Array), etc.

[0116] Figure 6 This is a schematic diagram of the composition of the control device according to an embodiment of this application, as shown below. Figure 6 As shown, the device 600 includes:

[0117] The determining unit 601 is used to determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;

[0118] The control unit 602 is configured to control the access path of the first processing module to switch to a storage module that matches the current processing task scenario if the type of the storage module currently accessed by the first processing module does not match the current processing task scenario.

[0119] In some embodiments, the control unit 602 includes:

[0120] The control module is configured to control the first processing module to enter a sleep mode if the type of the storage module currently accessed by the first processing module does not match the current task scenario; wherein, in the sleep mode, the task of the first processing module is in a suspended state.

[0121] A switching module is used to switch the access path of the first processing module to a storage module that matches the current processing task scenario;

[0122] The release module is used to release the sleep mode of the first processing module after the switch is completed.

[0123] In some embodiments, the first processing module includes a processing unit and / or a power control unit; correspondingly, the control module includes:

[0124] A transmitting component is used to send an interrupt command to the processing unit and / or the power control unit to control the clock of the processing unit and / or the power control unit to be turned off;

[0125] A determining component is configured to determine that the processing unit and / or the power control unit enters a sleep mode if the power consumption of the processing unit and / or the power control unit is less than or equal to a preset power consumption.

[0126] In some embodiments, the switching module includes:

[0127] A switching submodule is used to control a bus switch located on the bus to switch the access path of the first processing module to a storage module that matches the current processing task scenario if the bus of the electronic device receives a first flag.

[0128] The first flag is used to indicate that the first processing module has successfully entered sleep mode.

[0129] In some embodiments, the apparatus further includes:

[0130] A shared determination unit is used to determine whether the first processing module and the second processing module need to share data space if the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module.

[0131] The switching control unit is used to control the access path of the second processing module to switch to the storage module currently accessed by the first processing module if the first processing module and the second processing module need to share data space.

[0132] In some embodiments, the control unit 602 includes at least one of the following:

[0133] The first control subunit is configured to, when the currently processed task scenario is the first scenario, control the access path of the first processing module to switch to the second storage module if the storage module currently accessed by the first processing module is the first storage module.

[0134] The second control subunit is used to control the access path of the first processing module to switch to the first storage module if the storage module currently accessed by the first processing module is the second storage module when the current processing task scenario is the second scenario.

[0135] In this scenario, the bandwidth requirement of the first scenario is higher than that of the second scenario, and the bandwidth of the first storage module is less than that of the second storage module.

[0136] In some embodiments, the first storage module includes a memory module, and the second storage module includes a shared cache module.

[0137] The description of the above device embodiments is similar to that of the above method embodiments, and has similar beneficial effects. For technical details not disclosed in the device embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

[0138] It should be noted that, in the embodiments of this application, if the above-described control method is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of this application, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause an electronic device (which may be a personal computer, server, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM (Read Only Memory), magnetic disks, or optical disks. Thus, the embodiments of this application are not limited to any specific hardware and software combination.

[0139] Correspondingly, this application embodiment provides another electronic device, including a memory and a processor. The memory stores a computer program that can run on the processor, and when the processor executes the program, it implements the steps in the control method provided in the above embodiments.

[0140] Correspondingly, embodiments of this application provide a readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps in the control method described above.

[0141] It should be noted that the descriptions of the storage medium and device embodiments above are similar to the descriptions of the method embodiments above, and have similar beneficial effects. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0142] It should be noted that, Figure 7 This is a schematic diagram of a hardware entity of an electronic device according to an embodiment of this application, such as... Figure 7 As shown, the hardware entity of the electronic device 700 includes: a processor 701, a communication interface 702, and a memory 703, wherein...

[0143] The processor 701 typically controls the overall operation of the electronic device 700.

[0144] The communication interface 702 enables the electronic device 700 to communicate with other electronic devices, servers, or platforms via a network.

[0145] The memory 703 is configured to store instructions and applications executable by the processor 701, and can also cache data to be processed or already processed (e.g., image data, audio data, voice communication data and video communication data) in the processor 701 and various modules in the electronic device 700. It can be implemented by FLASH (flash memory) or RAM (Random Access Memory).

[0146] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0147] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0148] Furthermore, in the various embodiments of this application, all functional units can be integrated into one processing module, or each unit can be a separate unit, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in a combination of hardware and software functional units. Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, RAM, magnetic disks, or optical disks.

[0149] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined to obtain new method embodiments without conflict. The features disclosed in the several product embodiments provided in this application can be arbitrarily combined to obtain new product embodiments without conflict. The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined to obtain new method embodiments or device embodiments without conflict.

[0150] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A control method, the method comprising: Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module; If the type of the storage module currently accessed by the first processing module does not match the current task scenario, the access path of the first processing module is switched to the storage module that matches the current task scenario. If the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module, determine whether the first processing module and the second processing module need to share data space; If the first processing module and the second processing module need to share data space, the access path of the second processing module is switched to the storage module currently accessed by the first processing module.

2. The method according to claim 1, wherein if the type of the storage module currently accessed by the first processing module does not match the currently processed task scenario, controlling the access path of the first processing module to switch to a storage module that matches the currently processed task scenario includes: If the type of the storage module currently accessed by the first processing module does not match the current task scenario, the first processing module is controlled to enter a sleep mode; wherein, in the sleep mode, the task of the first processing module is in a suspended state; Switch the access path of the first processing module to the storage module that matches the current processing task scenario; After the switch is complete, the sleep mode of the first processing module is released.

3. The method according to claim 2, wherein the first processing module includes a processing unit and / or a power control unit; correspondingly, controlling the first processing module to enter a sleep mode includes: Send an interrupt command to the processing unit and / or the power control unit to control the clock of the processing unit and / or the power control unit to turn off; If the power consumption of the processing unit and / or the power control unit is less than or equal to a preset power consumption, the processing unit and / or the power control unit are determined to enter a sleep mode.

4. The method according to claim 2, wherein switching the access path of the first processing module to a storage module that matches the currently processed task scenario includes: If the bus of the electronic device receives a first flag, it controls the bus switch on the bus to switch the access path of the first processing module to a storage module that matches the current processing task scenario; The first flag is used to indicate that the first processing module has successfully entered sleep mode.

5. The method according to any one of claims 1 to 4, wherein if the type of the storage module currently accessed by the first processing module does not match the current task scenario, controlling the access path of the first processing module to switch to a storage module that matches the current task scenario includes at least one of the following: If the current task scenario being processed is the first scenario, and the storage module currently accessed by the first processing module is the first storage module, the access path of the first processing module is switched to the second storage module. If the current task scenario being processed is the second scenario, and the storage module currently accessed by the first processing module is the second storage module, the access path of the first processing module is switched to the first storage module. in, The bandwidth requirement of the first scenario is higher than that of the second scenario, and the bandwidth of the first storage module is less than that of the second storage module.

6. The method according to claim 5, wherein the first storage module includes a memory module and the second storage module includes a shared cache module.

7. A control device, the device comprising: The determining unit is used to determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module; The control unit is configured to control the access path of the first processing module to switch to a storage module that matches the current processing task scenario if the type of the storage module currently accessed by the first processing module does not match the current processing task scenario. A shared determination unit is used to determine whether the first processing module and the second processing module need to share data space if the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module. The switching control unit is used to control the access path of the second processing module to switch to the storage module currently accessed by the first processing module if the first processing module and the second processing module need to share data space.

8. An electronic device, the electronic device comprising: First processing module; Multiple storage modules; The system control module is used to determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module; if the type of the storage module currently being accessed by the first processing module does not match the current task scenario, the module controls the access path of the first processing module to switch to the storage module that matches the current task scenario; if the storage module currently being accessed by the second processing module of the electronic device is different from the storage module currently being accessed by the first processing module, the module determines whether the first processing module and the second processing module need to share data space; if the first processing module and the second processing module need to share data space, the module controls the access path of the second processing module to switch to the storage module currently being accessed by the first processing module.

9. The electronic device according to claim 8, further comprising: The first processing module of the electronic device and multiple storage modules of the electronic device are all connected to the bus; Correspondingly, the system control module includes a control unit and a bus switch located on the bus; The control unit is used to send control commands; The bus switch is used to respond to control commands sent by the control unit and control the on / off state of the access path between the first processing module and each of the storage modules.

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