Method of reducing silicon carbide deep trench sidewall roughness and device

CN116247079BActive Publication Date: 2026-08-18GUIZHOU XINCHANGZHENG TECH CO LTD +1
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Patent Information

Application Number
CN202211737046.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-30
Publication Date
2026-08-18
Estimated Expiration
2042-12-30

AI Technical Summary

Technical Problem

[0006]这种粗糙的侧壁不利于功率器件,主要体现在两个方面:一、在超结技术中,一种方式是先刻蚀沟槽,再进行沟槽侧壁离子注入来制备超结的P柱;若是沟槽侧壁存在这种“波浪形”粗糙纹路,那么不利于沟槽的侧壁离子注入,会使得P行区域深处也会出现类似波浪形掺杂边缘,且不利于超结的电荷平衡

Benefits of technology

[0025]本发明的优点:对碳化硅深槽的粗糙侧壁,利用PECVD工艺在粗糙侧壁沉积薄膜层,薄膜层覆盖在粗糙侧壁,以平坦化碳化硅深槽的侧壁,PECVD工艺对温度较低,对设备要求不高,工艺兼容性较好,并且PECVD制备的材料可以很好的使薄膜层附着在粗糙侧壁上。

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to a kind of method and device, especially a kind of method and device for reducing the roughness of silicon carbide deep trench sidewall.According to the technical scheme provided by the present application, a kind of method for reducing the roughness of silicon carbide deep trench, the method for reducing the roughness of deep trench includes: providing silicon carbide substrate with silicon carbide deep trench;Thin film layer covering the sidewall of the silicon carbide deep trench is deposited in the above-mentioned silicon carbide deep trench, to utilize the deposited thin film layer to planarize the sidewall of silicon carbide deep trench, wherein the material of the thin film layer is consistent with silicon carbide substrate;The thin film layer is subjected to wet sacrificial oxidation;Based on wet etching process, remove the oxide layer generated by the above-mentioned wet sacrificial oxidation.The present application can effectively reduce the roughness of silicon carbide deep trench sidewall, compatible with existing process, safe and reliable.
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Description

Technical Field

[0001] This invention relates to a method and apparatus, and more particularly to a method and apparatus for reducing the roughness of the sidewalls of deep trenches in silicon carbide. Background Technology

[0002] After more than 30 years of development, the performance of Si power devices has approached the limits of Si materials. The development of new power electronics applications such as electric vehicles, photovoltaics, wind power green energy, and smart grids urgently requires power electronic devices to be upgraded in terms of performance. Compared with similar Si devices, wide-bandgap semiconductor SiC power electronic devices have higher turn-off voltage, an order of magnitude lower on-resistance, higher operating frequency, and higher power density.

[0003] Silicon carbide (SiC) is a wide bandgap semiconductor material that can be used to fabricate power devices. SiC power devices are suitable for high-frequency, high-voltage, and high-temperature applications and help improve the efficiency and power density of power electronic systems.

[0004] Currently, silicon carbide-based power devices mainly include diodes and MOSFETs. The fabrication of silicon carbide power devices requires deep trench etching, with trench depths ranging from a few micrometers to tens of micrometers, as seen in power devices such as SiC JFETs, superjunction Schottky diodes, and superjunction MOSFETs.

[0005] Due to the properties of silicon carbide, dry etching consumes a large amount of mask material, resulting in a high selectivity ratio between the mask and silicon carbide. Therefore, metals such as Ni, Cr, and Cu are generally used as masks for deep trench etching of silicon carbide. However, when using metal as a mask for deep trench etching of silicon carbide, "wavy" stripes appear on the trench sidewalls. These wavy stripes originate from the uneven edges of the metal and extend from the top to the bottom of the trench sidewall. This is different from the transverse "wavy" stripes of the Bosch process for Si.

[0006] Such rough sidewalls are detrimental to power devices, mainly in two aspects: First, in superjunction technology, one method is to first etch trenches and then perform ion implantation on the trench sidewalls to prepare the P-pillars of the superjunction. If the trench sidewalls have this "wavy" rough texture, it will hinder the sidewall ion implantation, causing similar wavy doped edges to appear deep within the P-row region, and also negatively impacting the charge balance of the superjunction. Second, in power devices, the trench sidewalls generally have a high electric field, which accumulates at these "wavy" corners, leading to a decrease in device breakdown voltage.

[0007] Therefore, it is necessary to adopt processes to reduce the undulations of the trench sidewalls and decrease their roughness. Currently available process methods to reduce or decrease trench sidewall roughness include: 1) depositing a medium layer after trench etching, followed by dry etching to remove the deposited medium and the rough parts of the sidewalls; 2) directly performing dry sacrificial oxidation on the sample at a high temperature of 1200℃.

[0008] For the first method of reducing sidewall roughness described above, due to the inconsistent dry etching rates on the trench sidewalls and bottom, the improvement in trench sidewall roughness is minimal after the dielectric material at the bottom of the trench is etched. If the etching time is further increased, the substrate material at the bottom of the trench will also be etched, leading to an increase in the original trench depth. Dry etching removes the dielectric layer, leaving etching byproducts within the trench. These byproducts are difficult to remove and negatively impact the final device performance.

[0009] For the second process method mentioned above to reduce sidewall roughness, the simple 1200℃ dry sacrificial oxidation will oxidize both the protrusions and depressions at the same time. It is suitable for sidewalls with relatively small roughness, but it cannot effectively repair "wavy" stripes with vertical undulations of up to 100nm. Summary of the Invention

[0010] The purpose of this invention is to overcome the shortcomings of the prior art and provide a method and device for reducing the roughness of the sidewalls of silicon carbide deep trenches. This method and device can effectively reduce the roughness of the sidewalls of silicon carbide deep trenches, are compatible with existing processes, and are safe and reliable.

[0011] According to the technical solution provided by the present invention, a method for reducing the roughness of the sidewall of a silicon carbide deep trench includes:

[0012] Provides a silicon carbide substrate with deep silicon carbide trenches;

[0013] A thin film layer is deposited within the aforementioned silicon carbide deep trench to cover the sidewalls of the silicon carbide deep trench, thereby planarizing the sidewalls of the silicon carbide deep trench using the deposited thin film layer, wherein the material of the thin film layer is consistent with the silicon carbide substrate.

[0014] The aforementioned thin film layer was subjected to wet sacrificial oxidation;

[0015] The oxide layer generated by the above-mentioned wet sacrificial oxidation is removed by wet etching process.

[0016] The silicon carbide deep trench in the silicon carbide substrate has a roughness greater than 50 nm.

[0017] The thin film layer covering the sidewalls of the silicon carbide deep trench is prepared by PECVD deposition, wherein...

[0018] The conditions for the PECVD process include a reaction gas based on silane and methane, a dilution gas based on argon, an RF coil power of 20W to 200W, a chamber pressure of 50Pa to 150Pa, and a silicon carbide substrate temperature of 180℃ to 350℃.

[0019] In the reaction gas, the gas flow ratio of silane to methane is 1:5 to 5:1.

[0020] When performing wet sacrificial oxidation on the thin film layer, the temperature of the wet sacrificial oxidation is 1100℃~1250℃.

[0021] Wet etching processes include the BOE wet process.

[0022] When preparing silicon carbide deep trenches by deep trench etching on a silicon carbide substrate, the deep trench etching of the silicon carbide substrate is performed based on a metal mask.

[0023] The silicon carbide deep trench has a depth of 6μm to 12μm and an aspect ratio greater than 2.

[0024] A device for reducing the roughness of the sidewalls of a silicon carbide deep trench, the device comprising a silicon carbide substrate and a silicon carbide deep trench formed therein, wherein the roughness of the sidewalls of the silicon carbide deep trench is reduced by the method described above.

[0025] Advantages of this invention: For the rough sidewalls of silicon carbide deep trenches, a thin film layer is deposited on the rough sidewalls using the PECVD process. The thin film layer covers the rough sidewalls to planarize the sidewalls of the silicon carbide deep trenches. The PECVD process has low temperature requirements, low equipment requirements, good process compatibility, and the material prepared by PECVD can make the thin film layer adhere well to the rough sidewalls.

[0026] Wet sacrificial oxidation is performed on the sidewalls of silicon carbide trenches covered with thin film layers. Since the material of the thin film layer is the same as that of the silicon carbide substrate, the oxidation rate is relatively close during wet sacrificial oxidation, thus avoiding new sidewall undulations caused by inconsistent local oxidation rates.

[0027] This invention employs a combination of wet sacrificial oxidation and BOE wet process to remove the oxide layer after depositing the thin film layer, instead of dry etching or dry sacrificial oxidation. This avoids the problems of inconsistent etching rates between the trench sidewalls and bottom during dry etching or the contamination caused by dry etching byproducts. Wet sacrificial oxidation increases the oxidation rate and shortens the process time. Attached Figure Description

[0028] Figures 1-4 This is a flowchart of one embodiment of the present invention, wherein,

[0029] Figure 1 This is a top view of the rough sidewall of the silicon carbide deep trench of the present invention.

[0030] Figure 2 This is a top view of the thin film layer after deposition according to the present invention.

[0031] Figure 3 This is a top view of the wet sacrificial oxidation process according to the present invention.

[0032] Figure 4 This is a top view of the oxide layer after wet removal according to the present invention.

[0033] Explanation of reference numerals in the attached figures: 1-Silicon carbide substrate, 2-Silicon carbide deep trench, 3-Rough sidewall, 4-Thin film layer, and 5-Oxide layer. Detailed Implementation

[0034] The present invention will be further described below with reference to specific accompanying drawings and embodiments.

[0035] In order to effectively reduce the roughness of the sidewall of the silicon carbide deep trench 2, in one embodiment of the present invention, the method for reducing the roughness of the sidewall of the deep trench 2 includes:

[0036] A silicon carbide substrate 1 with a silicon carbide deep trench 2 is provided;

[0037] A thin film layer 4 is deposited in the aforementioned silicon carbide deep trench 2 to cover the sidewalls of the silicon carbide deep trench 2, so as to planarize the sidewalls of the silicon carbide deep trench 2 by means of the deposited thin film layer 4, wherein the material of the thin film layer 4 is consistent with the silicon carbide substrate 1.

[0038] The thin film layer 4 described above is subjected to wet sacrificial oxidation;

[0039] The oxide layer 5 generated by the above-mentioned wet sacrificial oxidation was removed by wet etching process.

[0040] Specifically, the silicon carbide substrate 1 can be prepared using existing common methods. The silicon carbide deep trench 2 can be fabricated on the silicon carbide substrate 1 using existing common trench etching processes. As described above, when preparing the silicon carbide deep trench 2 by deep trench etching on the silicon carbide substrate 1, the deep trench etching is performed on the silicon carbide substrate 1 based on a metal mask. The prepared silicon carbide deep trench 2 has a trench depth of 6 μm to 12 μm and an aspect ratio greater than 2.

[0041] Figure 1 The middle view is a top view of the silicon carbide deep trench 2 within the silicon carbide substrate 1, consisting of... Figure 1 It is known that the silicon carbide deep trench 2 has rough sidewalls 3. Generally, the roughness of the silicon carbide deep trench 2 is greater than 50 nm, that is, the roughness of the rough sidewalls 3 is greater than 50 nm. At this time, the rough part has a height difference of more than 100 nm. Conventional dry sacrificial oxidation will oxidize both the protrusions and the depressions at the same time, and cannot repair such a large roughness.

[0042] In specific implementation, a thin film layer 4 is deposited on the sidewall of the silicon carbide deep trench 2 to cover the sidewall of the silicon carbide substrate 2. At this time, the rough sidewall 3 of the silicon carbide deep trench 2 can be planarized, such as... Figure 2 Place

[0043] Depend on Figure 1 It can be seen that the rough sidewall 3 is wavy. When depositing the thin film layer 4, the deposition rate of the wavy depression is faster. As the deposition time increases, the entire rough sidewall 3 tends to become flat. Figure 2 In the diagram, the dashed line represents the rough, wavy texture of the silicon carbide deep trench 2 after etching, while the slightly undulating solid line on the right represents the deposited thin film layer 4. The material of the sidewall deposited thin film layer 4 needs to be the same as that of the silicon carbide substrate 1. This is mainly to ensure that the oxidation rate of the entire sidewall of the silicon carbide deep trench 2 is similar during subsequent oxidation. If other materials are deposited, there may be significant differences in the oxidation rate in different areas.

[0044] In specific implementation, the thin film layer 4 covering the sidewalls of the silicon carbide deep trench 2 is prepared by PECVD (Plasma Enhanced Chemical Vapor Deposition) process.

[0045] The conditions for the PECVD process include a reaction gas based on silane and methane, a dilution gas based on argon, an RF coil power of 20W to 200W, a chamber pressure of 50Pa to 150Pa, and a silicon carbide substrate temperature of 180℃ to 350℃.

[0046] In the reaction gas, the gas flow ratio of silane to methane is 1:5 to 5:1.

[0047] After depositing the thin film layer 4, the thin film layer 4 needs to be subjected to wet sacrificial oxidation. Specifically, the wet sacrificial oxidation temperature for the thin film layer 4 is 1100℃~1250℃.

[0048] In practice, during wet sacrificial oxidation, the process is carried out at 1100℃~1250℃ for 2 minutes. The rough portions of the PECVD deposited thin film layer 4 and the rough sidewalls 3 of the silicon carbide deep trench 2 are also oxidized simultaneously. The recessed portions of the rough sidewalls, covered by the thin film layer 4, are largely unoxidized. Figure 3 In the image, the shaded area shows oxidized silicon carbide.

[0049] After wet sacrificial oxidation, an oxide layer is formed. In one embodiment of the present invention, a wet etching process is used to remove the oxide layer, including a BOE wet etching process. Removing the oxide layer reduces the roughness of the rough sidewall 3, such as... Figure 4 As shown.

[0050] In summary, for the device for reducing the roughness of the sidewalls of silicon carbide deep trenches, the device includes a silicon carbide substrate 1 and a silicon carbide deep trench 2 formed in the silicon carbide substrate 1, wherein the roughness of the sidewalls of the silicon carbide deep trench 2 is reduced by the method described above.

[0051] Specifically, the method for reducing the roughness of the sidewall of the silicon carbide deep trench 2 can be referred to the above description, and will not be repeated here.

[0052] For the rough sidewall 3 of the silicon carbide deep trench 2, a thin film layer 4 is deposited on the rough sidewall 3 using the PECVD process. The thin film layer 4 covers the rough sidewall 3 to flatten the sidewall of the silicon carbide deep trench 2. The PECVD process has low temperature requirements, low equipment requirements, good process compatibility, and the material prepared by PECVD can make the thin film layer 4 adhere well to the rough sidewall 3.

[0053] Wet sacrificial oxidation is performed on the sidewalls of the silicon carbide trench 2 covered by the thin film layer 4. Since the material of the thin film layer 4 is consistent with that of the silicon carbide substrate 1, the speed of wet sacrificial oxidation is relatively well resolved, avoiding the occurrence of new sidewall undulations caused by inconsistent local oxidation speeds.

[0054] This invention employs a combination of wet sacrificial oxidation and BOE wet process to remove the oxide layer after depositing the thin film layer 4, instead of dry etching or dry sacrificial oxidation. This avoids the problem of inconsistent etching rates between the trench sidewalls and the bottom during dry etching or the problem of contamination by dry etching byproducts. Wet sacrificial oxidation increases the oxidation rate and shortens the process time.

Claims

1. A method for reducing the roughness of the sidewall of a silicon carbide deep trench, characterized in that, The method for reducing the roughness of the deep trench sidewall includes: Provides a silicon carbide substrate with deep silicon carbide trenches; A thin film layer is deposited within the aforementioned silicon carbide deep trench to cover the sidewalls of the silicon carbide deep trench, thereby planarizing the sidewalls of the silicon carbide deep trench using the deposited thin film layer, wherein the material of the thin film layer is consistent with the silicon carbide substrate. The aforementioned thin film layer was subjected to wet sacrificial oxidation; The oxide layer generated by the above-mentioned wet sacrificial oxidation is removed by wet etching process; For the silicon carbide deep trench in the silicon carbide substrate, the roughness of the silicon carbide deep trench is greater than 50 nm; The thin film layer covering the sidewalls of the silicon carbide deep trench is prepared by PECVD deposition, wherein... The conditions for the PECVD process include silane and methane-based reaction gases, argon-based dilution gases, RF coil power of 20W~200W, chamber pressure of 50Pa~150Pa, and silicon carbide substrate temperature of 180℃~350℃. Within the reaction gas, the gas flow ratio of silane to methane is 1:5 to 5:1; When performing wet sacrificial oxidation on the thin film layer, the temperature of the wet sacrificial oxidation is 1100℃~1250℃; Wet etching processes include the BOE wet etching process; When preparing silicon carbide deep trenches by deep trench etching on a silicon carbide substrate, the deep trench etching of the silicon carbide substrate is performed based on a metal mask; The silicon carbide deep trench has a depth of 6μm to 12μm and an aspect ratio greater than 2.

2. A device for reducing the roughness of the sidewalls of deep trenches in silicon carbide, characterized in that, The device includes a silicon carbide substrate and a silicon carbide deep trench formed in the silicon carbide substrate, wherein the roughness of the sidewalls of the silicon carbide deep trench is reduced by the method of claim 1.

Citation Information

Patent Citations

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