基于吞吐量动态限制的防火墙性能测试方法及装置
By acquiring real-time traffic from the firewall's logic chip and CPU respectively, calculating the throughput ratio, and configuring dynamic limit values, the problem of throughput limitation caused by FPGA network card chips in firewall box devices is solved, achieving accuracy and dynamic balance in firewall performance testing.
CN116248540BActive Publication Date: 2026-07-17HANGZHOU DPTECH TECH
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HANGZHOU DPTECH TECH
- Filing Date
- 2023-01-30
- Publication Date
- 2026-07-17
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Figure CN116248540B_ABST
Abstract
本申请涉及一种基于吞吐量动态限制的防火墙性能测试方法、装置、电子设备及计算机可读介质。该方法包括：防火墙的逻辑芯片和CPU分别获取实时的测试流量；基于所述测试流量计算所述逻辑芯片和所述CPU的吞吐量比例；根据所述吞吐量比例配置所述逻辑芯片和所述CPU的吞吐量动态限制值；基于所述逻辑芯片和所述CPU的吞吐量动态限制值进行所述防火墙性能测试。本申请涉及的基于吞吐量动态限制的防火墙性能测试方法、装置、电子设备及计算机可读介质，能够快速使CPU和逻辑吞吐量得到限制，并达到动态平衡，以便准确的进行防护墙性能测试。
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