Methods for manufacturing GaAs wafers and GaAs ingots

Abstract

Provided: GaAs wafers particularly suitable for manufacturing sensors for LiDAR, and a method for manufacturing GaAs ingots from which such GaAs wafers can be obtained. The GaAs wafer of this invention has a size of 5.0 × 10⁻⁶. 17 cm ‑3 Above and below 3.5×10 18 cm ‑3 Silicon concentration, 3.0 × 10 17 cm ‑3 Above and below 3.0×10 19 cm ‑3 The indium concentration and 1.0 × 10 18 cm ‑3 The above boron concentrations have an average dislocation density of 1500 dislocations / cm². 2 the following.

Description

Technical Field

[0001] This invention relates to methods for manufacturing GaAs wafers and GaAs ingots. Background Technology

[0002] As methods for manufacturing GaAs crystals (ingots) to obtain GaAs single-crystal wafers (hereinafter also referred to as GaAs wafers), the Czochralski (LEC) method, the horizontal Bridgman (HB) method, the vertical temperature gradient (VGF) method, and the vertical Bridgman (VB) method are known. An ingot is a block of single crystal with a straight body obtained by growing the crystal from a single crystal seed using these manufacturing methods; wafers are cut from the straight body of this ingot.

[0003] The LEC method described above is difficult to reduce the dislocation density of GaAs wafers. Low dislocation density methods based on indium (In) doping using LEC were once popular, but due to the large amount of In doping (also known as the alloying degree of GaAs and In), significant In precipitation occurs, rendering the wafers unusable. Therefore, the In-doped LEC method is no longer used.

[0004] In the LEC method, the pit density of commercially available products is set at 10,000 cm³. -1 On the other hand, the vertical temperature gradient (VGF) method and the vertical Bridgman (VB) method can achieve significantly lower dislocation densities compared to the LEC method. Patent Document 1 discloses an n-type GaAs ingot fabricated using the VGF or VB method. This n-type GaAs ingot has a density of 1 × 10⁻⁶. 16 cm -3 Above and 1×10 18 cm -3 The following charge carrier concentrations, and 5 × 10 17 cm -3 With the above boron concentration, the pit density in a cross-section perpendicular to the crystal axis is 1500 pits / cm². 2 The following aims to achieve a very low light absorption coefficient in the near-infrared domain. It should be noted that the n-type GaAs ingot in Patent Document 1 is obtained by controlling the gallium and boron concentrations of the gallium arsenide melt during manufacturing, and it is said that further addition of other dopants such as Zn and In should be avoided.

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2015-78122 Summary of the Invention

[0008] The problem the invention aims to solve

[0009] In recent years, sensors known as LiDAR (Light Detection and Ranging) have received particular attention for their application in autonomous driving in automobiles. LiDAR utilizes infrared light, such as wavelengths around 940 nm. In the light-emitting elements that emit infrared light, GaAs wafers are used as the substrate. For LiDAR applications, it has become necessary to suppress the absorption of this wavelength caused by the GaAs wafers.

[0010] In Si-doped n-type GaAs wafers, the higher the Si doping concentration and the greater the increase in free charge carriers, the greater the absorption of infrared radiation. Therefore, in order to effectively suppress the absorption of the aforementioned wavelengths, the carrier concentration of Si-doped GaAs wafers fabricated using the VGF or VB methods needs to be limited to approximately 1 × 10⁻⁶. 18 cm -3 The following (preferred 5×10) 17 cm -3 (See below). Furthermore, the GaAs wafers used in the fabrication of LiDAR sensors also require sufficiently low dislocation density. However, when reducing Si doping to lower carrier concentration, the dislocation density increases significantly. Therefore, it has been difficult to achieve the aforementioned carrier concentration while simultaneously suppressing light absorption at the aforementioned wavelengths and realizing low dislocation density. In large-aperture GaAs wafers where dislocation density is difficult to reduce, achieving these three conditions—carrier concentration, light absorption suppression, and low dislocation density—is particularly challenging.

[0011] Therefore, the objective of this invention is to provide a GaAs wafer that reduces the average dislocation density while controlling the carrier concentration and the light absorption coefficient at a wavelength of 940 nm. Furthermore, the objective of this invention is to provide a method for manufacturing a GaAs ingot capable of producing this GaAs wafer.

[0012] Solution for solving the problem

[0013] In order to achieve the above-mentioned problem, the inventors conducted repeated and in-depth research, and as a result, focusing on the silicon concentration, indium concentration and boron concentration of GaAs wafers, they completed the present invention as described below.

[0014] The essential structure of this invention is as follows.

[0015] (1) A GaAs wafer, characterized in that it has:

[0016] 5.0×10 17 cm -3 Above and below 3.5×10 18 cm -3 silicon concentration,

[0017] 3.0×10 17 cm -3 Above and below 3.0×10 19 cm -3 indium concentration, and

[0018] 1.0×10 18 cm -3 The above boron concentrations,

[0019] The average dislocation density is 1500 / cm². 2 the following.

[0020] (2) The GaAs wafer described in (1) above has a size of 6.0 × 10⁻⁶. 17 cm -3 The above are carrier concentrations.

[0021] (3) The GaAs wafer according to (1) or (2) above, wherein,

[0022] The aforementioned indium concentration is 1.0 × 10⁻⁶. 18 cm -3 Above and 1.2×10 19 cm -3 the following,

[0023] The aforementioned average dislocation density is 500 dislocations / cm². 2 the following.

[0024] (4) The GaAs wafer according to any one of (1) to (3) above, wherein the carrier concentration is 8.0 × 10⁻⁶. 17 cm -3 Above and 1.4×10 18 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 7.2cm -1 the following.

[0025] (5) The GaAs wafer according to any one of (1) to (3) above, wherein the carrier concentration is 7.0 × 10⁻⁶. 17 cm -3 Above and 8.0×10 17 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 6.8cm -1 the following.

[0026] (6) A method for manufacturing a GaAs ingot, the method utilizing a vertical temperature gradient method or a vertical Bridgman method, using silicon as a dopant and boron oxide as a sealant, characterized in that...

[0027] Indium is used as the aforementioned dopant in conjunction with silicon.

[0028] The silicon loading relative to the GaAs raw material is 70 wtppm or more and 130 wtppm or less, and the indium loading relative to the GaAs raw material is 100 wtppm or more and 5000 wtppm or less.

[0029] The average dislocation density is 1500 / cm. 2 the following.

[0030] (7) The method for manufacturing GaAs ingots according to (6) above, wherein the carrier concentration is 6.0 × 10⁻⁶. 17 cm -3 The above section.

[0031] (8) The method for manufacturing GaAs ingots according to (6) or (7) above, wherein the aforementioned average dislocation density is 500 dislocations / cm. 2 the following.

[0032] (91) The method for manufacturing a GaAs ingot according to any one of (6) to (8) above, wherein the ingot has a carrier concentration of 8.0 × 10⁻⁶. 17 cm -3 Above and 1.4×10 18 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 7.2cm -1 The following section.

[0033] (10) The method for manufacturing a GaAs ingot according to any one of (6) to (8) above, wherein the ingot has a carrier concentration of 7.0 × 10⁻⁶. 17 cm -3 Above and 8.0×10 17 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 6.8cm -1 The following section.

[0034] The effects of the invention

[0035] According to the present invention, a GaAs wafer that is particularly suitable for manufacturing sensors for LiDAR by controlling the silicon concentration, indium concentration, and boron concentration can be provided. Furthermore, according to the present invention, a method for manufacturing a GaAs ingot that yields the GaAs wafer can be provided. Attached Figure Description

[0036] Figure 1 This is a schematic diagram of the GaAs ingot of the present invention.

[0037] Figure 2 This is a cross-sectional schematic diagram of the manufacturing apparatus used in the manufacture of GaAs ingots according to the present invention.

[0038] Figure 3 This is a cross-sectional schematic diagram of the crucible 3 used in the manufacture of the GaAs ingot of the present invention, corresponding to the state in which the crucible is filled with raw materials before the start of crystal growth.

[0039] Figure 4 This is a graph showing the relationship between the state inside the crucible and the temperature gradient from the start to the end of crystal growth.

[0040] Figure 5 The graph illustrates the relationship between carrier concentration, transmittance, and absorption coefficient of the GaAs wafers cut out in the embodiment. Detailed Implementation

[0041] The GaAs wafer of the present invention can be obtained by dicing a GaAs ingot obtained by the manufacturing method of the GaAs ingot of the present invention. Prior to the description of the embodiments, the names of the parts used to explain the present invention and the methods for measuring physical properties will be described.

[0042] <GaAs crystal ingot>

[0043] (The seed crystal side, the central part, and the tail side of a GaAs ingot)

[0044] Figure 1 This is a schematic diagram of a GaAs ingot obtained according to the manufacturing method of the present invention, showing the positions of the seed crystal side 15, the central portion 16, and the tail side 17. The GaAs ingot has a straight body portion 18 with approximately the same diameter via a region 19 (also called a tapered portion) whose diameter increases from the seed crystal 6. The end of this straight body portion 18 on the seed crystal 6 side is called the seed crystal side 15, the end on the opposite side of the seed crystal 6 is called the tail side 17, and the position halfway between the seed crystal side 15 and the tail side 17 (the middle position) is called the central portion 16. The GaAs ingot undergoes crystal growth by moving the solid-liquid interface from the seed crystal side 15 to the tail side 17.

[0045] The measured values ​​of silicon (Si) concentration, indium (In) concentration, boron (B) concentration, carrier concentration, average dislocation density, and absorption coefficient at a wavelength of 940 nm for the GaAs wafer of the present invention can be obtained by measuring the GaAs ingot in the state of being cut into wafers from the straight portion 18. The evaluation is performed at at least one location on the seed crystal side 15, the central portion 16, and the tail side 17 of the straight portion 18 of the GaAs ingot. The size of the wafer can be appropriately selected according to the diameter of the straight portion 18 of the GaAs ingot, for example, it can be set to 2 to 8 inches.

[0046] On the other hand, when evaluating GaAs ingots, the above-mentioned measurement values ​​are obtained from at least one of the three wafers of the GaAs ingot: the seed wafer 15 of the straight portion 18, the wafer of the central portion 16, and the wafer of the tail wafer 17 of the straight portion 18. Preferably, the above-mentioned measurement values ​​are obtained from two or more wafers. It should be noted that the wafers on the seed crystal side 15 of the straight portion 18 of the GaAs ingot refer to the first to fifth wafers obtained closest to the seed crystal side when the straight portion 18 of the GaAs ingot is cut into individual wafers. The wafers on the central portion 16 of the straight portion of the GaAs ingot refer to the wafers in contact with the central portion 16 (when the central portion 16 is a cross-section, it can be any two wafers having that cross-section) and the two wafers before and after it. The wafers on the tail side 17 of the straight portion 18 refer to the wafers obtained from the first wafer closest to the seed crystal side to the last wafer, and the wafers obtained from the fifth wafer from the last wafer on the tail side. Among the wafers on the seed crystal side, the central portion, and the tail side, the measurement results of the wafers in the above ranges can be considered the same, and the differences are within the range of error.

[0047] In each measurement of the wafer on the seed side 15, the wafer on the central part 16, and the wafer on the tail side 17, the measurement values ​​of any of the two surfaces of each wafer and the portion of the surface opposite each other when the wafer is cut (adjacent wafers or cut end portions) are regarded as the measurement values ​​of the wafer on the seed side 15, the wafer on the central part 16, and the wafer on the tail side 17.

[0048] During the measurement, either the top or bottom face of the wafer can be used. However, for the diced portion, the face opposite when the wafer was cut into the seed side 15 or the face opposite when the wafer was cut into the tail side is used for measurement.

[0049] Next, the methods for measuring various values ​​of carrier concentration, average dislocation density, absorption coefficient, and Si, In, and B concentrations will be explained.

[0050] (Methods for determining carrier concentration)

[0051] For carrier concentration, a 10mm × 10mm dimension is cut from the center of the extracted wafer, indium electrodes are attached to the four corners, and the temperature is heated to 330–360°C. The value is then measured by Hall effect measurement based on the Vander Pauw method.

[0052] (Methods for determining average dislocation density)

[0053] The average dislocation density is obtained by measuring the etching pit density (EPD), which is performed as follows: the surface of the extracted wafer is pretreated in a sulfuric acid-based mirror etching solution (H2SO4:H2O2:H2O = 3:1:1 (volume ratio)), and then immersed in KOH melt at 320°C for 30-40 minutes to generate etching pits, and the number of them is measured.

[0054] The density of etch pits was measured by setting 3mm diameter areas at 69 points on the wafer, observing each area under a microscope, and counting the etch pits that appeared.

[0055] The 69-point area is distributed evenly across the entire wafer surface without omission. The areas are set as follows: 5mm interval for 2-inch wafers, 10mm interval for 4-inch wafers, 15mm interval for 6-inch wafers, and 20mm interval for 8-inch wafers.

[0056] Observations in each region were performed using a 10x objective lens with a field of view diameter of 1.73 mm. The field of view with the most observed pits in each region was identified, and the number of corrosion pits was counted. The counted number of corrosion pits was then converted to a per unit area (pits / cm²). -2 The average value of the corrosion pit counts in each region is taken as the average dislocation density.

[0057] (Methods for determining absorption coefficient)

[0058] When determining the absorption coefficient, both the back and front sides of the GaAs wafer are mirror-finished to create a damage-free state. If the wafer was cut with a wire saw, it is desirable to overlap both sides, grind to a thickness of 70 μm or more, and then perform mirror finishing. In this specification, mirror finishing is performed in this manner, and a sample cut at approximately 20 mm × 20 mm from the center of a GaAs wafer with a self-measured thickness is used. Transmittance is measured using a spectrophotometer (Hitachi High-Tech Corporation UH5700). The measurement conditions are described below.

[0059] Baseline setting: Air correction

[0060] Starting wavelength: 1300nm

[0061] End wavelength: 850nm

[0062] Sampling interval: 1nm

[0063] Number of measurements: 1

[0064] Scanning speed: 60nm / minute

[0065] Slit width: 2nm

[0066] The absorption coefficient α was calculated using the two-sided reflection model based on the transmittance measured by a spectrophotometer and the following equations [1] and [2]. It should be noted that the refractive index for each wavelength was calculated using the literature values ​​recorded in "Refractive Index of GaAs_Journal of Applied Physics 1964".

[0067]

[0068]

[0069] Where I0 is the light intensity before incident, I is the light intensity after the wafer passes through, T is the transmittance, R is the reflectance, α is the absorption coefficient, d is the wafer thickness, and n is the wafer refractive index.

[0070] (Methods for determining Si, In, and B concentrations)

[0071] The Si, In, and B concentrations were obtained by etching the surface of the extracted wafer to a depth of 5 μm using an etching solution (NH4OH:H2O2:H2O = 1:1:10 (volume ratio)), and then analyzing the wafer after it was washed with pure water and dried using secondary ion mass spectrometry (SIMS).

[0072] Specifically, for Si and B, SIMS analysis using cesium ions was performed at a depth of 0.5–1 μm from the surface, with an ion energy of 14.5 keV. For In, SIMS analysis using oxygen ions was performed at a depth of 3 μm from the surface, with an ion energy of 5.5 keV.

[0073] <Methods for Manufacturing GaAs Ingots>

[0074] Next, the method for manufacturing the GaAs ingot of the present invention will be described. In this manufacturing method, silicon is used as a dopant and boron oxide as a sealant, utilizing either the vertical temperature gradient (VGF) method or the vertical Bridgman (VB) method. Furthermore, indium is used as a dopant along with silicon, with the silicon loading amount relative to the GaAs raw material being 70 wtppm or more and 130 wtppm or less, and the indium loading amount relative to the GaAs raw material being 100 wtppm or more and 5000 wtppm or less, resulting in an average dislocation density of 1500 dislocations / cm² for the obtained GaAs ingot. 2 The following aims to achieve an average dislocation density of 1500 dislocations / cm² in GaAs ingots. 2 The following refers to the fact that, for the seed crystal side, central part, and tail side of the aforementioned GaAs ingot, the average dislocation density in any position on the wafer is 1500 dislocations / cm. 2 The following are the measurement results.

[0075] In the case of manufacturing silicon-doped n-type GaAs ingots using the VGF or VB method, a GaAs melt containing Si is typically used as the polycrystalline raw material melt, and B2O3 is used as the liquid sealant. However, in the manufacturing of the GaAs ingot of this invention, In is added in addition to Si. Furthermore, by ensuring the silicon and indium loading amounts are as described above, the average dislocation density of the resulting GaAs ingot is 1500 dislocations / cm². 2 The following methods are used for control. See below for reference. Figures 2-4 This manufacturing method will be described in more detail.

[0076] (Manufacturing equipment and temperature control)

[0077] Figure 2 A schematic cross-sectional view is shown for an example of a manufacturing apparatus used to manufacture GaAs ingots of the present invention. Figure 2 The manufacturing apparatus shown includes: an airtight container 7 capable of vacuum venting and atmospheric gas filling from the outside; a crucible 3 disposed centrally within the airtight container 7; a crucible storage container (carrier) 2 for housing and holding the crucible 3; a mechanism 14 (only the lifting / rotating lever is shown) for raising, lowering, and / or rotating the crucible storage container (carrier) 2; and a heater 1 mounted within the airtight container 7 in a manner that surrounds the crucible storage container (carrier) 2. The crucible 3 may be a crucible formed from pyrolytic boron nitride (PBN). Figure 2 In the process, the crucible 3 is filled with seed crystal 6, compound semiconductor raw material 5, and sealant (B2O3) 4, and the airtight container 7 is filled with an inactive gas 8, as an example.

[0078] Figure 3A schematic cross-sectional view of an example of the crucible used to manufacture the GaAs ingot of the present invention is shown, corresponding to the state before crystal growth begins, filled with raw materials, etc. Figure 3 In the crucible 3 shown, when the seed crystal 6 and GaAs polycrystalline raw material 9 are typically silicon-doped n-type GaAs ingots, dopant (silicon) 10 and sealant (B2O3) 4 are filled. The sealant (B2O3) 4 is used to control As dispersion and the Si concentration at the start of crystal growth. It has a lower density than GaAs and a melting point (480°C) much lower than GaAs's melting point (1238°C), thus enabling single crystal growth to cover the upper surface of the raw material melt. In this invention, in addition to dopant (silicon) 10, dopant (indium) 11 is also used as a raw material.

[0079] After these filling processes are completed, in a growth furnace filled with inactive gas, a temperature gradient is applied using a PID-controlled heater to ensure that the seed crystal 6 does not dissolve and that the temperature on the side of the seed crystal 6 decreases. The GaAs polycrystalline raw material 9 is heated to above 1238°C, the melting point of GaAs, causing all the GaAs polycrystalline raw material 9, dopant (silicon), dopant (indium) 11, and sealant (B₂O₃) 4 to dissolve. Next, the temperature near the seed crystal 6 is increased until the upper part of the seed crystal 6 dissolves. Then, the overall temperature is slowly decreased while the temperature gradient is applied, thereby obtaining a GaAs ingot. The cooling rate is preferably set to 10°C / hour or less. Figure 4 This illustrates an example of the relationship between the schematic state inside the crucible and the temperature gradient from the start to the end of crystal growth.

[0080] (seed crystal)

[0081] The size of the seed crystal 6 is not particularly limited, but it can have a cross-sectional area of, for example, 1% to 20% of the diameter of the crucible 3, preferably 3% to 17%. If the diameter of the crystal to be grown exceeds 100 mm, the cross-sectional area of ​​the seed crystal 6 can be set to 2% to 10% of the cross-sectional area of ​​the diameter of the crucible.

[0082] (Inner diameter of crucible and wafer size)

[0083] The inner diameter of crucible 3 is preferably slightly larger than the target wafer size. The target wafer size can be appropriately selected from 2 to 8 inches, for example, but in order to obtain a large-diameter GaAs wafer, it is preferable that the wafer diameter is 100 mm or more, more preferably 140 mm or more, and even more preferably 6 inches or more.

[0084] The larger the aperture, the more difficult it is to obtain wafers with low dislocation density. In the LEC method, with wafer diameters exceeding 140 mm, it is assumed that even with doping exceeding 6.0 × 10⁻⁶...19 cm -3 It is also very difficult to obtain an average dislocation density of 1500 dislocations / cm² with a large amount of indium. 2 The average dislocation density is 500 dislocations / cm³. 2 The following wafers.

[0085] (Dopant)

[0086] Dopant (silicon) 10 is added to GaAs polycrystalline material 9 at a desired concentration by weight through processes such as shot peening of high-purity Si and crushing of the high-purity Si substrate. Additionally, dopant (indium) 11 is added to GaAs polycrystalline material 9 at a desired concentration by weight using high-purity In or indium compounds (e.g., high-purity indium arsenide (InAs)). For Si addition, the silicon loading is 70 wtppm or more and 130 wtppm or less relative to the GaAs polycrystalline material. Preferably, the silicon loading is 80 wtppm or more relative to the GaAs polycrystalline material, and more preferably 100 wtppm or less. Similarly, for In addition, the indium loading is 100 wtppm or more and 5000 wtppm or less relative to the GaAs material. Preferably, the indium loading is 500 wtppm or more relative to the GaAs material, more preferably 1000 wtppm or more, more preferably 4000 wtppm or less, and more preferably 2000 wtppm or less. When adding high-purity indium arsenide (InAs) to increase indium content, the indium loading can be calculated from the amount of InAs raw material loaded. In has a melting point of 156°C, and InAs has a melting point of 942°C, both significantly lower than the melting point of GaAs (1238°C). If pre-melted In adheres to the vicinity of seed crystal 6 before GaAs crystal growth begins, it hinders single crystallization; therefore, it is necessary to... Figure 3 In this case, the dopant (indium) 11 is located away from the seed crystal 6, or it is necessary to study the configuration of the GaAs polycrystalline material 9 to make it less likely to adhere to the seed crystal 6. In order to make it less likely for In to adhere to the seed crystal 6, it is also preferable to make the size of the seed crystal 6 within the range described above.

[0087] The above-described manufacturing method is one example. To adjust the concentrations of Si, In, and B incorporated into the GaAs ingot during crystal growth, as well as the carrier concentration, average dislocation density, and absorption coefficient, conventionally known methods can be added. Preferably, a 6.0 × 10⁻⁶ m² / g²· ... 17 cm -3 The above carrier concentration. Furthermore, a concentration of 1.0 × 10⁻⁶ is preferably present at at least one location on the seed side, the central portion, and the tail side. 18 cm -3 Above and 1.2×10 19 cm-3 The following indium concentrations are preferred. Furthermore, at least one location on the seed crystal side, the central portion, and the tail side, an average dislocation density of 500 dislocations / cm² is preferred. 2 In the following portions, at all locations on the seed crystal side, central portion, and tail side, an average dislocation density of 500 dislocations / cm² is further preferred. 2 The following (wafers). Furthermore, it is preferable to fabricate wafers with a carrier concentration of 8.0 × 10⁻⁶. 17 cm -3 Above and 1.40×10 18 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 7.2cm -1 The following portion of the GaAs ingot. Furthermore, it is preferable to manufacture a carrier concentration of 7.0 × 10⁻⁶. 17 cm -3 Above and 8.0×10 17 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 6.8cm -1 The following is a GaAs ingot. In conventional Si-doped ingots, regions with high carrier concentration can suppress dislocation density, but the absorption coefficient also increases, thus limiting its applicability to applications where the absorption coefficient is critical. However, in the ingot of the present invention, dislocation density can be suppressed even in regions with high carrier concentration, and the increase in absorption coefficient can be suppressed, thus making it usable. In particular, when the carrier concentration reaches 6.0 × 10⁻⁶... 17 cm -3 In the region of carrier concentration mentioned above, the increase in the absorption coefficient value is suppressed.

[0088] It should be noted that, during crystal growth, based on the solid solution coefficient of impurities, the impurity concentration increases or decreases in the same direction as the crystal growth direction. It is observed that the Si, In, and B concentrations tend to increase from the seed crystal side 15 to the tail side 17 of the GaAs ingot. Therefore, it is also observed that the carrier concentration tends to increase from the seed crystal side 15 to the tail side 17 of the GaAs ingot.

[0089] <GaAs wafer>

[0090] A GaAs wafer of the present invention can be obtained by slicing a GaAs ingot obtained by the manufacturing method of the present invention from at least the seed crystal side to the center. The GaAs wafer of the present invention has a size of 5.0 × 10⁻⁶. 17 cm -3 Above and below 3.5×10 18 cm -3 Silicon concentration, 3.0 × 1017 cm -3 Above and below 3.0×10 19 cm -3 The indium concentration and 1.0 × 10 18 cm -3 The above boron concentrations have an average dislocation density of 1500 dislocations / cm². 2 The GaAs wafer preferably has a diameter of 6.0 × 10¹⁷ cm. -3 The above-mentioned carrier concentration is preferred. Furthermore, a concentration of 1.0 × 10⁻⁶ is also preferable. 18 cm -3 Above and 1.2×10 19 cm -3 The following indium concentration and average dislocation density are 500 dislocations / cm². 2 The following is a GaAs wafer. The inventors discovered through experiments that by satisfying the conditions for silicon concentration, indium concentration, boron concentration, and average dislocation density of the GaAs wafer, it is possible to achieve both a carrier concentration particularly suitable for the manufacture of LiDAR sensors and an absorption coefficient at a wavelength of 940 nm.

[0091] The following describes the ranges of Si concentration, In concentration, B concentration, average dislocation density, carrier concentration, absorption coefficient, etc., of the GaAs wafer of the present invention.

[0092] (Si concentration)

[0093] From the perspective that excess Si concentration leads to increased infrared absorption due to free carrier absorption, and from the viewpoint of controlling carrier concentration, the Si concentration in the GaAs wafer of this invention is set to 5.0 × 10⁻⁶. 17 cm -3 Above and below 3.5×10 18 cm -3 .

[0094] (Range of In concentration)

[0095] The inventors have discovered that by adding In, in addition to Si, as a dopant in the VGF and VB methods, the increase in infrared absorption with increasing carrier concentration can be controlled. Therefore, an In concentration of 1.0 × 10⁻⁶ is achieved. 18 cm -3 Above and below 3.0×10 19 cm -3 In GaAs, In acts as a neutral impurity and therefore does not contribute to free carrier absorption. However, in the VGF and VB methods, excess In concentration also causes deviations in the lattice constant and band gap of the GaAs crystal; therefore, an In concentration of 3.0 × 10⁻⁶ is recommended. 19 cm -3There are concerns about increased infrared absorption at these concentrations. Therefore, the In concentration is kept below 3.0 × 10⁻⁶. 19 cm -3 The preferred inhibition level is 2.0 × 10⁻⁶. 19 cm -3 Hereinafter, it is more preferable to set it to 1.2 × 10 19 cm -3 Furthermore, it is preferable that the ratio of In concentration to Si concentration (In / Si, also known as the concentration ratio) is 1.0 or higher.

[0096] (Range of B concentration)

[0097] In GaAs ingot crystal growth based on the VGF or VB method, B₂O₃ is typically used as a liquid sealant to prevent As from deviating during growth. Furthermore, boron (B) derived from B₂O₃ is incorporated into the GaAs ingot. For the purpose of controlling the Si concentration at the start of crystal growth based on the Si-B substitution reaction, the boron (B) concentration is set to 1.0 × 10⁻⁶. 18 cm -3 That's all. There is no specific upper limit to the concentration of B; the concentration of B can be suppressed to 3.0 × 10⁻⁶. 19 cm -3 The following is also preferably set to 1.5×10 19 cm -3 the following.

[0098] (Elements other than those mentioned above and their concentrations)

[0099] Apart from B and oxygen (O) mixed into the GaAs ingot due to B2O3 used as a sealant, it is preferable not to add any elements other than Si and In in addition to GaAs. It is also preferable to add only Si and In as dopants and not to deliberately add any other elements as dopants.

[0100] Elements that can be considered as dopants other than silicon and indium include beryllium (Be), magnesium (Mg), aluminum (Al), carbon (C), germanium (Ge), tin (Sn), nitrogen (N), sulfur (S), selenium (Se), tellurium (Te), and further zinc (Zn), cadmium (Cd), chromium (Cr), and antimony (Sb). The unavoidable amount of these elements mixed in is permissible, but it is preferred that they are not deliberately added.

[0101] For example, the preferred concentrations of Al, C, and Zn in GaAs based on SIMS analysis are 3.0 × 10⁻⁶. 16 cm -3 The concentrations of Be, Mg, Ge, Sn, N, S, Se, Te, Cd, Cr, and Sb, excluding those specified below (including zero), are preferably 5.0 × 10⁻⁶. 15 cm -3The following (including zero). Therefore, the concentration of N is more preferably 1 × 10⁻⁶. 15 cm -3 the following.

[0102] (Range of average dislocation density)

[0103] The average dislocation density is set to 1500 dislocations / cm². 2 The following is a preferred average dislocation density: 500 dislocations / cm². 2 The following is a further optimization of 300 pieces / cm 2 The average dislocation density is preferably close to zero, but considering productivity, the lower limit can be set to 50 dislocations / cm. 2 .

[0104] (Range of carrier concentration and absorption coefficient)

[0105] In the GaAs wafer of the present invention, the carrier concentration is preferably at least 1.0 × 10⁻⁶. 17 cm -3 As mentioned above, 6.0×10 is also preferred. 17 cm -3 That's all. Furthermore, the absorption coefficient at a wavelength of 940 nm is preferably smaller compared to the case of only Si doping (without In). Additionally, a carrier concentration of 8.0 × 10⁻⁶ is preferred. 17 cm -3 Above and 1.4×10 18 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 7.2cm -1 Below. On the other hand, in the GaAs wafer of the present invention, a carrier concentration of 7.0 × 10⁻⁶ is also preferred. 17 cm -3 Above and 8.0×10 17 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 6.8cm -1 the following.

[0106] Previously, LiDAR applications required reducing carrier concentration to approximately 1 × 10⁻⁶. 18 cm -3 The following (preferred 5×10) 17 cm -3 (The following is an example of this method), but according to the present invention, even a relatively large range of carrier concentrations can be suppressed to a low absorption coefficient, thus enabling device designs with suppressed power consumption. In any case, it is suitable for device substrates used in LiDAR applications.

[0107] The foregoing has illustrated examples of representative embodiments of the present invention, but the invention is not limited thereto. The invention will now be described in more detail by way of examples, but the invention is not limited by any of these examples.

[0108] Example

[0109] (Crystal No. 1)

[0110] Use with Figure 2 The manufacturing apparatus shown is used to manufacture GaAs ingots.

[0111] <Filling raw materials into the crucible>

[0112] A PBN crucible with an inner diameter of 159.9 mm and an inner diameter of 6.0–6.5 mm for the seed crystal portion is prepared. Inside the crucible, as follows... Figure 3 As shown, 20,000 ± 10 g of GaAs polycrystalline raw material, prepared by filling and synthesizing 6N Ga (purity ≥ 99.9999%) and 6N As, and GaAs seed crystals cut with the (100) facet as the crystal growth plane were used. Regarding the diameter of the GaAs seed crystals, a size was adjusted by combining mechanical grinding and etching in a manner approximately 0.5 mm smaller than the inner diameter of the seed crystal portion of each crucible. During the filling of the GaAs polycrystalline material, high-purity Si (60 wtppm relative to the GaAs polycrystalline raw material) was shot-peened as a dopant (silicon). No impurity elements were intentionally added except for Si.

[0113] <Crystal Growth>

[0114] After filling with these raw materials, add 965±10g of B2O3 as a sealant. Place the filled crucible in a crucible storage container (carrier). Figure 2 The manufacturing apparatus shown is used to repeatedly vent vacuum and replace Ar gas to form an inactive gas atmosphere, and then single crystals are grown using the VGF method.

[0115] In the crystal growth process, a temperature gradient is first applied using a PID-controlled heater to prevent the GaAs seed crystal from dissolving and to lower the temperature at the seed crystal side. The raw materials in the crucible are then heated to above 1238°C, the melting point of GaAs, to create a molten solution. Subsequently, the temperature near the seed crystal is increased to dissolve the upper part of the seed crystal. Then, a temperature gradient is applied, and the overall temperature of the cooling furnace is gradually decreased at a rate of less than 10°C / hour using the heater control, thereby growing an n-type GaAs ingot with Si as a dopant.

[0116] <Evaluation>

[0117] The straight portion of the grown GaAs ingot is sliced ​​using a wire saw to create wafers. The wafer size is equivalent to 6 inches.

[0118] The first wafer obtained from the seed side of the straight portion of the GaAs ingot, and any wafers counted from the first wafer to the fifth wafer, are evaluated as seed sides. It should be noted that the cut-off end portion containing a portion of a tapered portion having a face facing the seed side of the first wafer, as a disk-shaped portion (also called the 0th wafer), can also be included in the measurement.

[0119] The middle portion is evaluated as the wafer located at the halfway point from the seed crystal side to the tail side when the straight part of the GaAs ingot is cut into individual wafers (the position is any of the two wafers with that cross section when the cross section is cut) and any wafer located within the range of two wafers on the seed crystal side and two wafers on the tail side.

[0120] The wafers obtained from the first wafer on the straight section of the GaAs ingot to the last wafer, and any wafer from the last wafer to the fifth wafer on the seed side, are considered to be on the tail side. It should be noted that the final cross-section is located 20 mm from the end of the ingot opposite to the seed side (along the seed direction).

[0121] In the measurements described later, at least three wafers were used at each of the seed crystal side, the central part, and the tail side.

[0122] From the region containing the crystal center (wafer center portion) of the sliced ​​wafer (or the cut end portion), a 10mm × 10mm dimension is cut using the cracking property of the (110) plane, and the carrier concentration is determined by Hall measurement based on the Vander Pauw method as previously described.

[0123] Using the remaining wafer (or diced portion) used in the Hall effect measurement, after pretreatment as described above, the Si, In, and B concentrations are determined by SIMS analysis using an apparatus manufactured by CAMECA.

[0124] For the surfaces of wafers adjacent to (separated by the same cut face) used in the Hall measurement described above, EPD is measured as previously described and evaluated as average dislocation density.

[0125] The absorption coefficient at a wavelength of 920 nm was measured using a wafer close to the wafer used in Hall and EPD measurements. The absorption coefficient was measured using a spectrophotometer (Hitachi High-Tech Corporation UH5700) to measure the transmittance, and then the absorption coefficient was calculated using the aforementioned formulas [1] and [2].

[0126] (Crystal No. 2)

[0127] During the filling of GaAs polycrystalline raw material, a shot peening process of 100 wtppm with high-purity silicon was performed. Otherwise, similar to crystal number 1, GaAs ingot number 2 and GaAs wafers cut from it were obtained and evaluated. No impurity elements were intentionally added except for Si.

[0128] (Crystal No. 3)

[0129] During the filling of GaAs polycrystalline raw materials, in addition to high-purity silicon, high-purity InAs was shot-peened at 200 wtppm (equivalent to 121 wtppm in In conversion) and high-purity silicon at 80 wtppm. Otherwise, similar to crystal number 1, GaAs ingot number 3 was obtained and evaluated. No impurity elements were intentionally added except for Si and In.

[0130] (Crystal No. 4)

[0131] During the filling of GaAs polycrystalline raw materials, in addition to high-purity silicon, 2000 wtppm of high-purity InAs (equivalent to 1210 wtppm in In conversion) and 80 wtppm of high-purity silicon were also filled. Otherwise, in the same manner as crystal number 1, GaAs ingots were obtained and evaluated.

[0132] (Crystal No. 5)

[0133] During the filling of GaAs polycrystalline raw materials, in addition to high-purity silicon, 5000 wtppm of high-purity InAs (equivalent to 3026 wtppm in In conversion) and 80 wtppm of high-purity silicon were also filled. Otherwise, in the same manner as crystal number 1, GaAs ingots were obtained and evaluated.

[0134] Table 1 shows the manufacturing conditions and evaluation results of the GaAs wafers cut from crystals 1-5. Additionally, the relationship between carrier concentration and transmittance and absorption coefficient at 940 nm for each wafer is presented. Figure 5 It should be noted that, Figure 5 The figure also shows the measurement results of wafers cut from positions not listed in Table 1. Additionally, Figure 5 In the diagram, dashed lines represent the range where the relationship between carrier concentration and absorption coefficient is particularly favorable.

[0135] [Table 1]

[0136]

[0137] The obtained GaAs ingot has an n-type conductivity. From GaAs ingots numbered 3 to 5, which have an In loading of 100 wtppm or more and 5000 wtppm or less relative to the GaAs raw material, at least a portion of the GaAs ingot can be used to obtain a crystal with a conductivity of 5.0 × 10⁻⁶. 17 cm -3 Above and below 3.5×10 18 cm -3 Silicon concentration, 3.0 × 10 17 cm -3 Above and below 3.0×10 19 cm -3 The indium concentration and 1.0 × 10 18 cm -3 The above boron concentration and average dislocation density are 1500 / cm². 2 The following GaAs wafers. In particular, the average dislocation density of the GaAs wafer cut from crystal number 4 is 500 dislocations / cm from the seed side to the tail side. 2 The following are the favorable results. Furthermore, when the GaAs wafers are cut within the aforementioned concentration range, the carrier concentration and absorption coefficient at a wavelength of 940 nm are within a favorable range. Additionally, it was determined that the absorption coefficient of GaAs wafers cut from crystals 1 and 2 increases sharply with increasing carrier concentration, while the increase in absorption coefficient of GaAs wafers cut from crystals 4 and 5 is moderated with increasing carrier concentration. Therefore, GaAs wafers with suitable carrier concentration and absorption coefficient can be obtained from crystals 4 and 5.

[0138] Industrial availability

[0139] According to the present invention, by limiting the silicon concentration, indium concentration, and boron concentration, GaAs wafers particularly suitable for manufacturing sensors for LiDAR can be provided. Furthermore, according to the present invention, a method for manufacturing GaAs ingots from which the GaAs wafers can be obtained can be provided.

[0140] Explanation of reference numerals in the attached figures

[0141] 1 heater

[0142] 2. Crucible storage container (carrier)

[0143] 3 crucibles

[0144] 4. Sealant (B2O3)

[0145] 5. Compound semiconductor raw materials

[0146] 6 seed crystals

[0147] 7. Airtight containers

[0148] 8. Inactive gases

[0149] 9GaAs polycrystalline raw materials

[0150] 10 dopants (silicon)

[0151] 11 dopant (indium)

[0152] 12 raw material melt

[0153] 13 GaAs crystals in solidification

[0154] 14. Lifting / Rotating Mechanism of the Crucible

[0155] Seed crystal side of 15GaAs ingot

[0156] The central part of a 16GaAs ingot

[0157] Tail side of 17GaAs ingot

[0158] Straight body of 18GaAs ingot

[0159] The tapered portion of a 19GaAs ingot

Claims

1. An n-type GaAs wafer, characterized in that, have: 5.0×10 17 cm -3 Above and below 3.5×10 18 cm -3 silicon concentration, 3.0×10 17 cm -3 Above and below 3.0×10 19 cm -3 indium concentration, 1.0×10 18 cm -3 The above boron concentration and 3.0×10 16 cm -3 The following zinc concentrations, The average dislocation density is 1500 / cm². 2 the following.

2. The n-type GaAs wafer according to claim 1, having a surface area of ​​6.0 × 10⁻⁶. 17 cm -3 The above are carrier concentrations.

3. The n-type GaAs wafer according to claim 1 or 2, wherein, The indium concentration is 1.0 × 10⁻⁶. 18 cm -3 Above and 1.2×10 19 cm -3 the following, The average dislocation density is 500 dislocations / cm². 2 the following.

4. The n-type GaAs wafer according to claim 1 or 2, wherein, The carrier concentration is 8.0 × 10⁻⁶. 17 cm -3 Above and 1.4×10 18 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 7.2cm -1 the following.

5. The n-type GaAs wafer according to claim 1 or 2, wherein, The carrier concentration is 7.0 × 10⁻⁶. 17 cm -3 Above and 8.0×10 17 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 6.8cm -1 the following.

6. A method for manufacturing an n-type GaAs ingot, said method utilizing a vertical temperature gradient method or a vertical Bridgman process, and using boron oxide as a sealant, characterized in that... Silicon is used as a dopant in conjunction with indium, but not zinc. The silicon loading relative to the GaAs raw material is 70 wtppm or more and 130 wtppm or less, and the indium loading relative to the GaAs raw material is 100 wtppm or more and 5000 wtppm or less. The average dislocation density is 1500 / cm. 2 the following, The n-type GaAs wafer of claim 1 can be obtained by cutting out the n-type GaAs ingot obtained by the manufacturing method of the n-type GaAs ingot.

7. The method for manufacturing n-type GaAs ingots according to claim 6, wherein, The n-type GaAs ingot has a carrier concentration of 6.0 × 10⁻⁶. 17 cm -3 The above section.

8. The method for manufacturing an n-type GaAs ingot according to claim 6 or 7, wherein, The average dislocation density is set to 500 dislocations / cm². 2 the following.

9. The method for manufacturing an n-type GaAs ingot according to claim 6 or 7, wherein, The n-type GaAs ingot has a carrier concentration of 8.0 × 10⁻⁶. 17 cm -3 Above and 1.4×10 18 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 7.2cm -1 The following section.

10. The method for manufacturing an n-type GaAs ingot according to claim 6 or 7, wherein, The n-type GaAs ingot has a carrier concentration of 7.0 × 10⁻⁶. 17 cm -3 Above and 8.0×10 17 cm -3 The absorption coefficient at a wavelength of 940 nm is 4.8 cm⁻¹. -1 Above and 6.8cm -1 The following section.

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