Apparatus and method for controlling ion energy distribution

Abstract

Embodiments of the present disclosure generally relate to apparatuses and methods for controlling ion energy distribution during plasma processing. In embodiments, an apparatus includes a substrate support having a body with a substrate electrode for applying a substrate voltage to a substrate and an edge ring electrode embedded for applying an edge ring voltage to an edge ring. The apparatus further includes a substrate voltage control circuit coupled to the substrate electrode and an edge ring voltage control circuit coupled to the edge ring electrode. The substrate electrode, the edge ring electrode, or both are coupled to a power module configured to actively control an energy distribution function width of ions reaching the substrate, the edge ring, or both. Methods for controlling an energy distribution function width of ions during substrate processing are also described.

Description

Technical Field

[0001] Embodiments of this disclosure generally relate to apparatus and methods for plasma treatment of substrates, and more specifically, to apparatus and methods for controlling the distribution of ion energy during plasma treatment. Related technical specifications

[0002] During plasma processing of substrates, ions play a crucial role in substrate surface treatment, etching, and deposition. Ions impacting the substrate surface can possess various energies described by the ion energy distribution function (IEDF). Controlling the IDF can be a significant factor in various substrate processing schemes. However, controlling the IDF remains a challenge. For example, when periodically alternating voltages are applied to the electrodes of a chamber, a plasma sheath may form on the substrate. Ions flowing toward the substrate are accelerated by the plasma sheath voltage, which is related to the voltage applied to the electrodes. Simultaneously, the ion current can charge the substrate and change its potential, thereby affecting the plasma sheath voltage and thus influencing the IDF at the substrate surface, for example, broadening it. Existing methods for controlling the IDF in this and other examples are based on inefficient iterative loops.

[0003] New and improved methods are needed for controlling IEDF. Summary of the Invention

[0004] The embodiments of this disclosure generally relate to apparatus and methods for plasma treatment of substrates, and more specifically to apparatus and methods for controlling the distribution of ion energy during plasma treatment.

[0005] Embodiments of this disclosure provide a method for controlling the ion energy distribution function (IEDF). The method includes: introducing a voltage into the electrodes of a processing chamber by activating a master pulser, the master pulser being coupled to an IEDF width control module; and measuring the current of the IEDF width control module and the voltage or voltage derivative of the IEDF width control module. The method further includes calculating the ion current and capacitance of the processing chamber based on the current and voltage or voltage derivative of the IEDF width control module. The method further includes: determining a setpoint for the DC voltage of the master pulser, a setpoint for the voltage or voltage derivative of the IEDF width control module, or both; and adjusting the DC voltage of the master pulser, the voltage or voltage derivative of the IEDF width control module, or both, to the determined setpoint to control the width of the IEDF.

[0006] Embodiments of this disclosure may also provide an apparatus for controlling ion energy distribution. The apparatus includes a substrate support having a body, the body having a substrate support portion having a substrate electrode embedded therein for applying a substrate voltage to the substrate. The body further includes an edge ring portion disposed adjacent to the substrate support portion, the edge ring portion having an edge ring electrode embedded therein for applying an edge ring voltage to the edge ring. The apparatus further includes a substrate voltage control circuit coupled to the substrate electrode and an edge ring voltage control circuit coupled to the edge ring electrode. The substrate electrode is coupled to a power module configured to actively control the width of the energy distribution function of ions arriving at the substrate, or the edge ring electrode is coupled to a power module configured to actively control the width of the energy distribution function of ions arriving at the edge ring, or a combination thereof. The substrate voltage control circuit, the edge ring voltage control circuit, or both include a master pulser coupled to a current return path, the current return path being coupled to the power module and a processing chamber, wherein the power module includes a voltage source, a current source, or a combination thereof.

[0007] Embodiments of this disclosure may also provide an apparatus for controlling ion energy distribution. The apparatus includes a substrate support having a body, the body having a substrate support portion having a substrate electrode embedded therein for applying a substrate voltage to the substrate. The body further includes an edge ring portion disposed adjacent to the substrate support portion, the edge ring portion having an edge ring electrode embedded therein for applying an edge ring voltage to the edge ring. The apparatus further includes a substrate voltage control circuit coupled to the substrate electrode and an edge ring voltage control circuit coupled to the edge ring electrode. The substrate electrode is coupled to a power module configured to actively control the width of the energy distribution function of ions arriving at the substrate, or the edge ring electrode is coupled to a power module configured to actively control the width of the energy distribution function of ions arriving at the edge ring, or a combination thereof. The substrate voltage control circuit, the edge ring voltage control circuit, or both include a master pulser coupled to the power module, the power module being coupled to a processing chamber, the power module including a voltage source, a current source, or a combination thereof.

[0008] Embodiments of this disclosure may also provide an apparatus for controlling ion energy distribution. The apparatus includes a substrate support having a body, the body having a substrate support portion having a substrate electrode embedded therein for applying a substrate voltage to the substrate. The body further includes an edge ring portion disposed adjacent to the substrate support portion, the edge ring portion having an edge ring electrode embedded therein for applying an edge ring voltage to the edge ring. The apparatus further includes a substrate voltage control circuit coupled to the substrate electrode and an edge ring voltage control circuit coupled to the edge ring electrode. The substrate electrode is coupled to a power module configured to actively control the width of the energy distribution function of ions arriving at the substrate, or the edge ring electrode is coupled to a power module configured to actively control the width of the energy distribution function of ions arriving at the edge ring, or a combination thereof. The substrate voltage control circuit, the edge ring voltage control circuit, or both include a master pulser coupled to the power module, the power module being coupled to a processing chamber, wherein the power module is connected in parallel with a substrate adsorption and bias compensation module, and wherein the power module includes a voltage source, a current source, or a combination thereof.

[0009] Embodiments of this disclosure may also provide an apparatus for controlling ion energy distribution, the apparatus comprising: an IEDF width control module including a voltage source or current source, wherein the voltage source or current source is electrically coupled between the main pulser output and ground or between the main pulser output and electrodes within the processing chamber, and wherein the voltage source or current source includes a DC current source or a shaped DC pulse voltage source or a DC voltage source electrically coupled in series to a resistor; and a switch electrically coupled in parallel with the voltage source or current source, and electrically coupled between the main pulser output and ground or between the main pulser output and electrodes within the processing chamber. The device also includes a non-transient computer-readable medium comprising instructions that, when executed on a processor, perform operations for controlling the width of an ion energy distribution function (IEDF), the operations including: delivering a first pulse voltage waveform from a master pulser output of a master pulser to an electrode in a processing chamber, the master pulser output being electrically coupled to an IEDF width control module; measuring at least one of a current flowing from the IEDF width control module, a voltage applied through the IEDF width control module, and a voltage derivative at a node between the IEDF width control module and an electrode in the processing chamber; calculating an ion current and a capacitance of the processing chamber based on at least one of the measured current, the measured voltage, and the measured voltage derivative; determining a setpoint for the voltage or current provided from the IEDF width control module or a setpoint for the voltage derivative provided from the IEDF width control module; and adjusting the voltage or current provided from the IEDF width control module or the voltage derivative provided from the IEDF width control module to control the width of the IEDF.

[0010] Embodiments of this disclosure may also provide a pulsed direct current (DC) power delivery system, comprising: a master pulser configured to deliver a DC pulse waveform to a master pulser output; and a power module electrically coupled to the master pulser output, the power module being configured to control an ion energy distribution function of ions within a formed plasma. The power module may include a voltage source or a current source, wherein the voltage source or current source is electrically coupled between the master pulser output and ground, and wherein the voltage source or current source includes at least one of a DC voltage source, a DC current source, or a shaped DC pulse voltage source electrically coupled in series to a resistor; and a switch electrically coupled in parallel with the voltage source or current source and electrically coupled between the master pulser output and ground.

[0011] Embodiments of this disclosure may also provide a pulsed direct current (DC) power delivery system, comprising: a master pulser configured to deliver a DC pulse waveform to a master pulser output; and a power module electrically coupled to the output of the master pulser, the power module being configured to control an ion energy distribution function of ions within a formed plasma, the power module comprising: a voltage source or a current source configured to be electrically coupled between the master pulser output and electrodes within a processing chamber, and wherein the voltage source or current source comprises a DC current source or a shaped DC pulse voltage source or a DC voltage source electrically coupled in series to a resistor; and a switch electrically coupled in parallel to the voltage source or current source. Attached Figure Description

[0012] To gain a more detailed understanding of the features of this disclosure, reference can be made to embodiments (some of which are shown in the accompanying drawings) for a more specific description of the disclosure briefly outlined above. However, it will be noted that the drawings illustrate exemplary embodiments only and are not intended to limit its scope, as this disclosure may allow for other equivalent and effective embodiments.

[0013] Figure 1 This is a schematic cross-sectional view of an example processing chamber according to at least one embodiment of the present disclosure.

[0014] Figure 2 This is a schematic overview of an exemplary processing chamber according to at least one embodiment of the present disclosure.

[0015] Figure 3A This is an exemplary diagram of three different bias waveforms on an illustrated substrate according to at least one embodiment of the present disclosure.

[0016] Figure 3B This is in accordance with at least one embodiment of the present disclosure. Figure 3A Exemplary curves showing the relationship between IEDF and ion energy for three different bias waveforms on the substrate.

[0017] Figure 4A This is a schematic overview of an example circuit according to at least one embodiment of the present disclosure.

[0018] Figure 4B This is a schematic overview of an example circuit according to at least one embodiment of the present disclosure.

[0019] Figure 4C This is a schematic overview of an example circuit according to at least one embodiment of the present disclosure.

[0020] Figure 4D This is a schematic overview of an example circuit according to at least one embodiment of the present disclosure.

[0021] Figure 5A This is an example schematic circuit diagram illustrating an IEDF width control circuit for driving electrodes of a substrate support assembly, according to at least one embodiment of the present disclosure.

[0022] Figure 5B This is in accordance with at least one embodiment of the present disclosure. Figure 5A The example schematic circuit diagram shown includes exemplary curves of the V2 voltage waveform and the substrate voltage waveform.

[0023] Figure 5C This is an example control circuit according to at least one embodiment of the present disclosure.

[0024] Figure 5D This is an example control circuit according to at least one embodiment of the present disclosure.

[0025] Figure 5E An exemplary sawtooth voltage output according to at least one embodiment of the present disclosure is illustrated.

[0026] Figure 6A This is an example schematic circuit diagram illustrating an IEDF width control circuit for driving electrodes of a substrate support assembly, according to at least one embodiment of the present disclosure.

[0027] Figure 6B This is an example control circuit according to at least one embodiment of the present disclosure.

[0028] Figure 6C This is an example control circuit according to at least one embodiment of the present disclosure.

[0029] Figure 6D This is an example schematic circuit diagram illustrating an IEDF width control circuit for driving electrodes of a substrate support assembly, according to at least one embodiment of the present disclosure.

[0030] Figure 6E This is an example control circuit according to at least one embodiment of the present disclosure.

[0031] Figure 6F This is an example control circuit according to at least one embodiment of the present disclosure.

[0032] Figure 7A This is an example schematic circuit diagram illustrating an IEDF width control circuit for driving electrodes of a substrate support assembly, according to at least one embodiment of the present disclosure.

[0033] Figure 7B This is an example schematic circuit diagram illustrating an IEDF width control circuit for driving electrodes of a substrate support assembly, according to at least one embodiment of the present disclosure.

[0034] Figure 8 This is an example schematic circuit diagram illustrating an IEDF width control circuit for driving electrodes of a substrate support assembly, according to at least one embodiment of the present disclosure.

[0035] Figure 9A This is an example schematic circuit diagram illustrating an IEDF width control circuit for driving electrodes of a substrate support assembly, according to at least one embodiment of the present disclosure.

[0036] Figure 9B This is an example schematic circuit diagram illustrating an IEDF width control circuit for driving electrodes of a substrate support assembly, according to at least one embodiment of the present disclosure.

[0037] Figure 10 This is an example schematic circuit diagram illustrating an IEDF width control circuit for driving electrodes of a substrate support assembly, according to at least one embodiment of the present disclosure.

[0038] Figure 11 This is a flowchart of a method for controlling the width of an IEDF according to at least one embodiment of the present disclosure.

[0039] For ease of understanding, the same reference numerals have been used where possible to identify the same elements common in the figures. It is conceivable that elements and features of one embodiment may be advantageously incorporated into other embodiments without further description. Detailed Implementation

[0040] Embodiments of this disclosure generally relate to apparatus and methods for plasma processing of substrates, and more specifically to apparatus and methods for controlling ion energy distribution during plasma processing. The methods and apparatuses (e.g., circuits) described herein achieve control over the shape (e.g., narrow or adjustable width) of the voltage waveform of a pulsed DC power supply. The embodiments described herein further achieve, for example, control over the ion energy distribution function (IEDF) including monoenergetic ion acceleration.

[0041] IEDF is a controllable parameter that can be used to process substrates via plasma processes, such as etching high aspect ratio features on the substrate surface. Typically, a pulsed DC bias can provide a narrower IEDF compared to a sinusoidal RF bias, based on the following mechanism. Because ions are accelerated by an electric field that varies little with time during the pulsed DC cycle, the energy gained by ions within the sheath also exhibits a lower time variation compared to when using a varying sinusoidal RF bias. Therefore, ions accelerated by a pulsed DC bias have a narrower IEDF than ions generated using a sinusoidal RF bias. However, the ion current from the bulk plasma to the substrate distorts the voltage waveform at the substrate surface and broadens the ion energy distribution. The methods and apparatus described herein can, for example, compensate for this ion current and actively control the width of the ion energy distribution.

[0042] Conventional methods and apparatus use iterative control loops to control the width of the ion energy distribution. Prior to a convergent control algorithm, estimates of plasma parameters (e.g., ion current, sheath thickness, and IEDF width) are inaccurate. Furthermore, controlling the IEDF width iteratively is slow and can lead to non-convergence of the control algorithm.

[0043] In contrast, the method and apparatus described herein utilize a single-loop process without iteration to determine the ion current and compensation current to achieve a given IEDF width. Therefore, the method and apparatus described herein achieve the desired IEDF state, e.g., a narrow IEDF, much faster than prior art. This is, for example, due to the absence of iteration in determining the solution for the compensation current. As discussed further below, Figure 1 An example of an apparatus (e.g., a processing chamber 100) that can be used to perform one or more methods described herein is shown.

[0044] In summary, and in some embodiments, the substrate support assembly includes a body comprising a substrate support portion and / or an edge ring portion. A substrate electrode is embedded in the substrate support portion for applying a substrate voltage to the substrate. A substrate voltage control circuit is coupled to the substrate electrode. The edge ring portion includes an edge ring electrode embedded therein for applying an edge ring voltage to a region of the internal volume of the processing chamber near the edge ring. The edge ring voltage control circuit is coupled to the edge ring electrode. At least one DC pulse source (such as a shaped DC pulse source) is coupled to the substrate voltage control circuit and / or the edge ring voltage control circuit. The substrate voltage circuit and / or the edge ring voltage control circuit can be tuned to adjust the amount of voltage and / or power supplied to each circuit. Adjusting the voltage amplitude via, for example, tuning the substrate voltage control circuit and / or the edge ring voltage control circuit results in the regulation and control of ion energy distribution. In some embodiments, as will be further discussed below, the edge ring voltage control circuit and / or the substrate voltage control circuit are configured to provide a constant current and apply a desired voltage to regulate and control the ion energy distribution.

[0045] In some embodiments, the IEDF width control circuitry is coupled to the substrate support. The IEDF width control circuitry can be integrated within the main pulse DC power supply, or as a separate module, or as a module integrated with the bias compensation module. Exemplary processing system configuration

[0046] Figure 1 This is a schematic cross-sectional view of a processing chamber 100 according to at least one embodiment of the present disclosure. The processing chamber 100 is configured to practice the schemes described herein. In this embodiment, the processing chamber is a plasma processing chamber, such as a reactive ion etch (RIE) plasma chamber. In some other embodiments, the processing chamber is a plasma-enhanced deposition chamber, such as a plasma-enhanced chemical vapor deposition (PECVD) chamber, a plasma-enhanced physical vapor deposition (PEPVD) chamber, or a plasma-enhanced atomic layer deposition (PEALD) chamber. In some other embodiments, the processing chamber is a plasma processing chamber or a plasma-based ion implantation chamber, such as a plasma-doping (PLAD) chamber.

[0047] Processing chamber 100 includes a chamber body 101 that together defines an internal volume 124 and a cover 102 disposed thereon. The chamber body 101 is generally coupled to an electrical ground 103. A substrate support assembly 104 is disposed within the internal volume to support a substrate 105 thereon during processing. An edge ring 106 is positioned on the substrate support assembly 104 and surrounds the periphery of the substrate 105. Processing chamber 100 also includes an inductively coupled plasma device 107 for generating plasma of reactive species within processing chamber 100, and a controller 108 adapted to control systems and subsystems of processing chamber 100. In some embodiments, the inductively coupled plasma device 107 may be replaced by a grounded nozzle disposed above the substrate support assembly 104, delivering RF power from electrodes positioned below the substrate (e.g., substrate electrodes 109) to generate capacitively coupled plasma.

[0048] A substrate support assembly 104 is disposed within an internal volume 124. The substrate support assembly 104 typically includes a substrate support member 152. The substrate support member 152 includes an electrostatic chuck 150 comprising a substrate support portion 154 and an edge ring portion 156. The substrate support portion 154 is configured to be below and support the substrate 105 to be processed, and the edge ring portion 156 is configured to support the edge ring 106. The substrate support assembly 104 may additionally include a heater assembly 169. The substrate support assembly 104 may also include a cooling base 131. The cooling base 131 may alternatively be detachable from the substrate support assembly 104. The substrate support assembly 104 may be removably coupled to a support base 125. The support base 125 is mounted to the chamber body 101. The support base 125 may optionally include a facility plate 180. The substrate support assembly 104 may be periodically removed from the support base 125 to allow for trimming of one or more components of the substrate support assembly 104. The lifting pin 146 is disposed through the substrate support assembly 104 as is conventionally known to facilitate substrate transfer.

[0049] Facility plate 180 is configured to accommodate multiple fluid connections from electrostatic chuck 150 and cooling base 131. Facility plate 180 is also configured to accommodate multiple electrical connections from electrostatic chuck 150 and heater assembly 169. The multiple electrical connections may operate externally or internally to the substrate support assembly 104, and facility plate 180 provides interfaces for connections to the respective terminals.

[0050] A substrate electrode 109 is embedded within a substrate support portion 154 of an electrostatic chuck 150 for applying a substrate voltage waveform to a substrate 105 disposed on an upper surface 160 of the substrate support assembly 104. An edge ring portion 156 has an edge ring electrode 111 embedded therein for applying an edge ring voltage waveform to an edge ring 106. An edge ring IEDF width control circuit 155 is coupled to the edge ring electrode 111. A substrate IEDF width control circuit 158 ​​is coupled to the substrate electrode 109. In one embodiment, a first shaped DC pulse voltage source 159 is coupled to one or both of the edge ring IEDF width control circuit 155 and the substrate IEDF width control circuit 158. Although the disclosure herein refers to the first shaped DC pulse voltage source 159 and the second shaped DC pulse voltage source 161 as “shaped” DC pulse voltage sources, this term or name is not intended to limit the type of pulse voltage waveform that can be supplied by such DC pulse voltage sources. In another embodiment, as... Figure 1 As shown, a first shaped DC voltage source 159 is coupled to an edge ring IEDF width control circuit 155, and a second shaped DC voltage source 161 is coupled to a substrate IEDF width control circuit 158. The edge ring IEDF width control circuit 155 and the substrate IEDF width control circuit 158 ​​can be tuned independently. The substrate electrode 109 is further coupled to an adsorption power source 115 to facilitate the electrostatic adsorption of the substrate 105 to the upper surface 160 using an electrostatic chuck 150 during processing. The adsorption power source 115 may include a high-voltage DC power source configured to “adsorb” the substrate 105 to the upper surface 160 of the substrate support assembly 104 using an embedded electrode disposed within the substrate support portion 154 of the substrate support assembly 104. In some embodiments, the embedded electrode disposed within the substrate support portion 154 is the substrate electrode 109. In this configuration, the substrate electrode 109 is disposed within a dielectric material (e.g., AlN, AlOx, etc.) and positioned at a distance between approximately 0.1 mm and approximately 1 mm from the upper surface 160 of the substrate support assembly 104. In some embodiments, the dielectric material and layer thickness can be selected such that the capacitance of the dielectric material layer is between about 5 nF and about 50 nF, such as between about 7 nF and about 10 nF.

[0051] An inductively coupled plasma device 107 is disposed above a cover 102 and configured to inductively couple RF power to a gas within an internal volume 124 of a processing chamber 100 to generate plasma 116. The inductively coupled plasma device 107 includes a first coil 118 and a second coil 120 disposed above the cover 102. The relative position, diameter ratio, and / or number of turns in each coil 118, 120 can be adjusted as desired to control the distribution or density of the generated plasma 116. Each of the first coil 118 and the second coil 120 is coupled to an RF power supply 121 via a matching network 122 and an RF feed structure 123. The RF power supply 121 is illustratively capable of generating up to approximately 4000 W (but not limited to approximately 4000 W) at tunable frequencies ranging from 50 kHz to 13.56 MHz, although other frequencies and powers may be used as desired for specific applications.

[0052] In some examples, a power divider 126 (such as a distribution capacitor) may be provided between the RF feed structure 123 and the RF power supply 121 to control the relative amount of RF power supplied to the respective first coil 118 and second coil 120. In other embodiments, as described below... Figure 2 The capacitively coupled plasma device can replace the cover 102 and includes a nozzle (not shown) and / or a conductive plate (not shown) disposed above the substrate support assembly 104, and can be driven by an RF source or grounded.

[0053] A heater element 128 may be disposed on the cover 102 to facilitate heating the interior of the processing chamber 100. The heater element 128 may be disposed between the cover 102 and the first coil 118 and the second coil 120. In some examples, the heater element 128 includes a resistance heating element and is coupled to a power source 130 (such as an AC power source) configured to provide sufficient energy to control the temperature of the heater element 128 within a desired range.

[0054] During operation, a substrate 105 (such as a semiconductor substrate or other substrate suitable for plasma processing) is placed on a substrate support assembly 104. A substrate lifting pin 146 is movably disposed in the substrate support assembly 104 to facilitate the transfer of the substrate 105 onto the substrate support assembly 104. After positioning the substrate 105, a process gas is supplied from a gas panel 132 through an inlet port 134 into the internal volume 124 of the chamber body 101. Within the internal volume 124 of the processing chamber 100, the process gas is ignited into plasma 116 by applying power from an RF power supply 121 to a first coil 118 and a second coil 120. The pressure within the internal volume 124 of the processing chamber 100 can be controlled using a valve 136 and a vacuum pump 138.

[0055] Processing chamber 100 includes a controller 108 for controlling the operation of processing chamber 100 during processing. Controller 108 includes a central processing unit (CPU) 140, memory 142, and support circuitry 144 for CPU 140, and facilitates control of components of processing chamber 100. Controller 108 may be one of any type of general-purpose computer processor that can be used in industrial settings to control individual chambers and subprocessors. Memory 142 (e.g., non-volatile memory) stores software (source or object code) that can be executed or invoked to control the operation of processing chamber 100 in the manner described herein. When executed by the processing unit, the software is configured to perform one or more of the methods described herein. For example, controller 108 is configured to control a first shaped DC voltage source 159, a second shaped DC voltage source 161, an edge ring IEDF width control circuit 155, and a substrate IEDF width control circuit 158 ​​during substrate processing in the processing chamber.

[0056] Figure 2 This is a schematic overview of a processing chamber 200 according to at least one embodiment of the present disclosure. The processing chamber 200 is configured to practice the scheme described herein. Like the processing chamber 100, the processing chamber 200 is a plasma processing chamber, such as those described above.

[0057] Processing chamber 200 includes, for example Figure 1 A substrate 105 is shown disposed on a substrate support assembly 104. An edge ring 106 is positioned on the substrate support assembly 104 and surrounds the periphery of the substrate 105. Although not shown, a capacitively coupled plasma device is disposed on the substrate (typically disposed on the chamber cover). The capacitively coupled plasma device may include an ion suppressor and a nozzle in which RF power is delivered from electrodes (e.g., electrode 109) beneath the substrate to generate capacitively coupled plasma. A controller 108 is adapted to control the system and subsystems of the processing chamber 200. As mentioned above, a memory 142 stores software (source or object code) that can be executed or invoked to control the operation of the processing chamber 200 in the manner described herein. The controller 108 is configured to control a first shaped DC voltage source 159, a second shaped DC voltage source 161, an edge ring IEDF width control circuit 155, and / or a substrate IEDF width control circuit 158. The following discussion... Figures 4A to 4D The illustration shows different configurations for connecting the IEDF width control module to the pulser.

[0058] Figure 2The substrate support assembly 104, facility plate 180, substrate electrode 109, and edge ring electrode 111 shown herein can be used with respect to... Figure 1 The same applies to those discussed. Edge ring IEDF width control circuit 155 is coupled to edge ring electrode 111. Substrate IEDF width control circuit 158 ​​is coupled to substrate electrode 109. In one embodiment, a first shaped DC pulse voltage source 159 is coupled to one or both of the edge ring IEDF width control circuit 155 and the substrate IEDF width control circuit 158. In another embodiment, the first shaped DC voltage source 159 is coupled to the edge ring IEDF width control circuit 155 and a second shaped DC voltage source 161 is coupled to the substrate IEDF width control circuit 158. The edge ring IEDF width control circuit 155 and the substrate IEDF width control circuit 158 ​​can be independently tuned to adjust the slope of the voltage waveform provided to the edge ring electrode 111 or the substrate electrode 109 by the first shaped DC pulse voltage source 159 and the second shaped DC pulse voltage source 161, respectively. The substrate electrode 109 is further coupled to the adsorption power supply 115 to facilitate the adsorption of the substrate 105 onto the upper surface 160 using the electrostatic chuck 150 during processing.

[0059] Operation of the processing chamber 200 and processing of the substrate 105 can be performed in a similar manner to that of the processing chamber 100. In some embodiments, the processing system configuration includes an ion suppressor located inside the processing chamber to control the type and amount of plasma-excited species reaching the substrate. In some embodiments, the ion suppressor unit is a porous plate, which may also serve as an electrode for a plasma generation unit. In such and other embodiments, the ion suppressor may be a nozzle that distributes gas and excited species to a reaction region (e.g., internal region 124) in contact with the substrate. In some embodiments, ion suppression is achieved through a porous plate ion suppressor and a nozzle through which plasma-excited species pass to reach the reaction region.

[0060] When a voltage is applied to a substrate (or wafer) through a shaped DC voltage source 159, a waveform is formed. Figure 3A Different bias waveforms are illustrated. The waveforms consist of two phases: an ion current phase and a sheath collapse phase. At the beginning of the ion current phase, the drop in wafer voltage creates a high-voltage sheath above the substrate, which accelerates positive ions toward the substrate. Positive ions deposit positive charges on the substrate surface and tend to gradually increase the substrate voltage (i.e., a smaller negative voltage). If a square wave is supplied through a shaped DC voltage source 159, the ion current flowing toward the substrate produces a positive slope for the substrate voltage, as shown by trace 305. The voltage difference between the beginning and end of the ion current phase determines the IEDF width. The larger the voltage difference, the wider the IEDF width. Figure 3BTo achieve monoenergetic ions and a narrower IEDF width, operations are performed to flatten the substrate voltage waveform (e.g., trace 310) during the ion current phase (e.g., reducing the slope of the ion current curve to be closer to zero volts per microsecond (μs)). In some embodiments, a voltage may be applied to achieve a certain IEDF width, as shown by the substrate waveform of trace 315.

[0061] At the end of the ion current phase, the substrate voltage rises to the bulk plasma voltage and the sheath collapses, allowing electrons to travel from the plasma to the substrate surface and neutralize the positive charge there. Thus, the substrate surface is cycled and reset for the next pulse waveform.

[0062] Typically, the outputs of the first shaped DC voltage source 159 and the second shaped DC voltage source 161 are configured to generate a voltage waveform comprising at least one portion in which the voltage changes from a first voltage level to a second voltage level in a positive or negative voltage direction relative to ground. During processing, the pulser generates a pulsed voltage waveform that periodically alternates between the first and second voltage levels. The period at the higher voltage level during a portion of the pulsed voltage waveform corresponds to the sheath collapse phase. The period at the lower voltage level during a portion of the pulsed voltage waveform corresponds to the ion current phase. Although in Figures 4A to 4D , Figure 5A , Figure 6A , Figures 7A to 7B , Figure 8 , Figures 9A to 9B as well as Figure 10 The schematic representation of the first shaped DC voltage source 159 and the second shaped DC voltage source 161 in the diagram illustrates a DC voltage source with a positive voltage output. This configuration is provided by way of example only and is not intended to limit the scope of the disclosure provided herein, as, as also discussed herein, the first shaped DC voltage source 159 and / or the second shaped DC voltage source 161 may be alternately configured to establish other pulsed voltage outputs provided to the desired electrodes. Example circuit

[0063] Figure 4A This is a schematic overview of example circuit 465. As described below, and in some embodiments, in... Figure 4A The example circuit shown corresponds to Figure 5A and Figure 6A The circuit diagram. Figure 5A and Figure 6A Distinguishing them is done through, for example, the circuitry of the second power module.

[0064] Exemplary circuit 465 includes a pulsed DC power supply 466 coupled to a second power module 470 via a series inductor 468 and a resistor 469 connected in series. The second power module 470 modulates the width of the ion energy distribution function (IEDF). An optional blocking capacitor 471 may be present between the plasma chamber load 472 and the remainder of circuit 465. A controller (not shown), implemented by hardware, software, firmware, or a combination thereof, may be used for control. Figure 4A The various components are represented in the text.

[0065] The shaped DC power supply 466 generates a voltage waveform with at least two voltage levels (low voltage level and high voltage level). The low voltage level corresponds to the ion current phase. The high voltage level corresponds to the sheath collapse phase. During the ion current phase, the second power module 470 modulates... Figure 3A The slopes of the voltage over time are shown in traces 305, 310, and 315. Figure 3B As shown, different slopes result in different IEDF widths. The flattest slope (e.g., Figure 3A Trajectory 305 in the middle corresponds to Figure 3B The narrowest IEDF width in the dataset.

[0066] Figure 4B This is a schematic overview of example circuit 475. As shown in the figure, Figure 4B and Figure 4A The difference lies in replacing the series inductor 468 and resistor 469 with a switch 479. Switch 479 is connected in series with a pulsed DC power supply 476 and a second power module 478. During the ion current phase, switch 479 is turned off. During the sheath collapse phase, the switch can be turned on or off. A controller (not shown), implemented by hardware, software, firmware, or a combination thereof, can be used for control. Figure 4B The various components are represented in the text.

[0067] Figure 4C This is a schematic overview of example circuit 485. As described below, and in some embodiments, in Figure 4C The example circuit 485 shown corresponds to Figures 7A-7B and Figure 8 The circuit diagram is shown. Exemplary circuit 485 includes a shaped DC voltage source 486 coupled to ground. An optional blocking capacitor 487 may exist between the shaped DC voltage source 486 and a second power module 488. The second power module 488 modulates the width of the IEDF. The second power module 488 is further coupled to a plasma chamber load 489. A controller (not shown), implemented by hardware, software, firmware, or a combination thereof, is used for control. Figure 4C The various components are represented in the text.

[0068] The shaped DC voltage source 486 generates a voltage waveform with two voltage levels—a low voltage level and a high voltage level. The low voltage level corresponds to the ion current phase. The high voltage level corresponds to the sheath collapse phase. During the ion current phase, the second power module 488 generates a voltage slope that varies with time. The resulting voltage waveform on the substrate is the sum of the output voltages of the shaped DC voltage source 486 and the second power module 488, which can modulate the output voltage and thereby modulate the IEDF width.

[0069] Figure 4D This is a schematic overview of an example circuit 490 according to at least one embodiment of the present disclosure. As described below, and in some embodiments, the example circuit 490 corresponds to Figures 9A-9B and Figure 10 The circuit diagram is shown. Example circuit 490 includes a shaped DC voltage source 491 coupled to ground, a second power module 492, and a substrate adsorption and bias compensation module 493. Switch 495 is connected in series with substrate adsorption and bias compensation module 493. Second power module 492 and substrate adsorption and bias compensation module 493 are connected in parallel, with one end coupled to the shaped DC voltage source 491 and the other end coupled to plasma chamber load 494. Second power module 492 modulates the width of the IEDF. Second power module 492 and substrate adsorption and bias compensation module 493 are further coupled to plasma chamber load 494. A controller (not shown), implemented by hardware, software, firmware, or a combination thereof, is used to control... Figure 4D The various components are represented in the text. Regarding... Figures 4A to 4D Each controller described may be a part of the controller 108 disclosed herein.

[0070] A shaped DC voltage source 491 generates a voltage waveform with at least two voltage levels (a low voltage level and a high voltage level). The low voltage level corresponds to the ion current phase. The high voltage level corresponds to the sheath collapse phase. During the ion current phase, a second power module 492 generates a voltage slope that varies over time. The resulting voltage waveform on the substrate is the sum of the output voltages of the shaped DC voltage source 491 and the second power module 492, which can modulate the output voltage and thereby modulate the IEDF width. Switch 495 is open during the ion current phase, preventing the adsorption and bias compensation module 493 from modulating the voltage of the plasma chamber load. During the sheath collapse phase, switch 495 is closed, and the adsorption and bias compensation module 493 resets the substrate adsorption voltage to a set point.

[0071] Figure 5AThis is a schematic circuit diagram illustrating an embodiment of a substrate voltage control circuit / edge ring voltage control circuit 500 for driving the substrate electrode 109 and / or edge ring electrode 111 of the substrate support assembly 104. Circuit 500 includes a main pulser 502 for resetting the substrate voltage (corresponding to) at the beginning of each ion current phase. Figure 3A (Voltage drop in the middle). The main pulser 502 may be a first shaped DC voltage source 159 or a second shaped DC voltage source 161 coupled to ground 501. The main pulser 502 is coupled to the current return path 503 via the main pulser output 505 (e.g., the output connection of the main pulser) and a conductive element 507 (e.g., a cable). The current return path 503 includes a resistor 506 coupled in series to the IEDF width control module 508 (e.g., ...). Figure 4A and Figure 4B The inductor 504 is the second power module in the system. The IEDF width control module 508 modulates the width of the ion energy distribution function (IEDF).

[0072] The IEDF width control module 508 can be modeled as a circuit including a transistor-transistor logic (TTL) signal source 510 and a switch 512, an optional diode 514, an optional capacitor 516, and a third shaped DC pulse voltage source 518 coupled in parallel to ground 517. The diode 514 is a flyback diode for protecting the switch 512 and the third shaped DC pulse voltage source 518. In some embodiments, a blocking capacitor 520 exists between the current return path 503 and the chamber capacitor 536. For example, the chamber capacitor 536 may be a portion of the impedance formed between the substrate electrode 109 and the substrate or between the edge ring electrode 111 and the edge ring 106. In some embodiments, the blocking capacitor 520 is also coupled to a substrate adsorption and bias compensation module 522.

[0073] The substrate adsorption and bias compensation module 522 is a circuit including a diode 524 series coupled to a resistor 526 and a DC voltage source 528, and a resistor 530 series coupled to a capacitor 532 and a ground 534. The DC voltage source 528 can be configured to have positive or negative polarity under any pulse waveform condition, as desired for a specific processing chamber configuration. The capacitor 536 is further coupled to a stray capacitor 538 and a portion of the plasma sheath 540 of the load. The substrate adsorption and bias compensation module 522 is further coupled to the stray capacitor 538. The plasma sheath 540 can be modeled (plasma sheath modeling) as a circuit including a sheath capacitor 542 coupled in parallel with a current source 544 and a diode 546 coupled to ground 548. In some embodiments, the series inductor 504 and resistor 506 in the current return path can be switched 479. Figure 4B (Alternatively, switch 479 is closed during the ion current phase.)

[0074] In use, and for Figure 5A In the configuration shown, the third shaped DC pulse voltage source 518 is used as an active knob to control the slope of the voltage waveform during the ion current phase. Figure 5B As shown in curve 550, switch 512, controlled by TTL signal source 510, is synchronized with main pulser 502. Synchronization of the output from the main pulser with the position of switch 512 can be controlled using one or more software applications operating on controller 108. Switch 512 can be turned off before the voltage of main pulser 502 is applied during the sheath collapse phase. Switch 512 can remain off during the sheath collapse phase to connect current return path 503 to ground. After the voltage of main pulser 502 drops during the ion current phase, switch 512 can be turned on, allowing a third shaped DC pulse voltage source 518 to modulate IEDF during the ion current phase. Optional capacitor 516 can be used to adjust the sensitivity of the substrate voltage waveform to the third shaped DC pulse voltage source 518. Capacitor 542 is the plasma sheath capacitance, which varies under different process conditions, and current source 544 is the variable ion current directed towards the substrate. Capacitor 536 and stray capacitance 538 are capacitances about the chamber and are constant. The blocking capacitor 520 is used as a blocking capacitor, which is configured to block DC voltages (such as DC voltages applied by DC voltage source 528) formed or applied on the chamber side of the blocking capacitor 520 from reaching the main pulser 502, and also has a constant capacitance value.

[0075] like Figure 5C and Figure 5D As shown, during the ion current phase and when the IEDF width control module 508 ( Figure 5AWhen actively controlling the substrate or edge ring waveform, the active components in the circuit model shown in such figures include an ion current 544 (I0), sheath capacitance 542 (C1), chamber capacitance 536 (C2), stray capacitance 538 (C3), blocking capacitance 520 (C4), and optional capacitor 516 (C5) connected in parallel with a third shaped DC pulse voltage source 518 (V1). Because the inductor 504 and resistor 506 in the current return path typically have a small effect on the IEDF width modulation, the inductor 504 and resistor 506 are treated as... Figure 5C Control circuit 560 and Figure 5D The control circuit 570 is short-circuited.

[0076] The intrinsic factor in broadening the IEDF is the ion current "I0" deposited on the substrate with positive charges, which causes the substrate voltage to gradually increase and the energy of the ions bombarding the substrate to decrease (e.g., Figure 3A The trace 305). The amount of IEDF broadening depends, for example, on the ion current I0, the sheath capacitance C1, and / or other capacitors C2, C3, and C4 associated with the chambers in the control circuits 560 and 570, as well as the power modules V1 and C5. To compensate for the ion current effect of IEDF broadening and / or to have active control over the IEDF width, the trace 305 is determined in this control circuit. Figure 5C The values ​​of all components in the ) are specified. Capacitors C2 through C5 associated with the chamber and power module can be determined from the product specifications or by estimating the chamber component dimensions, or by prior measurements such as direct impedance measurement using a multimeter, or by extracting capacitance values ​​from S-parameter or Z-parameter measurements. Ion current I0 and sheath capacitance C1 vary under varying plasma process conditions and are determined via real-time measurements during the plasma process. The shaped DC pulse voltage source V1 has a sawtooth voltage output ( Figure 5E The slope dV1 / dt of the voltage output can be varied to determine the ion current I0 and the sheath capacitance C1 and / or the modulation width of the IEDF. Figure 5A In the configuration shown by trace 584, the output voltage of the shaped DC pulse voltage source V1 is zero during the sheath collapse phase. As described below, traces 582 and 586 show other possible waveforms of the shaped DC pulse voltage source V1.

[0077] The IEDF modulation method comprises two parts: (1) determining the ion current I0 and the sheath capacitance C1, and (2) determining the slope dV1 / dt of the shaped DC pulse voltage source to achieve the target IEDF width. Using a sawtooth voltage source V1 supplying power to the substrate 105 or edge ring 106 and a shaped DC voltage source 159 or 161, the IEDF width at the substrate or edge ring is the distance from the start to the end of the ion current phase of the substrate or edge ring voltage. Figure 3A and Figure 3B Changes to control circuit 560. Figure 5C ) and control circuit 570 ( Figure 5D In the diagram, the IEDF width corresponds to the voltage change of the transsheath capacitance C1 from the beginning to the end of the ion current phase, which is determined by the charging or discharging current I1 passing through the sheath capacitance C1: ΔV = I1 T / C1, (1) Where ΔV is the IEDF width and T is the duration of the ion current phase. To obtain the target IEDF width (ΔV), the sheath capacitance C1 and the desired current I1 through the sheath capacitance will be determined.

[0078] To determine the sheath capacitance C1 and the ion current I0, the relationship between current and voltage in the control circuit is analyzed. As shown in the figure, the currents through capacitors C1 to C4 are referred to as I1 to I4, where the arrows in the circuit diagram point in the positive direction. Based on Kirchhoff's current law, the ion current I0 is equal to the sum of the currents passing through capacitors C1 and C2: I0 = I1 + I2. (2)

[0079] The current through capacitor C2 is equal to the sum of the currents through capacitors C3 and C4: I2 = I3 + I4. (3)

[0080] Based on Kirchhoff's voltage law, the sum of the voltages in the closed loop of C1, C2, and C3 is zero. The time derivative of the sum of the voltages of C1, C2, and C3 is also zero. Let the voltage at the intersection of capacitors C2 and C3 be V3. The time derivative of the voltage across capacitor C3 is dV3 / dt = I3 / C3. A similar relationship exists for capacitors C1 and C2, and Kirchhoff's voltage law provides equation (4): I1 / C1 = I2 / C2 + I3 / C3. (4)

[0081] Applying Kirchhoff's voltage law to the closed loop of capacitors C3 and C4 with voltage source V1 provides equation (5): I3 / C3 = I4 / C4 + dV1 / dt. (5)

[0082] In equations (2)-(5), C2, C3, and C4 are predetermined by the product specifications or by estimation based on the dimensions of the chamber components, or by prior measurements (such as direct impedance measurement using a multimeter, or extraction of capacitance values ​​from S-parameter or Z-parameter measurements). Current I4 can be directly measured by a sensor (such as a current probe and / or an integrated voltage-current (VI) sensor). Voltage V3 can be directly measured by a sensor (such as a voltage probe and / or an integrated VI sensor). Current I3 can be calculated as I3 = C3. dV3 / dt. The voltage slope dV1 / dt is user-controlled and known, such as zero or 1 volt / nanosecond (V / nsec). By setting a shaped DC pulse voltage source V1 at two different slopes dV1 / dt and dV1' / dt, the time derivatives of the currents I4, I4' and the voltages dV3 / dt and dV3' / dt can be determined. The set of equations (2)-(5) at the two slopes dV1 / dt and dV1' / dt forms eight equations, which can be solved to derive the equation for a given sheath capacitance: and ion current:

[0083] To obtain the target IEDF width (ΔV), the total current through the sheath capacitor C1 is I1 = C1 ΔV / T. (8)

[0084] Substituting equations (6)-(8) into equations (2)-(5) gives the voltage slope of the sawtooth voltage source V1, which is used to obtain the IEDF width ΔV:

[0085] In the case of the narrowest IEDF (ΔV=0), the voltage slope of the sawtooth voltage source V1 is

[0086] Figure 6A This is a schematic circuit diagram illustrating an embodiment of a substrate voltage control circuit / edge ring voltage control circuit 600 for driving the substrate electrode 109 and / or edge ring electrode 111 of the substrate support assembly 104. Circuit 600 includes a main pulser 502 for resetting the substrate voltage (corresponding to) at the beginning of each ion current phase. Figure 3A(Voltage drop in the middle). The main pulser 502 may be a first shaped DC voltage source 159 or a second shaped DC voltage source 161 coupled to ground 501. The main pulser 502 is coupled to the current return path 503 via the main pulser output 505 and the conductive element 507. The current return path 503 includes a resistor 506 coupled in series to the IEDF width control module 602 (e.g., voltage drop in the middle). Figure 4A and Figure 4B The inductor 504 (in the second power module). The IEDF width control module 602 is used to modulate the IEDF width. Figure 5A The IEDF width control module 602 with different configurations can be modeled as a circuit including a TTL signal source 510 and a switch 512, a diode 514, an optional capacitor 516, and a DC voltage source 604 series-coupled to a resistor 606, which is coupled in parallel and to ground 517. The diode 514 is a flyback diode used to protect the switch 512 and the DC voltage source 604. In some embodiments, a blocking capacitor 520 exists between the current return path 503 and the chamber capacitor 536. For example, the capacitor 536 may be a portion of the impedance formed between the substrate electrode 109 and the substrate 105 or between the edge ring electrode 111 and the edge ring 106. In some embodiments, a substrate adsorption and bias compensation module 522 is also coupled to the blocking capacitor 520 and the chamber capacitor 536. The substrate adsorption and bias compensation module 522 is further coupled to a stray capacitor 538. The substrate adsorption and bias compensation module 522 is a circuit that includes a diode 524 connected in series to a resistor 526 and a DC voltage source 528, and a resistor 530 connected in series to a capacitor 532 and a ground 534.

[0087] The plasma sheath 540 can be modeled as a circuit that includes a sheath capacitor 542 coupled in parallel with a current source 544 and a diode 546 coupled to ground 548.

[0088] In use, and for Figure 6A The configuration shown in the image, such as... Figure 5A In contrast, the DC voltage source 604, together with the resistor 606, serves as an active knob for controlling the slope of the voltage waveform of the substrate or edge ring during the ion current phase, wherein the third shaped DC pulse voltage source 518 serves as an active knob for controlling the slope of the voltage waveform during the ion current phase. As described above and Figure 5BAs illustrated, switch 512 can be controlled by a TTL signal source 510 synchronized with the main pulser 502. Switch 512 can be turned off before the voltage of the main pulser 502 rises to enter the sheath collapse phase. Switch 512 can remain off during the sheath collapse phase to connect the current return path 503 to ground. After the voltage of the main pulser 502 drops upon entering the ion current phase, switch 512 can be turned on, allowing the DC voltage source 604 to modulate the IEDF during the ion current phase. Optional capacitor 516 can be used to adjust the sensitivity of the substrate voltage waveform to the DC voltage source 604. For example, capacitor 536 can be a capacitor between substrate electrode 109 and the substrate or between edge ring electrode 111 and edge ring 106. Capacitor 538 can be a capacitor between substrate electrode 109 and ground or between edge ring electrode 111 and ground.

[0089] like Figure 6B and Figure 6C As shown, during the ion current phase and when the IEDF width control module 602 ( Figure 6A When actively controlling the substrate or edge ring waveform, the active components in the circuit model shown in such figures include an ion current 544 (I0), a sheath capacitance 542 (C1), a chamber capacitance 536 (C2), a stray capacitance 538 (C3), a blocking capacitance 520 (C4), and an optional capacitor 516 (C5) connected in parallel with a DC voltage source 604 (V0) and a resistor 606 (R). Because the inductor 504 and resistor 506 in the current return path typically have a small effect on the IEDF width modulation, the inductor 504 and resistor 506 are treated as follows: Figure 6B Control circuit 650 and Figure 6C The control circuit 660 is short-circuited. Figure 6A The control circuit in Figure 6B As shown in the text, and described below Figure 7A The control circuit in Figure 6C As shown in the image.

[0090] The intrinsic factor in widening the IEDF is the ion current I0 deposited with positive charges on the substrate, which causes the substrate voltage to gradually increase and the energy of the ions bombarding the substrate to decrease. Figure 3A The trace 305). The amount of IEDF broadening depends on, for example, the ion current I0, the sheath capacitance C1, and the respective... Figure 6B and Figure 6COther capacitors associated with the chambers (C2, C3, and C4) and power supply modules (V0, R, and C5) in control circuits 650 and 660 are determined. To compensate for the ion current effect of IEDF widening and to have active control over the IEDF width, the values ​​of all components in control circuits 650 and 660 are determined. Capacitors C2 through C5 associated with the chambers and power supply modules can be determined from the product manual or by estimating the dimensions of the chamber components, or by prior measurements such as direct impedance measurement using a multimeter, or by extracting capacitance values ​​from S-parameter or Z-parameter measurements. Resistor R is also predetermined from the product manual or by direct measurement using a multimeter. The varying ion current I0 and sheath capacitance C1 under varying plasma process conditions are determined via real-time measurements during the plasma process. The DC voltage source V0 is an active control knob and can be varied to determine the ion current I0, determine the sheath capacitance C1, and / or modulate the IEDF width.

[0091] The IEDF modulation method consists of two parts: (1) determining the ion current I0 and the sheath capacitance C1, and (2) determining the DC voltage V0 to achieve the target IEDF width. The IEDF width is determined from the ion current stage ( Figure 3A and Figure 3B The expansion of the substrate or edge ring voltage from start to end. Figure 6B Control circuit 650 and Figure 6C In the control circuit 660, the IEDF width corresponds to the voltage change of the transsheath capacitor C1 from the beginning to the end of the ion current phase, the voltage change being determined by the charging or discharging current I1 passing through the sheath capacitor C1: Where ΔV is the IEDF width and T is the duration of the ion current phase. To obtain the target IEDF width (ΔV), the sheath capacitance C1 and the desired current I1 through the sheath capacitance will be determined.

[0092] To determine the sheath capacitance C1 and the ion current I0, the relationship between current and voltage in the control circuit is analyzed. Here, for example, the currents through capacitors C1 to C5 are referred to as I1 to I5, where the arrows in the circuit diagram point in the positive direction. The voltage at the intersection of capacitors C2 and C3 is V3. There exists a threshold voltage for a DC voltage source V0 designated as Vth. Below this threshold voltage, diode D3 bypasses the series connection of the DC voltage source V0 and resistor R, causing the output voltage of the IEDF width control module to be zero. Vth is dependent on plasma conditions and can be experimentally determined, for example, by gradually increasing the DC voltage V0 until the current I4 or voltage V3 is affected by the DC voltage output V0.

[0093] When V0 ≤ Vth, based on Kirchhoff's current law, the ion current I0 is equal to the sum of the currents passing through capacitors C1 and C2: I0 = I1 + I2. (12)

[0094] The current through capacitor C2 is equal to the sum of the currents through capacitors C3 and C4: I2 = I3 + I4. (13)

[0095] Based on Kirchhoff's voltage law, the sum of the voltages in the closed loop of C1, C2, and C3 is zero. The time derivative of the sum of the voltages of C1, C2, and C3 is also zero. The time derivative of the voltage across capacitor C3 is dV3 / dt = I3 / C3. The same relationship applies to capacitors C1 and C2. Using Kirchhoff's voltage law on capacitors C1 and C2, equation (14) is provided: I1 / C1 = I2 / C2 + I3 / C3. (14)

[0096] Applying Kirchhoff's voltage law to the closed loop of capacitors C3 and C4, and the IEDF width control module bypassed by the diode, yields equation (15): I3 / C3 = I4 / C4. (15)

[0097] When V0 > Vth, equations (12)-(14) still apply. Applying Kirchhoff's voltage law to the closed loop of capacitors C3, C4, and C5 yields equation (16): I3 / C3 = I4 / C4 + I5 / C5. (16)

[0098] Applying Kirchhoff's voltage law to a closed loop consisting of capacitor C5, DC voltage source V0, and resistor R yields equation (17): Where (I4-I5) is the current passing through the DC voltage source V0 and resistor R when diode D3 is ineffective.

[0099] In some embodiments, capacitor C5 is not present. In this case, equation (17) does not exist and equation (16) becomes I3 / C3 = I4 / C4 + R dI4 / dt, (18)

[0100] In equations (12)-(18), C2, C3, C4, and C5 are predetermined by the product specifications or by estimation based on the dimensions of the chamber components, or by prior measurements (such as direct impedance measurement using a multimeter, or extraction of capacitance values ​​from S-parameter or Z-parameter measurements). Current I4 can be directly measured by a sensor, such as a current probe and / or an integrated VI sensor. Voltage V3 can be directly measured by a sensor (such as a voltage probe and / or an integrated VI sensor). Current I3 can be calculated as I3 = C3. dV3 / dt. The DC voltage V0 is user-controlled and known, such as setting the DC voltage output V0 to a value from zero to several kV. By setting the DC voltage V0 to two different values ​​V0 and V0', where at least one of these two values ​​is higher than the threshold voltage Vth, the time derivatives of the currents I4, I4' and voltages dV3 / dt, dV3' / dt can be determined. Solving the set of equations (12)-(18) gives the sheath capacitance C1: and ion current I0: I0 = (C1 / C2 + C1 / C3 + 1) I3 + (C1 / C2 +1) I4. (20)

[0101] Substituting the sheath capacitance C1 and ion power I0 into the set of equations (12)-(18), the currents I1 to I5 can be calculated for any DC voltage V0.

[0102] By substituting the expression for I1 into equation (11) using the known capacitors C1 to C5, resistor R, and DC voltage V0, the relationship between the IEDF width (ΔV) and DC voltage V0 can be obtained. Therefore, the required DC voltage V0 can be determined for the target IEDF width (ΔV).

[0103] In some embodiments, the resistor R is sufficiently large (e.g., about 10 kΩ), and the current through the DC voltage source V0 is approximately a time constant during the ion current phase and is equal to V0 / R. In such embodiments, equation (17) becomes I4 = I5 + V0 / R. (21)

[0104] Solving equations (12), (13), (14), (16), and (21) yields the total current flowing through the sheath capacitor C1, which is given by equation (22): in

[0105] Using equation (8) for this approximation of a constant current I1, the DC voltage V0 for obtaining the target IEDF width (ΔV) can be found using equation (23):

[0106] In the case of the narrowest IEDF (ΔV=0), the DC voltage V0 is

[0107] Figure 6D This is a schematic circuit diagram illustrating an alternative embodiment of a substrate voltage control circuit / edge ring voltage control circuit 500, or substrate voltage control circuit / edge ring voltage control circuit 600, for driving the substrate electrodes 109 and / or edge ring electrodes 111 of the substrate support assembly 104. Circuit 601 includes a main pulser 502 for resetting the substrate voltage at the start of each ion current phase (corresponding to...). Figure 3A (Voltage drop in the middle). The main pulser 502 may be a first shaped DC voltage source 159 or a second shaped DC voltage source 161 coupled to ground 501. The main pulser 502 is coupled to the current return path 503 via the main pulser output 505 and the conductive element 507. The current return path 503 includes a resistor 506 coupled in series to the IEDF width control module 602 (e.g., voltage drop in the middle). Figure 4A and Figure 4B The inductor 504 (in the second power module). The IEDF width control module 602 is used to modulate the IEDF width. Figure 5A The IEDF width control module 602 with different configurations can be modeled as a circuit including a TTL signal source 510 and a switch 512, a diode 514, an optional capacitor 516, and a DC current source 604 coupled in parallel and coupled to ground 517. Diode 514 is a flyback diode used to protect switch 512 and DC current source 605. In some embodiments, a blocking capacitor 520 exists between the current return path 503 and the chamber capacitor 536. For example, capacitor 536 may be a portion of the impedance formed between substrate electrode 109 and substrate 105 or between edge ring electrode 111 and edge ring 106. In some embodiments, substrate adsorption and bias compensation module 522 is also coupled to blocking capacitor 520 and chamber capacitor 536. Substrate adsorption and bias compensation module 522 is further coupled to stray capacitor 538. The substrate adsorption and bias compensation module 522 is a circuit that includes a diode 524 connected in series to a resistor 526 and a DC voltage source 528, and a resistor 530 connected in series to a capacitor 532 and a ground 534.

[0108] The plasma sheath 540 can be modeled as a circuit that includes a sheath capacitor 542 coupled in parallel with a current source 544 and a diode 546 coupled to ground 548.

[0109] In use, and for Figure 6D The configuration shown in the image, such as... Figure 5A In contrast, the DC current source 605 is used as an active knob to control the slope of the substrate or edge ring voltage waveform during the ion current phase, wherein the third shaped DC pulse voltage source 518 is used as an active knob to control the slope of the voltage waveform during the ion current phase. As described above and Figure 5B As illustrated, switch 512 can be controlled by a TTL signal source 510 synchronized with the main pulser 502. Switch 512 can be turned off before the voltage of the main pulser 502 rises to enter the sheath collapse phase. Switch 512 can remain off during the sheath collapse phase to connect the current return path 503 to ground. After the voltage of the main pulser 502 drops upon entering the ion current phase, switch 512 can be turned on, allowing the DC current source 605 to modulate the IEDF during the ion current phase. Optional capacitor 516 can be used to adjust the sensitivity of the substrate voltage waveform to the DC current source 605. For example, capacitor 536 can be a capacitor between substrate electrode 109 and the substrate or between edge ring electrode 111 and edge ring 106. Capacitor 538 can be a capacitor between substrate electrode 109 and ground or between edge ring electrode 111 and ground.

[0110] like Figure 6E and Figure 6F As shown, during the ion current phase and when Figure 6D The embodiment of the IEDF width control module 602 shown in the figure is actively controlling the substrate or edge ring waveform. In such figures, the active components in the circuit model include an ion current 544 (I0) connected in parallel with the DC current source 605 (Ic), a sheath capacitor 542 (C1), a chamber capacitor 536 (C2), a stray capacitor 538 (C3), a blocking capacitor 520 (C4), and an optional capacitor 516 (C5). Because the inductor 504 and resistor 506 in the current return path typically have a small effect on IEDF width modulation, the inductor 504 and resistor 506 are processed to... Figure 6E Control circuit 651 and Figure 6F The control circuit 661 is short-circuited. Figure 6D The control circuit in Figure 6E As shown in the text, and described below Figure 7B The control circuit in Figure 6F As shown in the image.

[0111] The intrinsic factor in widening the IEDF is the ion current I0 deposited with positive charges on the substrate, which causes the substrate voltage to gradually increase and the energy of the ions bombarding the substrate to decrease. Figure 3A The trace 305). The amount of IEDF broadening depends on, for example, the ion current I0, the sheath capacitance C1, and the respective... Figure 6E and Figure 6F Other capacitors associated with the chambers (C2, C3, and C4) and power modules (V0, R, and C5) in control circuits 651 and 661 are also included. To compensate for the ion current effect of IEDF widening and / or to have active control over the IEDF width, values ​​for all components in control circuits 651 and 661 are determined. Capacitors C2 through C5 associated with the chambers and power modules can be determined from product specifications or by estimating the dimensions of the chamber components, or by prior measurements such as direct impedance measurement using a multimeter or by extracting capacitance values ​​from S-parameter or Z-parameter measurements. The varying ion current I0 and sheath capacitance C1 under varying plasma process conditions are determined via real-time measurements during the plasma process. The DC current source Ic is an active control knob and can be varied to determine the ion current I0, determine the sheath capacitance C1, and / or modulate the IEDF width.

[0112] The IEDF modulation method comprises two parts: (1) determining the ion current I0 and the sheath capacitance C1, and (2) determining the DC current Ic to achieve the target IEDF width. Using a DC current source Ic that supplies power to the substrate 105 or edge ring 106 and a shaped DC voltage source 159 or 161, the IEDF width at the substrate or edge ring is the voltage of the substrate or edge ring from the beginning to the end of the ion current phase (…). Figure 3A and Figure 3B In control circuit 651 ( Figure 6E ) and control circuit 661 ( Figure 6F In the diagram, the IEDF width corresponds to the voltage change of the transsheath capacitance C1 from the beginning to the end of the ion current phase, which is determined by the charging or discharging current I1 passing through the sheath capacitance C1: ΔV = I1 T / C1, (25) Where ΔV is the IEDF width and T is the duration of the ion current phase. To obtain the target IEDF width (ΔV), the sheath capacitance C1 and the desired current I1 through the sheath capacitance will be determined.

[0113] To determine the sheath capacitance C1 and the ion current I0, the relationship between current and voltage in the control circuit is analyzed. As shown in the figure, the currents through capacitors C1 to C4 are referred to as I1 to I4, where the arrows in the circuit diagram point in the positive direction. Based on Kirchhoff's current law, the ion current I0 is equal to the sum of the currents passing through capacitors C1 and C2: I0 = I1 + I2. (26)

[0114] The current through capacitor C2 is equal to the sum of the currents through capacitors C3 and C4: I2 = I3 + I4. (27)

[0115] The current through capacitor C4 is equal to the sum of the currents through capacitor C5 and the DC current source Ic: I4 = I5 + Ic. (28)

[0116] Based on Kirchhoff's voltage law, the sum of the voltages across the closed loop of C1, C2, and C3 is zero. The time derivative of the sum of the voltages of C1, C2, and C3 is also zero. Let the voltage at the intersection of capacitors C2 and C3 be V3. The time derivative of the voltage across capacitor C3 is dV3 / dt = I3 / C3. A similar relationship exists for capacitors C1 and C2, and Kirchhoff's voltage law provides equation (29): I1 / C1 = I2 / C2 + I3 / C3. (29)

[0117] Kirchhoff's voltage law is applied to the closed loop of capacitors C3, C4, and C5 (5): I3 / C3 = I4 / C4 + I5 / C5. (30)

[0118] In equations (26, 27, 28, 29, and 30), C2-C5 are predetermined by the product specifications or by estimation based on the dimensions of the chamber components, or by prior measurements (such as direct impedance measurement using a multimeter, or extraction of capacitance values ​​from S-parameter or Z-parameter measurements). Currents I4 or I5 can be directly measured by sensors (such as current probes and / or integrated voltage-current (VI) sensors). Voltage V3 can be directly measured by sensors (such as voltage probes and / or integrated VI sensors). Current I3 can be calculated as I3 = C3. dV3 / dt. The current Ic is user-controlled and known, such as zero or 3 A. By setting the DC current source Ic to two values ​​Ic and Ic', the currents I4 and I4', or I5 and I5', or the time derivatives of the voltage dV3 / dt and dV3' / dt can be determined. The set of equations (26, 27, 28, 29, and 30) at the two DC current values ​​Ic and Ic' form ten equations that can be solved with respect to the currents I4 and I4', or I5 and I5', or the time derivatives of the voltage dV3 / dt and dV3' / dt to give the sheath capacitance C1. For example, the sheath capacitance with respect to the currents I4 and I4' is: and ion current:

[0119] To obtain the target IEDF width (ΔV), the total current through the sheath capacitor C1 is I1 = C1 ΔV / T. (33)

[0120] Substituting equations (31, 32, and 33) into equations (26, 27, 28, 29, and 30) yields the DC current Ic used to obtain the IEDF width ΔV:

[0121] In the case of the narrowest IEDF (ΔV=0), the DC current Ic is

[0122] Figure 7A This is a schematic circuit diagram illustrating an embodiment of an edge ring voltage control circuit / substrate voltage control circuit 700 for driving the substrate electrode 109 and / or edge ring electrode 111 of the substrate support assembly 104. Circuit 700 includes a main pulser 502 for resetting the substrate voltage (corresponding to) at the beginning of each ion current phase. Figure 3A (Voltage drop in the middle). The main pulser 502 may be a first shaped DC voltage source 159 or a second shaped DC voltage source 161 coupled to ground 501. The main pulser 502 is coupled directly or through capacitor 701 to IEDF width control module 702 (e.g., voltage drop in the middle). Figure 4C (The second power module in the middle).

[0123] The IEDF width control module 702 can be modeled as a circuit including a TTL signal source 704 coupled to a switch 706 and a ground 716. The TTL signal source 704 and the switch 706 are coupled in parallel to a diode 708, a DC voltage source 710, and an optional capacitor 714. The DC voltage source 710 is coupled in series to a resistor 712. The IEDF width control module 702 is coupled to a chamber capacitor 536. For example, the capacitor 536 may be a portion of the impedance formed between the substrate electrode 109 and the substrate 105 or between the edge ring electrode 111 and the edge ring 106. In some embodiments, the IEDF width control module 702 is also coupled to the substrate adsorption and bias compensation module 522 discussed above. The substrate adsorption and bias compensation module 522 is further coupled to a stray capacitor 538. The substrate adsorption and bias compensation module 522 is a circuit that includes a diode 524 connected in series to a resistor 526 and a DC voltage source 528, and a resistor 530 connected in series to a capacitor 532 and a ground 534. Diode 708 is a flyback diode used to protect the switch 706 and the DC voltage source 710.

[0124] The plasma sheath 540 can be modeled as a circuit, which includes a sheath capacitor 542 coupled in parallel with a current source 544 and a diode 546 coupled to ground 548.

[0125] In use, and for Figure 7A The configuration shown in the icon indicates that the DC voltage source 710, together with the resistor 712, serves as an active knob to control the slope of the voltage waveform during the ion current phase. (See also...) Figure 5B As shown in the curve, switch 706 can be controlled by TTL signal source 704 and synchronized with the output of main pulser 502. Switch 706 can be turned off before the voltage of main pulser 502 rises to enter the sheath collapse stage. Switch 512 can remain off during the sheath collapse stage. After the voltage of main pulser 502 drops upon entering the ion current stage, switch 706 can be turned on, allowing DC voltage source 710 to be used to modulate IEDF during the ion current stage. Optional capacitor 714 can be used to adjust the sensitivity of the substrate voltage waveform to DC voltage source 710. Figure 7A The control mechanism is similar to Figure 6A The control mechanism. One difference is... Figure 7A The control circuit described above Figure 6C As shown in the figure, and Figure 6A The control circuit in Figure 6B As shown in the image.

[0126] Figure 8This is a schematic circuit diagram illustrating an embodiment of an edge ring voltage control circuit / substrate voltage control circuit 800 for driving the substrate electrode 109 and / or edge ring electrode 111 of the substrate support assembly 104. Circuit 800 includes a main pulser 502 for resetting the substrate voltage (corresponding to) at the beginning of each ion current phase. Figure 3A (Voltage drop in the middle). The main pulser 502 may be a first shaped DC voltage source 159 or a second shaped DC voltage source 161 coupled to ground 501. The main pulser 502 is coupled directly or through the blocking capacitor 701 to the IEDF width control module 802 (e.g., voltage drop in the middle). Figure 4C (The second power module in the middle).

[0127] The IEDF width control module 802 can be modeled as a circuit including a TTL signal source 704 coupled in parallel with a switch 706. The TTL signal source 704 is also coupled to ground 716. The TTL signal source 704 and the switch 706 are coupled in parallel to a diode 708, a third shaped DC pulse voltage source 804, and an optional capacitor 714. The IEDF width control module 802 is coupled to a chamber capacitor 536. For example, capacitor 536 may be a portion of the impedance formed between substrate electrode 109 and substrate 105 or between edge ring electrode 111 and edge ring 106. In some embodiments, the IEDF width control module 802 is also coupled to the substrate adsorption and bias compensation module 522 discussed above. The substrate adsorption and bias compensation module 522 is a circuit including a diode 524 coupled in series to a resistor 526 and a DC voltage source 528, and a resistor 530 coupled in series to a capacitor 532 and ground 534. Diode 708 is a flyback diode used to protect the switch and the third shaped DC pulse voltage source 804.

[0128] The substrate adsorption and bias compensation module 522 is further coupled to the chamber capacitor 536. The plasma sheath 540 can be modeled (plasma sheath modeling) as a circuit, which includes a sheath capacitor 542 coupled in parallel with the current source 544 and a diode 546 coupled to ground 548.

[0129] In use, and for Figure 8 The configuration shown in the middle icon, where the third shaped DC pulse voltage source 804 is used as an active knob to control the slope of the voltage waveform during the ion current phase, is consistent with... Figure 7A The configurations differ, with the DC voltage source 710 and resistor 712 used together as an active knob to control the slope of the voltage waveform during the ion current phase. For example... Figure 5BAs shown in the curve, switch 706 is controlled by TTL signal source 704 and synchronized with the output of main pulser 502. Switch 706 can be turned off before the voltage of main pulser 502 rises to enter the sheath collapse phase. Switch 706 remains off during the sheath collapse phase. After the voltage of main pulser 502 drops upon entering the ion current phase, switch 706 can be turned on, allowing the third shaped DC pulse voltage source 804 to modulate IEDF during the ion current phase. Optional capacitor 714 can be used to adjust the sensitivity of the substrate voltage waveform to the third shaped DC pulse voltage source 804. Figure 8 The control mechanism is similar to Figure 5A The control mechanism. One difference is... Figure 8 The control circuit described above Figure 5D As shown in the figure, and Figure 5A The control circuit in Figure 5C As shown in the image.

[0130] Figure 7B This is a schematic circuit diagram illustrating an alternative embodiment of the edge ring voltage control circuit / substrate voltage control circuit 700 for driving the substrate electrode 109 and / or edge ring electrode 111 of the substrate support assembly 104. Circuit 700 includes a main pulser 502 for resetting the substrate voltage (corresponding to) at the beginning of each ion current phase. Figure 3A (Voltage drop in the middle). The main pulser 502 may be a first shaped DC voltage source 159 or a second shaped DC voltage source 161 coupled to ground 501. The main pulser 502 is coupled directly or through capacitor 701 to IEDF width control module 702 (e.g., voltage drop in the middle). Figure 4C (The second power module in the middle).

[0131] The IEDF width control module 702 can be modeled as a circuit including a TTL signal source 704 coupled to a switch 706 and a ground 716. The TTL signal source 704 and the switch 706 are coupled in parallel to a diode 708, a DC current source 605, and an optional capacitor 714. The IEDF width control module 702 is coupled to a chamber capacitor 536. For example, the capacitor 536 may be a portion of the impedance formed between the substrate electrode 109 and the substrate 105 or between the edge ring electrode 111 and the edge ring 106. In some embodiments, the IEDF width control module 702 is also coupled to the substrate adsorption and bias compensation module 522 discussed above. The substrate adsorption and bias compensation module 522 is further coupled to a stray capacitor 538. The substrate adsorption and bias compensation module 522 is a circuit including a diode 524 coupled in series to a resistor 526 and a DC voltage source 528, and a resistor 530 coupled in series to a capacitor 532 and a ground 534. Diode 708 is a flyback diode used to protect switch 706 and DC current source 605.

[0132] The plasma sheath 540 can be modeled as a circuit, which includes a sheath capacitor 542 coupled in parallel with a current source 544 and a diode 546 coupled to ground 548.

[0133] In use, and for Figure 7B The configuration shown in the icon indicates that the DC current source 605 is used as an active knob to control the slope of the voltage waveform during the ion current phase. (See also...) Figure 5B As shown in the curve, switch 706 can be controlled by TTL signal source 704 and synchronized with the output of main pulser 502. Switch 706 can be turned off before the voltage of main pulser 502 rises to enter the sheath collapse phase. Switch 512 can remain off during the sheath collapse phase. After the voltage of main pulser 502 drops upon entering the ion current phase, switch 706 can be turned on, allowing DC voltage source 710 to be used to modulate IEDF during the ion current phase. Optional capacitor 714 can be used to adjust the sensitivity of the substrate voltage waveform to DC current source 605. Figure 7B The control mechanism is similar to Figure 6D The control mechanism. One difference is... Figure 7B The control circuit described above Figure 6F The diagram in the middle shows, and Figure 6D The control circuit in Figure 6E The diagram is shown in the image.

[0134] against Figure 5A , Figure 6A , Figure 6D , Figure 7A , Figure 7B and Figure 8 The configuration shown herein suggests that the substrate adsorption and bias compensation module can be connected to the circuit in any suitable manner without departing from the scope of the embodiments described herein. It is also contemplated that the substrate adsorption and bias compensation module may include additional or different components without departing from the scope of the embodiments described herein.

[0135] Figure 9A This is a schematic circuit diagram illustrating an embodiment of an edge ring voltage control circuit / substrate voltage control circuit 900 for driving the substrate electrode 109 and / or edge ring electrode 111 of the substrate support assembly 104. Circuit 900 includes a main pulser 502 for resetting the substrate voltage (corresponding to) at the beginning of each ion current phase. Figure 3A (Voltage drop in the middle). The main pulser 502 may be a first shaped DC pulse voltage source 159 or a second shaped DC pulse voltage source 161 coupled to ground 501. The main pulser 502 is coupled to the IEDF width control module 902 (e.g., Figure 4D (The second power module in the middle).

[0136] The IEDF width control module 902 can be modeled as a circuit including a TTL signal source 904 coupled to a switch 906, which is also coupled to ground 916. The TTL signal source 904 and the switch 906 are coupled in parallel to a diode 908. The combination of the TTL signal source 904, the switch 906, and the diode 908 controls whether the substrate adsorption and bias compensation module 920 is connected to another part of the circuit. The substrate adsorption and bias compensation module 920 is a circuit including a capacitor 926 coupled in parallel to a resistor 922 and a DC voltage source 924. The substrate adsorption and bias compensation module 920 is coupled in series with the components of the TTL signal source 904 and the switch 906, and the diode 908. The substrate adsorption and bias compensation module 920 and the switch 906 (as a whole) are coupled in parallel to a DC voltage source 910, which is connected in series with a resistor 912 and also in parallel to an optional capacitor 914. Diode 908 is a flyback diode used to protect switch 906 and DC voltage sources 910 and 924.

[0137] Capacitor 536 may exist between stray capacitor 538 and plasma sheath 540, which may be a portion of an impedance formed, for example, between substrate electrode 109 and substrate 105, or between edge ring electrode 111 and edge ring 106. IEDF width control module 902 and substrate adsorption and bias compensation module 920 are both coupled to substrate electrode 109 and / or edge ring electrode 111. IEDF width control module 902 is also coupled to stray capacitor 538. Plasma sheath 540 can be modeled (plasma sheath modeling) as a circuit comprising sheath capacitor 542 coupled in parallel with current source 544 and diode 546 coupled to ground 548.

[0138] In use, and for Figure 9A In the configuration shown, the DC voltage source 910, together with the resistor 912, serves as an active knob to control the slope of the voltage waveform during the ion current phase. Figure 5B As shown, switch 906 is controlled by TTL signal source 904 and synchronized with main pulser 502. Switch 906 can be turned off before the voltage of main pulser 502 rises to the sheath collapse stage. Switch 512 can remain off during the sheath collapse stage, allowing substrate adsorption and bias compensation module 920 to be connected to another part of the circuit and reset the substrate adsorption voltage to the set point. After the voltage of main pulser 502 drops upon entering the ion current stage, switch 906 can be turned on, allowing DC voltage source 910 to be used to modulate IEDF during the ion current stage. Optional capacitor 914 can be used to adjust the sensitivity of the substrate voltage waveform to DC voltage source 910. Figure 9A The control mechanism is similar to that described above. Figure 6BThe control mechanism shown. One difference is that capacitor C4 has been removed.

[0139] Figure 9B This is a schematic circuit diagram illustrating an alternative embodiment of the edge ring voltage control circuit / substrate voltage control circuit 900 for driving the substrate electrode 109 and / or edge ring electrode 111 of the substrate support assembly 104. Circuit 900 includes a main pulser 502 for resetting the substrate voltage (corresponding to) at the beginning of each ion current phase. Figure 3A (Voltage drop in the middle). The main pulser 502 may be a first shaped DC pulse voltage source 159 or a second shaped DC pulse voltage source 161 coupled to ground 501. The main pulser 502 is coupled to the IEDF width control module 902 (e.g., Figure 4D (The second power module in the middle).

[0140] The IEDF width control module 902 can be modeled as a circuit including a TTL signal source 904 coupled to a switch 906, which is also coupled to ground 916. The TTL signal source 904 and the switch 906 are coupled in parallel to a diode 908. The combination of the TTL signal source 904, the switch 906, and the diode 908 controls whether a substrate adsorption and bias compensation module 920 is connected to the remainder of the circuit. The substrate adsorption and bias compensation module 920 is a circuit including a capacitor 926 coupled in parallel to a DC voltage source 924, connected in series with a resistor 922. The substrate adsorption and bias compensation module 920 is coupled in series with the components of the TTL signal source 904 and the switch 906, and the diode 908. The substrate adsorption and bias compensation module 920 and the switch 906 (as a whole) are coupled in parallel to a DC current source 605, and also in parallel to an optional capacitor 914. The diode 908 is a flyback diode used to protect the switch 906 and the DC current source 605.

[0141] Capacitor 536 may exist between stray capacitor 538 and plasma sheath 540, which may be a portion of an impedance formed, for example, between substrate electrode 109 and substrate 105, or between edge ring electrode 111 and edge ring 106. IEDF width control module 902 and substrate adsorption and bias compensation module 920 are both coupled to substrate electrode 109 and / or edge ring electrode 111. IEDF width control module 902 is also coupled to stray capacitor 538. Plasma sheath 540 can be modeled (plasma sheath modeling) as a circuit comprising sheath capacitor 542 coupled in parallel with current source 544 and diode 546 coupled to ground 548.

[0142] In use, and for Figure 9B In the configuration shown, the DC current source 605 is used as an active knob to control the slope of the voltage waveform during the ion current phase. Figure 5B As shown, switch 906 is controlled by TTL signal source 904 and synchronized with main pulser 502. Switch 906 can be turned off before the voltage of main pulser 502 rises to the sheath collapse stage. Switch 512 can remain off during the sheath collapse stage, allowing substrate adsorption and bias compensation module 920 to be connected to another part of the circuit and reset the substrate adsorption voltage to the set point. After the voltage of main pulser 502 drops upon entering the ion current stage, switch 906 can be turned on, allowing DC current source 605 to be used to modulate IEDF during the ion current stage. Optional capacitor 914 can be used to adjust the sensitivity of the substrate voltage waveform to DC current source 605. Figure 9B The control mechanism is similar to that described above. Figure 6D The control mechanism shown. One difference is that capacitor C4 has been removed.

[0143] Figure 10 This is a schematic circuit diagram illustrating an embodiment of an edge ring voltage control circuit / substrate voltage control circuit 1000 for driving the electrodes 109, 111 of the substrate support assembly 104. Circuit 1000 includes a main pulser 502 for resetting the substrate voltage (corresponding to) at the beginning of each ion current phase. Figure 3A (Voltage drop in the middle). The main pulser 502 may be a first shaped DC pulse voltage source 159 or a second shaped DC pulse voltage source 161 coupled to ground 501. The main pulser 502 is coupled to the IEDF width control module 1002 (e.g., Figure 4D (The second power module in the middle).

[0144] The IEDF width control module 1002 can be modeled as a circuit including a TTL signal source 904 coupled to a switch 906 and also coupled to ground 916. The TTL signal source 904 and the switch 906 are coupled in parallel to a diode 908. The combination of the TTL signal source 904, the switch 906, and the diode 908 controls whether a substrate adsorption and bias compensation module 920 is connected to another part of the circuit. The substrate adsorption and bias compensation module 920 is a circuit including a capacitor 926 coupled in parallel to a resistor 922 and a DC voltage source 924. The diode 908 is a flyback diode used to protect the switch, the DC pulse voltage source 1004, and the DC voltage source 924. The substrate adsorption and bias compensation module 920 is coupled in series with the components of the TTL signal source 904 and the switch 906, and the diode 908. The substrate adsorption and bias compensation module 920 and the switch 906 (as a whole) are coupled in parallel to a shaped DC pulse voltage source 1004 and also in parallel to an optional capacitor 914.

[0145] Capacitor 536 may exist between stray capacitor 538 and plasma sheath 540, which may be a portion of an impedance formed, for example, between substrate electrode 109 and substrate 105, or between edge ring electrode 111 and edge ring 106. IEDF width control module 1002 and substrate adsorption and bias compensation module 920 are both coupled to substrate electrode 109 and / or edge ring electrode 111. IEDF width control module 1002 is also coupled to stray capacitor 538. Plasma sheath 540 can be modeled (plasma sheath modeling) as a circuit comprising sheath capacitor 542 coupled in parallel with current source 544 and diode 546 coupled to ground 548.

[0146] In use, and for Figure 10 The configuration shown in the figure uses a shaped DC pulse voltage source 1004 as an active knob to control the slope of the voltage waveform during the ion current phase. This configuration is consistent with... Figure 9A The configurations differ, with the DC voltage source 910 and resistor 912 used together as an active knob to control the slope of the voltage waveform during the ion current phase. For example... Figure 5B As shown in the curve, switch 906 is controlled by TTL signal source 904 and synchronized with main pulser 502. Switch 906 can be turned off before the voltage of main pulser 502 rises to enter the sheath collapse phase. Switch 512 can remain off during the sheath collapse phase, allowing the substrate adsorption and bias compensation module to be connected to another part of the circuit and resetting the substrate adsorption voltage to the set point. After the voltage of main pulser 502 drops upon entering the ion current phase, switch 906 can be turned on, allowing DC pulse voltage source 1004 to be used to modulate IEDF during the ion current phase. Optional capacitor 914 can be used to adjust the sensitivity of the substrate voltage waveform to the shaped DC pulse voltage source 1004.

[0147] Figure 10 The control mechanism is similar to Figure 5A The control mechanism. One difference is the removal of capacitor C4. Another difference is that the output voltage of the shaped DC pulse voltage source 1004 during the sheath collapse stage is maintained at the output voltage of the substrate adsorption and bias compensation module 920 instead of zero, as... Figure 5E The traces 582 (positive adsorption voltage) and 586 (negative adsorption voltage) are shown in the figure. (Multiple) Method Examples

[0148] Figure 11 This is a flowchart of a method 1100 for controlling the IEDF width using an edge ring IEDF width control circuit 155 and / or a substrate IEDF width control circuit 158 ​​according to at least one embodiment of the present disclosure. Method 1100 can be used... Figures 5A-5E , Figures 6A-6F , Figures 7A-7B , Figure 8 , Figures 9A-9B as well as Figure 10 This is achieved through one or more circuit configurations shown. Method 1100 also provides a method for operating processing chamber 100 or processing chamber 200.

[0149] Method 1100 begins by applying or otherwise introducing a voltage into a suitable processing chamber by activating or turning on a master pulser (e.g., master pulser 502) coupled to a power module (e.g., an IEDF width control module). The master pulser may be a first shaped DC pulse voltage source 161 or a second shaped DC pulse voltage source 159. The IEDF width control module may be either a substrate IEDF width control circuit 158 ​​or an edge ring IEDF width control circuit 155. Here, a voltage is introduced into the substrate electrode (e.g., substrate electrode 109) and / or the edge ring electrode (e.g., edge ring electrode 111). The bias voltage on the substrate electrode and / or the edge ring electrode is formed during the ion current phase and accelerates the ions at an energy, for example, the product of the sheath voltage and the ion charge. In a collisionless sheath model, most ions can reach this maximum energy when bombarding the substrate electrode and / or the edge ring electrode. However, due to the deposition of positively charged ion currents, for example, on the substrate electrode and / or edge ring electrode, the voltage of the substrate electrode and / or edge ring electrode increases over time, thereby reducing the sheath voltage and causing an expansion of ion energy.

[0150] At operation 1110, the current of the power module (e.g., the IEDF width control module) and / or the voltage or voltage derivative of the IEDF width control module are measured under two or more conditions to determine the sheath capacitance C1 and / or the ion current I0. Here, the measured current may be current I4, in Figure 5A , Figure 6A , Figure 6D , Figure 7A , Figure 7B , Figure 8 and Figure 9B The current I4 mentioned above is the current passing through capacitor C4. Alternatively, the measured current may be current I5. Figure 6A , Figure 6D , Figure 7A , Figure 7B and Figure 9B The current I5 mentioned is the current passing through capacitor C5. Additionally or alternatively, in Figure 9A and Figure 10The measured current can be the output current of the main pulser. The voltage derivative can be dV3 / dt. The measurement can be performed during the ion current phase. Two or more conditions can be achieved by setting the active knob in the IEDF width control module (e.g., DC voltage source V0 and / or DC current source Ic and / or shaped DC pulse voltage source dV1 / dt) to two different values.

[0151] As an example, and for Figures 5A-5E , Figure 8 and Figure 10 The configuration allows the shaped DC pulse voltage source to be set to any two different slopes dV1 / dt during the ion current phase. As another example, and specifically for... Figure 6D , Figure 7B and Figure 9B With this configuration, the DC current source can be set to any two different currents Ic. As another example, and for... Figures 6A-6F , Figures 7A-7B and Figures 9A-9B The configuration allows the DC voltage V0 to be gradually increased while monitoring I4 until I4 is affected by the DC voltage V0. This DC voltage is the threshold voltage Vth. At least one of the two set points for the DC voltage source V0 is greater than Vth. That is, measuring the current of the IEDF width control module, the voltage or voltage derivative of the IEDF width control module, or both, including: setting the DC voltage source, DC current source, and / or shaped DC pulse voltage source to a first value; and setting the DC voltage source, DC current source, and / or shaped DC pulse voltage source to a second value.

[0152] At operation 1115, the ion current I0 and sheath capacitance C1 are based on the... Figures 5A-5E , Figure 8 ,and Figure 10 The configuration of equations (6) and (7), or for Figures 6A-6F , Figures 7A-7B and Figures 9A-9B The configuration of equations (19) and (20), or for Figure 6D , Figure 7B and Figure 9B The configuration is calculated using equations (31) and (32). The input value used for the calculation is: I3 = C3 dV3 / dt;I3'=C3 dV3' / dt; and / or I4, I4'; and / or I5, I5'. The values ​​of C3 and C3' are known, and the values ​​of dV3 / dt, dV3' / dt, I4, I4', I5, and I5' are measured at operation 1110. Therefore, I3 and I3' can be calculated.

[0153] At operation 1120, a desired setpoint for the voltage (V0), current (Ic), or voltage derivative (dV1 / dt) of the IEDF width control module is determined to achieve the target IEDF width (ΔV). This determination is based, for example, determining the desired setting of the IEDF width control module to achieve the user-specified ion energy distribution width (ΔV). The DC voltage (V0) of the DC voltage source, the DC current (Ic) of the DC current source, or the slope (dV1 / dt) of the shaped DC pulse voltage (V1) can be determined from equations (23), (34), and (9), respectively. At operation 1125, the DC voltage (V0), DC current (Ic), or voltage derivative (dV1 / dt) of the IEDF width control module is adjusted to the determined setpoint.

[0154] Compared to conventional processes used to control IEDF, the method described herein does not have a loop for determining the desired setpoint of the IEDF width control module. However, and in some embodiments, a loop can be used to determine the desired setpoint. In such embodiments, the controller can monitor I4 and V3 during the ion current phase to detect any changes in plasma conditions and thereby adjust the setpoint of the IEDF width control module. Example of a pulsed DC power delivery system

[0155] A pulsed direct current (DC) power delivery system includes: a master pulser configured to deliver a DC pulse waveform to a master pulser output; and a power module electrically coupled to the output of the master pulser, the power module being configured to control an ion energy distribution function of ions within a formed plasma, the power module comprising: a voltage source or a current source electrically coupled between the master pulser output and ground, and wherein the voltage source or current source comprises a DC current source or a DC voltage source electrically coupled in series to a resistor; and a switch electrically coupled in parallel with the voltage source or current source and electrically coupled between the master pulser output and ground.

[0156] A pulsed direct current (DC) power delivery system includes: a master pulser configured to deliver a DC pulse waveform to a master pulser output; and a power module electrically coupled to the output of the master pulser, the power module being configured to control an ion energy distribution function of ions within a formed plasma, the power module comprising: a voltage source or a current source electrically coupled between the master pulser output and ground, and wherein the voltage source or current source includes a shaped pulsed voltage source; and a switch electrically coupled in parallel with the voltage source or current source and electrically coupled between the master pulser output and ground.

[0157] A pulsed direct current (DC) power delivery system includes: a master pulser configured to deliver a DC pulse waveform to a master pulser output; and a power module electrically coupled to the output of the master pulser via a capacitor, wherein the power module is configured to electrically couple between the master pulser output and electrodes within a processing chamber, the power module being configured to control an ion energy distribution function of ions within a formed plasma, the power module comprising: a voltage source or a current source, wherein the voltage source or current source comprises a DC current source or a DC voltage source electrically coupled in series to a resistor; and a switch electrically coupled in parallel to the voltage source or current source.

[0158] A pulsed direct current (DC) power delivery system includes: a master pulser configured to deliver a DC pulse waveform to a master pulser output; and a power module electrically coupled to the output of the master pulser via a capacitor, wherein the power module is configured to electrically couple between the master pulser output and electrodes within a processing chamber, the power module being configured to control an ion energy distribution function of ions within a formed plasma, the power module comprising: a voltage source or a current source, wherein the voltage source or current source includes a shaped pulsed voltage source; and a switch electrically coupled in parallel to the voltage source or current source.

[0159] A pulsed direct current (DC) power delivery system includes: a master pulser configured to deliver a DC pulse waveform to a master pulser output; and a power module electrically coupled between the master pulser output and electrodes within a processing chamber, the power module being configured to control an ion energy distribution function of ions within a formed plasma, the power module comprising: a voltage source or a current source, wherein the voltage source or current source comprises a DC current source or a DC voltage source electrically coupled in series to a resistor; and a switch electrically coupled in parallel to the voltage source or current source.

[0160] A pulsed direct current (DC) power delivery system includes: a master pulser configured to deliver a DC pulse waveform to a master pulser output; and a power module electrically coupled between the master pulser output and electrodes within a processing chamber, the power module being configured to control an ion energy distribution function of ions within a formed plasma, the power module comprising: a voltage source or a current source, wherein the voltage source or current source includes a shaped pulsed voltage source; and a switch electrically coupled in parallel to the voltage source or current source.

[0161] A non-transient computer-readable medium storing instructions, when executed on a processor, wherein the instructions perform operations for controlling the width of an ion energy distribution function (IEDF), the operations comprising: introducing a voltage into electrodes of a processing chamber by activating a main pulser, the main pulser having a main pulser output electrically coupled to an IEDF width control module, wherein the IEDF width control module includes a voltage source or a current source, wherein the voltage source or current source is electrically coupled between the main pulser output and ground or between the main pulser output and electrodes within the processing chamber, and wherein the voltage source or current source includes a shaped pulsed voltage source or a DC current source or a DC voltage source electrically coupled in series to a resistor, and a switch, the switch being connected to an electrode... A voltage or current source is electrically coupled in parallel and electrically coupled between the main pulser output and ground or between the main pulser output and the electrodes in the processing chamber; the current of the IEDF width control module and the voltage or voltage derivative of the IEDF width control module or the node between the main pulser and the plasma load in the chamber are measured; the ion current of the processing chamber and the capacitance of the plasma load are calculated based on the current and voltage or voltage derivative of the IEDF width control module; a setpoint, or any combination thereof, of the current, voltage, or voltage derivative of the IEDF width control module is determined; and the current, voltage, or voltage derivative, or any combination thereof, of the IEDF width control module is adjusted to the determined setpoint to control the width of the IEDF.

[0162] In some embodiments of the pulsed DC power delivery system, the main pulser output is electrically coupled to an IEDF width control module, wherein the IEDF width control module includes: a voltage source or current source electrically coupled between the main pulser output and ground or between the main pulser output and electrodes within the processing chamber, and wherein the voltage source or current source includes a DC current source or a shaped DC pulse voltage source or DC voltage source electrically coupled in series to a resistor; and a switch electrically coupled in parallel with the voltage source or current source, and electrically coupled between the main pulser output and ground or between the main pulser output and electrodes within the processing chamber. The pulsed direct current (DC) power delivery system also includes a non-transient computer-readable medium comprising software instructions that, when executed on a processor, perform operations for controlling the width of the ion energy distribution function (IEDF). These operations include: delivering a first pulsed voltage waveform from the main pulser output of the main pulser to electrodes in the processing chamber; measuring the current flowing from the IEDF width control module, the voltage at the node between the main pulser and the plasma load in the chamber, or the voltage derivative; calculating the ion current and capacitance of the processing chamber based on the measured current, the measured voltage, or the measured voltage derivative; determining a voltage setpoint or a voltage derivative setpoint provided by the IEDF width control module; and adjusting the voltage or voltage derivative provided by the IEDF width control module to control the width of the IEDF.

[0163] The methods and apparatus (e.g., circuits) described herein enable control over the shape (e.g., narrow or adjustable width) of the waveform of a pulsed DC substrate voltage. Embodiments described herein further enable, for example, control over the energy distribution of ions, including those accelerated by monoenergetic ions.

[0164] As will be apparent from the general description and specific embodiments above, various modifications may be made without departing from the spirit and scope of this disclosure, despite the forms shown and described herein. Therefore, this disclosure is not intended to be limited thereto. Similarly, the term "comprising" is considered synonymous with the term "including." Likewise, whenever the transitional phrase "comprising" precedes a component, element, or combination of elements, it will be understood that a group of the same components or elements is also expected to have the transitional phrases "substantially constitutes," "consisting of," "selected from the group consisting of," or "is" preceding the description of the component, element, or multiple elements, and vice versa.

[0165] Although the foregoing relates to examples of this disclosure, other and further examples of this disclosure may be devised without departing from its essential scope, which is defined by the following claims.

Claims

1. A pulsed direct current (DC) power delivery system, comprising: A master pulser, configured to deliver a DC pulse waveform to a master pulser output; as well as A power module electrically coupled to the main pulser output, the power module being configured to control the ion energy distribution function of ions within the formed plasma, the power module being coupled to a chamber capacitor and comprising: A voltage source or current source, wherein the voltage source or current source is electrically coupled between the main pulser output and ground, and wherein the voltage source or current source comprises at least one of a DC voltage source, a DC current source, or a shaped DC pulse voltage source electrically coupled in series to a resistor. A switch, which is electrically coupled in parallel with the voltage source or the current source, and electrically coupled between the main pulser output and the ground; as well as A capacitor and a diode, both of which are electrically coupled in parallel to the DC voltage source, the DC current source, or the shaped DC pulse voltage source.

2. The pulsed DC power delivery system as described in claim 1, characterized in that... The voltage source or the current source includes the DC voltage source and the resistor, and The capacitor and diode are electrically coupled in parallel with the DC voltage source and the resistor.

3. The pulsed DC power delivery system as described in claim 2, characterized in that, The current return path is electrically coupled between the power module and the main pulser output.

4. The pulsed DC power delivery system as described in claim 3, characterized in that, The current return path includes an inductor electrically coupled in series with a resistor, the resistor being electrically coupled in series with the power module or the main pulser output, and the inductor being further electrically coupled to the main pulser output or the power module.

5. The pulsed DC power delivery system as described in claim 1, characterized in that, The output of the main pulser can be electrically coupled to the electrodes inside the semiconductor processing chamber.

6. The pulsed DC power delivery system of claim 1, further comprising: The software, when executed by the processing unit, adjusts the output of the DC voltage source, the DC current source, or the shaped DC pulse voltage source to control the slope of the voltage waveform delivered from the main pulser output to the first electrode in the processing chamber, the slope of the voltage waveform delivered from the main pulser output to the second electrode in the processing chamber, or a combination thereof.

7. The pulsed DC power delivery system as described in claim 6, characterized in that, The main pulser output is electrically coupled to a substrate electrode or edge ring electrode disposed within the plasma processing chamber.

8. The pulsed DC power delivery system of claim 1, further comprising: A blocking capacitor, which is electrically coupled between the power module and the electrodes in the processing chamber; and A bias compensation module is electrically coupled between the blocking capacitor and the electrode.

9. A pulsed direct current (DC) power delivery system, comprising: A master pulser, configured to deliver a DC pulse waveform to a master pulser output; as well as A power module electrically coupled to the output of the main pulser, the power module being configured to control the ion energy distribution function of ions within the formed plasma, the power module being coupled to a chamber capacitor and comprising: A voltage source or current source, wherein the voltage source or current source is configured to be electrically coupled between the main pulser output and the electrodes within the processing chamber, and wherein the voltage source or the current source comprises a DC current source or a shaped DC pulse voltage source or a DC voltage source electrically coupled in series to a resistor. The switch is electrically coupled in parallel to the voltage source or the current source; A capacitor and a diode, both of which are electrically coupled in parallel to the DC current source or the shaped DC pulse voltage source or the DC voltage source.

10. The pulsed DC power delivery system as described in claim 9, characterized in that, The power module can be electrically coupled to electrodes within the semiconductor processing chamber.

11. The pulsed DC power delivery system of claim 9, further comprising: The software, when executed by the processing unit, adjusts the output of the DC voltage source, the DC current source, or the shaped DC pulse voltage source to control the slope of the voltage waveform delivered from the main pulser output to the first electrode in the processing chamber, the slope of the voltage waveform delivered from the main pulser output to the second electrode in the processing chamber, or a combination thereof.

12. The pulsed DC power delivery system as described in claim 9, characterized in that, The power module output is electrically coupled to a substrate electrode or edge ring electrode disposed within the plasma processing chamber.

13. The pulsed DC power delivery system of claim 9, further comprising a bias compensation module, the bias compensation module being electrically coupled between the power module and the electrodes in the processing chamber, or connected in parallel with the power module.

14. The pulsed DC power delivery system of claim 13, further comprising a blocking capacitor electrically coupled between the bias compensation module and the main pulser output.

15. A non-transient computer-readable medium storing instructions, which, when executed on a processor, perform operations for controlling the width of an ion energy distribution function (IEDF), the operations comprising: The first pulse voltage waveform is delivered from the main pulser output of the main pulser to the electrodes of the processing chamber. The main pulser output is electrically coupled to the IEDF width control module, wherein the IEDF width control module is coupled to the chamber capacitor and includes: A voltage source or current source, wherein the voltage source or current source is electrically coupled between the main pulser output and ground or between the main pulser output and an electrode in the processing chamber, and wherein the voltage source or current source comprises a DC current source or a shaped DC pulse voltage source or a DC voltage source electrically coupled in series to a resistor. as well as A switch, which is electrically coupled in parallel with the voltage source or the current source, and electrically coupled between the main pulser output and the ground or between the main pulser output and the electrodes in the processing chamber; Measure at least one of the following: a current flowing from the IEDF width control module, a voltage applied through the IEDF width control module, and a voltage derivative at the node between the IEDF width control module and the electrode in the processing chamber; The ion current and capacitance of the processing chamber are calculated based on at least one of the measured current, the measured voltage, and the measured voltage derivative. Determine the setpoint of the voltage or current provided by the IEDF width control module, or the setpoint of the voltage derivative provided by the IEDF width control module; and The width of the IEDF is controlled by adjusting the voltage or current provided by the IEDF width control module, or by adjusting the voltage derivative provided by the IEDF width control module. The IEDF width control module includes a capacitor and a diode, both of which are electrically coupled in parallel to the DC voltage source, the DC current source, or the shaped DC pulse voltage source.

16. The non-transient computer-readable medium as claimed in claim 15, characterized in that, Measuring the current and voltage derivative of the IEDF width control module includes: Set the DC voltage of the IEDF width control module to two different values; and Set the voltage or voltage derivative of the IEDF width control module to two different values; as well as Set the DC current of the IEDF width control module to two different values.

17. The non-transient computer-readable medium of claim 15, further comprising a current return path coupled between the IEDF width control module and the main pulser output, wherein the current return path includes an inductor coupled in series with a resistor or the inductor, the resistor or the inductor being coupled in series with the IEDF width control module, the inductor or the resistor being further coupled to the main pulser output.

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