Control method and electronic device
Patent Information
- Application Number
- CN202310180259.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-02-27
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2043-02-27
Smart Images

Figure CN116257481B_ABST
Abstract
Description
Technical Field
[0001] This application relates to electronic technology, including but not limited to a control method and an electronic device. Background Technology
[0002] Currently, electronic devices are being used more and more widely, and various modules with access initiation functions play an important role in the normal operation of these devices. Furthermore, electronic devices contain various types of storage modules, and these modules with access initiation functions can communicate with various types of storage units. Summary of the Invention
[0003] In view of this, embodiments of this application provide a control method and an electronic device.
[0004] The technical solution of this application embodiment is implemented as follows:
[0005] In a first aspect, embodiments of this application provide a control method, the method comprising:
[0006] Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;
[0007] If the type of the storage module currently accessed by the first processing module does not match the current task scenario, determine whether there is an access task in the first processing module;
[0008] If there is no access task in the first processing module, the access path of the first processing module is switched to the storage module that matches the current processing task scenario.
[0009] In some embodiments, after controlling the access path of the first processing module to switch to a storage module that matches the current processing task scenario if there is no access task in the first processing module, the method further includes: if the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module, determining whether the first processing module and the second processing module need to share data space; if the first processing module and the second processing module need to share data space, determining whether there is an access task in the second processing module; if there is no access task in the second processing module, controlling the access path of the second processing module to switch to the storage module currently accessed by the first processing module.
[0010] In some embodiments, determining whether there is an access task in the second processing module if the first processing module and the second processing module need to share a data space includes: determining whether the value of the task counter corresponding to the second processing module is a target value if the first processing module and the second processing module need to share a data space; wherein the target value is used to indicate that there are no remaining access tasks; correspondingly, controlling the access path of the second processing module to switch to the storage module currently accessed by the first processing module if there is no access task in the second processing module includes: controlling the access path of the second processing module to switch to the storage module currently accessed by the first processing module if the value of the task counter corresponding to the second processing module is the target value.
[0011] In some embodiments, determining whether there is an access task in the first processing module if the type of the storage module currently accessed by the first processing module does not match the current task scenario includes: determining whether the value of the task counter corresponding to the first processing module is a target value if the type of the storage module currently accessed by the first processing module does not match the current task scenario; wherein the target value is used to indicate that there are no remaining access tasks; correspondingly, controlling the access path of the first processing module to switch to a storage module that matches the current task scenario if there is no access task in the first processing module includes: controlling the access path of the first processing module to switch to a storage module that matches the current task scenario when the value of the task counter corresponding to the first processing module is the target value.
[0012] In some embodiments, the determination of whether the value of the task counter is the target value is achieved through the following steps: sending a first switching request to the first processing module, so that the first processing module determines whether the value of its corresponding task counter on the bus is the target value after receiving the first switching request; or, sending a second switching request to the second processing module, so that the second processing module determines whether the value of its corresponding task counter on the bus is the target value after receiving the second switching request; correspondingly, the switching of the access path is achieved through the following steps: if the value of the task counter corresponding to the first processing module is the target value, sending a switching response signal to the first bus switch, so that the first bus switch can switch the access path of the first processing module to the storage module that matches the currently processed task scenario; or, if the value of the task counter corresponding to the second processing module is the target value, sending a switching response signal to the second bus switch, so that the second bus switch can switch the access path of the second processing module to the target storage module.
[0013] In some embodiments, after controlling the access path of the first processing module to switch to a storage module that matches the current processing task scenario if there is no access task in the first processing module, the method further includes: if the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module, determining whether the first processing module and the second processing module need to share data space; if the first processing module and the second processing module need to share data space, configuring the second processing module so that the second processing module can directly access the storage module currently accessed by the first processing module through the storage module it accesses.
[0014] In some embodiments, the method further includes: if the currently processed task scenario is a first scenario and the storage module currently accessed by the first processing module is a first storage module, determining that the storage module currently accessed by the first processing module does not match the currently processed task scenario; or, if the currently processed task scenario is a second scenario and the storage module currently accessed by the first processing module is a second storage module, determining that the storage module currently accessed by the first processing module does not match the currently processed task scenario; wherein the bandwidth requirement of the first scenario is higher than the bandwidth requirement of the second scenario, and the bandwidth of the first storage module is less than the bandwidth of the second storage module.
[0015] Secondly, embodiments of this application provide an electronic device, the electronic device comprising:
[0016] First processing module;
[0017] Multiple storage modules;
[0018] The system control module is used to determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module; if the type of the storage module currently being accessed by the first processing module does not match the current task scenario, it determines whether there is an access task in the first processing module; if there is no access task in the first processing module, it controls the access path of the first processing module to switch to a storage module that matches the current task scenario.
[0019] In some embodiments, the electronic device further includes: a second processing module; correspondingly, the system control module is further configured to: determine whether the first processing module and the second processing module need to share a data space if the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module; if the first processing module and the second processing module need to share a data space, determine whether there is an access task in the second processing module; if there is no access task in the second processing module, control the access path of the second processing module to switch to the storage module currently accessed by the first processing module.
[0020] In some embodiments, the electronic device further includes: a bus, wherein a first processing module, a second processing module, and a plurality of storage modules of the electronic device are all connected to the bus; correspondingly, the system control module includes a control unit, and a first bus switch and a second bus switch located on the bus; the control unit is configured to send a first control command and a second control command; the first bus switch is configured to respond to the first control command sent by the control unit to control the on / off state of the access path between the first processing module and each of the storage modules; the second bus switch is configured to respond to the second control command sent by the control unit to control the on / off state of the access path between the second processing module and each of the storage modules. Attached Figure Description
[0021] Figure 1 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 1 ;
[0022] Figure 2 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 2 ;
[0023] Figure 3 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 3 ;
[0024] Figure 4A This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 1 ;
[0025] Figure 4B This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 2 ;
[0026] Figure 5A This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 3 ;
[0027] Figure 5BThis is a schematic diagram of the composition structure of the electronic device according to an embodiment of this application;
[0028] Figure 6 This is a schematic diagram of the composition of the control device according to an embodiment of this application;
[0029] Figure 7 This is a schematic diagram of a hardware entity of an electronic device according to an embodiment of this application. Detailed Implementation
[0030] The technical solutions of this application will be further described in detail below with reference to the accompanying drawings and embodiments. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0031] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.
[0032] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustration and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.
[0033] It should be noted that the terms "first, second, and third" used in the embodiments of this application are merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first, second, and third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.
[0034] Based on this, this application provides a control method. The function implemented by this method can be achieved by the processor in the electronic device calling program code. Of course, the program code can be stored in the storage medium of the electronic device. Figure 1 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 1 ,like Figure 1 As shown, the method includes:
[0035] Step S101: Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;
[0036] Here, the electronic device can be any type of device with information processing capabilities, such as a navigator, smartphone, tablet, wearable device, laptop, robot vacuum cleaner, smart kitchen and bathroom appliances, smart home devices, automobile, server, or server cluster. The processor in the electronic device may include hardware units such as SCP (System Control Processor).
[0037] In this embodiment, the first processing module refers to a unit in an electronic device capable of actively initiating access, such as a CPU (Central Processing Unit), GPU (Graphics Processing Unit), DSP (Digital Signal Processor), and MPU (Microprocessor Unit). In other words, this embodiment does not limit the type of the first processing module; any type of processing module is within the scope of protection of this application.
[0038] This application embodiment may include multiple task scenarios, such as high-bandwidth scenarios and low-latency scenarios. The task scenario currently being processed by the first processing module can be one of these scenarios. Specifically, in a high-bandwidth scenario, the first processing module needs to access the Shared Cache (SC) together with other processing modules to improve access bandwidth; while in a low-latency scenario, the first processing module can directly access the Double Data Rate (DDR) to reduce the latency of accessing the SC. In this application embodiment, the task scenario currently being processed by the first processing module can be determined by the type of application being processed and its performance requirements, or by other methods. For example, if the first processing module is currently running multi-core applications for classification, games, short videos, or photography, these applications typically have high bandwidth requirements, then the task scenario currently being processed by the first processing module is determined to be a high-bandwidth scenario. Conversely, if the first processing module is currently running a single-core application for classification, or the electronic device is in a startup state, requiring low latency, then the task scenario currently being processed by the first processing module is determined to be a low-latency scenario.
[0039] In other embodiments, the task scenarios can also be divided from other perspectives.
[0040] Here, the electronic device may include multiple storage modules, which can be classified into different types, such as cache, memory, and secondary storage. The storage module currently accessed by the first processing module may belong to one of these types. Of course, this application embodiment does not limit the classification method of multiple storage modules in the electronic device.
[0041] Step S102: If the type of the storage module currently accessed by the first processing module does not match the current processing task scenario, determine whether there is an access task in the first processing module;
[0042] In this embodiment, multiple task scenarios can be pre-defined: a first task scenario, a second task scenario, etc., and the type of storage module corresponding to different task scenarios can be determined: the first task scenario corresponds to a first type of storage module, and the second task scenario corresponds to a second type of storage module. For example, the first task scenario is a high-bandwidth scenario, and the first type of storage module is a cache; the second task scenario is a low-latency scenario, and the second type of storage module is memory. Furthermore, if the type of storage module currently accessed by the first processing module does not match the currently processed task scenario, it is determined whether there is an access task in the first processing module.
[0043] For example, if the CPU is currently accessing RAM and is running a camera application, then the type of storage module being accessed by the CPU does not match the current task scenario, and it is necessary to further determine whether there is an access task running on the CPU. Similarly, if the CPU is currently accessing cache and is running a single-core classification task, then the type of storage module being accessed by the CPU does not match the current task scenario, and it is necessary to further determine whether there is an access task running on the CPU.
[0044] Step S103: If there is no access task in the first processing module, control the access path of the first processing module to switch to the storage module that matches the current processing task scenario.
[0045] Here, different storage modules in electronic devices have different characteristics, and thus can be applied to different task scenarios. For example, SC modules have high bandwidth, which can increase access bandwidth when multiple MASTERs (i.e., the initiators of read / write transfers) access SC at the same time. DDR, on the other hand, has low latency, and direct MASTER access to DDR can reduce latency; therefore, DDR is suitable for time-critical task scenarios. Furthermore, different storage modules can be switched according to the different task requirements of the electronic device.
[0046] For example, if the CPU is currently accessing memory and is running a camera application, it is determined that the type of storage module accessed by the CPU does not match the current task scenario. If there is no access task in the CPU at this time, the CPU's access path is switched to the cache module.
[0047] Here, the control method in steps S101 to S103 above can be used to accommodate different application scenarios of the processing module and dynamically switch the access path of the processing module when there is no access task in the processing module.
[0048] In some embodiments, the method further includes one of the following:
[0049] Firstly, if the currently processed task scenario is the first scenario and the storage module currently accessed by the first processing module is the first storage module, it is determined that the storage module currently accessed by the first processing module does not match the currently processed task scenario; the performance of the second storage module is better suited to meet the needs of the first scenario compared to the first storage module.
[0050] The second approach is that if the current task scenario being processed is the second scenario and the storage module currently accessed by the first processing module is the second storage module, then it is determined that the storage module currently accessed by the first processing module does not match the current task scenario; the performance of the first storage module is better suited to meet the needs of the second scenario compared to the second storage module.
[0051] In some embodiments, the first scenario includes high bandwidth requirements, the second scenario includes low latency, the bandwidth requirement of the first scenario is higher than the bandwidth requirement of the second scenario, and the bandwidth of the first storage module is less than the bandwidth of the second storage module.
[0052] In some embodiments, the first storage module includes a memory module, and the second storage module includes a shared cache module. The memory module includes DDR, SDRAM (synchronous dynamic random-access memory), etc.; the cache module includes system cache (SC), etc.
[0053] Of course, the embodiments of this application also include three or more types of storage modules, which will result in more corresponding task scenarios and MSTER will also include more switching paths. That is to say, different computer architectures include different storage allocation methods, but the basic principle for the embodiments of this application is consistent: different types of storage modules have different performance distinctions (such as bandwidth, latency, power consumption, etc.), and the storage module access path is switched according to the needs of different task scenarios.
[0054] For example, if the current task requires high bandwidth and the CPU is currently accessing DDR, it is determined that the storage module accessed by the CPU is incompatible with the current task. If there is no access task on the CPU at this time, the CPU's access path is switched to the shared cache. Similarly, if the current task requires high time, and the CPU is currently accessing the shared cache, it is determined that the storage module accessed by the CPU is incompatible with the current task. If there is no access task on the CPU at this time, the CPU's access path is switched to DDR, thus writing data directly to DDR without accessing the cache, shortening the processing time. The bandwidth of the shared cache is greater than that of DDR.
[0055] In existing technologies, each master module is typically connected either entirely to the SC or entirely to the DDR, which facilitates control, maintains data consistency, and meets the needs of data sharing. The control method in this application, while maintaining data consistency, can also be compatible with different task scenarios based on the different performance of the storage modules, thereby improving the overall performance of the electronic device.
[0056] Based on the foregoing embodiments, this application further provides a control method, which is applied to an electronic device, and the method includes:
[0057] Step S111: Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;
[0058] For example, different application or process can be pre-defined into corresponding task scenarios, and the mapping relationship between different application or process and different task scenarios can be obtained. This mapping relationship can then be written into a whitelist for invocation.
[0059] Step S112: If the type of the storage module currently accessed by the first processing module does not match the current processing task scenario, determine whether the value of the task counter corresponding to the first processing module is a target value; wherein, the target value is used to represent that there are no remaining access tasks;
[0060] For example, the first processing module is the CPU, which is connected to the bus of the electronic device. If the type of the storage module currently accessed by the CPU does not match the current task scenario, the SCP sends a switching request to the CPU's bus matrix. When the counters (Outstanding counters) corresponding to the read and write operations of the bus matrix have both been decremented to 0 (i.e., the target value), it proves that the CPU has no remaining access in the bus matrix at this moment, that is, there is no access task in the CPU.
[0061] Step S113: When the value of the task counter corresponding to the first processing module is the target value, control the access path of the first processing module to switch to the storage module that matches the current processing task scenario.
[0062] Here, the control method described in steps S111 to S113 above can accommodate different application scenarios of the processing module. It dynamically switches the access path of the processing module when hardware data determines that no access task exists. Using hardware data allows for a more accurate and reliable determination of whether an access task exists, and timely initiation of switching when no access task is present, resulting in more accurate timing of the switch.
[0063] In some embodiments, the following steps can be used to determine whether the value of the task counter corresponding to the first processing module is the target value:
[0064] Step S11: Send a first switching request to the first processing module, so that after receiving the first switching request, the first processing module determines whether the value of its corresponding task counter on the bus is the target value.
[0065] Correspondingly, the access path of the first processing module can be switched through the following steps:
[0066] Step S12: If the value of the task counter corresponding to the first processing module is the target value, send a switching response signal to the first bus switch so that the first bus switch can switch the access path of the first processing module to the storage module that matches the current processing task scenario.
[0067] For example, the SCP sends a switching request to the CPU's bus matrix. Upon receiving the switching request, the bus matrix checks whether its read and write counters have decremented to 0. If they have decremented to 0, the SCP sends a switching response signal to the hardware bus switch. Upon receiving the response signal, the bus switch, based on the current CPU access path status register (written by software when the switching is initiated, recording whether the CPU needs to switch to SC or DDR), switches the access path from SC to DDR, or from DDR to SC.
[0068] Alternatively, the SCP can send a switching request to the CPU's bus matrix. When the counters corresponding to the read and write operations of the bus matrix have both decremented to 0 (proving that the CPU has no remaining accesses in the bus matrix at this moment), the bus matrix returns a switching response signal to the corresponding bus switch. After receiving the response signal, the bus switch switches the access path from SC to DDR, or from DDR to SC, based on the contents of the current CPU access path status register.
[0069] Based on the foregoing embodiments, this application further provides a control method, which is applied to an electronic device. Figure 2 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 2 ,like Figure 2 As shown, the method includes:
[0070] Step S201: Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;
[0071] Step S202: If the type of the storage module currently accessed by the first processing module does not match the current processing task scenario, determine whether there is an access task in the first processing module;
[0072] Step S203: If there is no access task in the first processing module, control the access path of the first processing module to switch to the storage module that matches the current processing task scenario;
[0073] Step S204: If the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module, determine whether the first processing module and the second processing module need to share data space;
[0074] In this embodiment, the second processing module refers to a unit in an electronic device capable of actively initiating access, such as a CPU (Central Processing Unit), GPU (Graphics Processing Unit), DSP (Digital Signal Processor), and MPU (Microprocessor Unit). That is, this embodiment does not limit the type of the second processing module; any type of processing module is within the scope of protection of this application. Furthermore, in this embodiment, the first processing module and the second processing module are different processing modules.
[0075] Here, determining whether the first processing module and the second processing module need to share data space refers to determining whether the first processing module and the second processing module need to access the same storage module simultaneously. Essentially, this means that there needs to be data interaction between the two processing modules. For example, if the second processing module needs to use data from the first processing module, data interaction through the same storage module is necessary to ensure data consistency. For instance, when a user is using a photo editing application on an electronic device, both the CPU and GPU are working, and the CPU needs to use data processed by the GPU. In this case, the CPU and GPU need to share data space.
[0076] It should be noted that in this embodiment of the application, it is necessary to determine whether the first processing module and the second processing module need to share the data space, but this embodiment of the application does not limit the method of determining whether the data space needs to be shared.
[0077] Step S205: If the first processing module and the second processing module need to share the data space, determine whether there is an access task in the second processing module;
[0078] Step S206: If there is no access task in the second processing module, control the access path of the second processing module to switch to the storage module currently accessed by the first processing module.
[0079] Here, compared to existing technologies where both the first and second processing modules directly share a certain type of storage module (e.g., the CPU and GPU directly share SC or DDR), the control scheme in this embodiment is compatible with different application scenarios of the processing modules. It dynamically switches the access path of the processing modules when hardware data determines that no access task exists. Furthermore, if the first and second processing modules need to share data space, the control scheme in this embodiment will determine through hardware data that no access task exists in the processing modules and then control the access path of the second processing module to be the same as that of the first processing module. For example, if the CPU and GPU of an electronic device are currently accessing DDR storage modules (i.e., the CPU and GPU directly share DDR), and the user opens a photo editing application, the SCP of the electronic device detects that the type of storage module currently accessed by the CPU does not match the task scenario corresponding to the photo editing application. It then determines whether there is an access task in the CPU. If not, it switches the CPU's access path to the shared cache module. However, if the photo editing application requires the CPU and GPU to share data, the SCP further determines whether there is an access task in the GPU. If not, it continues to control the GPU to switch its access path to the shared cache module.
[0080] In some embodiments, if the access path of the first processing module is switched to the memory module, the second processing module, which was originally connected to the shared cache module, can directly access the memory module without switching the bus connection path of the second processing module, through cache penetration technology, DMA (Direct Memory Access), or other methods.
[0081] In some embodiments, the access path to the second processing module can also be switched by controlling a bus switch.
[0082] Here, through the control methods in steps S201 to S206 above, it is possible to determine whether there is an access task in the processing module through hardware data and dynamically switch the access path of the processing module in different application scenarios of the compatible processing module, while avoiding the problem of data inconsistency between different processing modules, and achieving the effect of sharing data storage space between different processing modules.
[0083] Based on the foregoing embodiments, this application further provides a control method, which is applied to an electronic device, and the method includes:
[0084] Step S211: Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;
[0085] Step S212: If the type of the storage module currently accessed by the first processing module does not match the current processing task scenario, determine whether there is an access task in the first processing module;
[0086] Step S213: If there is no access task in the first processing module, control the access path of the first processing module to switch to the storage module that matches the current processing task scenario;
[0087] Step S214: If the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module, determine whether the first processing module and the second processing module need to share data space;
[0088] Step S215: If the first processing module and the second processing module need to share the data space, determine whether the value of the task counter corresponding to the second processing module is the target value; wherein, the target value is used to represent no remaining access tasks;
[0089] For example, if the first processing module is a CPU and the second processing module is a GPU, and the CPU and GPU need to share the data space, the SCP sends a switching request to the GPU's bus matrix. When the counters corresponding to the read and write operations of the bus matrix have been decremented to 0 (i.e., the target value), it proves that the GPU has no remaining access in the bus matrix at this moment, that is, there is no access task in the GPU.
[0090] Step S216: If the value of the task counter corresponding to the second processing module is the target value, control the access path of the second processing module to switch to the storage module currently accessed by the first processing module.
[0091] In some embodiments, the following steps are used to determine whether the value of the task counter corresponding to the second processing module is the target value:
[0092] Step S21: Send a second switching request to the second processing module, so that after receiving the second switching request, the second processing module determines whether the value of its corresponding task counter on the bus is the target value;
[0093] Correspondingly, the access path of the second processing module is switched through the following steps:
[0094] Step S22: If the value of the task counter corresponding to the second processing module is the target value, send a switching response signal to the second bus switch so that the second bus switch can switch the access path of the second processing module to the target storage module.
[0095] For example, the SCP sends a switching request to the GPU's bus matrix. Upon receiving the switching request, the bus matrix checks whether its read and write counters have decremented to 0. If they have decremented to 0, the SCP sends a switching response signal to the hardware bus switch. Upon receiving the response signal, the bus switch, based on the current GPU access path status register (written by software when the switching is initiated, recording whether the CPU needs to switch to SC or DDR), switches the access path from SC to DDR, or from DDR to SC.
[0096] Alternatively, the SCP can send a switching request to the GPU's bus matrix. When the counters for both reading and writing in the bus matrix have decremented to 0 (proving that the GPU has no remaining access in the bus matrix at this moment), the bus matrix returns a switching response signal to the corresponding bus switch. After receiving the response signal, the bus switch switches the access path from SC to DDR, or from DDR to SC, based on the contents of the current CPU access path status register.
[0097] Based on the foregoing embodiments, this application further provides a control method, which is applied to an electronic device. Figure 3 This is a schematic diagram of the implementation flow of the control method in the embodiments of this application. Figure 3 ,like Figure 3 As shown, the method includes:
[0098] Step S301: Determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module;
[0099] Step S302: If the type of the storage module currently accessed by the first processing module does not match the current processing task scenario, determine whether there is an access task in the first processing module;
[0100] Step S303: If there is no access task in the first processing module, control the access path of the first processing module to switch to the storage module that matches the current processing task scenario;
[0101] Step S304: If the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module, determine whether the first processing module and the second processing module need to share data space;
[0102] Step S305: If the first processing module and the second processing module need to share data space, configure the second processing module so that the second processing module can directly access the storage module currently accessed by the first processing module through the storage module it accesses.
[0103] For example, in addition to switching access paths via a bus switch, the characteristics of the processing module itself can be utilized to configure the processing module to directly penetrate to DDR via SC.
[0104] Here, the control method in steps S301 to S305 above can be used to accommodate different application scenarios of the processing module and dynamically switch the access path of the processing module when there is no access task in the processing module. At the same time, the characteristics of the second processing module itself can be used to configure the storage module accessed by the second processing module to directly penetrate to the storage module currently accessed by the first processing module, thereby achieving the effect of sharing data space between different processing modules.
[0105] Based on the foregoing embodiments, this application provides an electronic device. Figure 4A This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 1 ,like Figure 4A As shown, the electronic device 40 includes:
[0106] First processing module 41;
[0107] Multiple storage modules 42;
[0108] The system control module 43 is used to determine the task scenario currently being processed by the first processing module 41 of the electronic device 40, and the storage module 421 currently being accessed by the first processing module 41; if the type of the storage module 421 currently being accessed by the first processing module 41 does not match the current task scenario, it determines whether there is an access task in the first processing module 41; if there is no access task in the first processing module 41, it controls the access path of the first processing module 41 to switch to the storage module 422 that matches the current task scenario.
[0109] For example, if the CPU (first processing module 41) of an electronic device is currently accessing the DDR (storage module 421) storage module, and the user opens a photo editing application, the SCP (system control module 43) of the electronic device will detect that the type of the storage module currently accessed by the CPU does not match the task scenario corresponding to the photo editing application, and will switch the CPU's access path to the shared cache module (storage module 422).
[0110] Here, the multiple storage modules 42 include storage module 421 and storage module 422.
[0111] Based on the foregoing embodiments, this application further provides an electronic device. Figure 4B This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 2 ,like Figure 4B As shown, the electronic device 400 includes:
[0112] First processing module 401 and second processing module 402;
[0113] Multiple storage modules 403;
[0114] The system control module 404 is used to determine the task scenario currently being processed by the first processing module 401 of the electronic device 400, and the storage module 4031 currently being accessed by the first processing module 401; if the type of the storage module 4031 currently being accessed by the first processing module 401 does not match the task scenario being processed, it determines whether there is an access task in the first processing module 401; if there is no access task in the first processing module 401, it controls the access path of the first processing module 401 to switch to the storage module 4032 that matches the task scenario being processed.
[0115] The system control module 404 is further configured to: determine whether the first processing module 401 and the second processing module 402 need to share a data space if the storage module 4033 currently accessed by the second processing module 402 of the electronic device 400 is different from the storage module 4031 currently accessed by the first processing module 401; determine whether there is an access task in the second processing module 402 if the first processing module 401 and the second processing module 402 need to share a data space; and control the access path of the second processing module 402 to switch to the storage module 4031 currently accessed by the first processing module 401 if there is no access task in the second processing module 402.
[0116] It should be noted that the storage module 4031 currently accessed by the first processing module 401 in this embodiment does not refer to a specific storage module. For example, the storage module accessed by the first processing module at the first time (currently) may be SC, and the storage module accessed at the second time (currently) may be DDR. Similarly, the storage module 4032 matching the current processing task scenario and the storage module 4033 currently accessed by the second processing module 402 in this embodiment also do not refer to a specific storage module.
[0117] Based on the foregoing embodiments, this application further provides an electronic device. Figure 5A This is a schematic diagram of the composition structure of the electronic device in the embodiment of this application. Figure 3 ,like Figure 5A As shown, the electronic device 50 includes:
[0118] First processing module 51 and second processing module 52;
[0119] Multiple storage modules 53;
[0120] The system control module 54 is used to determine the task scenario currently being processed by the first processing module 51 of the electronic device 50, and the storage module 531 currently being accessed by the first processing module 51; if the type of the storage module 531 currently being accessed by the first processing module 51 does not match the current task scenario, it determines whether there is an access task in the first processing module 51; if there is no access task in the first processing module 51, it controls the access path of the first processing module 51 to switch to the storage module 532 that matches the current task scenario.
[0121] The system control module 54 is further configured to: determine whether the first processing module 51 and the second processing module 52 need to share a data space if the storage module 533 currently accessed by the second processing module 52 of the electronic device 50 is different from the storage module 531 currently accessed by the first processing module 51; determine whether there is an access task in the second processing module 52 if the first processing module 51 and the second processing module 52 need to share a data space; and control the access path of the second processing module 52 to switch to the storage module 531 currently accessed by the first processing module 51 if there is no access task in the second processing module 52.
[0122] Bus 55, the first processing module 51 of the electronic device 50, the second processing module 52 of the electronic device 50 and the multiple storage modules 53 of the electronic device 50 are all connected to the bus 55;
[0123] Correspondingly, the system control module 54 includes a control unit 541, and a first bus switch 542 and a second bus switch 543 located on the bus 55;
[0124] The control unit 541 is used to send a first control command and a second control command;
[0125] The first bus switch 542 is used to respond to the first control command sent by the control unit 541 and control the on / off state of the access path between the first processing module 51 and each of the storage modules 53.
[0126] The second bus switch 543 is used to respond to the second control command sent by the control unit 541 to control the on / off state of the access path between the second processing module 52 and each of the storage modules 53.
[0127] Here, the electronic device has a bus for connecting a first processing module, a second processing module, and multiple storage modules of the electronic device. Furthermore, the system control module includes a control unit, a first bus switch, and a second bus switch located on the bus. After determining that the type of storage module currently accessed by the first processing module does not match the current task scenario, the control unit sends a first switching command to the first bus switch. The first bus switch, according to the first switching command, controls the access path of the first processing module to switch to a storage module that matches the current task scenario. When the control unit determines that the first processing module needs to share data space with the second processing module, but the storage module currently accessed by the second processing module is different from the storage module currently accessed by the first processing module, it sends a second switching command to the second bus switch. The second bus switch, according to the second switching command, controls the access path of the second processing module to switch to the storage module currently accessed by the first processing module.
[0128] In this embodiment, the storage module 531 currently accessed by the first processing module 51 does not refer to a specific storage module. For example, the storage module accessed by the first processing module at the first time (currently) may be SC, and the storage module accessed at the second time (currently) may be DDR. Similarly, the storage module 532 matching the current processing task scenario and the storage module 533 currently accessed by the second processing module 52 in this embodiment do not refer to a specific storage module either.
[0129] It should be noted that the descriptions of the above device embodiments are similar to those of the above method embodiments, and have similar beneficial effects. For technical details not disclosed in the device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.
[0130] In existing technologies, the CPU (Central Processing Unit) and multiple MASTERs (i.e., the initiators of read / write transfers) directly share SC (Shared Cache) or DDR (Double Data Rate Synchronous Dynamic Random Memory). However, the drawback of this approach is that it cannot dynamically switch access paths, and the CPU and multiple MASTERs cannot share storage space after switching access paths.
[0131] Based on this, this application further provides a control method and electronic device. This control method enables dynamic switching between two types of application scenarios, namely, it allows the CPU's access path to support dynamic switching. These two application scenarios are high-bandwidth scenarios and low-latency scenarios. In high-bandwidth scenarios, the CPU needs to access the SC (Search Engine Controller) along with other MASTERs to increase access bandwidth; while in low-latency scenarios, the CPU directly accesses the DDR (Data Base Controller), reducing the latency of accessing the SC. Furthermore, this control method can also control other MASTERs to dynamically follow the CPU in switching access paths when they need to share data space with the CPU.
[0132] Figure 5B This is a schematic diagram of the composition structure of the electronic device according to an embodiment of this application, as shown in Figure 4. Figure 5B As shown, the electronic device includes multiple CPU cores (i.e., CPU1 to CPUn), main modules 1 to main modules n (i.e., MASTER1 to MASTERn), SCP (System Control Processor), bus matrix 1 (BUS_MATRIX 1), bus matrix 2 (BUS_MATRIX 2), bus switch 1 (BUS SWITCH 1), bus switch 2 (BUS SWITCH 2), SC, and DDR.
[0133] The software can use a whitelist to record when the system needs to run in low-latency or high-bandwidth scenarios. In this case, the SCP sends a switching request to the CPU's BUS MATRIX 1. When the read and write OUTSTANDING counters of BUS_MATRIX 1 have both decremented to 0, it proves that the CPU's multiple cores no longer have any remaining access in BUS MATRIX 1. At this time, a switching response signal is returned to the hardware BUS SWITCH 1. After receiving the response signal, BUS SWITCH 1 switches the access path of BUS SWITCH 1 from SC to DDR, or from DDR to SC, according to the current CPU access path status register (written by the software when the switch is initiated, recording whether the CPU needs to switch to SC or DDR).
[0134] Furthermore, the software can use a whitelist to record when the system needs to run in low-latency or high-bandwidth scenarios. In this case, the SCP sends a switching request to BUS MATRIX 2 from MASTER1 to MASTERn. When the read and write OUTSTANDING counters of BUS_MATRIX 2 have both decremented to 0, it proves that there are no remaining accesses in BUS MATRIX 2 for multiple MASTERs. At this time, a switching response signal is returned to the hardware BUS SWITCH 2. After receiving the response signal, BUS SWITCH 2 switches the access path of BUSSWITCH 2 from SC to DDR, or from DDR to SC, according to the current CPU access path status register (written by the software when the switching is initiated, recording whether the CPU needs to switch to SC or DDR).
[0135] In this way, MASTER1-MASTERn can switch to the same access path as the CPU when the CPU switches access paths, and can share the same storage space with the CPU.
[0136] Here, BUS MATRIX 1 and BUS MATRIX 2 are bus matrices / networks, and BUS SWITCH 1 and BUSSWITCH 2 are bus path switching networks. MASTER1 to MASTERn are units in the electronic device other than the CPU that can actively initiate access; that is, the CPU, MASTER1 to MASTERn are all initiators of read / write transfers. The whitelist can be customized at the factory and continuously maintained during user operation.
[0137] The solution in this application has the following advantages:
[0138] (1) In high-bandwidth scenarios, the CPU needs to access the SC along with other MASTERs in order to improve access bandwidth; while in low-latency scenarios, directly accessing the external DDR memory will reduce the latency of accessing the SC, and at the same time, the CPU and other MASTERs can also share the DDR storage space.
[0139] (2) Supports dynamic switching between the two types of applications mentioned above, and achieves the goal of sharing SC / DDR storage space between the CPU and other MASTERs.
[0140] Based on the foregoing embodiments, this application provides a control device, which includes the included units, the modules included in each unit, and the components included in each module. It can be implemented by a processor in an electronic device; of course, it can also be implemented by specific logic circuits. In the implementation process, the processor can be an SCP (System Control Processor), a CPU (Central Processing Unit), an MPU (Microprocessor Unit), a DSP (Digital Signal Processor), or an FPGA (Field Programmable Gate Array), etc.
[0141] Figure 6 This is a schematic diagram of the composition of the control device according to an embodiment of this application, as shown below. Figure 6 As shown, the device 600 includes:
[0142] The first determining unit 601 is used to determine the task scenario currently being processed by the first processing module of the electronic device, and the storage module currently being accessed by the first processing module.
[0143] The second determining unit 602 is used to determine whether there is an access task in the first processing module if the type of the storage module currently accessed by the first processing module does not match the current processing task scenario.
[0144] The first control unit 603 is used to control the access path of the first processing module to switch to a storage module that matches the current processing task scenario if there is no access task in the first processing module.
[0145] In some embodiments, the apparatus further includes:
[0146] The third determining unit is used to determine whether the first processing module and the second processing module need to share data space if the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module.
[0147] The fourth determining unit is used to determine whether there is an access task in the second processing module if the first processing module and the second processing module need to share the data space.
[0148] The second control unit is configured to switch the access path of the second processing module to the storage module currently being accessed by the first processing module if there is no access task in the second processing module.
[0149] In some embodiments, the fourth determining unit includes:
[0150] The fourth determining subunit is used to determine whether the value of the task counter corresponding to the second processing module is a target value if the first processing module and the second processing module need to share the data space; wherein the target value is used to represent no remaining access tasks;
[0151] Correspondingly, the second control unit includes:
[0152] The second control subunit is used to control the access path of the second processing module to switch to the storage module currently accessed by the first processing module if the value of the task counter corresponding to the second processing module is the target value.
[0153] In some embodiments, the second determining unit 602 includes:
[0154] The second determining subunit is used to determine whether the value of the task counter corresponding to the first processing module is a target value if the type of the storage module currently accessed by the first processing module does not match the current processing task scenario; wherein the target value is used to represent that there are no remaining access tasks.
[0155] Correspondingly, the first control unit 603 includes:
[0156] The first control subunit is used to control the access path of the first processing module to switch to the storage module that matches the current processing task scenario when the value of the task counter corresponding to the first processing module is the target value.
[0157] In some embodiments, the apparatus further includes:
[0158] The first sending unit is configured to send a first switching request to the first processing module, so that the first processing module, upon receiving the first switching request, determines whether the value of its corresponding task counter on the bus is the target value; or,
[0159] The second sending unit is used to send a second switching request to the second processing module, so that the second processing module determines whether the value of its corresponding task counter on the bus is the target value after receiving the second switching request.
[0160] Correspondingly, the device further includes:
[0161] The third sending unit is configured to send a switching response signal to the first bus switch if the value of the task counter corresponding to the first processing module is the target value, so that the first bus switch can switch the access path of the first processing module to a storage module that matches the currently processed task scenario; or,
[0162] The fourth sending unit is configured to send a switching response signal to the second bus switch if the value of the task counter corresponding to the second processing module is the target value, so that the second bus switch can switch the access path of the second processing module to the target storage module.
[0163] In some embodiments, the apparatus further includes:
[0164] The fifth determining unit is used to determine whether the first processing module and the second processing module need to share data space if the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module.
[0165] The configuration unit is used to configure the second processing module so that, if the first processing module and the second processing module need to share a data space, the second processing module can directly access the storage module currently accessed by the first processing module through the storage module it accesses.
[0166] In some embodiments, the apparatus further includes:
[0167] The sixth determining unit is configured to determine that the storage module currently accessed by the first processing module does not match the current processing task scenario if the currently processed task scenario is the first scenario and the storage module currently accessed by the first processing module is the first storage module; or,
[0168] The seventh determining unit is configured to determine that the storage module currently accessed by the first processing module does not match the current processing task scenario if the current processing task scenario is the second scenario and the storage module currently accessed by the first processing module is the second storage module.
[0169] In this scenario, the bandwidth requirement of the first scenario is higher than that of the second scenario, and the bandwidth of the first storage module is less than that of the second storage module.
[0170] The descriptions of the above device and equipment embodiments are similar to those of the above method embodiments, and have similar beneficial effects. For technical details not disclosed in the device and equipment embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.
[0171] It should be noted that, in the embodiments of this application, if the above-described control method is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of this application, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause an electronic device (which may be a personal computer, server, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM (Read Only Memory), magnetic disks, or optical disks. Thus, the embodiments of this application are not limited to any specific hardware and software combination.
[0172] Correspondingly, this application embodiment provides another electronic device, including a memory and a processor. The memory stores a computer program that can run on the processor, and when the processor executes the program, it implements the steps in the control method provided in the above embodiments.
[0173] Correspondingly, embodiments of this application provide a readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps in the control method described above.
[0174] It should be noted that the descriptions of the storage medium and device embodiments above are similar to the descriptions of the method embodiments above, and have similar beneficial effects. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.
[0175] It should be noted that, Figure 7 This is a schematic diagram of a hardware entity of an electronic device according to an embodiment of this application, such as... Figure 7 As shown, the hardware entity of the electronic device 700 includes: a processor 701, a communication interface 702, and a memory 703, wherein...
[0176] The processor 701 typically controls the overall operation of the electronic device 700.
[0177] The communication interface 702 enables the electronic device 700 to communicate with other electronic devices, servers, or platforms via a network.
[0178] The memory 703 is configured to store instructions and applications executable by the processor 701, and can also cache data to be processed or already processed (e.g., image data, audio data, voice communication data and video communication data) in the processor 701 and various modules in the electronic device 700. It can be implemented by FLASH (flash memory) or RAM (Random Access Memory).
[0179] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.
[0180] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.
[0181] Furthermore, in the various embodiments of this application, all functional units can be integrated into one processing module, or each unit can be a separate unit, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in a combination of hardware and software functional units. Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, RAM, magnetic disks, or optical disks.
[0182] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.
[0183] The features disclosed in the several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.
[0184] The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method or device embodiments.
[0185] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A control method, the method comprising: The performance requirements of the electronic device are determined by determining the type of application currently being processed by the first processing module of the electronic device, and the corresponding task scenario is determined by determining the storage module currently being accessed by the first processing module, wherein the storage module has different characteristics to be applied to different task scenarios; If the type of the storage module currently accessed by the first processing module does not match the current task scenario, determine whether there is an access task in the first processing module; If there is no access task in the first processing module, control the access path of the first processing module to switch to the storage module that matches the current processing task scenario; If the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module, determine whether the first processing module and the second processing module need to share data space; If the first processing module and the second processing module need to share a data space, determine whether there is an access task in the second processing module; If there is no access task in the second processing module, the access path of the second processing module is switched to the storage module currently accessed by the first processing module; or, If the first processing module and the second processing module need to share a data space, configure the second processing module so that it can directly access the storage module currently accessed by the first processing module through the storage module it accesses.
2. The method according to claim 1, wherein determining whether an access task exists in the second processing module if the first processing module and the second processing module need to share a data space includes: If the first processing module and the second processing module need to share a data space, determine whether the value of the task counter corresponding to the second processing module is a target value; wherein, the target value is used to represent no remaining access tasks; Correspondingly, if there is no access task in the second processing module, controlling the access path of the second processing module to switch to the storage module currently accessed by the first processing module includes: If the value of the task counter corresponding to the second processing module is the target value, the access path of the second processing module is switched to the storage module currently accessed by the first processing module.
3. The method according to claim 1, wherein determining whether there is an access task in the first processing module if the type of the storage module currently accessed by the first processing module does not match the current processing task scenario includes: If the type of the storage module currently accessed by the first processing module does not match the current task scenario, determine whether the value of the task counter corresponding to the first processing module is the target value; wherein, the target value is used to represent that there are no remaining access tasks; Correspondingly, if there is no access task in the first processing module, controlling the access path of the first processing module to switch to a storage module that matches the current processing task scenario includes: When the value of the task counter corresponding to the first processing module is the target value, the access path of the first processing module is switched to the storage module that matches the current processing task scenario.
4. The method according to claim 2, wherein the value of the task counter is determined to be the target value through the following steps: A first switching request is sent to the first processing module, so that after receiving the first switching request, the first processing module determines whether the value of its corresponding task counter on the bus is the target value. or, A second switching request is sent to the second processing module, so that the second processing module determines whether the value of its corresponding task counter on the bus is the target value after receiving the second switching request. Correspondingly, the access path is switched through the following steps: If the value of the task counter corresponding to the first processing module is the target value, a switching response signal is sent to the first bus switch, so that the first bus switch can switch the access path of the first processing module to the storage module that matches the current processing task scenario. or, If the value of the task counter corresponding to the second processing module is the target value, a switching response signal is sent to the second bus switch, so that the second bus switch can switch the access path of the second processing module to the storage module that matches the current processing task scenario.
5. The method according to claim 1, further comprising: If the currently processed task scenario is the first scenario and the storage module currently accessed by the first processing module is the first storage module, it is determined that the storage module currently accessed by the first processing module does not match the currently processed task scenario; or, If the current task scenario being processed is the second scenario and the storage module currently accessed by the first processing module is the second storage module, it is determined that the storage module currently accessed by the first processing module does not match the current task scenario being processed. In this scenario, the bandwidth requirement of the first scenario is higher than that of the second scenario, and the bandwidth of the first storage module is less than that of the second storage module.
6. An electronic device, the electronic device comprising: First processing module; Multiple storage modules; The system control module is used to determine the performance requirements of the electronic device based on the type of application currently being processed by the first processing module of the electronic device, and to determine the corresponding task scenario, as well as the storage module currently accessed by the first processing module, wherein the storage module has different characteristics to be applied to different task scenarios; If the type of the storage module currently accessed by the first processing module does not match the current task scenario, determine whether there is an access task in the first processing module; if there is no access task in the first processing module, control the access path of the first processing module to switch to a storage module that matches the current task scenario. Second processing module; Correspondingly, the system control module is further configured to: determine whether the first processing module and the second processing module need to share a data space if the storage module currently accessed by the second processing module of the electronic device is different from the storage module currently accessed by the first processing module; if the first processing module and the second processing module need to share a data space, determine whether there is an access task in the second processing module; if there is no access task in the second processing module, control the access path of the second processing module to switch to the storage module currently accessed by the first processing module; or, if the first processing module and the second processing module need to share a data space, configure the second processing module so that the second processing module can directly access the storage module currently accessed by the first processing module through the storage module it accesses.
7. The electronic device according to claim 6, further comprising: The first processing module, the second processing module, and the multiple storage modules of the electronic device are all connected to the bus. Correspondingly, the system control module includes a control unit, and a first bus switch and a second bus switch located on the bus; The control unit is used to send a first control command and a second control command; The first bus switch is used to respond to the first control command sent by the control unit and control the on / off state of the access path between the first processing module and each of the storage modules; The second bus switch is used to respond to the second control command sent by the control unit and control the on / off state of the access path between the second processing module and each of the storage modules.
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