Fractional order switched capacitor network and efficiency evaluation method thereof
Patent Information
- Application Number
- CN202310112388.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-02-14
- Publication Date
- 2026-10-09
- Estimated Expiration
- 2043-02-14
AI Technical Summary
[0073]1) This invention can quickly and conveniently obtain the steady-state periodic analytical solution of the state variables in the state equation system of fractional-order switched capacitor network. Based on the circuit principle, the state equation of the fractional-order switched converter is established and solved by fractional-order prediction and correction method. It can more comprehensively consider the effects of factors such as the fractional-order parameters of capacitor on the circuit.
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Abstract
Description
Technical Field
[0001] This invention relates to the field of fractional-order switched capacitor modeling and analysis technology, specifically to a fractional-order switched capacitor network and its efficiency evaluation method. Background Technology
[0002] In the field of switched-capacitor converter research, efficiency remains a frequently discussed issue. The conversion efficiency of a circuit is easily affected by many factors, such as the circuit's equivalent resistance and the internal performance parameters of the capacitor. When these factors fluctuate, the circuit's efficiency also changes. Among these, the fractional-order characteristic parameters of the capacitor can more accurately characterize the performance of a real capacitor, and their effect on the converter is significant.
[0003] There are many research results on this topic. There are three main types of methods for analyzing the efficiency of SC converters: simplified circuit model, unit circuit analysis, and modeling and analysis of state equations. These methods can find the influence of capacitor characteristic parameters, switching frequency, and parasitic parameters of power switching devices on the efficiency of SC converters and are widely used in the engineering field. For example, the existing reference [1]: "Seeman MD. A Design Methodology for Switched-Capacitor DC-DC Converters [J]. Dissertations & Theses Gradworks, 2009.", fully determines the steady-state performance of SCC by evaluating the circuit output impedance, proposes two asymptotic constraints, which can be used to evaluate the efficiency of various SCCs and have the advantages of simple and intuitive form. The existing reference [2]: "Cheung CK, Tan SC, Tse CK, et al. On Energy Efficiency of Switched-Capacitor Converters[J].IEEE Transactions on Power Electronics,2013,28(2):862-876." divides the analysis of the entire efficiency problem into two parts, and comprehensively evaluates the overall efficiency based on the charging and discharging efficiencies. The last method can obtain the relationship between various parameters and efficiency, and the results are relatively more accurate. Summary of the Invention
[0004] This invention provides a fractional-order switched-capacitor network and its efficiency evaluation method. This method combines Kirchhoff's laws, constructs an equivalent circuit model of the fractional-order switched capacitor, simulates and models it, and uses fractional-order differential correlation theory to analyze the state equations of the circuit under different modes. By solving these equations, the state variables in each mode are obtained, and the calculated data is used to derive the circuit's efficiency, thereby analyzing the efficiency of the switched-capacitor network. Compared to existing methods that evaluate the fractional-order switched capacitor as a whole by analyzing the charging and discharging unit circuit, this method not only obtains the numerical changes in state variables under different modes but also provides a more intuitive analysis of the influence of fractional-order characteristic parameters on the efficiency of the fractional-order switched-capacitor network. The analysis results incorporating this influencing factor are more consistent with real-world experimental conditions.
[0005] The technical solution adopted in this invention is as follows:
[0006] A method for evaluating the efficiency of a fractional-order switched-capacitor network includes the following steps:
[0007] Step 1: Construct a fractional-order switched capacitor model;
[0008] Step 2: Analyze the operating modes of the fractional-order switched capacitor network circuit under different charging and discharging modes;
[0009] Step 3: Construct the state equations of the fractional-order switched-capacitor network under different operating modes;
[0010] Step 4: Solve for the state variable Vc of the state equation system constructed in Step 3, and draw the output waveform of the state variable Vc;
[0011] Step 5: Based on the state variable Vc obtained in Step 4, calculate the efficiency of the fractional-order switched capacitor network.
[0012] In step 1, the fractional-order switched capacitor network is equivalent to a simple circuit that is easy to analyze. The fractional-order switched capacitor model is simplified to an equivalent model that includes a capacitor C with fractional-order characteristics and an equivalent resistance Req.
[0013] In step 2, during the switching process of the MOS switch, the fractional-order switched capacitor network circuit has two modes: charging mode and discharging mode.
[0014] In charging mode, the power supply Vin charges the flying capacitor C, while the filter capacitor C0 discharges across the load R0.
[0015] In discharge mode, the power supply Vin and the flying capacitor C together charge the load R0.
[0016] In step 3, the state equations of the fractional-order switched capacitor network in the two operating modes are constructed respectively:
[0017] Define a fractional-order switched capacitor network with an n-fold boost ratio, which includes: x = (2n-3) flying capacitors C with equal capacitance values, a filter capacitor C0, a power supply Vin, and a load resistor R0.
[0018] In charging mode, the state equation of the circuit containing power source Vin is:
[0019]
[0020] In equation (1), Vc1 is the voltage value of the flying capacitor connected in series with the power supply in the charging mode; C1 is the value of the flying capacitor connected in series with the power supply in the charging mode; α is the order of the flying capacitor. Let Vc1 be the partial α-derivative of the flying capacitor voltage Vc1 with respect to time t.
[0021] The state equation of the loop containing C(2i) is: (2i∈(0,x))
[0022]
[0023] In equation (2), C(2i) represents the flying capacitor that discharges in the charging mode; x is the number of flying capacitors contained in the n-fold fractional-order switched capacitor network; and 2i is any even number between 0 and x.
[0024] Vc 2i The voltage value of the flying capacitor C(2i) during discharge in charging mode; Vc 2i+1 The voltage value of the flying capacitor C(2i+1) during charging in charging mode; Req is the equivalent resistance value of the flying capacitor.
[0025] The state equation of the circuit containing filter capacitor C0 is:
[0026]
[0027] In equation (3), Vc0 is the voltage value of the filter capacitor C0; R0 is the load resistance value.
[0028] Let all flying capacitors have the same capacitance value C, and we can uniformly write them in the following form:
[0029]
[0030]
[0031] In equation (5), Vci is the voltage value of the flying capacitor C(i); Vc i+1 Vc is the voltage across the flying capacitor C(i+1). i-1 The voltage value across the flying capacitor C(i-1) is given.
[0032]
[0033] In discharge mode, the state equation of the circuit containing power supply Vin and flying capacitor C(2i) is: (2i∈(0,x))
[0034]
[0035] In equation (7), C(2i) represents the flying capacitor that is charged in the discharge mode; Vc represents the voltage value of the flying capacitor C(2i) that is charged.
[0036] The state equations for the circuit containing power supply Vin and filter capacitor C0 are as follows:
[0037]
[0038] In equation (8), Vcx represents the voltage value of the flying capacitor C(x) connected in series with the circuit containing the filter capacitor; Vc0 is the voltage value of the filter capacitor.
[0039] Let all flying capacitors have the same capacitance value C, and we can uniformly write them in the following form:
[0040]
[0041]
[0042]
[0043] Step 5 includes the following steps:
[0044] S51. Analyze the efficiency of the switched capacitor network using the unit circuit analysis method, simplifying the topology operating mode switching process into a charging and discharging process. The efficiency calculation expressions for the charging and discharging stages are shown below, where the discharging process is divided into two stages: capacitor charge redistribution and load discharge.
[0045]
[0046]
[0047]
[0048] Where ηch is the circuit conversion efficiency in the charging mode; ηdis1 is the circuit conversion efficiency during the capacitor charge redistribution stage in the discharging mode; and ηdis2 is the circuit conversion efficiency during the load discharge stage in the discharging mode.
[0049] Vcmax and Vcmin are the maximum and minimum voltage values of the flying capacitor during the discharge process, respectively; Vomax and Vomin are the maximum and minimum voltage values of the load capacitor during the discharge process, respectively; Vc(QB) is the voltage value of the flying capacitor at the end of the capacitor charge redistribution process; R0 is the load resistance; Rdis is the equivalent output resistance of the switched capacitor network.
[0050] S52. Solve for the equivalent output resistance ROUT of the switched capacitor network. Since the voltage drop between the input and output terminals of the switched capacitor converter is proportional to the output current, it can be used to represent the output resistance ROUT. This resistance has a slow / fast asymptotic limit. The slow-switching equivalent impedance, the fast-switching on-state equivalent impedance, and the fast-switching capacitor equivalent impedance are expressed as follows:
[0051]
[0052]
[0053]
[0054] Where RESR is the equivalent resistance of the flying capacitor; Rs is the load resistance;
[0055] n is the total number of phases in the switched capacitor network; RSSL is the slow-switching equivalent impedance; C(i) is the capacitance value of the i-th flying capacitor; a j This represents the vector multiple corresponding to phase j.
[0056] RFSL(Rs) is the fast-switching equivalent impedance; switches represents the MOSFETs in the switched capacitor network; Ri is the equivalent resistance of the i-th MOSFET; Rs represents the equivalent resistance of the MOSFET.
[0057] RFSL(ESR) is the equivalent impedance of the fast-switching capacitor; RESR is the equivalent resistance of the flying capacitor; a c,i Let be the charge multiplication vector of any phase in a two-phase switched capacitor network.
[0058] Let be the capacitance charge multiplication vector and the switch charge multiplication vector in phase j, respectively, represented in the topology as follows:
[0059]
[0060]
[0061]
[0062] Where T represents the transpose of the matrix; This is the switching charge multiplication vector of the switched capacitor network in phase one; This is the switching charge multiplication vector of the switched capacitor network in phase two.
[0063] The expression for the equivalent resistance ROUT is as follows:
[0064]
[0065] A fractional-order switched capacitor network with an n-fold boost ratio includes: (2n-3) flying capacitors, a filter capacitor C0, a power supply Vin, and a load resistor R0;
[0066] The positive terminal of power supply Vin is connected to the drain of MOS switch S1, the source of MOS switch S1 is connected to the drain of MOS switch S2, and the source of MOS switch S2 is connected to the negative terminal of power supply Vin.
[0067] The positive terminal of the power supply Vin is connected to the anode of diode D1, the cathode of diode D1 is connected to the anode of diode D2, the cathode of diode D2 is connected to the anode of diode D3, ..., the cathode of diode D(2n-3) is connected to the anode of diode D(2n-2), the cathode of diode D(2n-2) is connected to one end of filter capacitor C0, the other end of filter capacitor C0 is connected to one end of load resistor R0, and the other end of load resistor R0 is connected to the negative terminal of power supply Vin;
[0068] The cathode of diode D1 is connected to one end of flying capacitor C1, and the other end of flying capacitor C1 is connected to the source of MOSFET S1; the cathode of diode D2 is connected to one end of flying capacitor C2, and the other end of flying capacitor C2 is connected to the negative terminal of power supply Vin.
[0069] The cathode of diode D3 is connected to one end of flying capacitor C3, and the other end of flying capacitor C3 is connected to the source of MOSFET switch S3; the cathode of diode D4 is connected to one end of flying capacitor C4, and the other end of flying capacitor C4 is connected to the negative terminal of power supply Vin.
[0070] And so on...
[0071] The cathode of diode D(2n-4) is connected to one end of flying capacitor C(2n-4), and the other end of flying capacitor C(2n-4) is connected to the source of MOS switch S(2n-4); the cathode of diode D(2n-3) is connected to one end of flying capacitor C(2n-3), and the other end of flying capacitor C(2n-3) is connected to the negative terminal of power supply Vin.
[0072] This invention discloses a fractional-order switched capacitor network and its efficiency evaluation method, with the following technical advantages:
[0073] 1) This invention can quickly and conveniently obtain the steady-state periodic analytical solution of the state variables in the state equation system of fractional-order switched capacitor network. Based on the circuit principle, the state equation of the fractional-order switched converter is established and solved by fractional-order prediction and correction method. It can more comprehensively consider the effects of factors such as the fractional-order parameters of capacitor on the circuit.
[0074] 2) This invention analyzes and discusses the efficiency of the converter, and it can be clearly seen that factors such as the fractional-order parameters of the capacitor affect the efficiency of the converter. Attached Figure Description
[0075] The present invention will be further described below with reference to the accompanying drawings and embodiments:
[0076] Figure 1 The diagram is a replacement for the equivalent model of a fractional capacitor.
[0077] Figure 2 This is a topology diagram of a fractional-order switched-capacitor network with an n-fold boost ratio.
[0078] Figure 3(a) shows the topology of the fractional-order switched capacitor network in the charging mode;
[0079] Figure 3(b) shows the topology of the fractional-order switched capacitor network in the discharge mode.
[0080] Figure 4 This is an idealized model diagram of a switched capacitor converter with equivalent output impedance ROUT.
[0081] Figure 5 This is a flowchart of the analysis method for the fractional-order switched capacitor network in this embodiment.
[0082] Figure 6(a) shows the topology of the 2x typical Dickson circuit in the charging mode in this embodiment;
[0083] Figure 6(b) shows the topology of the 2x typical Dickson circuit in the discharge mode in this embodiment.
[0084] Figure 7 This is a flowchart of the fractional-order prediction correction method.
[0085] Figure 8 This is a comparison chart of the 2x Dickson flying capacitor voltage output waveform obtained by MATLAB in this embodiment and the flying capacitor voltage output waveform obtained by PSIM circuit simulation.
[0086] Figure 9(a) shows the efficiency in each charge-discharge cycle obtained by processing the state variable solution using the method in reference [2] in this embodiment. Figure 1 ;
[0087] Figure 9(b) shows the efficiency in each charge-discharge cycle obtained by processing the state variable solution using the method in reference [2] in this embodiment. Figure 2 . Detailed Implementation
[0088] Figure 1 The diagram shows the replacement of the fractional-order capacitor with its equivalent model. It can be seen that the fractional-order switched capacitor of order α is replaced by a simplified model with capacitance and equivalent resistance.
[0089] Figure 3(a) shows the topology of the fractional-order switched capacitor network in the charging mode; Figure 3(b) shows the topology of the fractional-order switched capacitor network in the discharging mode. In the charging mode, the n-fold switched capacitor network contains n independent loops. At this time, the power supply only charges C1, and the remaining flying capacitors transfer charge between each other, while the filter capacitor C0 discharges on the load. In the discharging mode, the power supply and the flying capacitor C(x) charge the load together, and the power supply participates in the charge transfer of the remaining flying capacitors.
[0090] Figure 4 This is an idealized model diagram of a switched-capacitor converter with equivalent output impedance ROUT. The model consists of an ideal transformer with a transformation ratio of 1:n, an output resistor ROUT, and a load resistor R0.
[0091] Figure 5 This is a flowchart illustrating the analysis method for the fractional-order switched-capacitor network in this embodiment. Figure 5 As shown in the figure, the specific implementation steps of the analysis method for a 2x Dickson-type fractional-order switched capacitor network provided by the present invention are as follows:
[0092] Step S1: Construction of the equivalent model of the fractional switched capacitor:
[0093] The 2x Dickson-type fractional-order switched-capacitor network can be represented as a simple circuit that is easy to analyze. The fractional-order capacitor model is simplified to an equivalent model containing a capacitor C with fractional-order characteristics and its equivalent resistance Req, such as... Figure 1 As shown.
[0094] Step S2: State description of fractional-order switched-capacitor network in different modes
[0095] The topology diagrams of the 2x Dickson fractional-order switched capacitor network in charging and discharging modes are shown in Figures 6(a) and 6(b). Analyzing the operating state of the 2x Dickson fractional-order switched capacitor network in different modes, the circuit has two modes during the switching process of the MOSFET: charging mode and discharging mode. In charging mode, the power supply Vin charges the flying capacitor C1, and the filter capacitor C3 discharges across the load R0. In discharging mode, the power supply Vin and the flying capacitor C1 discharge together across the filter capacitor C4 and the load R0.
[0096] Step S3: Construction of the state equation system for each mode:
[0097] The state equations of the Dickson-type fractional-order switched-capacitor network are constructed for two operating modes, with the state equations for the charging mode expressed as follows:
[0098]
[0099]
[0100] The above equation can be written in the following form:
[0101]
[0102] The state equations of the circuit in the discharge mode are as follows:
[0103]
[0104]
[0105] The above equation can be written in the following form:
[0106]
[0107]
[0108] Step S4: Solving for state variables:
[0109] The fractional-order predictor-corrector method can be used for the numerical solution of fractional equations of any order, and can obtain numerical solutions of fractional-order state equation systems under different circuit modes. The flowchart for numerical computation of fractional-order differential equations is shown below. Figure 7 As shown, by combining the fractional-order state equations listed in S3, the numerical solution and output waveform of the voltage across capacitor C1 can be obtained in MATLAB. Simultaneously, a simulation of a 2x Dickson-type fractional-order switched capacitor network is performed to obtain the voltage output waveform of capacitor C1. Comparing the two waveforms, as shown... Figure 8As shown, the two waveforms are very similar, so the numerical solution obtained by using the fractional-order prediction and correction method is correct and reliable, and the method is effective.
[0110] Step S5: Converter efficiency calculation:
[0111] Using the state variables obtained in S4, and combining them with two existing methods for efficiency analysis of switched capacitor converters, we will use them to support the analysis of the efficiency of a 2x Dickson type fractional-order switched capacitor network, and explore the influence of the fractional-order capacitor parameters of the switched capacitor network on the conversion efficiency in the circuit.
[0112] Step S5.1, Unit Circuit Analysis Method:
[0113] The efficiency of a 2x Dickson fractional-order switched capacitor network is analyzed using unit circuit analysis methods. The topology's operating mode switching process is simplified to a charging and discharging process. The efficiency calculation expressions for the charging and discharging stages are shown below, and the discharging process is divided into two stages: capacitor charge redistribution and load discharging.
[0114]
[0115]
[0116]
[0117] Wherein, Vcmax / min represents the maximum / minimum voltage of the flying capacitor C1 during charging, Vomax / min represents the maximum / minimum voltage of the load capacitor C3 during discharging, Vc(QB) represents the voltage of the flying capacitor C1 at the end of the capacitor charge redistribution process, R0 represents the load resistance, and Rdis represents the equivalent output resistance of the switched capacitor network. The efficiency of this 2x Dickson type fractional-order switched capacitor network in each cycle during the operating time is shown in Figures 9(a) and 9(b). As can be seen from Figures 9(a) and 9(b), the charging and discharging efficiency of the circuit gradually approaches a relatively stable value as time increases. By observing the fluctuations in the efficiency curves in the figures caused by changes in various parameters in the fractional-order switched capacitor network, the influence of each parameter on the efficiency can be further analyzed.
[0118] Step S5.2, ROUT solution:
[0119] To solve for the equivalent output resistance ROUT of the switched capacitor network, since the voltage drop between the input and output terminals of the switched capacitor converter is proportional to the output current, it can be used to represent the output resistance ROUT. This resistance has slow / fast asymptotic limits. The slow-switching equivalent impedance, the fast-switching on-state equivalent impedance, and the fast-switching capacitor equivalent impedance are expressed as follows:
[0120]
[0121]
[0122]
[0123] Where n is the boost factor of the Dickson fractional-order switched capacitor network, which is 2 in this case; RESR is the equivalent resistance of the flying capacitor; and R0 is the load resistance. and Here, denoted as the capacitor charge doubling vector and the switch charge doubling vector, respectively, are represented in a Dickson-type fractional-order switched capacitor network as follows:
[0124] a 1 =[0 1 1] T
[0125]
[0126]
[0127] The expression for the equivalent resistance ROUT of a 2x Dickson type fractional switched capacitor network is as follows:
[0128]
Claims
1. A method for evaluating the efficiency of a fractional-order switched-capacitor network, characterized in that... Includes the following steps: Step 1: Construct a fractional-order switched capacitor model; Step 2: Analyze the operating modes of the fractional-order switched capacitor network circuit under different charging and discharging modes; Step 3: Construct the state equations of the fractional-order switched-capacitor network under different operating modes; Step 4: Solve for the state variables of the state equation system constructed in Step 3; Step 5: Based on the state variables obtained in Step 4, calculate the efficiency of the fractional-order switched-capacitor network; In step 3, the state equations of the fractional-order switched capacitor network in the two operating modes are constructed respectively: A fractional-order switched capacitor network with an n-fold boost ratio includes: x = (2n-3) flying capacitors C with equal capacitance values, a filter capacitor C0, a power supply Vin, and a load resistor R0. In charging mode, the state equation of the circuit containing power source Vin is: ; In equation (1), In charging mode This is the value of the flying capacitor connected in series with the power supply in charging mode; The order of the flying capacitor; For flying capacitor voltage deviation with respect to time t First derivative; This is the equivalent resistance value of the flying capacitor; The state equation of the loop containing C(2i) is: (2i∈(0,x)) ; In equation (2), C(2i) represents the flying capacitor that discharges in the charging mode; x is the number of flying capacitors contained in the n-fold fractional-order switched capacitor network; 2i is any even number between 0 and x. The voltage value of the flying capacitor C(2i) for discharging in charging mode; The voltage value of the flying capacitor C(2i+1) used for charging in charging mode; The state equation of the circuit containing filter capacitor C0 is: ; In equation (3), This is the voltage value of the filter capacitor C0; This is the load resistance value; Let all flying capacitors have the same capacitance value C, and we can uniformly write them in the following form: ; ; In equation (5), Let C(i) be the voltage across the flying capacitor C(i); The voltage across the flying capacitor C(i+1); The voltage across the flying capacitor C(i-1); ; In discharge mode, the state equation of the circuit containing power supply Vin and flying capacitor C(2i) is: (2i∈(0,x)) ; In equation (7), This refers to the flying capacitor that is charged during the discharge mode; Indicates the flying capacitor undergoing charging. The voltage value; The state equations for the circuit containing power supply Vin and filter capacitor C0 are as follows: ; In equation (8), This represents the voltage value of the flying capacitor C(x) connected in series with the circuit containing the filter capacitor; This is the voltage value of the filter capacitor; Let all flying capacitors have the same capacitance value C, and we can uniformly write them in the following form: ; ; 。 2. The method for evaluating the efficiency of a fractional-order switched capacitor network according to claim 1, characterized in that: In step 1, the fractional-order switched capacitor model is simplified to an equivalent model that includes a capacitor C with fractional-order characteristics and an equivalent capacitor resistance Req.
3. The method for evaluating the efficiency of a fractional-order switched capacitor network according to claim 1, characterized in that: In step 2, during the switching process of the MOS switch, the fractional-order switched capacitor network circuit has two modes: charging mode and discharging mode. In charging mode, the power supply Vin charges the flying capacitor C, while the filter capacitor C0 discharges across the load R0. In discharge mode, the power supply Vin and the flying capacitor C together charge the load R0.
4. The method for evaluating the efficiency of a fractional-order switched capacitor network according to claim 1, characterized in that: Step 5 includes the following steps: S51: The efficiency calculation expressions for the charging and discharging stages of the circuit are shown below, where the discharging process is divided into two stages: capacitor charge redistribution and load discharge. ; ; ; in, The switching efficiency of the circuit in charging mode; This refers to the circuit switching efficiency during the capacitor charge redistribution phase in the discharge mode. This refers to the circuit switching efficiency during the load discharge phase in the discharge mode. , These represent the maximum and minimum voltage values across the capacitor during the electrical process; , These represent the maximum and minimum voltage values of the filter capacitor C0 during the discharge process, respectively; Vc(QB) is the voltage across the capacitor at the end of the charge redistribution process; R0 is the load resistance; and Rdis is the equivalent output resistance of the switched capacitor network. S52: Solve for the equivalent output resistance ROUT of the switched capacitor network. Since the voltage drop between the input and output terminals of the switched capacitor converter is proportional to the output current, it can be used to represent the output resistance ROUT. This resistance has slow / fast asymptotic limits. The slow-switching equivalent impedance, the fast-switching on-state equivalent impedance, and the fast-switching capacitor equivalent impedance are expressed as follows: ; ; ; Where RSR is the flying capacitor equivalent resistance; RSSL is the slow switching equivalent impedance; The equivalent impedance for fast switching; This represents the equivalent resistance of the MOSFET switch. The equivalent impedance of the fast-switching capacitor is RSE; the equivalent resistance of the flying capacitor is RESR. The expression for the equivalent resistance ROUT is as follows: 。