A method and system for calibrating an on-chip clock frequency

Abstract

The application provides a chip internal clock frequency calibration method and system. When the chip temperature is at a first preset temperature, a series of candidate parameter groups are selected from a plurality of control parameter groups, and a first clock frequency output by a clock oscillation module in response to each candidate parameter group is obtained. When the chip temperature is at at least one second preset temperature, a second clock frequency output by the clock oscillation module in response to each candidate parameter group is obtained. The first clock frequency and the second clock frequency corresponding to each candidate parameter group are taken as a frequency array, and a series of frequency arrays are formed. One of the frequency arrays is selected from the series of frequency arrays, and the corresponding candidate parameter group is taken as calibration data of the clock oscillation module. The calibration data is saved in the clock oscillation module to calibrate the clock oscillation module. The application provides calibration speed and accuracy of the chip HSI, and is beneficial to improve chip production efficiency.

Description

Technical Field

[0001] This invention relates to the field of clock calibration technology, and more particularly to a method and system for calibrating the internal clock frequency of a chip. Background Technology

[0002] Internal clock sources for chips are typically implemented using oscillators, offering advantages such as small size, low cost, and adjustability. Due to variations in chip manufacturing processes, before a chip can be put into application, its internal oscillator requires precise calibration to ensure its frequency reaches a preset target frequency for normal operation. Related technologies often employ a method of gradually adjusting the internal clock source, resulting in numerous beneficial frequency calibration values ​​(TFINEs) and lengthy calibration times, leading to high calibration costs. Therefore, effectively reducing the calibration time and cost of internal clock sources is a current research focus. Furthermore, the oscillator's output clock frequency is also affected by chip temperature. Obtaining optimal temperature compensation (TKT) and frequency calibration TFINEs for chip calibration, ensuring the chip outputs a calibrated clock within its operating temperature range, is a key concern. Summary of the Invention

[0003] Based on the above problems, this invention proposes a method and system for calibrating the internal clock frequency of a chip, aiming to solve the technical problems of long calibration parameter determination time and high cost in the prior art.

[0004] A method for calibrating the internal clock frequency of a chip, comprising:

[0005] Step A1: When the chip temperature is at the first preset temperature, a control parameter group is formed based on preset rules and written into the clock oscillation module inside the chip. A series of candidate parameter groups are selected from the written control parameter group, and the clock frequency output by the clock oscillation module in response to each candidate parameter group is obtained as the first clock frequency.

[0006] Step A2: When the chip temperature is at at least one second preset temperature, obtain the clock frequency output by the clock oscillation module in response to each candidate parameter group, and use it as the second clock frequency.

[0007] Step A3: The first clock frequency and the second clock frequency corresponding to each candidate parameter group are used as a frequency array to form a series of frequency arrays;

[0008] Step A4: Select one set of frequency arrays from the series of frequency arrays, and use the candidate parameter group corresponding to the selected frequency array as the calibration data of the clock oscillation module.

[0009] Step A5: Save the calibration data to the clock oscillation module to calibrate the clock oscillation module.

[0010] Furthermore, each control parameter group includes temperature compensation values ​​and frequency calibration values.

[0011] Furthermore, the temperature compensation value belongs to one of the temperature compensation arrays, and the frequency calibration value belongs to one of the frequency calibration arrays;

[0012] Step A1 includes:

[0013] Step A11: For each temperature compensation value in the temperature compensation array, select the frequency calibration value in the frequency calibration array that makes the clock frequency output by the clock oscillation module closest to the target frequency as the candidate frequency calibration value.

[0014] Step A12: Each temperature compensation value and its corresponding candidate frequency calibration value are used as a candidate parameter group, thereby forming a series of candidate parameter groups.

[0015] Furthermore, the frequency calibration array is an ordered array of frequency calibration values ​​arranged in ascending order; step A11 includes:

[0016] Step A111: Fix the temperature compensation value, use the binary search method to obtain the last frequency calibration value close to the target frequency and the corresponding output clock frequency, and at the same time retain the second to last frequency calibration value close to the target frequency and the corresponding output clock frequency from the binary search method.

[0017] Step A112: Determine the clock frequency that is closer to the target frequency between the clock frequency output corresponding to the last frequency calibration value and the clock frequency output of the second-to-last frequency calibration value.

[0018] Step A113: Select the frequency calibration value corresponding to the clock frequency that is closer to the target frequency as the candidate frequency calibration value.

[0019] Furthermore, the first preset temperature is 25 degrees Celsius.

[0020] Furthermore, it has two second preset temperatures: 125 degrees Celsius and -45 degrees Celsius.

[0021] Furthermore, step A4 includes:

[0022] Step A41: Calculate the absolute value of the difference between each pair of frequencies in each frequency array, and sum the absolute values ​​of the differences between each pair of frequencies.

[0023] Step A42: The frequency group with the smallest sum of absolute values ​​of the differences between any two frequencies is retained as the selected frequency group.

[0024] A calibration system for the internal clock frequency of a chip, characterized in that it uses the aforementioned calibration method for the internal clock frequency of a chip, comprising:

[0025] The internal clock oscillation module of the chip is used to respond to the internal control parameter set and output a clock frequency corresponding to the control parameter set;

[0026] The test subsystem, connected to the clock oscillation module, is used for:

[0027] When the chip temperature is at the first preset temperature, a control parameter group is formed based on preset rules and written to the clock oscillation module. A sequence of candidate parameter groups is selected from the written control parameter group, and the clock frequency output by the clock oscillation module in response to each candidate parameter group is obtained as the first clock frequency.

[0028] When the chip temperature is at at least one second preset temperature, the clock frequency output by the clock oscillation module in response to each candidate parameter group is obtained as the first clock frequency.

[0029] The first clock frequency and the second clock frequency corresponding to each candidate parameter group are used as a frequency array to form a series of frequency arrays;

[0030] Select one frequency array from the series of frequency arrays, and use the candidate parameter group corresponding to the selected frequency array as the calibration data of the clock oscillation module;

[0031] The calibration data is written into the clock oscillation module.

[0032] Furthermore, each control parameter group includes temperature compensation values ​​and frequency calibration values.

[0033] Furthermore, the temperature compensation value belongs to one of the temperature compensation arrays, and the frequency calibration value belongs to one of the frequency calibration arrays;

[0034] The test subsystem is used for:

[0035] For each temperature compensation value in the temperature compensation array, select the frequency calibration value in the frequency calibration array that makes the clock frequency output by the clock oscillation module closest to the target frequency as the candidate frequency calibration value.

[0036] Each temperature compensation value and its corresponding candidate frequency calibration value are used as a candidate parameter group, thus forming a series of candidate parameter groups.

[0037] The beneficial technical effect of the present invention is that, firstly, some candidate control parameter groups and corresponding output clock frequencies are obtained at a first preset temperature, and then the output clock frequencies corresponding to these control parameter groups are obtained at multiple different second preset temperatures. Frequency groups are filtered, and candidate parameter groups corresponding to frequency groups whose clock frequencies do not change significantly at each preset temperature are obtained as calibration data. The calibration data selected in this way can make the clock frequency of the chip close to the target frequency under different operating temperatures, thereby improving the calibration accuracy and speed of the clock frequency and improving the mass production efficiency of the chip. Attached Figure Description

[0038] Figure 1-4 This is a flowchart illustrating the steps of a chip internal clock frequency calibration method according to the present invention.

[0039] Figure 5 This is a flowchart illustrating the steps of an internal clock frequency calibration system for a chip according to the present invention. Detailed Implementation

[0040] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0041] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0042] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but this is not intended to limit the scope of the invention.

[0043] See Figure 1 The present invention provides a method for calibrating the internal clock frequency of a chip, comprising:

[0044] Step A1: When the chip temperature is at the first preset temperature, a control parameter group is formed based on preset rules and written into the clock oscillation module inside the chip. A series of candidate parameter groups are selected from the written control parameter group, and the clock frequency output by the clock oscillation module in response to each candidate parameter group is obtained as the first clock frequency.

[0045] Step A2: When the chip temperature is at at least one second preset temperature, obtain the clock frequency output by the clock oscillation module in response to each candidate parameter group, and use it as the second clock frequency.

[0046] Step A3: The first clock frequency and the second clock frequency corresponding to each candidate parameter group are used as a frequency array to form a series of frequency arrays;

[0047] Step A4: Select one set of frequency arrays from the series of frequency arrays, and use the candidate parameter group corresponding to the selected frequency array as the calibration data of the clock oscillation module.

[0048] Step A5: Save the calibration data to the clock oscillation module to calibrate the clock oscillation module.

[0049] Furthermore, each control parameter group includes temperature compensation values ​​and frequency calibration values.

[0050] Furthermore, the temperature compensation value belongs to one of the temperature compensation arrays, and the frequency calibration value belongs to one of the frequency calibration arrays.

[0051] Due to the influence of various factors such as process technology and temperature, in addition to the frequency calibration value, the chip also involves temperature parameters. Temperature compensation and frequency calibration values ​​are used as control parameter sets and written into the clock oscillation module to adjust its output clock frequency. The temperature compensation array contains a series of temperature compensation values, and the frequency calibration array contains a series of frequency calibration values. These are combined into several control parameter sets, with several sets available at each temperature. Several output clock frequencies are obtained by applying different temperatures to the chip and repeatedly measuring the output clock frequency corresponding to each control parameter set at different temperatures. This process involves a large amount of computation and a long time to determine the calibration data. Therefore, this invention selects a series of candidate parameter sets at one temperature, then uses these candidate parameter sets to write the clock oscillation tube of the chip at another temperature. The obtained clock frequencies are compared, and the candidate parameter set whose output clock frequency is close to the target frequency over a large temperature range is selected as the calibration data. This set of calibration data ensures that the output clock frequency of the chip's clock oscillation module is always close to the target frequency at different operating temperatures. This method reduces the amount of computation and the computation time.

[0052] Specifically, the output clock frequency of the clock oscillation module can be measured using a frequency counter.

[0053] See Figure 2 Step A1 includes:

[0054] Step A11: For each temperature compensation value in the temperature compensation array, select the frequency calibration value in the frequency calibration array that makes the clock frequency output by the clock oscillation module closest to the target frequency as the candidate frequency calibration value.

[0055] Step A12: Each temperature compensation value and its corresponding candidate frequency calibration value are used as a candidate parameter group, thereby forming a series of candidate parameter groups.

[0056] When screening candidate parameter groups, a temperature compensation value is first fixed, and the frequency calibration value is used as a variable to obtain the output clock frequency of each clock oscillation module. The output clock frequency that is closest to the target frequency is compared, and the corresponding frequency calibration value is used as the candidate frequency calibration value. The temperature compensation value and the candidate frequency calibration value are used as a candidate parameter group. For each temperature compensation value, the corresponding candidate frequency calibration value is screened, thus forming a series of candidate parameter groups. In this series of candidate parameter groups, each candidate parameter group consists of a temperature compensation value and a candidate frequency calibration value under the temperature compensation value.

[0057] The number of candidate parameter groups is the same as the number of temperature compensation values ​​in the temperature compensation array.

[0058] Preferably, the temperature compensation array contains 64 integers from 0 to 63.

[0059] Preferably, the frequency calibration array contains 512 integers from 0 to 511.

[0060] Furthermore, in step A11, the frequency calibration value in the frequency calibration array that makes the clock frequency output by the clock oscillation module closest to the target frequency is selected as the candidate frequency calibration value using the binary search method.

[0061] See Figure 3 Specifically, the frequency calibration array is an ordered array of frequency calibration values ​​arranged in ascending order. Step A11 includes:

[0062] Step A111: Fix the temperature compensation value, use the binary search method to obtain the last frequency calibration value close to the target frequency and the corresponding output clock frequency, and retain the second to last frequency calibration value close to the target frequency and the corresponding output clock frequency in the binary search method.

[0063] Step A112: Determine the clock frequency that is closer to the target frequency between the clock frequency output corresponding to the last frequency calibration value and the clock frequency output of the second-to-last frequency calibration value.

[0064] Step A113: Select the frequency calibration value corresponding to the clock frequency that is closer to the target frequency as the candidate frequency calibration value.

[0065] A binary search method is used to obtain candidate frequency calibration values. With a fixed temperature compensation value, an intermediate value is selected to obtain the output clock frequency of the clock oscillation module. If the output clock frequency corresponding to the intermediate value is greater than the target frequency, another intermediate value is selected from the values ​​below the intermediate value in the frequency calibration array. If the output clock frequency corresponding to the intermediate value is less than the target frequency, another intermediate value is selected from the values ​​above the intermediate value in the frequency calibration array. This process continues to observe the proximity between the output clock frequency and the target frequency, and the intermediate value is selected cyclically using the binary search method to obtain the last frequency calibration value and its corresponding output clock frequency. Generally, the last value obtained from the binary search is the optimal value. However, in frequency calibration, because the last two frequency calibration values ​​in the binary search method are always adjacent, there may be situations where the clock frequency calibrated by the last frequency calibration value just crosses the target frequency (i.e., the clock frequency calibrated by the second-to-last frequency calibration value is greater than the target frequency, and the clock frequency calibrated by the last frequency calibration value is less than the target frequency). This invention, based on the binary search method, performs an additional judgment, backing up the second-to-last frequency calibration value and its calibrated clock frequency during the binary search calibration process. The system determines which value corresponds to the clock frequency closest to the target frequency and selects the value closest to the target frequency as the optimal value. This improves both the calibration speed and the calibration accuracy.

[0066] Furthermore, the first preset temperature is 25 degrees Celsius.

[0067] Furthermore, it has two second preset temperatures: 125 degrees Celsius and -45 degrees Celsius.

[0068] The first preset temperature can be room temperature, such as 25 degrees Celsius. The second preset temperature consists of one high temperature and one low temperature. The second clock frequency is measured at both the high and low temperatures. Further details can be found in [link to documentation]. Figure 4 Step A4 includes:

[0069] Step A41: Calculate the absolute value of the difference between each pair of frequencies in each frequency array, and sum the absolute values ​​of the differences between each pair of frequencies.

[0070] Step A42: The frequency group with the smallest sum of absolute values ​​of the differences between any two frequencies is retained as the selected frequency group.

[0071] If the sum of the absolute values ​​of the differences between any two clock frequencies between the first and second clock frequencies is the smallest, then after calibrating the chip clock oscillation module according to the candidate parameter set corresponding to this set of frequency arrays, the output clock frequencies obtained at high temperature, low temperature and room temperature are not significantly different and are relatively stable.

[0072] See Figure 5The present invention also provides a calibration system for the internal clock frequency of a chip, using the aforementioned calibration method for the internal clock frequency of a chip, comprising:

[0073] The internal clock oscillation module (1) of the chip is used to respond to the internal control parameter group and output the clock frequency corresponding to the control parameter group;

[0074] The test subsystem (2) is connected to the clock oscillation module (1) and is used for:

[0075] When the chip temperature is at the first preset temperature, a control parameter group is formed based on preset rules and written to the clock oscillation module. A sequence of candidate parameter groups is selected from the written control parameter group, and the clock frequency output by the clock oscillation module in response to each candidate parameter group is obtained as the first clock frequency.

[0076] When the chip temperature is at at least one second preset temperature, the clock frequency output by the clock oscillation module in response to each candidate parameter group is obtained as the first clock frequency.

[0077] The first clock frequency and the second clock frequency corresponding to each candidate parameter group are used as a frequency array to form a series of frequency arrays;

[0078] Select one frequency array from the series of frequency arrays, and use the candidate parameter group corresponding to the selected frequency array as the calibration data of the clock oscillation module;

[0079] The calibration data is written into the clock oscillation module.

[0080] Furthermore, each control parameter group includes temperature compensation values ​​and frequency calibration values.

[0081] Furthermore, the temperature compensation value belongs to one of the temperature compensation arrays, and the frequency calibration value belongs to one of the frequency calibration arrays;

[0082] The test subsystem is used for:

[0083] For each temperature compensation value in the temperature compensation array, select the frequency calibration value in the frequency calibration array that makes the clock frequency output by the clock oscillation module closest to the target frequency as the candidate frequency calibration value.

[0084] Each temperature compensation value and its corresponding candidate frequency calibration value are used as a candidate parameter group, thus forming a series of candidate parameter groups.

[0085] The above are merely preferred embodiments of the present invention and are not intended to limit the implementation methods and protection scope of the present invention. Those skilled in the art should recognize that any equivalent substitutions and obvious changes made based on the description and illustrations of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for calibrating the internal clock frequency of a chip, characterized in that, include: Step A1: When the temperature of the chip is at the first preset temperature, a control parameter group is formed based on preset rules and written into the clock oscillation module inside the chip. A series of candidate parameter groups are selected from the written control parameter group, and the clock frequency output by the clock oscillation module in response to each candidate parameter group is obtained as the first clock frequency. Step A2: When the temperature of the chip is at at least one second preset temperature, obtain the clock frequency output by the clock oscillation module in response to each candidate parameter group, and use it as the second clock frequency. Step A3: The first clock frequency and the second clock frequency corresponding to each candidate parameter group are used as a frequency array to form a series of frequency arrays; Step A4: Select one set of frequency arrays from the series of frequency arrays, and use the candidate parameter group corresponding to the selected frequency array as the calibration data of the clock oscillation module; Step A5: Save the calibration data to the clock oscillation module to calibrate the clock oscillation module; Each of the control parameter groups includes a temperature compensation value and a frequency calibration value; The temperature compensation value belongs to one of the temperature compensation arrays, and the frequency calibration value belongs to one of the frequency calibration arrays; Step A1 includes: Step A11: For each temperature compensation value in the temperature compensation array, select the frequency calibration value in the frequency calibration array that makes the clock frequency output by the clock oscillation module closest to the target frequency as a candidate frequency calibration value. Step A12: Each temperature compensation value and the corresponding candidate frequency calibration value are used as a candidate parameter group to form a series of candidate parameter groups; The frequency calibration array is an ordered array of frequency calibration values ​​arranged in ascending order; Step A11 includes: Step A111: Fix the temperature compensation value, use the binary search method to obtain the last frequency calibration value close to the target frequency and the corresponding output clock frequency, and retain the second to last frequency calibration value close to the target frequency in the binary search method and the corresponding output clock frequency. Step A112: Determine the clock frequency that is closer to the target frequency between the clock frequency output corresponding to the last frequency calibration value and the clock frequency output by the second-to-last frequency calibration value. Step A113: The frequency calibration value corresponding to the clock frequency that is closer to the target frequency is selected as the candidate frequency calibration value.

2. The method for calibrating the internal clock frequency of a chip as described in claim 1, characterized in that, The first preset temperature is 25 degrees Celsius.

3. The method for calibrating the internal clock frequency of a chip as described in claim 1, characterized in that, It has two second preset temperatures: 125 degrees Celsius and -45 degrees Celsius.

4. The method for calibrating the internal clock frequency of a chip as described in claim 1, characterized in that, Step A4 includes: Step A41: Calculate the absolute value of the difference between each pair of frequencies in each frequency array, and sum the absolute values ​​of the differences between each pair of frequencies; Step A42: The frequency group with the smallest sum of absolute values ​​of the differences between any two frequencies is retained as the selected frequency group.

5. A calibration system for the internal clock frequency of a chip, characterized in that, A method for calibrating the internal clock frequency of a chip as described in any one of claims 1-4 includes: The internal clock oscillation module of the chip is used to respond to the internal control parameter group and output a clock frequency corresponding to the control parameter group; The test subsystem, connected to the clock oscillation module, is used for: When the temperature of the chip is at a first preset temperature, a control parameter group is formed based on a preset rule and written into the clock oscillation module. A sequence of candidate parameter groups is selected from the written control parameter group, and the clock frequency output by the clock oscillation module in response to each candidate parameter group is obtained as the first clock frequency. When the temperature of the chip is at at least one second preset temperature, the clock frequency output by the clock oscillation module in response to each candidate parameter group is obtained as the first clock frequency. The first clock frequency and the second clock frequency corresponding to each candidate parameter group are used as a frequency array to form a series of frequency arrays; Select one set of frequency arrays from the series of frequency arrays, and use the candidate parameter group corresponding to the selected frequency array as the calibration data of the clock oscillation module; The calibration data is written into the clock oscillation module.

6. The chip internal clock frequency calibration system as described in claim 5, characterized in that, Each set of control parameters includes temperature compensation values ​​and frequency calibration values.

7. The chip internal clock frequency calibration system as described in claim 6, characterized in that, The temperature compensation value belongs to one of the temperature compensation arrays, and the frequency calibration value belongs to one of the frequency calibration arrays; The testing subsystem is used for: For each temperature compensation value in the temperature compensation array, the frequency calibration value in the frequency calibration array that makes the clock frequency output by the clock oscillation module closest to the target frequency is selected as the candidate frequency calibration value. Each temperature compensation value and its corresponding candidate frequency calibration value are used as a candidate parameter group to form a series of candidate parameter groups.

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