Voltage generating circuit

Abstract

Embodiments provide a voltage generating circuit that adjusts a temperature dependence characteristic. According to one embodiment, the voltage generating circuit generates a first current having a first temperature dependence characteristic in which a current value varies with a prescribed variation of temperature, and a second current having a second temperature dependence characteristic different from the first temperature dependence characteristic. The voltage generating circuit includes a first variable resistor and a second variable resistor connected in series. The second current flows through the first variable resistor, and a third current flows through the second variable resistor, the third current having a current value based on a difference between the current value of the first current and the current value of the second current.

Description

[0001] Cross-reference to related applications

[0002] This application is based on and claims priority to Japanese Patent Application No. 2021-202823, filed December 14, 2021, and U.S. Patent Application No. 17 / 898841, filed August 30, 2022, the entire contents of which are incorporated herein by reference. Technical Field

[0003] In summary, the implementation methods described herein relate to voltage generating circuits. Background Technology

[0004] Semiconductor devices may include elements whose characteristics change with temperature. To compensate for the temperature dependence of such elements, a voltage generating circuit capable of regulating the temperature dependence is needed. Summary of the Invention

[0005] One implementation provides a voltage generating circuit in which temperature-dependent characteristics are adjusted.

[0006] Generally, according to one embodiment, a voltage generating circuit generates a first current and a second current. The first current exhibits a first temperature-dependent characteristic, whereby its value varies with a predetermined temperature. The second current exhibits a second temperature-dependent characteristic, distinct from the first temperature-dependent characteristic. The voltage generating circuit includes a first variable resistor and a second variable resistor connected in series. A second current flows through the first variable resistor, and a third current flows through the second variable resistor, the third current having a current value based on the difference between the values ​​of the first and second currents. Attached Figure Description

[0007] Figure 1 This is a block diagram illustrating the configuration of a semiconductor memory device according to an embodiment.

[0008] Figure 2 This is a circuit diagram showing the configuration of the voltage generating circuit according to the first embodiment.

[0009] Figure 3 This is a conceptual diagram showing the configuration of the voltage generating circuit according to the first embodiment.

[0010] Figure 4 This is a diagram showing the electrical characteristics of the voltage generating circuit according to the first embodiment.

[0011] Figure 5 This is a circuit diagram showing the configuration of the voltage generating circuit according to the second embodiment.

[0012] Figure 6This is a conceptual diagram showing the configuration of the voltage generating circuit according to the second embodiment.

[0013] Figure 7 This is a circuit diagram showing the configuration of the voltage generating circuit according to the third embodiment.

[0014] Figure 8 This is a conceptual diagram showing the configuration of the voltage generating circuit according to the third embodiment.

[0015] Figure 9 This is a circuit diagram showing the configuration of the voltage generating circuit according to the fourth embodiment.

[0016] Figure 10 This is a conceptual diagram showing the configuration of the voltage generating circuit according to the fourth embodiment.

[0017] Figure 11 This is a circuit diagram showing the configuration of the voltage generating circuit according to the fifth embodiment.

[0018] Figure 12 This is a conceptual diagram showing the configuration of the voltage generating circuit according to the fifth embodiment.

[0019] Figure 13 This is a circuit diagram showing the configuration of the voltage generating circuit according to the sixth embodiment.

[0020] Figure 14 This is a conceptual diagram showing the configuration of the voltage generating circuit according to the sixth embodiment.

[0021] Figure 15 This is a circuit diagram showing the configuration of the voltage generating circuit according to the seventh embodiment.

[0022] Figure 16 This is a conceptual diagram showing the configuration of the voltage generating circuit according to the seventh embodiment.

[0023] Figure 17 This is a conceptual diagram showing the configuration of the voltage generating circuit according to the seventh embodiment.

[0024] Figure 18 This is a conceptual diagram showing the configuration of the voltage generating circuit according to the eighth embodiment.

[0025] Figure 19 This is a conceptual diagram showing the configuration of the voltage generating circuit according to the eighth embodiment. Detailed Implementation

[0026] The voltage generating circuit according to embodiments will be described in detail below with reference to the accompanying drawings. In the following description, elements having substantially the same function and configuration are designated using the same reference numerals and are described repeatedly only when necessary. Each embodiment described below illustrates an apparatus and method for embodying the technical concept of that embodiment. The technical concept of the embodiments is not limited to the materials, shapes, structures, arrangements, etc., of the elements described later. The technical concept of the embodiments can be obtained by adding various modifications to the scope of the claims.

[0027] Provided there are no technical incompatibilities, the following implementation methods can be combined with each other.

[0028] 1. First Implementation Method

[0029] Reference Figure 1 A memory system in which a voltage generating circuit according to an embodiment is implemented is described. This memory system includes, for example, a non-volatile memory that is a semiconductor memory device and a memory controller that controls the non-volatile memory.

[0030] 1-1 Configuration of Semiconductor Storage Devices

[0031] Reference Figure 1 An example configuration of a semiconductor memory device according to a first embodiment is described. For example... Figure 1 As shown, the semiconductor memory device 10 includes a memory cell array 21, an input / output circuit 22, a ZQ calibration circuit 23, a logic control circuit 24, a temperature sensor 25, a register 26, a sequencer 27, a voltage generator circuit 28, a driver group 29, a line decoder 30, a sense amplifier 31, an input / output circuit pad group 32, a ZQ calibration pad 33, and a logic control pad group 34.

[0032] The memory cell array 21 includes multiple non-volatile memory cells associated with word lines and bit lines.

[0033] Input / output circuit 22 sends data signals (DQ) to the memory controller. <0> To DQ <7> The input / output circuit 22 sends the command and address in the data signals to the register 26. The input / output circuit 22 sends write data and read data to the sense amplifier 31, and receives write data and read data from the sense amplifier 31.

[0034] The ZQ calibration circuit 23 calibrates the output impedance of the semiconductor memory device 10 based on a reference resistor via the ZQ calibration pad 33.

[0035] The logic control circuit 24 receives signals from the memory controller, such as the chip enable signal (BCE), command latch enable signal (CLE), address latch enable signal (ALE), write enable signal (BWE), read enable signal (RE), inverted read enable signal (BRE), and write protect signal (BWP). The logic control circuit 24 sends a ready busy signal (BRB) to the memory controller to notify the outside world of the status of the semiconductor memory device 10.

[0036] Temperature sensor 25 has the function of measuring the internal temperature of semiconductor memory device 10. Temperature sensor 25 sends information about the measured temperature to sequencer 27. Temperature sensor 25 is located at any location inside semiconductor memory device 10, within a range that can be considered capable of measuring the temperature of memory cell array 21.

[0037] Register 26 stores commands and addresses. Register 26 sends addresses to line decoder 30 and readout amplifier 31, and sends commands to sequencer 27.

[0038] The sequencer 27 receives commands and controls the entire semiconductor memory device 10 according to the sequence of received commands. The sequencer 27 sends temperature information received from the temperature sensor 25 to the memory controller via the input / output circuit 22.

[0039] The voltage generating circuit 28 generates the voltage required for operations such as write, read, and erase operations on the data, based on instructions from the sequencer 27. Details will be described later, and the voltage generating circuit 28 generates an appropriate voltage relative to the temperature measured by the temperature sensor 25 while generating the voltage. The voltage generating circuit 28 provides the generated voltage to the driver assembly 29.

[0040] Driver group 29 includes multiple drivers and supplies voltage from voltage generation circuit 28 to row decoder 30 and sense amplifier 31 based on the address from register 26. Driver group 29 supplies voltage to row decoder 30 based on, for example, the row address in the address.

[0041] The row decoder 30 receives the row address from the address in register 26 and selects a row of memory cells based on the row address. The voltage from the driver group 29 is applied to the selected row of memory cells via the row decoder 30.

[0042] During a data read operation, the read amplifier 31 senses the read data read from the memory cell to the bit line and sends the sensed read data to the input / output circuit 22. During a data write operation, the read amplifier 31 sends the write data written via the bit line to the memory cell. The read amplifier 31 receives the column address from the address in the register 26 and outputs the data column based on the column address.

[0043] Data signal DQ received from the memory controller <0> To DQ <7> Signals DQS and BDQS are sent to input / output circuit 22 via input / output circuit pad group 32. Data signal DQ is sent from input / output circuit 22. <0> To DQ <7> It is sent to the outside of the semiconductor memory device 5 via the input / output circuit pad group 32.

[0044] One end of the ZQ calibration pad 33 is connected to the reference resistor, and the other end is connected to the ZQ calibration circuit 23.

[0045] Signals BCE, CLE, ALE, BWE, RE, BRE, and BWP received from the memory controller are sent to the logic control circuit 24 via logic control pad group 34. Signal BRB sent from the logic control circuit 24 is sent to the memory controller via logic control pad group 34.

[0046] 1-2. Configuration of the voltage generating circuit

[0047] Figure 2 This is a circuit diagram showing the configuration of a voltage generating circuit according to an embodiment. In the following description, a voltage having a temperature-dependent characteristic that increases with increasing temperature is referred to as "voltage V". PTAT A voltage that exhibits a temperature-dependent characteristic, where the voltage does not change with temperature, is called a "voltage V". FLAT A voltage that exhibits a temperature-dependent characteristic, where the voltage decreases as temperature increases, is called a "voltage V". CTAT ".

[0048] Based on voltage V PTAT The current that generates and exhibits a temperature-dependent characteristic that its value increases with increasing temperature is called "current I". PTAT Based on voltage V FLAT A current that generates a temperature-dependent characteristic in which its value does not change with temperature is called "current I". FLAT Based on voltage V CTAT The current that generates and exhibits a temperature-dependent characteristic where its value decreases with increasing temperature is called "current I". CTAT ".

[0049] In the following description, the current supplied to the circuit (e.g., the current input to an input terminal provided in the circuit) can be a current I.PTAT or current I CTAT Therefore, when there is no need to specifically distinguish the current I... PTAT and current I CTAT At this time, the current can be called "current I". P / C ".

[0050] The voltage generating circuit 28 includes a first current generating circuit G1, a second current generating circuit G2, multiple current mirror circuits, a first variable resistor R3, a second variable resistor R4, and an output terminal V. OUT A first power supply line VDD and a second power supply line VSS are connected. A first current generating circuit G1, a second current generating circuit G2, and multiple current mirror circuits are arranged between the first power supply line VDD and the second power supply line VSS.

[0051] A high voltage (which may be referred to as the first power supply voltage) is supplied to the first power supply line VDD. A low voltage (which may be referred to as the second power supply voltage) is supplied to the second power supply line VSS. In the following embodiments, the second power supply line VSS is shown as ground potential, but any fixed voltage may be provided.

[0052] When the voltage V FLAT When the current is input to the input terminal of the first current generating circuit G1, the first current generating circuit G1 generates a current I. FLAT The voltage value input to the input terminal of the first current generating circuit G1 is V1. The resistance value of the resistive element in the first current generating circuit G1 is R1.

[0053] When the voltage V PTAT or voltage V CTAT When the input is applied to the input terminal of the second current generating circuit G2, the second current generating circuit G2 generates a current I. PTAT or current I CTAT (current I) P / C The voltage value input to the input terminal of the second current generating circuit G2 is V2. The resistance value of the resistive element in the second current generating circuit G2 is R2.

[0054] The configuration of the first current generating circuit G1 and the second current generating circuit G2 is merely an example and is not limited to this. Figure 2 The configuration shown is as follows. The first current generating circuit G1 can be any circuit, as long as it can provide a current (current I) with a temperature-dependent characteristic that the current value does not change with temperature. FLAT And it can be replaced by another circuit. The second current generating circuit G2 can be any circuit, as long as it can provide a current (current I) with a temperature-dependent characteristic that the current value changes with temperature. P / C And it can be replaced by another circuit.

[0055] In other words, the voltage generating circuit 28 generates a current I with a temperature-dependent characteristic (hereinafter referred to as the first temperature-dependent characteristic) that changes with a specified temperature. PTAT or current I CTAT And a current I having a temperature dependence characteristic different from the first temperature dependence characteristic (hereinafter referred to as the second temperature dependence characteristic). FLAT The first temperature-dependent characteristic is that the current value increases with increasing temperature (current I). PTAT ) or reduce (current I) CTAT The second temperature-dependent characteristic is that the current value does not change with temperature (current I). FLAT Temperature dependence characteristics of current I. FLAT It can have a temperature-dependent characteristic where the current does not change with temperature at all, and it can have a characteristic similar to that of the current I. PTAT and current I CTAT Compared to the changes in temperature, its temperature dependence is so small as to be negligible.

[0056] Each current mirror circuit includes a pair of transistors whose gate terminals are connected. Figure 2 The multiple current mirror circuits shown include transistors T1 through T10. The transistors are all the same size. Transistor T7 is indicated by "×2", meaning two transistors are connected in parallel. Transistors T1 through T3, T5, T7, and T9 are p-type transistors. Transistors T4, T6, T8, and T10 are n-type transistors.

[0057] The first current generating circuit G1 and transistor T1 are connected in series between the first power line VDD and the second power line VSS. The second current generating circuit G2 and transistor T2 are connected in series between the first power line VDD and the second power line VSS. Transistors T3 and T4 are connected in series between the first power line VDD and the second power line VSS. Transistors T5 and T6 are connected in series between the first power line VDD and the second power line VSS. Transistors T7 and T8 are connected in series between the first power line VDD and the second power line VSS. Transistor T9, the second variable resistor R4, and the first variable resistor R3 are connected in series between the first power line VDD and the second power line VSS. Transistors T9 and T10 are connected in series between the first power line VDD and the second power line VSS.

[0058] The node between the first variable resistor R3 and the second variable resistor R4 is called the first node N1. The node between transistor T9 and the second variable resistor R4 is called the second node N2. The first variable resistor R3, the second variable resistor R4, and transistor T10, which are connected in series with each other, are connected at the second node N2 (or the output terminal V). OUT It is connected in parallel with the second power line VSS.

[0059] A pair of transistors T1 and T5, and a pair of transistors T2 and T7, each form a current mirror circuit. When the current generated by the first current generating circuit G1 and flowing through transistor T1 is current I... FLAT At that time, the current flowing through transistor T5 is also current I. FLAT When the current flowing through transistor T1 is current I... FLAT At that time, the current flowing through transistor T7 is current I. FLAT Twice the current (2×I) FLAT ).

[0060] In this embodiment, the current flowing through transistor T7 is current I. FLAT The current could be twice that of transistor T7, but this disclosure is not limited to this configuration. For example, the current flowing through transistor T7 could be current I. FLAT n times the current (n×I) FLAT (n is a positive number excluding 1).

[0061] The value of n is not limited to an integer; it can include a decimal. In this embodiment, since the number of transistors T7 is twice the number of transistors T1, the current flowing through transistor T7 is current I. FLAT Twice the number of transistors. The value of n can include a decimal by adjusting the ratio of the number of transistors T7 to the number of transistors T1. For example, when two transistors are connected in parallel as transistor T1 and five transistors are connected in parallel as crystal transistor T7, n is 2.5, and the current flowing through crystal transistor T8 is current I. FLAT 2.5 times the current (2.5×I) FLAT ).

[0062] A pair of transistors T2 and T3, and a pair of transistors T1 and T9, each form a current mirror circuit. The current generated by the second current generating circuit G2 and flowing through transistor T2 is current I. P / C At that time, the current flowing through transistors T3 and T9 respectively is also current I. P / C .

[0063] When the current flowing through transistor T3 is current I P / C At that time, the current flowing through transistor T4, which is connected in series with transistor T3, is also current I. P / C A pair of transistors T4 and T8 form a current mirror circuit. When the current flowing through transistor T4 is current I... P / C At that time, the current flowing through transistor T8 is also current I. P / C .

[0064] When the current flowing through transistor T5 is current I FLATAt that time, the current flowing through transistor T6, which is connected in series with transistor T5, is also current I. FLAT A pair of transistors T6 and T10 form a current mirror circuit. When the current flowing through transistor T6 is current I... FLAT At that time, the current flowing through transistor T10 is also current I. FLAT .

[0065] Figure 3 This is a conceptual diagram showing the configuration of a voltage generating circuit according to an embodiment. Figure 3 Only the middle part is shown Figure 2 The circuit elements shown include the first variable resistor R3, the second variable resistor R4, and the output terminal V. OUT And other circuit elements are shown as Figure 3 The circuit shown has input and output terminals.

[0066] Figure 2 Transistor T7 in Figure 3 Input terminal V IN7 Correspondingly, Figure 2 transistor T8 in Figure 3 The output terminal V OUT8 Correspondingly, Figure 2 Transistor T9 in Figure 3 Input terminal V IN9 Correspondingly, Figure 2 Transistor T10 in Figure 3 The output terminal V in OUT10 Correspondingly. From input terminal V IN7 Input current 2×I FLAT From input terminal V IN9 Input current I P / C , will current I P / C Output to output terminal V OUT8 , will current I FLAT Output to output terminal V OUT10 .

[0067] like Figure 3 As shown, the first node N1 consists of the first variable resistor R3, the second variable resistor R4, and the input terminal V. IN7 and output terminal V OUT8 The nodes between. The second node N2 is the second variable resistor R4 and the input terminal V. IN9 Output terminal V OUT and output terminal V OUT10 The nodes between. See also Figure 2 Since the second node N2 is connected to the first power supply line VDD via transistor T9, it can be said that the second node N2 is the second variable resistor R4 and the output terminal V. OUTThe node between the first power line VDD and the first power line.

[0068] The voltage generating circuit 28 includes a first path PAS1, a second path PAS2, and a third path PAS3. The first path PAS1 receives voltage from the input terminal V. OUT The path from (or the first power line VDD) to the first node N1 without passing through the second variable resistor R4. The second path PAS2 is from the second node N2 to the output terminal V. OUT10 (Or the second power line VSS) without passing through the second variable resistor R4. The third path PAS3 is from the first node N1 to the output terminal V. OUT8 (Or the second power supply line VSS) without passing through the first variable resistor R3. The current flowing through the first path PAS1 is 2×I. FLAT The current flowing through the third path PAS2 is current I. FLAT And the current flowing through the third path PAS3 is current I. P / C .

[0069] 1-3. Output of the voltage generating circuit

[0070] As described above, due to the current flowing through transistor T7 (from the input terminal V... IN7 The input current is 2×I FLAT The current flowing through transistor T8 (output to output terminal V) OUT8 The current) is "I P / C The current flowing through transistor T9 (from input terminal V) IN9 The input current is "I P / C ", and the current flowing through transistor T10 (output to output terminal V) OUT10 The current) is "I FLAT "Output terminal V" OUT The voltage is calculated as shown in equation (1-1).

[0071] V OUT =R3·(I P / C -I FLAT +2·I FLAT -I P / C )

[0072] +R4·(I P / C -I FLAT )

[0073] =R3·I FLAT +R4·(I P / C -I FLAT (1-1)

[0074] refer to Figure 2 “I P / C” and “I FLAT "It can be represented by the following formula (1-2).

[0075]

[0076]

[0077] By substituting equation (1-2) into equation (1-1), V OUT It can be expressed as the following formula (1-3).

[0078]

[0079] As shown in equation (1-1), the current flowing through the first variable resistor R3 is current I. FLAT The current flowing through the second variable resistor R4 is based on the current I. P / C and current I FLAT The difference in current between them. As shown in equation (1-3), when V2 / R2=V1 / R1 (that is, when I P / C = Current I FLAT At a specific temperature Temp1, the term of R4 is zero.

[0080] 1-4. Electrical characteristics of voltage generating circuit

[0081] Figure 4 This is a diagram illustrating the electrical characteristics of the voltage generating circuit according to an embodiment. For example... Figure 4 As shown, at temperature Temp1 (e.g., 25°C), V OUT The value of varies proportionally with the value of the first variable resistor R3, and the output voltage V OUT With respect to the temperature gradient, in V OUT = (R3 / R1)×V1 is used as a reference, and the output voltage V varies with the value of the second variable resistor R4. OUT The gradient is greater than the initial slope.

[0082] As described above, the output voltage V at temperature Temp1 OUT The absolute value can be adjusted by the value of the first variable resistor R3, and the output voltage V OUT The temperature gradient can be adjusted by the value of the second variable resistor R4. Since the values ​​of the first variable resistor R3 and the second variable resistor R4 can be controlled independently, the output voltage V can be adjusted independently. OUT The absolute value and output voltage V OUT Temperature gradient.

[0083] In this embodiment, transistor T7 has a configuration of two transistors connected in parallel, but this disclosure is not limited to this configuration. For example, the number of transistors connected in parallel can be three or more. Alternatively, the L length (distance between the source and drain) of transistor T7 is the same as the L length of transistor T1, and the W length (width in a direction orthogonal to the L length direction) of transistor T7 can be n times the W length of transistor T1. In this embodiment, since n = 2, therefore, in equation (1-1) "R3·I FLAT The coefficient of 'n' is 1. When the value of n changes, the coefficient changes accordingly, and the effect mentioned above can be obtained.

[0084] In this embodiment, the current I generated by the first current generating circuit G1 FLAT It does not change with temperature, but the first current generating circuit G1 can generate a current that changes with temperature, such as current I. P / C However, in this case, the temperature dependence of the current generated by the first current generating circuit G1 differs from that of the current I generated by the second current generating circuit G2. P / C Temperature-dependent characteristics. In this case, due to I in equation (1-1) FLAT Replace with I P / C Therefore, the effects mentioned above can be achieved.

[0085] 2. Second Implementation Method

[0086] The following will refer to Figure 5 and Figure 6 A voltage generating circuit according to a second embodiment is described. The voltage generating circuit 28A according to the second embodiment is similar to the voltage generating circuit 28 according to the first embodiment. In the following description, descriptions of configurations identical to those of the voltage generating circuit 28 according to the first embodiment will be omitted, and the differences from the voltage generating circuit 28 will be mainly described.

[0087] 2-1 Configuration of Voltage Generating Circuit

[0088] Figure 5 This is a circuit diagram showing the configuration of a voltage generating circuit according to an embodiment. For example... Figure 5 As shown, in the voltage generating circuit 28A, transistors T11 to T13 are used to replace... Figure 2 Transistors T5 to T10 are arranged in the voltage generating circuit 28 shown. Transistors T11 and T12 are p-type transistors. Transistor T13 is an n-type transistor.

[0089] Transistor T11 is placed between the first power line VDD and the first node N1. Transistor T12, the second variable resistor R4, and the first variable resistor R3 are connected in series between the first power line VDD and the second power line VSS. Transistors T12 and T13 are connected in series between the first power line VDD and the second power line VSS. The first variable resistor R3, the second variable resistor R4, and transistor T13, which are connected in series with each other, are connected in parallel to the second node N2 (or the output terminal V). OUT Between the second power line VSS and the second power line.

[0090] A pair of transistors T1 and T12, a pair of transistors T2 and T11, and a pair of transistors T4 and T13 each form a current mirror circuit. In this configuration, the current flowing through transistor T11 is current I. P / C The current flowing through transistor T12 is equal to the voltage I. FLAT The current flowing through transistor T13 is current I. P / C .

[0091] Figure 6 This is a conceptual diagram showing the configuration of a voltage generating circuit according to an embodiment. Figure 5 Transistor T11 in the middle corresponds to Figure 6 Input terminal V IN11 , Figure 5 Transistor T12 in the middle corresponds to Figure 6 Input terminal V IN12 , Figure 5 Transistor T13 in the middle corresponds to Figure 6 The output terminal V in OUT13 From input terminal V IN11 Input current I P / C From input terminal V IN12 Input current I FLAT and will the current I P / C Output to output terminal V OUT13 .

[0092] like Figure 6 As shown, the first node N1 consists of the first variable resistor R3, the second variable resistor R4, and the input terminal V. IN11 The nodes between. The second node N2 is the second variable resistor R4 and the input terminal V. IN12 Output terminal V OUT and output terminal V OUT13 The nodes between. (Reference) Figure 5 Since the second node N2 is connected to the first power supply line VDD via transistor T12, it can be said that the second node N2 is the second variable resistor R4 and the output terminal V. OUT The node between the first power line VDE and the first power line.

[0093] The voltage generating circuit 28A includes a first path PAS1 and a second path PAS2. The first path PAS1 is from the input terminal V. IN11 The path from (or the first power line VDD) to the first node N1 without passing through the second variable resistor R4. The second path PAS2 is from the second node N2 to the output terminal V. OUT13 (Or the second power supply line VSS) without passing through the second variable resistor R4. The current flowing through each of the first path PAS1 and the second path PAS2 is current I. P / C .

[0094] 2-2. Output of the voltage generating circuit

[0095] As described above, due to the current flowing through transistor T11 (from the input terminal V) IN11 The input current is "I P / C The current flowing through transistor T12 (from input terminal V) IN12 The input current is "I FLAT The current flowing through transistor T13 (output to output terminal V) OUT13 The current) is "I P / C "Output terminal V" OUT The voltage is calculated as shown in equation (2-1).

[0096] V OUT =R3·(I FLAT -I P / C +I P / C )+R4,(I FLAT -I P / C )

[0097] =R3·I FLAT +R4·(I FLAT -I P / C (2-1)

[0098] As mentioned above, "I P / C ” and “I FLAT "It can be represented by equation (1-2) described above."

[0099] By substituting equation (1-2) into equation (2-1), V OUT It can be shown in the following formula (2-2).

[0100]

[0101] As shown in equation (2-1), the current flowing through the first variable resistor R3 is current I. FLAT The current flowing through the second variable resistor R4 is based on the current I. P / C and current I FLATThe difference in current between them. As shown in equation (2-2), when V2 / R2 = V1 / R1 is satisfied at a specific temperature Temp1 (i.e., when I P / C = Current I FLAT When (at that time), the terms of R4 are zero.

[0102] Therefore, similar to the voltage generating circuit 28 according to the first embodiment, the voltage generating circuit 28A according to this embodiment can adjust the output voltage V at a specific temperature by adjusting the value of the first variable resistor R3. OUT The absolute value of the voltage V can be adjusted by the value of the second variable resistor R4. OUT The temperature gradient. Since the values ​​of the first variable resistor R3 and the second variable resistor R4 can be controlled independently, the output voltage V can be adjusted independently. OUT The absolute value and output voltage V OUT Temperature gradient.

[0103] 3. Third Implementation Method

[0104] The following will refer to Figure 7 and Figure 8 A voltage generating circuit according to a third embodiment is described. The voltage generating circuit 28B according to the third embodiment is similar to the voltage generating circuit 28 according to the first embodiment. In the following description, the configuration that is the same as that of the voltage generating circuit 28 according to the first embodiment will be omitted, and the differences from the voltage generating circuit 28 will be mainly described.

[0105] 3-1 Configuration of Voltage Generating Circuit

[0106] Figure 7 This is a circuit diagram showing the configuration of a voltage generating circuit according to an embodiment. For example... Figure 7 As shown, in the voltage generating circuit 28B, the setting is... Figure 2 The voltage generating circuit 28 shown is divided into a positive characteristic second current generating circuit G2p and a negative characteristic second current generating circuit G2c. Similarly, the voltage generating circuit 28 is divided into a positive characteristic second current generating circuit G2p and a negative characteristic second current generating circuit G2c. Figure 2 The transistor T2 is divided into transistors T2p and T2c. Furthermore, in this configuration, [the following is omitted as it is not relevant to the main text]. Figure 2 Transistor T3 in the diagram is divided into transistors T3p and T3c. Similarly, [the following is a separate section, likely related to transistor T3]. Figure 2 The transistor T9 is divided into transistors T9p and T9c.

[0107] When the voltage V PTAT When the input is applied to the input terminal of the positive characteristic second current generating circuit G2p, the positive characteristic second current generating circuit G2p generates a current I. PTAT The resistance value of the resistive element in the positive characteristic second current generating circuit G2p is R.2p When the voltage V CTAT When the input is applied to the input terminal of the negative characteristic second current generating circuit G2c, the negative characteristic second current generating circuit G2c generates a current I. CTAT The resistance value of the resistive element in the negative characteristic second current generating circuit G2c is R. 2c .

[0108] Transistors T2p, T2c, T3p, T3c, T9p, and T9c are all p-type transistors.

[0109] A pair of transistors T2p and T3p, and a pair of transistors T1p and T9p, each form a current mirror circuit. The current generated by the positive characteristic second current generating circuit G2p and flowing through transistor T2p is current I. PTAT At that time, the current flowing through transistors T3p and T9p is also current I. PTAT .

[0110] A pair of transistors T2c and T3c, and another pair of transistors T2c and T9c, each form a current mirror circuit. When the current generated by the negative characteristic second current generating circuit G2c and flowing through transistor T2c is current I... CTAT At that time, the current flowing through transistors T3c and T9c is also current I. CTAT .

[0111] Transistors T3p and T3c are connected to transistor T4 via switch SW3. Transistor T4 switches its connection to either transistor T3p or transistor T3c by controlling switch SW3. In other words, the state in which transistors T3p and T4 are connected in series, and the state in which transistors T3c and T4 are connected in series, are switched by switch SW3.

[0112] When switch SW3 selects transistor T3p, the current flowing through transistor T3p is current I. PTAT Therefore, the current flowing through transistor T4, which is connected in series with transistor T3p, is also current I. PTAT Since transistors T4 and T8 form a current mirror circuit, the current flowing through transistor T8 is also the current I. PTAT .

[0113] When switch SW3 selects transistor T3c, the current flowing through transistor T3c is current I. CTAT Therefore, the current flowing through transistor T4, which is connected in series with transistor T3c, is also current I. CTAT Since transistors T4 and T8 form a current mirror circuit, the current flowing through transistor T8 is also the current I. CTAT .

[0114] As described above, the current flowing through transistor T8 is controlled to current I by switch SW3. PTAT or current I CTAT .

[0115] Transistors T9p and T9c are connected to the second variable resistor R4 via switch SW9. By controlling switch SW9, the second variable resistor R4 is connected to either transistor T9p or transistor T9c. That is, the state in which transistor T9p, the second variable resistor R4, and the first variable resistor R3 are connected in series, and the state in which transistor T9c, the second variable resistor R4, and the first variable resistor R3 are connected in series, are switched by switch SW9.

[0116] Switches SW3 and SW9 are interlocked. The switches are controlled such that when switch SW3 selects transistor T3p, switch SW9 selects transistor T9p. The switches are also controlled such that when switch SW3 selects transistor T3c, switch SW9 selects transistor T9c.

[0117] Figure 8 This is a conceptual diagram showing the configuration of a voltage generating circuit according to an embodiment. Figure 8 Only the middle part is shown Figure 7 The circuit elements shown include the first variable resistor R3, the second variable resistor R4, and the output terminal V. OUT And other circuit elements are shown as Figure 8 The circuit shown has input and output terminals. Figure 7 Transistor T7 in Figure 8 Input terminal V IN7 Correspondingly, Figure 7 transistor T8 in Figure 8 The output terminal V in OUT8p and V OUT8c Correspondingly, Figure 7 The transistors T9p and T9c in the middle are Figure 8 Input terminal V IN9p and V IN9c Correspondingly, and Figure 7 Transistor T10 and Figure 8 The output terminal V in OUT10 Correspondingly.

[0118] Input terminal V IN9p and V IN9c Switched by switch SW9. Because switch SW3 is connected to... Figure 7 The transistors T3p and T3c are used, and as mentioned above, the current flowing through transistor T8 is controlled by switching switch SW3, therefore... Figure 8 Lieutenant General Output Terminal V OUT8p and V OUT8cThis is shown as being switched by switch SW3.

[0119] In the following description, switch SW3 is connected to output terminal V. OUT8p And switch SW9 is connected to input terminal V. IN9p This situation is referred to as "during PTAT operation". Simultaneously, switch SW3 is connected to output terminal V. OUT8c And switch SW9 is connected to input terminal V. IN9c This situation is referred to as "during CTAT action".

[0120] like Figure 8 As shown, the voltage generating circuit 28B includes a first path PAS1, a second path PAS2, and a third path PAS3. The first path PAS1 is from the input terminal V... IN7 The path from (or the first power line VDD) to the first node N1 without passing through the second variable resistor R4. The second path PAS2 is from the second node N2 to the output terminal V. OUT10 (Or the second power line VSS) without passing through the second variable resistor R4. The third path PAS3 is from the first node N1 to the output terminal V. OUT8p or V OUT8c (or the second power line VSS) without passing through the first variable resistor R4.

[0121] When switch SW3 is connected to output terminal V OUT8p And switch SW9 is connected to input terminal V. IN9p At that time, from the input terminal V IN7 Input current 2×I FLAT (3), from input terminal V IN9p Input current I PTAT (1) At the output terminal V OUT8p Output current I PTAT (4), and at the output terminal V OUT10 Output current I FLAT (2). Although details will be described later, the current flowing through the first variable resistor R3 will be determined as current I due to the inputs and outputs above. FLAT (5).

[0122] The numbers described in parentheses following the reference numerals indicating the aforementioned currents are used to distinguish currents flowing through different paths. Therefore, the same reference numerals before the parentheses represent the same current value. That is, for example, I... PTAT (1) and I PTAT (4) are currents flowing in different paths, but with the same current value.

[0123] When switch SW3 is connected to output terminal V OUT8cAnd switch SW9 is connected to input terminal V. IN9c At that time, from the input terminal V IN7 Input current 2×I FLAT (3), from input terminal V IN9c Input current I CTAT (6) At the output terminal V OUT8c Output current I CTAT (7), and at the output terminal V OUT10 Output current I FLAT (2). Although details will be described later, the current flowing through the first variable resistor R3 will be determined as current I due to the inputs and outputs above. FLAT (5).

[0124] During the PTAT operation, the current (I) flowing through the first variable resistor R3 R3 ) and the current (I) flowing through the second variable resistor R4 R4 ) are represented by the following equations (3-1) and (3-2) respectively.

[0125] I R4 =I PTAT (1)-I FLAT (2) (3-1)

[0126] I R3 =2×I FLAT (3)+(I PTAT (1)-I FLAT (2))

[0127] -I PTAT (4) (3-2)

[0128] During the CTAT operation, the current (I) flowing through the first variable resistor R3 R3 ) and the current (I) flowing through the second variable resistor R4 R4 The following equations (3-3) and (3-4) represent the values ​​respectively.

[0129] I R4 =I CTAT (6)-I FLAT (2) (3-3)

[0130] I R3 =2×I FLAT (3)+(I CTAT (6)-I FLAT (2))

[0131] -I CTAT (7) (3-4)

[0132] In the case of equation (3-2), I PTATThe item disappeared, leaving only I. FLAT In the case of equation (3-4), I CTAT The item disappeared, leaving only I. FLAT As mentioned above, the remaining I FLAT Called I FLAT (5). That is to say, the current (I) flowing through the first variable resistor R3 R3 During both "PTAT action" and "CTAT action", it is I FLAT (5).

[0133] In other words, "during the PTAT operation", when the current flowing through the second node N2 is current I PTAT (1) When the current flowing through the first path PAS1 is 2 × I, the current is 2 × I. FLAT (3) The current flowing through the second path PAS2 is current I. FLAT (2), and the current flowing through the third path PAS3 is current I. PTAT (4).

[0134] "During the CTAT operation", when the current flowing through the second node N2 is current I CTAT (6) When the current flowing through the first path PAS1 is 2 × I, FLAT (3) The current flowing through the second path PAS2 is current I. FLAT (2), and the current flowing through the third path PAS3 is current I. CTAT (7). The current flowing through the first path PAS1 can be current I. FLAT n times the current (n×I) FLAT (n is a positive number excluding 1).

[0135] 3-2. Output of voltage generating circuit 28B

[0136] During PTAT and CTAT operations, the output terminal V OUT The voltage varies. In each case, the output terminal V is calculated as follows. OUT The voltage.

[0137] 3-2-1 Output of the voltage generation circuit during PTAT operation

[0138] Based on equations (3-1) and (3-2), the voltage V at the output terminal is calculated as shown in equation (3-5). OUT .

[0139] V OUT =R3·I FLAT (5)

[0140] +R4·(I PTAT (1)-IFLAT (2)) (3-5)

[0141] 3-2-2, Output of the voltage generation circuit during CTAT operation

[0142] Based on equations (3-3) and (3-4), the voltage V at the output terminal is calculated as shown in equation (3-6). OUT .

[0143] V oUT =R3·I FLAT (5)

[0144] +R4·(I CTAT (6)-I FLAT (2)) (3-6)

[0145] As shown in equations (3-5) and (3-6), the current flowing through the first variable resistor R3 is current I. FLAT (5) The current flowing through the second variable resistor R4 is based on the current I. PTAT (1) and current I FLAT (2) The difference in current between them, or based on current I CTAT (6) and current I FLAT (2) The difference in current between them. As shown in equation (3-5), when I is at a specific temperature Temp1 PTAT =I FLAT The term R4 is zero. As shown in equation (3-6), when I is at a specific temperature Temp1 CTAT =I FLAT The terms in R4 are zero.

[0146] Therefore, similar to the voltage generating circuit 28 according to the first embodiment, the voltage generating circuit 28B according to this embodiment can adjust the output voltage V at a specific temperature by adjusting the value of the first variable resistor R3. OUT The absolute value of the voltage V can be adjusted by the value of the second variable resistor R4. OUT The temperature gradient. Since the values ​​of the first variable resistor R3 and the second variable resistor R4 can be controlled independently, the output voltage V can be adjusted independently. OUT The absolute value and output voltage V OUT The temperature gradient. Furthermore, by switching switches SW3 and SW9, an output voltage V that increases with increasing temperature can be provided. OUT The output voltage V decreases as temperature increases. OUT .

[0147] 4. Fourth Implementation Method

[0148] Reference Figure 9 and Figure 10 A voltage generating circuit according to a fourth embodiment is described. The voltage generating circuit 28C according to the fourth embodiment is similar to the voltage generating circuit 28B according to the third embodiment. In the following description, descriptions of configurations identical to those of the voltage generating circuit 28B according to the third embodiment will be omitted, and the differences from the voltage generating circuit 28B will be mainly described.

[0149] 4-1. Configuration of voltage generating circuit

[0150] Figure 9 This is a circuit diagram showing the configuration of a voltage generating circuit according to an embodiment. For example... Figure 9 As shown, in the voltage generating circuit 28C, transistors T11 to T13 are provided, replacing the... Figure 7 Transistors T5 to T10 are arranged in the voltage generating circuit 28B shown. Because... Figure 9 Transistors T12 and T13 in Figure 5 Transistors T12 and T13 are identical, so a detailed description will be omitted.

[0151] Transistors T11p and T11c are connected to the first node N1 via switch SW11. The state of transistor T11p connected to the first node N1 and the state of transistor T11c connected to the first node N1 are switched by switch SW11.

[0152] Transistors T11p, T11c, and T12 are p-type transistors. Transistor T13 is an n-type transistor.

[0153] A pair of transistors T2p and T11p form a current mirror circuit. Therefore, when the current generated by the positive characteristic second current generating circuit G2p and flowing through transistor T2p is current I... PTAT When switch SW11 selects transistor T11p, the current flowing through transistor T11p is also current I. PTAT .

[0154] A pair of transistors T2c and T11c form a current mirror circuit. Therefore, when the current generated by the negative characteristic second current generating circuit G2c and flowing through transistor T2c is current I... CTAT When switch SW11 selects transistor T11c, the current flowing through transistor T11c is also current I. CTAT .

[0155] When switch SW3 selects transistor T3p, the current flowing through transistor T3p is current I. PTAT Therefore, the current flowing through transistor T4, which is connected in series with transistor T3p, is also current I. PTATSince transistors T4 and T13 form a current mirror circuit, the current flowing through transistor T13 is also the current I. PTAT .

[0156] When switch SW3 selects transistor T3c, the current flowing through transistor T3c is current I. CTAT Therefore, the current flowing through transistor T4, which is connected in series with transistor T3c, is also current I. CTAT Since transistors T4 and T13 form a current mirror circuit, the current flowing through transistor T13 is also the current I. CTAT .

[0157] As described above, the current flowing through transistor T13 is controlled to current I by switch SW3. PTAT or current I CTAT .

[0158] Switches SW3 and SW11 are interlocked. The switches are controlled such that when switch SW3 selects transistor T3p, switch SW11 selects transistor T11p. The switches are also controlled such that when switch SW3 selects transistor T3c, switch SW11 selects transistor T11c.

[0159] Figure 10 This is a conceptual diagram showing the configuration of a voltage generating circuit according to an embodiment. Figure 10 Only the middle part is shown Figure 9 The circuit elements shown include the first variable resistor R3, the second variable resistor R4, and the output terminal V. OUT Other circuit elements are shown as Figure 10 The circuit shown has input and output terminals. Figure 9 The transistors T11p and T11c in the diagram correspond to... Figure 10 Input terminal V IN11p and V IN11c , Figure 9 Transistor T12 in the middle corresponds to Figure 10 Input terminal V IN12 ,and Figure 9 The middle transistor T13 corresponds to Figure 10 The output terminal V in OUT13p and V OUT13c .

[0160] Input terminal V IN11p and V IN11c Switching is performed by switch SW11. Because switch SW3 is connected to... Figure 9 The transistors T3p and T3c are used, and as described above, the current flowing through transistor T13 is controlled by switching switch SW3. Therefore, in Figure 10 Lieutenant General Output Terminal V OUT13pand V OUT13c This is shown as being switched by switch SW3.

[0161] like Figure 10 As shown, the voltage generating circuit 28C includes a first path PAS1 and a second path PAS2. The first path PAS2 is from the input terminal V IN11p or V IN11c The path from (or the first power line VDD) to the first node N1 without passing through the second variable resistor R4. The second path PAS2 is from the second node N2 to the output terminal V. OUT13p or V OUT13c (or the second power line VSS) without passing through the second variable resistor R4.

[0162] When switch SW3 is connected to output terminal V OUT13p And switch SW11 is connected to input terminal V. IN11p At that time, from the input terminal V IN11p Input current I PTAT (3), from input terminal V IN12 Input current I FLAT (1) At the output terminal V OUT13p Output current I PTAT (2). Although details will be described later, the current flowing through the first variable resistor R3 will be determined as current I due to the inputs and outputs above. FLAT (4).

[0163] At the same time, when switch SW3 is connected to output terminal V OUT13c And switch SW11 is connected to input terminal V. IN11c At that time, from the input terminal V IN11C Input first current I CTAT (6) From the output terminal V IN12 Input current I FLAT (1), and at the output terminal V OUT13c Output current I CTAT (5). Although details will be described later, based on the inputs and outputs above, the current flowing through the first variable resistor R3 is determined as current I. FLAT (4).

[0164] When switch SW3 is connected to output terminal V OUT13p And switch SW11 is connected to input terminal V. IN11p At that time, the current (I) flowing through the first variable resistor R3 R3 ) and the current (I) flowing through the second variable resistor R4 R4 ) are represented by the following equations (4-1) and (4-2) respectively.

[0165] I R4 =IFLAT (1)-I PTAT (2) (4-1)

[0166] I R3 =I PTAT (3)+(I FLAT (1)-I PTAT (2)) (4-2)

[0167] In this case, since it will be based on I FLAT (1)–I PTAT (2) The current value is output to the output terminal V. OUT Therefore, the situation in which this operation is performed is called "during a CTAT action".

[0168] When switch SW3 is connected to output terminal V OUT13c And switch SW11 is connected to input terminal V. IN11c At that time, the current (I) flowing through the first variable resistor R3 R3 ) and the current (I) flowing through the second variable resistor R4 R4 The results are shown in equations (4-3) and (4-4) respectively.

[0169] I R4 =I FLAT (1)-I CTAT (5) (4-3)

[0170] I R3 =I CTAT (6)+(I FLAT (1)-I CTAT (5)) (4-4)

[0171] In this case, due to the output terminal V OUT Output based on I FLAT (1)–I CTAT (5) The current value, therefore the situation in which this operation is performed is called "PTAT operation period".

[0172] In the case of equation (4-2), I PTAT The item disappeared, leaving only I. FLAT In the case of equation (4-4), I CTAT The item disappeared, leaving only I. FLAT As mentioned above, the remaining I FLAT Called I FLAT (4). That is to say, the current (I) flowing through the first variable resistor R3 R3 During both "CTAT action" and "PTAT action", it is I FLAT (4).

[0173] In other words, "during the CTAT operation", the current flowing through the first path PAS1 to the first node N1 is current I. PTAT (3) When the current supplied to the second node N2 is current I, FLAT (1), and the current flowing through the second path PAS2 is current I. PTAT (2). "During the PTAT operation", when the current flowing through the first path PAS1 to the first node N1 is current I. CTAT (6) When the current supplied to the second node N2 is current I, FLAT (1), and the current flowing through the second path PAS2 is current I. CTAT (5).

[0174] 4-2. Output of the voltage generating circuit

[0175] During CTAT and PTAT operations, the output terminal V OUT The voltage varies. In each case, the voltage V at the output terminal is calculated as follows. OUT .

[0176] 4-2-1 Output of the voltage generation circuit during CTAT operation

[0177] Based on equations (4-1) and (4-2), the voltage V at the output terminal is calculated as shown in equation (4-5). OUT .

[0178] V OUT =R3·I FLAT (4)

[0179] +R4·(I FLAT (1)-I PTAT (2)) (4-5)

[0180] 4-2-2 Output of the voltage generation circuit during PTAT operation

[0181] Based on equations (4-3) and (4-4), the voltage V at the output terminal is calculated as shown in equation (4-6). OUT .

[0182] V OUT =R3·I FLAT (4)

[0183] +R4·(I FLAT (1)-I CTAT (5)) (4-6)

[0184] As shown in equations (4-5) and (4-6), the current flowing through the first variable resistor R3 is current I. FLAT(4) The current flowing through the second variable resistor R4 is based on the current I. PTAT (2) and current I FLAT (1) The difference in current between them, or based on current I CTAT (5) and current I FLAT (1) The difference in current between them. As shown in equation (4-5), when I is at a specific temperature Temp1 PTAT =I FLAT The term R4 is zero. As shown in equation (4-6), when I is at a specific temperature Temp1 CTAT =I FLAT The terms in R4 are zero.

[0185] Therefore, the voltage generating circuit 28C according to this embodiment can achieve the same effect as the voltage generating circuit 28B according to the third embodiment. Specifically, the output voltage V at a specific temperature can be adjusted by the value of the first variable resistor R3. OUT The absolute value of the voltage V can be adjusted by the value of the second variable resistor R4. OUT The temperature gradient. Since the values ​​of the first variable resistor R3 and the second variable resistor R4 can be controlled independently, the output voltage V can be adjusted independently. OUT The absolute value and output voltage V OUT The temperature gradient. Furthermore, by switching switches SW3 and SW11, an output voltage V that increases with increasing temperature can be provided. OUT The output voltage V decreases as temperature increases. OUT .

[0186] 5. Fifth Implementation Method

[0187] Reference Figure 11 and Figure 12 A voltage generating circuit according to a fifth embodiment is described. The voltage generating circuit 28D according to the fifth embodiment is similar to the voltage generating circuit 28 according to the first embodiment. In the following description, the configuration that is the same as that of the voltage generating circuit 28 according to the first embodiment will be omitted, and the differences from the voltage generating circuit 28 will be mainly described.

[0188] 5-1 Configuration of Voltage Generating Circuit

[0189] like Figure 11 As shown, the voltage generating circuit 28D includes a first voltage generating circuit 26Dp, a second voltage generating circuit 27Dc, and an output terminal V. OUT and switch SW28. Switch SW28 is connected to the first voltage generating circuit 28Dp and the output terminal V. OUT The connection between the second voltage generating circuit 28Dc and the output terminal VOUT Switch between connections.

[0190] Each of the first voltage generating circuit 28Dp and the second voltage generating circuit 26Dc has the same configuration as the voltage generating circuit 28 according to the first embodiment. When the voltage V is applied... PTAT When the input is applied to the input terminal of the second current generating circuit G2p of the first voltage generating circuit 28Dp, the second current generating circuit G2p generates a current I. PTAT At the same time, when the voltage V CTAT When the input is applied to the input terminal of the second current generating circuit G2c of the second voltage generating circuit 28Dc, the second current generating circuit G2c generates a current I. CTAT When the voltage V FLAT When the input is fed into the first current generating circuit G1p of the first voltage generating circuit 28Dp and the first current generating circuit G1c of the second voltage generating circuit 28Dc, a current I is generated. FLAT .

[0191] In this embodiment, current I is generated. FLAT The first current generating circuits G1p and G1c are respectively disposed in the first voltage generating circuit 28Dp and the second voltage generating circuit 28Dc, but this disclosure is not limited to this configuration. For example, the current I generated by the first current generating circuit G1p of the first voltage generating circuit 28Dp... FLAT This can be supplied to the second voltage generating circuit 28Dc. In this case, a pair of transistors T1p and T5c and a pair of transistors T1p and T7c each form a current mirror circuit. In the above configuration, the first current generating circuit G1c and transistor T1c of the second voltage generating circuit 28Dc are omitted. Conversely, the current I generated by the first current generating circuit G1c of the second voltage generating circuit 28Dc is... FLAT This can be provided to the first voltage generating circuit 28Dp. In this case, a pair of transistors T1c and T5p and a pair of transistors T1c and T7p each form a current mirror circuit. In the above configuration, the first current generating circuit G1p and transistor T1p of the first voltage generating circuit 28Dp are omitted.

[0192] In this embodiment, for ease of explanation, the current generated by the second current generating circuit G2p is referred to as "the first current I". PTAT The current generated by the first current generating circuit G1p is called the "second current I". FTAT The current generated by the second current generating circuit G2c is called the "third current I". CTAT The current generated by the first current generating circuit G1c is called the "fourth current I". FLATThe variable resistor set in the first voltage generating circuit 28Dp is called the first variable resistor R. 3p Second variable resistor R 4p The variable resistor set in the second voltage generating circuit 28Dc is called the third variable resistor R. 3c and the fourth variable resistor R 4c In the first voltage generating circuit 28Dp, the first variable resistor R 3p Second variable resistor R 4p They are connected in series. In the second voltage generating circuit 28Dc, the third variable resistor R... 3c and the fourth variable resistor R 4c Connected in series.

[0193] In other words, the first voltage generating circuit 28Dp generates a first current I with a temperature-dependent characteristic (first temperature-dependent characteristic) that the current value changes with a specified temperature variation. PTAT And a second current I having a temperature dependence characteristic different from the first temperature dependence characteristic (the second temperature dependence characteristic). FLAT The second voltage generating circuit 28Dc generates a third current I with a temperature dependence characteristic (third temperature dependence characteristic) that changes in the opposite direction to the first temperature dependence characteristic as the current value changes with a specified temperature. CTAT And a fourth current I with a temperature dependence characteristic different from the third temperature dependence characteristic (the fourth temperature dependence characteristic). FLAT .

[0194] In this embodiment, the first temperature-dependent characteristic is that the current value increases with increasing temperature. The third temperature-dependent characteristic is that the current value decreases with increasing temperature. The second and fourth temperature-dependent characteristics are temperature-dependent characteristics where the current value does not change with temperature. Alternatively, the second and fourth temperature-dependent characteristics can be temperature-dependent characteristics where the current value changes with temperature.

[0195] Figure 12 This is a conceptual diagram showing the configuration of a voltage generating circuit according to an embodiment. Each of the first voltage generating circuit 28Dp and the second voltage generating circuit 28Dc has the same characteristics as... Figure 3 It has the same configuration as the voltage generating circuit 28 in the middle.

[0196] The first voltage generating circuit 28Dp includes a first path PAS1, a second path PAS2, and a third path PAS3. The first path PAS1 generates voltage from the input terminal V. IN7p (or the first power line VDD) to the first node N1 without passing through the second variable resistor R 4p The second path, PAS2, is from the second node N2 to the output terminal V.OUT10p (or the second power line VSS) without passing through the second variable resistor R 4p The third path, PAS3, is from the first node N1 to the output terminal V. OUT8p (or the second power line VSS) without passing through the first variable resistor R 3p The path.

[0197] like Figure 12 As shown, in the first voltage generating circuit 28Dp, the voltage is generated from the input terminal V IN7p Input current 2×I FLAT (3), from input terminal V IN9p Input first current I PTAT (1) At the output terminal V OUT8p Output first current I PTAT (4), and to the output terminal V OUT10p Output second current I FLAT (2). Although details will be described later, due to the inputs and outputs above, water will flow through the first variable resistor R. 3p The current is determined as current I. FLAT (5).

[0198] The second voltage generating circuit 28Dc includes a fourth path PAS4, a fifth path PAS5, and a sixth path PAS6. The fourth path PAS4 is from the input terminal V. IN7c (or the first power line VDD) to the third node N3 without passing through the fourth variable resistor R 4c The fifth path, PAS5, is from the fourth node N4 to the output terminal V. OUT10c (or the second power line VSS) without passing through the second variable resistor R 4c The sixth path, PAS6, is from the third node N3 to the output terminal V. OUT8c (or the second power line VSS) without passing through the third variable resistor R 3c The path.

[0199] Similar to the first voltage generating circuit 28Dp, in the second voltage generating circuit 28Dc, the voltage is generated from the input terminal V. IN7c Input current 2×I FLAT (8), from input terminal V IN9c Input third current I CTAT (6) At the output terminal V OUT8c Output third current I CTAT (9), and at the output terminal V OUT10c Output fourth current I FLAT (7). Although details will be described later, due to the inputs and outputs above, the third variable resistor R will flow. 3cThe current is determined as current I. FLAT (10).

[0200] In the first voltage generating circuit 28Dp, the first variable resistor R flows through... 3p The current (I) R3p ) and flows through the second variable resistor R 4p The current (I) R4p ) are represented by the following equations (5-1) and (5-2) respectively.

[0201] I R4p =I PTAT (1)-I FLAT (2) (5-1)

[0202] I R3p =2×I FLAT (3)+(I PTAT (1)-I FLAT (2))

[0203] -I PTAT (4) (5-2)

[0204] In the case of equation (5-2), I PTAT The item disappeared, leaving only I. FLAT As mentioned above, the remaining I FLAT Called I FLAT (5). That is to say, in the first voltage generating circuit 28Dp, the first variable resistor R flows through... 3p The current (I) R3p ) is I FLAT (5). I FLAT (5) equals the second current I generated by the first current generating circuit G1p. FLAT .

[0205] In the second voltage generating circuit 28Dc, the third variable resistor R flows through. 3c The current (I) R3c ) and flows through the fourth variable resistor R 4c The current (I) R4c The following equations (5-3) and (5-4) represent the values ​​respectively.

[0206] I R4c =I CTAT (6)-I FLAT (7) (5-3)

[0207] I R3c =2×I FLAT (8)+(I CTAT (6)-I FLAT (7))

[0208] -ICTAT (9) (5-4)

[0209] In the case of equation (5-4), I PTAT The item disappeared, leaving only I. FLAT As mentioned above, the remaining I FLAT Called I FLAT (10). That is to say, in the second voltage generating circuit 28Dc, the third variable resistor R flows through... 3c The current (I) R3c ) is I FLAT (10). I FLAT (10) equals the fourth current I generated by the second voltage generating circuit 28Dc. FLAT .

[0210] In other words, in the first voltage generating circuit 28Dp, the first variable resistor R flows through... 3p The current is the second current I. FLAT (I FLAT (5)). Flow through the second variable resistor R 4p The current is based on the first current I PTAT Second current I FLAT The difference in current (I) between PTAT (1)–I FLAT (2) Similarly, in the second voltage generating circuit 28Dc, the third variable resistor R flows through... 3c The current is the fourth current I. FLAT (I FLAT (10)). Flow through the fourth variable resistor R 4c The current is based on the third current I CTAT and the fourth current I FLAT The difference in current (I) between CTAT (6)–I FLAT (7)).

[0211] Furthermore, in the first voltage generating circuit 28Dp, the current flowing through the first path PAS1 is the second current I. FLAT Twice the current (2×I) FLAT (3)), the current flowing through the second path PAS2 is the second current I. FLAT (2) The current flowing through the third path PAS3 is the first current I. PTAT (4). Similarly, in the second voltage generating circuit 28Dc, the current flowing through the fourth path PAS4 is twice the fourth current (2×I). FLAT (8) The current flowing through the fifth path PAS5 is the fourth current I. FLAT (7) The current flowing through the sixth path PAS6 is the third current I. CTAT(9). The current flowing through the first path PAS1 and the current flowing through the fourth path PAS4 can be the second current I, respectively. FLAT and the fourth current I FLAT n times the current (n×I) FLAT (n is a positive number excluding 1).

[0212] 5-2. Output of voltage generating circuit 28D

[0213] When switch SW28 is connected to the first voltage generating circuit 28Dp and when switch SW28 is connected to the second voltage generating circuit 28Dc, the output terminal V OUT The voltages are different. The voltages output from each of the first voltage generating circuit 28Dp and the second voltage generating circuit 28Dc are calculated as follows.

[0214] 5-2-1 Output of the first voltage generating circuit 28Dp

[0215] Based on equations (5-1) and (5-2), the voltage V at the output terminal when switch SW28 is connected to the first voltage generating circuit 28Dp is calculated using equation (5-5). OUT .

[0216] V OUT =R 3p I FLAT (5)

[0217] +R 4p ·(I PTAT (1)-I FLAT (2)) (5-5)

[0218] 5-2-2, Output of the second voltage generating circuit 28Dc

[0219] Based on equations (5-3) and (5-4), the voltage V at the output terminal when switch SW28 is connected to the second voltage generating circuit 28Dc is calculated using equation (5-6). OUT .

[0220] V OUT =R 3c ·I FLAT (10)

[0221] +R 4c , (I CTAT (6)-I FLAT (7)) (5-6)

[0222] As shown in equation (5-5), the current flows through the first variable resistor R 3p The current is the second current I. FLAT (5) Flow through the second variable resistor R4p The current is based on the first current I PTAT (1) and the second current I FLAT (2) The difference current between them. As shown in equation (5-6), it flows through the third variable resistor R. 3c The current is the fourth current I. FLAT (10) Flow through the fourth variable resistor R 4c The current is based on the third current I CTAT (6) and the fourth current I FLAT (7) The difference in current between them. As shown in equation (5-5), when I is at a specific temperature Temp1 PTAT =I FLAT The term R4 is zero. As shown in equation (5-6), when I is at a specific temperature Temp1 CTAT =I FLAT R 4c The number of terms is zero.

[0223] Therefore, similar to the voltage generating circuit 28 according to the first embodiment, the voltage generating circuit 28D according to this embodiment can be controlled by the first variable resistor R. 3p and the third variable resistor R 3c The value is used to adjust the output voltage V at a specific temperature. OUT The absolute value, and can be obtained through the second variable resistor R. 4p and the fourth variable resistor R 4c Adjust the output voltage V by its value OUT The temperature gradient. Because the first variable resistor R can be controlled independently. 3p The second variable resistor R 4p The third variable resistor R 3c and the fourth variable resistor R 4c The value of V is such that the output voltage V can be adjusted independently. OUT The absolute value and output voltage V OUT The temperature gradient. Furthermore, by switching switch SW28, an output voltage V that increases with increasing temperature can be provided. OUT The output voltage V decreases as temperature increases. OUT .

[0224] 6. Sixth Implementation Method

[0225] Reference Figure 13 and Figure 14A voltage generating circuit according to a sixth embodiment is described. The voltage generating circuit 28E according to the sixth embodiment is similar to the voltage generating circuit 28D according to the fifth embodiment. In the following description, the configuration that is the same as that of the voltage generating circuit 28D according to the fifth embodiment will be omitted, and the differences from the voltage generating circuit 28D will be mainly described.

[0226] 6-1. Configuration of Voltage Generating Circuit

[0227] like Figure 13 As shown, the voltage generating circuit 28D includes a first voltage generating circuit 28Ep, a second voltage generating circuit 28Ec, and an output terminal V. OUT and switch SW28. Switch SW28 is connected to the output terminal V of the first voltage generating circuit 28Ep. OUT The connection between the second voltage generating circuit 28Ec and the output terminal V OUT Switch between connections.

[0228] Each of the first voltage generating circuit 28Ep and the second voltage generating circuit 28Ec has the same configuration as the voltage generating circuit 28A according to the second embodiment. The second current generating circuit G2p provided in the first voltage generating circuit 28Ep and the second current generating circuit G2c provided in the second voltage generating circuit 28Ec have the same configuration as the second current generating circuits G2p and G2c according to the fifth embodiment. Therefore, a detailed description of the first voltage generating circuit 28Ep and the second voltage generating circuit 28Ec will be omitted.

[0229] In this embodiment, as in the fifth embodiment, the current generated by the second current generating circuit G2p is referred to as "the first current I". PTAT The current generated by the first current generating circuit G1p is called the "second current I". FTAT The current generated by the second current generating circuit G2c is called the "third current I". CTAT The current generated by the first current generating circuit G1c is called the "fourth current I". FLAT The variable resistor set in the first voltage generating circuit 28Ep is called the first variable resistor R. 3p Second variable resistor R 4p The variable resistor set in the second voltage generating circuit 28Ec is called the third variable resistor R. 3c and the fourth variable resistor R 4c In the first voltage generating circuit 28Ep, the first variable resistor R 3p Second variable resistor R 4p They are connected in series. In the second voltage generating circuit 28Ec, the third variable resistor R... 3cand the fourth variable resistor R 4c Connected in series.

[0230] In this embodiment, current I is generated. FLAT The first current generating circuits G1p and G1c are respectively disposed in the first voltage generating circuit 28Ep and the second voltage generating circuit 28Ec, but this disclosure is not limited to this configuration. For example, the current I generated by the first current generating circuit G1p of the first voltage generating circuit 28Ep... FLAT This can be supplied to the second voltage generating circuit 28Ec. In this case, a pair of transistors T1p and T12c form a current mirror circuit. In the above configuration, the first current generating circuit G1c and transistor T1c of the second voltage generating circuit 28Ec are omitted. Conversely, the current I generated by the first current generating circuit G1c of the second voltage generating circuit 28Ec... FLAT This can be supplied to the first voltage generating circuit 28Ep. In this case, a pair of transistors T1c and T12p form a current mirror circuit. In the above configuration, the first current generating circuit G1p and transistor T1p of the first voltage generating circuit 28Ep are omitted.

[0231] Figure 14 This is a conceptual diagram showing the configuration of a voltage generating circuit according to an embodiment. Each of the first voltage generating circuit 28Ep and the second voltage generating circuit 28Ec has the same characteristics as... Figure 6 It has the same configuration as the voltage generating circuit 28A in the middle.

[0232] The first voltage generating circuit 28Ep includes a first path PAS1 and a second path PAS2. The first path PAS1 is from the input terminal V IN11p (or the first power line VDD) to the first node N1 without passing through the second variable resistor R 4p The second path, PAS2, is from the second node N2 to the output terminal V. OUT13p (or the second power line VSS) without passing through the second variable resistor R 4p The path.

[0233] like Figure 14 As shown, in the first voltage generating circuit 28Ep, the voltage is generated from the input terminal V IN11p Input first current I FLAT (3), from input terminal V IN12p Input second current I FTAT (1) At the output terminal V OUT13p Output first current I PTAT (2). Although details will be described later, due to the inputs and outputs above, water will flow through the first variable resistor R. 3p The current is determined as current I.FLAT (4).

[0234] The second voltage generating circuit 28Ec includes a fourth path PAS4 and a fifth path PAS5. The fourth path PAS4 is from the input terminal V IN11c (or the first power line VDD) to the third node N3 without passing through the fourth variable resistor R 4c The fifth path, PAS5, is from the fourth node N4 to the output terminal V. OUT13c (or the second power line VSS) without passing through the fourth variable resistor R 4c The path.

[0235] As in the first voltage generating circuit 28Ep, in the second voltage generating circuit 28Ec, from the input terminal V IN11c Input third current I CTAT (7), from input terminal V IN12c Input fourth current I FLAT (5) At the output terminal V OUT13c Output third current I CTAT (6). Although details will be described later, due to the inputs and outputs above, the flow will pass through the third variable resistor R. 3c The current is determined as current I. FLAT (8).

[0236] In the first voltage generating circuit 28Ep, the first variable resistor R flows through... 3p The current (I) R3p ) and flows through the second variable resistor R 4p The current (I) R4p The following equations (6-1) and (6-2) represent the values ​​respectively.

[0237] I R4p =I FLAT (1)-I PTAT (2) (6-1)

[0238] I R3p =I PTAT (3)+(I FLAT (1)-I PTAT (2)) (6-2)

[0239] In this case, since it will be based on I FLAT (1)–I PTAT (2) The current value is output to the output terminal V. OUT Therefore, the situation in which this operation is performed is called "during a CTAT action".

[0240] In the case of equation (6-2), I PTAT The item disappeared, leaving only I.FLAT As mentioned above, the remaining I FLAT Called I FLAT (4). That is, in the first voltage generating circuit 28Ep, the first variable resistor R flows through... 3p The current (I) R3p ) is I FLAT (4). I FLAT (4) equal to the second current I generated by the first current generating circuit G1p. FLAT .

[0241] In the second voltage generating circuit 28Ec, the third variable resistor R flows through. 3c The current (I) R3c ) and flows through the fourth variable resistor R 4c The current (I) R4c The following equations (6-3) and (6-4) represent the values ​​respectively.

[0242] I R4c =I FLAT (5)-I CTAT (6) (6-3)

[0243] I R3c =I CTAT (7)+(I FLAT (5)-I CTAT (6)) (6-4)

[0244] In this case, since it will be based on I FLAT (5)–I CTAT The current value of (6) is output to the output terminal V. OUT Therefore, the situation in which this operation is performed is called "PTAT action period".

[0245] In the case of equation (6-4), I CTAT The item disappeared, leaving only I. FLAT As mentioned above, the remaining I FLAT Called I FLAT (8). That is to say, in the second voltage generating circuit 28Ec, the third variable resistor R flows through... 3c The current (I) R3c ) is I FLAT (8). I FLAT (8) equals the fourth current I generated by the second voltage generating circuit 28Ec. FLAT .

[0246] In other words, in the first voltage generating circuit 28Ep, the first variable resistor R flows through... 3p The current is the second current I. FLAT (I FLAT(4)). Flow through the second variable resistor R 4p The current is based on the first current I PTAT Second current I FLAT The difference in current (I) between FLAT (1)–I PTAT (2) Similarly, in the second voltage generating circuit 28Ec, the third variable resistor R flows through... 3c The current is the fourth current I. FLAT (I FLAT (8)). Flow through the fourth variable resistor R 4c The current is based on the third current I CTAT and the fourth current I FLAT The difference in current (I) between FLAT (5)–I CTAT (6)).

[0247] Furthermore, in the first voltage generating circuit 28Ep, the current flowing through the first path PAS1 is the first current I. PTAT (3) The current flowing through the second path PAS2 is the first current I. PTAT (2). Similarly, in the second voltage generating circuit 28Ec, the current flowing through the fourth path PAS4 is the third current I. CTAT (7) The current flowing through the fifth path PAS5 is the third current I. CTAT (6).

[0248] 6-2. Output of voltage generating circuit 28E

[0249] When switch SW28 is connected to the first voltage generating circuit 28Ep and when switch SW28 is connected to the second voltage generating circuit 28Ec, the output terminal V OUT The voltages are different. The voltages output from each of the first voltage generating circuit 28Ep and the second voltage generating circuit 28Ec are calculated as follows.

[0250] 6-2-1 Output of the first voltage generating circuit 28Ep during CTAT operation

[0251] Based on equations (6-1) and (6-2), the voltage V at the output terminal when switch SW28 is connected to the first voltage generating circuit 28Ep is calculated using equation (6-5). OUT .

[0252] V OUT =R 3p ·I FLAT (4)

[0253] +R 4p ·(I FLAT (1)-I PTAT(2)) (6-5)

[0254] 6-2-2, Output of the second voltage generating circuit 28Ec during PTAT operation

[0255] Based on equations (6-3) and (6-4), the voltage V at the output terminal when switch SW28 is connected to the second voltage generating circuit 28Ec is calculated using the following equation (6-6). OUT .

[0256] V OUT =R 3c ·I FLAT (8)

[0257] +R 4c ·(I FLAT (5)-I CTAT (6)) (6-6)

[0258] As shown in equation (6-5), the current flows through the first variable resistor R 3p The current is the second current I. FLAT (4) Flow through the second variable resistor R 4p The current is based on the first current I PTAT (2) and the second current I FLAT (1) The difference current between them. As shown in equation (6-6), it flows through the third variable resistor R. 3c The current is the fourth current I. FLAT (8) Flow through the fourth variable resistor R 4c The current is based on the third current I CTAT (6) and the fourth current I FLAT (5) The difference in current between them. As shown in equation (6-5), when I is at a specific temperature Temp1 PTAT =I FLAT R 4p The term is zero. As shown in equation (6-6), when I is at a specific temperature Temp1 CTAT =I FLAT R 4c The number of terms is zero.

[0259] Therefore, the voltage generating circuit 28E according to this embodiment can achieve the same effect as the voltage generating circuit 28D.

[0260] 7. Seventh Implementation Method

[0261] Reference Figures 15 to 17A voltage generating circuit according to a seventh embodiment is described. The voltage generating circuit 28F according to the seventh embodiment is similar to the voltage generating circuit 28 according to the first embodiment. In the following description, the configuration that is the same as that of the voltage generating circuit 28 according to the first embodiment will be omitted, and the differences from the voltage generating circuit 28 will be mainly described.

[0262] 7-1. Configuration of Voltage Generating Circuit

[0263] Figure 15 This is a circuit diagram showing the configuration of a voltage generating circuit according to an embodiment. For example... Figure 15 As shown, in the voltage generating circuit 28F, transistors T14 to T17 and switches SW10 and SW14 to SW17 are used instead of... Figure 2 Transistors T7 to T9 are provided in the voltage generating circuit 28 shown. Transistors T14 to T16 are p-type transistors. Transistor T17 is an n-type transistor. In this embodiment, when voltage V is applied... PTAT When the input is applied to the input terminal of the second current generating circuit G2, the second current generating circuit G2 generates a current I. PTAT .

[0264] Transistor T10 and switch SW10 are connected in series at output terminal V OUT Between the second power line VSS.

[0265] Transistor T14 and switch SW14 are connected in series between the first power line VDD and the second node N2. With switch SW15 connected to the second node N2, transistor T15 and switch SW15 are connected in series between the first power line VDD and the second node N2. Transistor T14 and switch SW14 are connected in parallel with transistor T15 and switch SW15 between the first power line VDD and the second node N2. Switches SW14 and SW15 switch the state in which transistor T14 and transistor T15 are connected to the second node N2.

[0266] With switch SW15 connected to the first node N1, transistor T15 and switch SW15 are connected in series between the first power line VDD and the first node N1. Transistor T16 and switch SW16 are also connected in series between the first power line VDD and the first node N1. Transistor T15 and switch SW15 are connected in parallel with transistor T16 and switch SW16 between the first power line VDD and the first node N1. Switches SW15 and SW16 switch the state in which transistor T15 and transistor T16 are connected to the first node N1.

[0267] With switch SW17 connected to the first node N1, transistor T17 and switch SW17 are connected in series between the first node N1 and the second power line VSS. With switch SW17 connected to the second node N2, transistor T17 and switch SW17 are connected in series between the second node N1 and the second power line VSS. Switch SW17 switches the state of transistor T17 connected to the first node N1 and the state of transistor T17 connected to the second node N2.

[0268] A pair of transistors T1 and T14, a pair of transistors T2 and T16, a pair of transistors T2 and T15, and a pair of transistors T4 and T17 each form a current mirror circuit. These transistors are of the same size. Transistor T16 is indicated by "×2", and the two transistors are connected in parallel. In this configuration, the current flowing through transistor T14 is current I. FLAT The current flowing through transistor T15 is current I. PTAT The current flowing through transistor T16 is 2 × I FLAT And the current flowing through transistor T17 is current I. PTAT .

[0269] Figure 16 and Figure 17 This is a conceptual diagram showing the configuration of a voltage generating circuit according to an embodiment. Figure 15 Transistors T14, T15, and T16 in the diagram correspond to... Figure 16 and Figure 17 Input terminal V IN14 V IN15 and V IN16 , Figure 15 Transistors T10 and T17 in the diagram correspond to... Figure 16 and Figure 17 The output terminal V in OUT10 and V OUT17 From input terminal V IN14 Input current I FLAT From input terminal V IN15 Input current I PTAT From input terminal V IN16 Input current 2×I FLAT . The current I FLAT Output to output terminal V OUT10 and the current I PTAT Output to output terminal V OUT17 .

[0270] Switch the input terminal connected to the second node N2 to input terminal V using switches SW14 and SW15. IN14 Or input terminal V IN15 And the current supplied to the second node N2 will be switched to current I.FLAT or current I PTAT By switching switches SW15 and SW16, the input terminal connected to the first node N1 is switched to input terminal V. IN15 Or input terminal V IN16 And the current supplied to the first node N1 is switched to current I. PTAT Or 2×I FLAT .

[0271] Switches SW10 and SW14 through SW17 are interlocked. For example... Figure 16 As shown, when switch SW10 is in the ON state (conductive state), switch SW14 is in the OFF state (non-conductive state), switch SW15 is connected to the second node N2 side, switch SW16 is in the ON state, and switch SW17 is connected to the first node N1 side. Figure 17 As shown, when switch SW10 is in the OFF state, switch SW14 is in the ON state, switch SW15 is connected to the first node N1 side, switch SW16 is in the OFF state, and switch SW17 is connected to the second node N2 side.

[0272] like Figure 16 and Figure 17 As shown, the voltage generating circuit 28F includes a first path PAS1, a second path PAS2, and a third path PAS3. The first path PAS1 is from the input terminal V... IN16 The path from (or the first power line VDD) to the first node N1 without passing through the second variable resistor R4, and from the input terminal V IN15 The path from (or the first power line VDD) to the first node N1 without passing through the second variable resistor R4. The second path PAS2 is from the second node N2 to the output terminal V. OUT10 Or output terminal V OUT17 (Or the second power line VSS) without passing through the second variable resistor R4. The third path PAS3 is from the first node N1 to the output terminal V. OUT17 (or the second power line VSS) without passing through the first variable resistor R3.

[0273] like Figure 16 As shown, the current I PTAT (1) From input terminal V IN15 Provided to the second node N2, the current is 2×I FLAT (4) From input terminal V IN16 Provided to the first node N1, the current I FLAT (2) Output from the second node N2 to the output terminal V OUT10 and will the current I PTAT (3) Output from the first node N1 to the output terminal V OUT17Although details will be described later, based on the inputs and outputs above, the current flowing through the first variable resistor R3 is determined as current I. FLAT (5).

[0274] like Figure 17 As shown, the current I FLAT (6) From input terminal V IN14 Provided to the second node N2, the current I PTAT (8) From input terminal V IN15 Provided to the first node N1, the current I PTAT (7) Output from the second node N2 to the output terminal V OUT17 Although details will be described later, based on the inputs and outputs above, the current flowing through the first variable resistor R3 is determined as current I. FLAT (5).

[0275] exist Figure 16 In the state shown, the current (I) flowing through the first variable resistor R3 R3 ) and the current (I) flowing through the second variable resistor R4 R4 ) are represented by the following equations (7-1) and (7-2) respectively.

[0276] I R4 =I PTAT (1)-I FLAT (2) (7-1)

[0277] I R3 =2×I FLAT (4)+(I PTAT (1)-I FLAT (2))

[0278] -I PTAT (3) (7-2)

[0279] In this case, since it will be based on I PTAT (1)–I FLAT (2) The current value is output to the output terminal V. OUT Therefore, the situation in which this operation is performed is called "during a PTAT action".

[0280] exist Figure 17 In the state shown, the current (I) flowing through the first variable resistor R3 R3 ) and the current (I) flowing through the second variable resistor R4 R4 ) are represented by the following formulas (7-3) and (7-4) respectively.

[0281] I R4 =I FLAT (6)-I PTAT (7) (7-3)

[0282] I R3 =I PTAT (8)+(I FLAT (6)-I PTAT (7)) (7-4)

[0283] In this case, since it will be based on I FLAT (6)–I PTAT The current value of (7) is output to the output terminal V. OUT Therefore, the situation in which this operation is performed is called "during a CTAT action".

[0284] In the case of equation (7-2), I PTAT The item disappeared, leaving only I. FLAT In the case of equation (7-4), I PTAT The item disappeared, leaving only I. FLAT As mentioned above, the remaining I FLAT Called I FLAT (5). That is to say, even during the "PTAT operation period" and the "CTAT operation period", the current flowing through the first variable resistor R3 (I R3 ) is also I FLAT (5).

[0285] In other words, in Figure 16 During the "PTAT operation period" shown, when the current supplied to the second node N2 is current I... PTAT (1) When the current flowing through the first path PAS1 is current I, FLAT Twice the current (2×I) FLAT (4) The current flowing through the second path PAS2 is current I. FLAT (2) The current flowing through the third path PAS3 is current I. PTAT (3). The current flowing through the first path PAS1 can be current I. FLAT n times the current (n×I) FLAT (n is a positive number excluding 1).

[0286] Figure 17 As shown in the diagram, "During the CTAT operation," when the current supplied to the second node N2 is current I... FLAT (6) When the current flowing through the first path PAS1 is current I, PTAT (8) The current flowing through the second path PAS2 is current I. PTAT (7), and cut off the third path PAS3.

[0287] 7-2. Output of the voltage generating circuit

[0288] During PTAT and CTAT operations, the voltage V at the output terminal... OUT Different. In each case, the voltage V at the output terminal... OUT The calculation is performed as described below.

[0289] 7-2-1 Output of the voltage generation circuit during PTAT operation

[0290] Based on equations (7-1) and (7-2), the voltage V at the output terminal is calculated using equation (7-5). OUT V OUT =R3·I FLAT (5)

[0291] +R4·(I PTAT (1)-I FLAT (2)) (7-5)

[0292] 7-2-2 Output of the voltage generation circuit during CTAT operation

[0293] Based on equations (7-3) and (7-4), the voltage V at the output terminal is calculated using the following equation (7-6). OUT V OUT =R3·I FLAT (5)

[0294] +R4·(I FLAT (6)-I PTAT (7)) (7-6)

[0295] As shown in equations (7-5) and (7-6), the current flowing through the first variable resistor R3 is current I. FLAT (5) The current flowing through the second variable resistor R4 is based on the current I. PTAT (1) and current I FLAT (2) The difference in current between them, or based on current I PTAT (7) and current I FLAT (6) The difference in current between them. As shown in equations (7-5) and (7-6), when I is at a specific temperature Temp1 PTAT =I FLAT The terms in R4 are zero.

[0296] Therefore, the voltage generating circuit 28F according to this embodiment can achieve the same effect as the voltage generating circuit 28 according to the first embodiment. Furthermore, by switching switches SW10 and SW14 to SW17, an output voltage V whose voltage value increases with increasing temperature can be provided. OUT The output voltage V decreases as temperature increases. OUT .

[0297] 8. Eighth Implementation Method

[0298] Reference Figure 18 and Figure 19 The voltage generating circuit according to the eighth embodiment is described. The voltage generating circuit 28G according to the eighth embodiment has a circuit configuration substantially the same as that of the voltage generating circuit 28F according to the seventh embodiment, but differs from the voltage generating circuit 28F in the switching method of switches SW10 and SW14 to SW17. In the following description, the configuration identical to that of the voltage generating circuit 28F according to the seventh embodiment will be omitted, and the differences from the voltage generating circuit 28F will be mainly described.

[0299] Figure 18 and Figure 19 This is a conceptual diagram showing the configuration of a voltage generating circuit according to an embodiment. Figure 15 Each transistor shown is associated with Figure 18 and Figure 19 The correspondence between each input terminal and each output terminal shown is the same as in the seventh embodiment.

[0300] In this embodiment, when the voltage V CTAT When the input is applied to the input terminal of the second current generating circuit G2, the second current generating circuit G2 generates a current I. CTAT Therefore, from the input terminal V IN15 Provide current I CTAT And at the output terminal V OUT17 Output current I CTAT .

[0301] like Figure 18 As shown, the current I FLAT (1) From input terminal V IN14 Provided to the second node N2, the current I CTAT (3) From input terminal V IN15 Provided to the first node N1, the current I CTAT (2) Output from the second node N2 to the output terminal V OUT17 Although details will be described later, based on the inputs and outputs above, the current flowing through the first variable resistor R3 is determined as current I. FLAT (4).

[0302] like Figure 19 As shown, the current I CTAT (5) From input terminal V IN15 Provided to the second node N2, the current is 2×I FLAT (8) From input terminal V IN16 Provided to the first node N1, the current I FLAT (6) Output from the second node N2 to the output terminal VOUT10 and the current I CTAT (7) Output from the first node N1 to the output terminal V OUT17 Although details will be described later, based on the inputs and outputs above, the current flowing through the first variable resistor R3 is determined as current I. FLAT (4).

[0303] exist Figure 18 In the state shown, the current (I) flowing through the first variable resistor R3 R3 ) and the current (I) flowing through the second variable resistor R4 R4 ) are represented by the following equations (8-1) and (8-2) respectively.

[0304] I R4 =I FLAT (1)-I CTAT (2) (8-1)

[0305] I R3 =I FLAT (1)-I CTAT (2)+I CTAT (3) (8-2)

[0306] In this case, since it will be based on I FLAT (1)–I CTAT (2) The current value is output to the output terminal V. OUT Therefore, the situation in which this operation is performed is called "during a PTAT action".

[0307] exist Figure 19 In the state shown, the current (I) flowing through the first variable resistor R3 R3 ) and the current (I) flowing through the second variable resistor R4 R4 ) are represented by the following formulas (8-3) and (8-4) respectively.

[0308] I R4 =I CTAT (5)-I FLAT (6) (8-3)

[0309] I R3 =2×I FLAT (8)+I CTAT (5)

[0310] -I FLAT (6)-I CTAT (7) (8-4)

[0311] In this case, since it will be based on I CTAT (5)–I FLAT The current value of (6) is output to the output terminal V.OUT Therefore, the situation in which this operation is performed is called "during a CTAT action".

[0312] In the case of equation (8-2), I CTAT The item disappeared, leaving only I. FLAT In the case of equation (8-4), I CTAT The item disappeared, leaving only I. FLAT As mentioned above, the remaining I FLAT Called I FLAT (4). That is to say, even during the "PTAT operation period" and the "CTAT operation period", the current flowing through the first variable resistor R3 (I R3 ) is also I FLAT (4).

[0313] In other words, in Figure 18 During the "PTAT operation period" shown, when the current supplied to the second node N2 is current I... FLAT (1) When the current flowing through the first path PAS1 is current I, CTAT (3) The current flowing through the second path PAS2 is current I. CTAT (2) Cut off the third path PAS3.

[0314] Figure 19 As shown in the diagram, "During the CTAT operation," when the current supplied to the second node N2 is current I... CTAT (5) When the current flowing through the first path PAS1 is current I, FLAT Twice the current (2×I) FLAT (8)), the current flowing through the second path PAS2 is current I. FLAT (6), and the current flowing through the third path PAS3 is current I. CTAT (7). The current flowing through the first path PAS1 can be current I. FLAT n times the current (n×I) FLAT (n is a positive number excluding 1).

[0315] 8-2. Output of the voltage generating circuit

[0316] During PTAT and CTAT operations, the voltage V at the output terminal... OUT Different. In each case, the voltage V at the output terminal... OUT The calculation is performed as described below.

[0317] 8-2-1 Output of the voltage generation circuit during PTAT operation

[0318] Based on equations (8-1) and (8-2), the voltage V at the output terminal is calculated using the following equation (8-5).OUT .

[0319] V OUT =R3·I FLAT (4)

[0320] +R4·(I FLAT (1)-I CTAT (2)) (8-5)

[0321] 8-2-2, Output of the voltage generation circuit during CTAT operation

[0322] Based on equations (8-3) and (8-4), the voltage V at the output terminal is calculated using the following equation (8-6). OUT V OUT =R3·I FLAT (4)

[0323] +R4·(I CTAT (5)-I FLAT (6)) (8-6)

[0324] As shown in equations (8-5) and (8-6), the current flowing through the first variable resistor R3 is current I. FLAT (4) The current flowing through the second variable resistor R4 is based on the current I. FLAT (1) and current I CTAT (2) The difference in current between them, or based on current I CTAT (5) and current I FLAT (6) The difference in current between them. As shown in equations (8-5) and (8-6), when I is at a specific temperature Temp1 CTAT =I FLAT The terms in R4 are zero.

[0325] Therefore, the voltage generating circuit 28G according to this embodiment can achieve the same effect as the voltage generating circuit 28F according to the seventh embodiment.

[0326] While certain embodiments have been described with reference to the accompanying drawings, these embodiments are not intended to limit the scope of protection of this disclosure and may be embodied in various other forms. For example, any means by which those skilled in the art add, omit, or modify components based on the voltage generating circuit according to this embodiment also fall within the scope of protection of this disclosure, provided that they capture the essence of this disclosure. Furthermore, embodiments may be appropriately combined if they do not contradict each other, and each embodiment includes common technical points even if not explicitly described.

[0327] Even if there are other actions and effects that differ from those of the aspects described above, it should be understood that this disclosure naturally brings about actions and effects that are obvious from the description in this specification, or actions and effects that are easily predicted by those skilled in the art.

[0328] Label Explanation

[0329] 10: Semiconductor memory devices

[0330] 21: Memory cell array

[0331] 22: Input / output circuit

[0332] 23: ZQ calibration circuit

[0333] 24: Logic control circuit

[0334] 25: Temperature sensor

[0335] 26: Register

[0336] 27: Sequencer

[0337] 28: Voltage Generating Circuit

[0338] 28Dc: Second voltage generating circuit

[0339] 28Dp: First voltage generation circuit

[0340] 29: Drive Group

[0341] 30: Line Decoder

[0342] 31: Readout Amplifier

[0343] 32: Input / output circuit pad group

[0344] 33: ZQ calibration pads

[0345] 34: Logic control pad group

[0346] G1: First current generating circuit

[0347] G2: Second current generating circuit

[0348] N1: First node

[0349] N2: Second node

[0350] N3: Third Node

[0351] N4: Fourth Node

[0352] PAS1: First Path

[0353] PAS2: Second Path

[0354] PAS3: Third Path

[0355] PAS4: Fourth Path

[0356] PAS5: The Fifth Path

[0357] SW: Switch

[0358] T: Transistor

[0359] VDD: First power line

[0360] VSS: Second power line

Claims

1. A voltage generating circuit that generates a first current having a first temperature-dependent characteristic and a second current having a second temperature-dependent characteristic different from the first temperature-dependent characteristic, wherein, The current value of the first temperature-dependent characteristic changes with a specified temperature variation, and the voltage generating circuit includes: The first power line is supplied with the first power voltage; The second power line is supplied with a second power voltage that is lower than the first power voltage; Output terminals; The second current flows through the first variable resistor and the third current flows through the second variable resistor; A first current path from the first power line to the first node between the first variable resistor and the second variable resistor; A second current path from the second node between the second variable resistor and the first power line to the second power line; and The third current path from the first node to the second power line, wherein... The first variable resistor and the second variable resistor are connected in series between the first power line and the second power line, and between the output terminal and the second power line. The second temperature-dependent characteristic is the characteristic that the value of the second current does not change with the specified temperature. The third current has a current value based on the difference between the current value of the first current and the current value of the second current. The first current is supplied to the second node. The current flowing through the first current path is n times the current of the second current, where n is a positive number excluding 1. The second current flows through the second current path, and the first current flows through the third current path.

2. The voltage generating circuit according to claim 1, wherein, The voltage generating circuit also generates a fourth current with a third temperature-dependent characteristic, wherein the value of the third temperature-dependent current changes in the opposite direction to the first temperature-dependent characteristic as the temperature changes according to the specified variation. When the fourth current is supplied to the second node The current value flowing through the first current path is n times the current value of the second current, and The second current flows through the second current path, and the fourth current flows through the third current path.

3. The voltage generating circuit according to claim 1, wherein, The first temperature-dependent characteristic is that the current value increases as the temperature increases. When the current supplied to the second node is the second current, The first current flows through the first current path. The first current flows through the second current path, and The third current path is cut off.

4. The voltage generating circuit according to claim 1, wherein, The first temperature-dependent characteristic is that the current value decreases as the temperature increases. When the current supplied to the second node is the second current, The first current flows through the first current path. The first current flows through the second current path, and The third current path is cut off.

5. A voltage generating circuit that generates a first current having a first temperature-dependent characteristic and a second current having a second temperature-dependent characteristic different from the first temperature-dependent characteristic, wherein, The current value of the first temperature-dependent characteristic changes with a specified temperature variation, and the voltage generating circuit includes: The first power line is supplied with the first power voltage; The second power line is supplied with a second power voltage that is lower than the first power voltage; Output terminals; The second current flows through the first variable resistor and the third current flows through the second variable resistor; A first current path from the first power line to the first node between the first variable resistor and the second variable resistor; and A second current path from the second node between the second variable resistor and the first power supply line to the second power supply line, wherein... The first variable resistor and the second variable resistor are connected in series between the first power line and the second power line, and between the output terminal and the second power line. The second temperature-dependent characteristic is the characteristic that the value of the second current does not change with the specified temperature. The third current has a current value based on the difference between the current value of the first current and the current value of the second current. When the current supplied to the first node through the first current path is the first current, the first current also flows through the second current path.

6. The voltage generating circuit according to claim 5, wherein, The voltage generating circuit also generates a fourth current with a third temperature-dependent characteristic, wherein the value of the third temperature-dependent current changes in the opposite direction to the first temperature-dependent characteristic as the temperature changes according to the specified variation. When the current supplied to the first node through the first current path is the fourth current, the fourth current flows through the second current path.

7. A semiconductor memory device, comprising: Storage cell array; as well as A voltage generating circuit is configured to generate a voltage required to perform an operation on one or more memory cells of the memory cell array, and to generate a first current having a first temperature-dependent characteristic, a second current having a second temperature-dependent characteristic different from the first temperature-dependent characteristic, and a third current having a third temperature-dependent characteristic, wherein the current value with the first temperature-dependent characteristic varies with a predetermined temperature change, and the current value with the third temperature-dependent characteristic varies in the opposite direction to the first temperature-dependent characteristic with the predetermined temperature change. The voltage generating circuit includes: The first power line is supplied with the first power voltage; The second power line is supplied with a second power voltage that is lower than the first power voltage; A first variable resistor and a second variable resistor connected in series; A first current path from the first power line to the first node between the first variable resistor and the second variable resistor; A second current path from the second node between the second variable resistor and the first power line to the second power line; and The third current path from the first node to the second power line, wherein... The second temperature-dependent characteristic is the characteristic that the value of the second current does not change with the specified temperature. The second current flows through the first variable resistor, and a fourth current, having a current value based on the difference between the first current value and the second current value, flows through the second variable resistor. When the first current is supplied to the second node, the current value flowing through the first current path is n times the current value of the second current, where n is a positive number excluding 1, and the second current flows through the second current path, while the first current flows through the third current path. When the third current is supplied to the second node, the current value of the current flowing through the first current path is n times the current value of the second current, and the second current flows through the second current path, while the third current flows through the third current path.

8. A semiconductor memory device, comprising: Storage cell array; as well as A voltage generating circuit is configured to generate a voltage required to perform an operation on one or more memory cells of the memory cell array, and to generate a first current having a first temperature-dependent characteristic, a second current having a second temperature-dependent characteristic different from the first temperature-dependent characteristic, and a third current having a third temperature-dependent characteristic, wherein the current value with the first temperature-dependent characteristic varies with a predetermined temperature change, and the current value with the third temperature-dependent characteristic varies in the opposite direction to the first temperature-dependent characteristic with the predetermined temperature change. The voltage generating circuit includes: The first power line is supplied with the first power voltage; The second power line is supplied with a second power voltage that is lower than the first power voltage; A first variable resistor and a second variable resistor connected in series; A first current path from the first power line to the first node between the first variable resistor and the second variable resistor; and A second current path from the second node between the second variable resistor and the first power supply line to the second power supply line, wherein... The second temperature-dependent characteristic is the characteristic that the value of the second current does not change with the specified temperature. The second current flows through the first variable resistor, and a fourth current, having a current value based on the difference between the first current value and the second current value, flows through the second variable resistor. When the current supplied to the first node through the first current path is the first current, the first current also flows through the second current path, and When the current supplied to the first node through the first current path is the third current, the third current also flows through the second current path.

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