Task scheduling method and device, electronic equipment and storage medium

Abstract

The application provides a task scheduling method and device, electronic equipment and storage medium, and relates to the technical field of communication. The method determines a target processing core in which a packet dequeue scheduling task is distributed among multiple processing cores when it is determined that the performance of a system QoS service does not meet a set performance, and then deactivates at least one other type of task in the target processing core except the packet dequeue scheduling task. In this way, the target processing core has more resources for the packet dequeue scheduling task, and more resources are used for scheduling a QoS queue, so that the performance of the QoS service can be improved.

Description

Technical Field

[0001] This application relates to the field of communication technology, and more specifically, to a task scheduling method, apparatus, electronic device, and storage medium. Background Technology

[0002] With the rapid development of mobile internet, cloud computing, big data, and other related technologies, the ability of communication devices to perceive and understand services has become increasingly important. To respond promptly to changes in user services, the throughput performance of communication devices is also undergoing significant changes, evolving from early, lower-performance centralized devices to today's higher-performance distributed framework devices, placing increasingly higher demands on their throughput. Therefore, in the Quality of Service (QoS) services on high-throughput network devices, the performance requirements for QoS services are also becoming increasingly stringent.

[0003] Due to the special nature of QoS services, queues have priority characteristics. For dequeue scheduling of multiple queues with different priorities on a certain interface, the current method is to use one core to schedule multiple queues corresponding to that interface. This undoubtedly greatly reduces forwarding performance, especially for high-throughput devices that are allocated multiple scheduling queues. The more queues there are, the more the forwarding performance will decrease. Summary of the Invention

[0004] The purpose of this application is to provide a task scheduling method, apparatus, electronic device, and storage medium to improve the problem of low performance of QoS services caused by existing scheduling methods.

[0005] In a first aspect, embodiments of this application provide a task scheduling method, the method comprising:

[0006] When it is determined that the performance of the system's Quality of Service (QoS) service does not meet the set performance, a target processing core with packet dequeue scheduling tasks is identified from among multiple processing cores; each processing core is assigned multiple different types of tasks, and each different type of task is used to perform different processing on the packets.

[0007] Disable at least one other type of task in the target processing core, other than the message dequeue scheduling task.

[0008] In the above implementation process, the insufficient performance of QoS services is generally due to the long processing time of other types of tasks besides packet dequeue scheduling tasks occupying the processing core, which affects the processing of packet dequeue scheduling tasks and causes packet dequeueing to be not processed quickly. Therefore, when it is determined that the performance of the system's QoS services does not meet the set performance, the solution of this application identifies a target processing core among multiple processing cores that is allocated packet dequeue scheduling tasks, and then disables at least one other type of task besides packet dequeue scheduling tasks in the target processing core. In this way, the target processing core can have more resources available for packet dequeue scheduling tasks, and more resources can be used to schedule QoS queues, thereby improving the performance of QoS services.

[0009] Optionally, if the number of target processing cores is N, where N is an integer greater than or equal to 2, disabling at least one other type of task in the target processing cores besides the message dequeue scheduling task includes:

[0010] At most, at least one other type of task other than the message dequeueing scheduling task can be disabled in N-1 target processing cores;

[0011] or,

[0012] Select to disable at least one other type of task in N target processing cores, excluding the message dequeue scheduling task, wherein when one other type of task in one target processing core is disabled, the other other type of task in at least one other target processing core is not disabled.

[0013] In the above implementation process, at most N-1 target processing cores can be disabled for other types of tasks, ensuring that no single type of task is completely disabled. This guarantees that normal packet processing will not be affected and improves the overall performance of QoS services. Furthermore, by disabling other types of tasks in N target processing cores, it ensures that no single type of task is disabled in all processing cores, thus guaranteeing that packets can be processed normally in multi-core network devices.

[0014] Optionally, the at least one other type of task includes a message receiving task. Since message receiving generally consumes a significant amount of processing core resources, disabling the message receiving task frees up more resources for scheduling tasks, resulting in faster performance improvements.

[0015] Optionally, each processing core is assigned a corresponding physical interface, and the packet dequeue scheduling task in each processing core is used for packet dequeue scheduling of the physical interface corresponding to the core; the processing cores corresponding to each physical interface are allocated according to the creation order of each physical interface or according to the bandwidth of each physical interface.

[0016] In the above implementation process, processing cores can be allocated according to the interface creation order or interface bandwidth to achieve a balanced distribution of message dequeue scheduling tasks.

[0017] Optionally, before determining the target processing core allocated the packet dequeue scheduling task among multiple processing cores when it is determined that the performance of the system's Quality of Service (QoS) service does not meet the set performance requirements, the method further includes:

[0018] When it is determined that the physical interface corresponding to one of the processing cores is allocated with hierarchical HQoS services, the packet dequeue scheduling task of the first-level queue corresponding to the HQoS service is assigned to the processing core, and the packet dequeue scheduling task of the second-level queue corresponding to the HQoS service is assigned to other processing cores; wherein, the packets dequeued from the first-level queue enter the second-level queue.

[0019] In the above implementation process, by distributing the message dequeue scheduling task of the secondary queue to other processing cores, the scheduling of the primary queue and the secondary queue is distributed to different processing cores, so that the scheduling of the secondary queue will not affect the scheduling of the primary queue, resulting in higher performance.

[0020] Optionally, if there are multiple secondary queues, the step of allocating the packet dequeue scheduling task corresponding to the secondary queue of the HQoS service to other processing cores includes:

[0021] The packet dequeue scheduling tasks for the multiple secondary queues corresponding to the HQoS service are evenly distributed across different processing cores. This avoids assigning all packet dequeue scheduling tasks to a single processing core, which would cause that core to have an excessive workload on the secondary queues, leading to performance degradation.

[0022] Optionally, if there are multiple secondary queues, the step of allocating the packet dequeue scheduling task corresponding to the secondary queue of the HQoS service to other processing cores includes:

[0023] Based on the creation order of the multiple secondary queues, the packet dequeue scheduling tasks corresponding to the HQoS service are distributed across other processing cores. This avoids assigning all scheduling tasks to a single processing core, which could lead to a performance degradation due to the heavy workload on that core.

[0024] Secondly, embodiments of this application provide a task scheduling apparatus, the apparatus comprising:

[0025] The processing core determination module is used to determine the target processing core among multiple processing cores that is assigned packet dequeue scheduling tasks when the performance of QoS services in the system does not meet the set performance. Each processing core is assigned multiple different types of tasks, and each different type of task is used to perform different processing on the packets.

[0026] The task processing module is used to disable at least one other type of task in the target processing core, except for the message dequeue scheduling task.

[0027] Thirdly, embodiments of this application provide an electronic device, including a processor and a memory, wherein the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, the steps of the method provided in the first aspect above are performed.

[0028] Fourthly, embodiments of this application provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, performs the steps of the method provided in the first aspect above.

[0029] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing embodiments of this application. The objectives and other advantages of this application may be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings. Attached Figure Description

[0030] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 A flowchart illustrating a task scheduling method provided in an embodiment of this application;

[0032] Figure 2 This application provides a schematic diagram illustrating the process of deactivating tasks within the kernel, as exemplified in this application.

[0033] Figure 3 A schematic diagram of an interface allocation processing core provided in an embodiment of this application;

[0034] Figure 4 This is a schematic diagram illustrating the allocation of scheduling tasks in an HQoS service scenario, provided as an embodiment of this application.

[0035] Figure 5 A structural block diagram of a task scheduling device provided in an embodiment of this application;

[0036] Figure 6 This is a schematic diagram of the structure of an electronic device for performing a task scheduling method, provided in an embodiment of this application. Detailed Implementation

[0037] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0038] It should be noted that the terms "system" and "network" in the embodiments of this invention can be used interchangeably. "Multiple" refers to two or more; therefore, in the embodiments of this invention, "multiple" can also be understood as "at least two". "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / ", unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship.

[0039] Insufficient QoS service performance is generally due to the long processing time of other types of tasks besides packet dequeue scheduling tasks, which affects the processing of packet dequeue scheduling tasks and prevents packets from being processed quickly. Therefore, this application provides a task scheduling method. When it is determined that the performance of the system's QoS service does not meet the set performance, the method identifies a target processing core among multiple processing cores that is allocated packet dequeue scheduling tasks, and then disables at least one other type of task in the target processing core besides packet dequeue scheduling tasks. In this way, the target processing core can have more resources available for packet dequeue scheduling tasks, and more resources can be used to schedule QoS queues, thereby improving the performance of QoS services.

[0040] Please refer to Figure 1 , Figure 1 A flowchart of a task scheduling method provided in this application embodiment, the method including the following steps:

[0041] Step S110: When it is determined that the performance of the system's QoS service does not meet the set performance, the target processing core with packet dequeue scheduling tasks is determined among multiple processing cores.

[0042] Due to the specific nature of QoS services, packets are output in queues with priority levels. For an interface with multiple queues of different priorities, dequeueing is performed sequentially based on priority, with higher-priority queues output first. Network devices monitor QoS service performance in real time, such as determining if the output packet volume is significantly less than the input packet volume. If so, the QoS service performance is deemed unsatisfactory. Alternatively, conditions for determining QoS performance can be flexibly configured based on actual needs, such as checking the length of each packet queue. If the length of most packet queues (e.g., exceeding a set number of queues) exceeds the set length, the QoS service performance is deemed unsatisfactory.

[0043] Network devices contain multiple processing cores. Each core is not only responsible for dequeuing packets but also for other packet processing tasks such as receiving, matching, and forwarding. Therefore, each core can include multiple tasks of different types, referred to as "Jobs." These different types of tasks are used to perform different processing on packets. The different types can be distinguished according to the task's function. If a task is used for dequeuing packets, its type is a packet dequeueing scheduling task; if it's used for packet matching, its type is a packet matching task; if it's used for receiving packets, its type is a packet receiving task, and so on. It should be noted that appropriate task types can be assigned to each processing core according to actual processing needs. Furthermore, there can be multiple tasks of the same type. For example, if a processing core needs to dequeue packets from multiple interfaces, multiple packet dequeueing scheduling tasks can be assigned to that core.

[0044] Insufficient performance of QoS services is generally caused by insufficient processing performance of packet dequeueing scheduling tasks. Since each processing core includes multiple different types of tasks, the processing of packet dequeueing scheduling tasks is affected by other types of tasks, leading to a deterioration in the performance of packet dequeueing scheduling tasks. The more time other types of tasks occupy the processing core, the worse the performance of the packet dequeueing scheduling task becomes. Therefore, when it is determined that the performance of the QoS service does not meet the set performance requirements, in order to improve performance, one can first identify the target processing cores among multiple processing cores that are assigned packet dequeueing scheduling tasks. This can be done by examining each processing core and finding the processing cores assigned to packet dequeueing scheduling tasks; these processing cores are called target processing cores.

[0045] Step S120: Disable at least one other type of task in the target processing core, except for the message dequeueing scheduling task.

[0046] To improve the performance of QoS services in the target processing core, at least one other type of task besides the packet dequeue scheduling task can be disabled. For example, if the target processing core contains two packet dequeue scheduling tasks, one packet receiving task, and two packet matching tasks, where the packet receiving task and the two packet matching tasks are referred to as "other types of tasks," then at least one of these tasks can be disabled. Disabling means pausing the operation of these types of tasks. If, after a period of time, the performance of the QoS service is found to meet the set performance requirements, these disabled tasks can be re-enabled. By disabling some tasks, more resources in the target processing core can be used for the packet dequeue scheduling task, making packet output processing more timely and faster, thereby improving the performance of the QoS service.

[0047] In the above implementation process, when it is determined that the performance of the system's QoS service does not meet the set performance, a target processing core with packet dequeue scheduling tasks is identified among multiple processing cores. Then, at least one other type of task in the target processing core, other than the packet dequeue scheduling task, is disabled. In this way, the target processing core can have more resources available for the packet dequeue scheduling task, and more resources can be used to schedule QoS queues, thereby improving the performance of QoS services.

[0048] Based on the above embodiments, if there are N target processing cores, where N is an integer greater than or equal to 2 (N can be less than or equal to the number of multiple processing cores), for example, if a network device includes 5 processing cores, and the number of target processing cores is also 5, it means that all 5 processing cores are allocated with packet dequeue scheduling tasks. In this case, when choosing to disable other types of tasks, in order to avoid the problem that the corresponding processing tasks cannot be executed because all processing cores of the same type of task are disabled, at most at least one other type of task other than packet dequeue scheduling tasks in N-1 target processing cores can be disabled, or at least one other type of task other than packet dequeue scheduling tasks in N target processing cores can be disabled. However, when a certain other type of task in one target processing core is disabled, at least one other type of task in at least one other target processing core is not disabled.

[0049] For example, in the first selection scenario: each of the 5 target processing cores contains 2 message dequeue scheduling tasks, 1 message receiving task, and 2 message matching tasks. In this case, up to 4 target processing cores can be selected from the 5 target processing cores (e.g., 1, 2, 3, or 4 target processing cores can be selected). If 4 target processing cores are selected, at least one type of task among the 1 message receiving task and 2 message matching tasks in these 4 target processing cores can be disabled. For example, all message matching tasks in the 4 target processing cores can be disabled (either both can be disabled or only one can be disabled), or all message receiving tasks in the 4 target processing cores can be disabled. Of course, the types of tasks selected to be disabled in the four target processing cores can be different. For example, target processing core 1 can choose to disable one message receiving task, target processing core 2 can choose to disable two message matching tasks, target processing core 3 can choose to disable all other types of tasks, and target processing core 4 can choose to disable one message receiving task. In other words, the four target processing cores do not need to select the same type of task to disable. As long as other types of tasks except message dequeueing scheduling tasks are disabled, more resources can be freed up for message dequeueing scheduling tasks to improve their performance.

[0050] In this scenario, not disabling at least one other type of task in all target processing cores is to avoid the problem that if all target processing cores disable the same other type of task (i.e., disable all tasks of the same type), the corresponding task of that type might fail to execute. For example, if all five target processing cores disable two packet matching tasks, the packet matching task itself will fail to execute, thus preventing packet processing. If only four target processing cores disable two packet matching tasks, and the matching task of the remaining target processing core is not disabled, then that target processing core can still be used to process packet matching tasks, thereby improving the overall QoS performance of the network device.

[0051] Regarding the second option: If you choose to disable tasks in all five target processing cores, when selecting the task type, you need to ensure that at least one type of task remains active in at least one processing core. For example, if four of the target processing cores choose to disable one packet receiving task, the other target processing core should not disable that packet receiving task, but instead disable other types of tasks, such as disabling two packet matching tasks. This allows packet receiving tasks to still be performed in the other target processing core. In other words, if any other type of task is disabled in one target processing core, at least one other target processing core will not disable that other type of task. This ensures that a certain type of task is not disabled in all processing cores, thus ensuring that packets can be processed normally in multi-core network devices.

[0052] In the above implementation process, at most N-1 target processing cores can be disabled to prevent all other tasks of a certain type from being disabled. This ensures that normal packet processing is not affected and improves the overall performance of QoS services. By disabling other tasks in N target processing cores, it ensures that a certain type of task will not be disabled in all target processing cores, thus ensuring that packets can be processed normally in multi-core network devices.

[0053] Based on the above embodiments, in scenarios with high traffic, the processing of received messages by the processing core becomes very time-consuming, affecting message output. In this case, since message reception is multi-core, the processing performance actually far exceeds message output. Therefore, when choosing to disable other types of tasks, at least one of the selected other types of tasks can include message reception tasks. For example, if the message reception task in the target processing core is disabled, the target processing core's message reception processing can be paused, and message reception can be transferred to other processing cores. Of course, if the message reception task and other types of tasks in the target processing core are both disabled, and only the message dequeueing scheduling task (such as...) is retained... Figure 2 As shown in the figure, the target processing core is only used for dequeueing of packets and does not perform other processing, which can greatly improve the performance of QoS services.

[0054] Based on the above embodiments, each processing core is allocated a corresponding physical interface. The packet dequeue scheduling task in each processing core is used for packet dequeue scheduling of the physical interface corresponding to the core. The processing cores corresponding to each physical interface are allocated according to the creation order of each physical interface or according to the bandwidth of each physical interface.

[0055] For example, if a network device includes 4 processing cores and 8 physical interfaces, when creating interfaces at the software level, a QoS channel is created for each interface. When creating a QoS channel, the processing core for the packet queue corresponding to its interface needs to be specified to schedule the dequeueing or enqueueing of packets in the packet queue. One method for allocating processing cores is to allocate them sequentially according to the creation order of the interfaces. For example, interface 1 is allocated processing core 1, interface 2 is allocated processing core 2, interface 3 is allocated processing core 3, interface 4 is allocated processing core 4, interface 5 is allocated processing core 1, interface 6 is allocated processing core 2, interface 7 is allocated processing core 3, and interface 8 is allocated processing core 4.

[0056] Another allocation method is based on interface bandwidth. The bandwidth can be distributed as evenly as possible across different processing cores. For example, if the bandwidth of interface 1 is 10M, the bandwidth of interface 2 is 50M, the bandwidth of interface 3 is 50M, the bandwidth of interface 4 is 50M, the bandwidth of interface 5 is 10M, the bandwidth of interface 6 is 10M, the bandwidth of interface 7 is 10M, and the bandwidth of interface 8 is 10M, then the average bandwidth of each processing core is 50M. Therefore, interfaces 1, 5, 6, 7, and 8 can be allocated to processing core 1, interface 2 to processing core 2, interface 3 to processing core 3, and interface 4 to processing core 4.

[0057] In addition, for the sub-interfaces created on each physical interface, their allocation follows the allocation of the main interface. For example, if interface 2 is allocated to processing core 2, then all sub-interfaces created on interface 2 will also be allocated to processing core 2.

[0058] Understandably, different allocation methods can be chosen for different application scenarios. For example, in a Business-Driven Wide Area Network (BDWAN) 1:N scenario, where there is only one packet output interface, allocation can be performed according to the interface creation order, which is simpler. If multiple interfaces can output packets, allocation can be performed according to interface bandwidth.

[0059] In the above implementation process, processing cores can be allocated according to the interface creation order or interface bandwidth to achieve a balanced distribution of message dequeue scheduling tasks.

[0060] After assigning physical interfaces to corresponding processing cores, corresponding tasks can be created within those cores. For example, if processing core 1 is assigned interfaces 1 and 4, then processing core 1 can create packet dequeueing scheduling tasks corresponding to interface 1 and interface 4. If both interface 1 and interface 4 have corresponding sub-interfaces, packet dequeueing scheduling tasks corresponding to those sub-interfaces can also be created within processing core 1. Figure 3 As shown.

[0061] In Hierarchical Quality of Service (HQoS) scenarios, HQoS utilizes multi-level queues for multiple scheduling operations, enabling fine-grained differentiation of traffic from different users and services, thus providing refined quality of service guarantees. Under HQoS, received packets are prioritized and initially enter the primary queue (all packets first). The secondary queue further categorizes packets within the primary queue, such as distinguishing between traffic from regular users and VIP users. Packets output from the primary queue then enter the categorized secondary queue, where they can be scheduled for output. In practice, even finer packet segmentation is possible. Therefore, HQoS can include tertiary or more queue levels. A tertiary queue further categorizes packets from the secondary queue, with packets from the secondary queue entering the tertiary queue. If multiple queue levels exist, packets are sequentially input into the next level queue.

[0062] In this embodiment of the application, if the HQoS service corresponds to a primary queue and a secondary queue, since the performance bottleneck of the HQoS service lies in the scheduling of the primary queue, if the scheduling tasks of the primary queue and the secondary queue are both assigned to the same processing core, the scheduling performance will become very poor when the number of secondary queues is large. In order to improve performance, when it is determined that the physical interface corresponding to one of the processing cores is allocated with the HQoS service, the packet dequeue scheduling task of the primary queue corresponding to the HQoS service can be assigned to that processing core, and the packet dequeue scheduling task of the secondary queue corresponding to the HQoS service can be assigned to other processing cores.

[0063] For example, in an HQoS service scenario, if the network device includes 3 processing cores and multiple physical interfaces: 10 Gigabit port 1, 10 Gigabit port 2, Gigabit port 1, Gigabit port 2, Gigabit port 1 sub-interface 1, and Gigabit port 1 sub-interface 2, and HQoS service is applied on 10 Gigabit port 1.

[0064] After the network device starts up, it first creates interfaces at the software level, allocates corresponding processing cores to each interface according to the creation order or bandwidth, and creates corresponding packet dequeueing scheduling tasks in the processing cores.

[0065] If the interface creation order is 10 Gigabit port 1 -> 10 Gigabit port 2 -> Gigabit port 1 -> Gigabit port 2 -> Gigabit port 1 sub-interface 1 -> Gigabit port 1 sub-interface 2, then the packet dequeue scheduling task for 10 Gigabit port 1 is assigned to processing core 1, the packet dequeue scheduling task for 10 Gigabit port 2 is assigned to processing core 2, the packet dequeue scheduling task for Gigabit port 1 is assigned to processing core 3, and the packet dequeue scheduling task for Gigabit port 2 is assigned to processing core 1. Sub-interfaces are not assigned according to the creation order; the assignment of sub-interfaces follows the main interface. Therefore, the packet dequeue scheduling tasks for both Gigabit port 1 sub-interface 1 and Gigabit port 1 sub-interface 2 are assigned to processing core 3.

[0066] Of course, bandwidth can also be allocated, meaning that the bandwidth of each processing core should be kept as consistent as possible. The allocation method is as follows: the packet outbound scheduling task of 10 Gigabit interface 1 is allocated to processing core 1, the packet outbound scheduling task of 10 Gigabit interface 2 is allocated to processing core 2, the packet outbound scheduling task of gigabit interface 1 is allocated to processing core 3, and the packet outbound scheduling task of gigabit interface 2 is allocated to processing core 3. The allocation of sub-interfaces follows the main interface, so the packet outbound scheduling tasks of gigabit interface 1 sub-interface 1 and gigabit interface 1 sub-interface 2 are both allocated to processing core 3. With this allocation, processing core 1 schedules 10 Gigabit bandwidth, processing core 2 schedules 10 Gigabit bandwidth, and processing core 3 schedules 4 gigabit bandwidth.

[0067] The HQoS service is applied on 10 Gigabit Ethernet port 1. If the allocation method described above is followed, the packet dequeueing tasks for both the primary and secondary HQoS queues will be assigned to processing core 1. This allocation will undoubtedly degrade performance. Therefore, to further improve performance, the packet dequeueing tasks for the primary queues can be assigned to processing core 1, while the packet dequeueing tasks for the secondary queues can be assigned to other processing cores, such as processing core 2 or processing core 3.

[0068] When creating a scheduling task for a secondary queue, the secondary queue can be treated as an interface, and a QoS channel can be created. Then, the created packet dequeue scheduling task can be assigned to other processing cores, such as processing core 2 or processing core 3, instead of processing core 1. In this way, processing core 1 can only perform scheduling of the primary queue and will not handle scheduling of the secondary queue.

[0069] Of course, for processing core 1, other types of tasks besides message dequeue scheduling can also be disabled. In this way, processing core 1 can only handle the dequeue scheduling of the first-level queue and the enqueue scheduling of the second-level queue. The dequeue scheduling of the second-level queue is performed by other processing cores, so there is no situation of multi-core scheduling of enqueue and multi-core scheduling of dequeue. This can eliminate the lock protection of the second-level queue, that is, lock protection is not required during scheduling, which can further improve performance.

[0070] In another implementation, if a physical interface allocated with HQoS services is assigned to processing core 1, packet dequeue scheduling tasks for the primary queue and the secondary queue can be created in processing core 1 first. However, if the performance of the HQoS service does not meet the set performance, the scheduling task for the secondary queue is disabled in processing core 1, and the packet dequeue scheduling task corresponding to the secondary queue is assigned to other processing cores, that is, the packet dequeue scheduling task for the secondary queue is assigned to other processing cores (such as processing core 2 or processing core 3). In this way, other processing cores can perform the dequeue scheduling of the secondary queue, without processing core 1 needing to perform the dequeue scheduling of the secondary queue. In this way, the scheduling of the primary queue and the secondary queue is assigned to different processing cores for processing, which can improve the performance of the HQoS service.

[0071] In the above implementation process, by distributing the message dequeue scheduling task of the secondary queue to other processing cores, the scheduling of the primary queue and the secondary queue is distributed to different processing cores, so that the scheduling of the secondary queue will not affect the scheduling of the primary queue, resulting in higher performance.

[0072] When there are multiple secondary queues, the message dequeueing scheduling tasks for multiple secondary queues can be evenly distributed across different processing cores. For example, if there are two secondary queues and two other processing cores, then one secondary queue message dequeueing scheduling task can be allocated to one processing core. Figure 4 As shown. Of course, if there are 3 secondary queues and 2 other processing cores, then 2 message dequeue scheduling tasks for the secondary queues can be allocated to one processing core, and 1 message dequeue scheduling task for the secondary queues can be allocated to the other processing core to ensure an even distribution as much as possible. If the number of secondary queues is less than the number of other processing cores, some of the other processing cores can be selected for allocation.

[0073] Alternatively, the packet dequeue scheduling tasks for multiple secondary queues can be distributed across other processing cores according to the creation order of the secondary queues (similar to the method of distributing processing cores according to the interface creation order in the above embodiment). For example, if there are 3 secondary queues and 2 other processing cores, the packet dequeue scheduling tasks for the first secondary queue can be allocated to processing core 2, the second secondary queue to processing core 3, and the third secondary queue to processing core 2. This avoids distributing all packet dequeue scheduling tasks to a single processing core, which could lead to a performance degradation due to the heavy workload of packet dequeue scheduling tasks on that core.

[0074] Please refer to Figure 5 , Figure 5 This is a schematic diagram of the structure of a task scheduling device 200 provided in an embodiment of this application. The device 200 may be a module, program segment, or code on an electronic device. It should be understood that this device 200 is similar to the one described above. Figure 1 The method implementation corresponds to this and can be executed. Figure 1 The various steps involved in the method embodiment and the specific functions of the device 200 can be found in the description above. To avoid repetition, detailed descriptions are omitted here.

[0075] Optionally, the device 200 includes:

[0076] The processing core determination module 210 is used to determine the target processing core among multiple processing cores that is assigned packet dequeue scheduling tasks when the performance of the QoS service in the system does not meet the set performance. Each processing core is assigned multiple different types of tasks, and each different type of task is used to perform different processing on the packets.

[0077] The task processing module 220 is used to disable at least one other type of task in the target processing core, excluding the message dequeue scheduling task.

[0078] Optionally, if the number of target processing cores is N, where N is an integer greater than or equal to 2, the task processing module 220 is configured to select at most N-1 target processing cores to disable at least one other type of task besides the message dequeue scheduling task; or, select to disable at least one other type of task among the N target processing cores besides the message dequeue scheduling task, wherein when a certain other type of task in one target processing core is disabled, the certain other type of task in at least one other target processing core is not disabled.

[0079] Optionally, the at least one other type of task includes a message receiving task.

[0080] Optionally, each processing core is assigned a corresponding physical interface, and the packet dequeue scheduling task in each processing core is used for packet dequeue scheduling of the physical interface corresponding to the core; the processing cores corresponding to each physical interface are allocated according to the creation order of each physical interface or according to the bandwidth of each physical interface.

[0081] Optionally, the device 200 further includes:

[0082] The task allocation module is used to allocate the packet dequeue scheduling task of the first-level queue corresponding to the HQoS service to the processing core when it is determined that the physical interface corresponding to one of the processing cores is allocated with hierarchical HQoS services, and to allocate the packet dequeue scheduling task of the second-level queue corresponding to the HQoS service to other processing cores; wherein, the packets dequeued from the first-level queue enter the second-level queue.

[0083] Optionally, if there are multiple secondary queues, the task allocation module is used to evenly distribute the packet dequeue scheduling tasks of the multiple secondary queues corresponding to the HQoS service into other different processing cores.

[0084] Optionally, if there are multiple secondary queues, the task allocation module is used to allocate the packet dequeue scheduling tasks of the multiple secondary queues corresponding to the HQoS service to other processing cores according to the creation order of the multiple secondary queues.

[0085] It should be noted that those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above description refers to the specific working process of the device, which can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0086] Please refer to Figure 6 , Figure 6This is a schematic diagram of an electronic device for executing a task scheduling method, provided in an embodiment of this application. The electronic device may include: at least one processor 310, such as a CPU; at least one communication interface 320; at least one memory 330; and at least one communication bus 340. The communication bus 340 is used to establish direct communication between these components. In this embodiment, the communication interface 320 is used for signaling or data communication with other node devices. The memory 330 may be high-speed RAM or non-volatile memory, such as at least one disk storage device. Optionally, the memory 330 may also be at least one storage device located remotely from the aforementioned processor. The memory 330 stores computer-readable instructions. When these computer-readable instructions are executed by the processor 310, the electronic device performs the aforementioned... Figure 1 The method and process are shown.

[0087] Understandable. Figure 6 The structure shown is for illustrative purposes only; the electronic device may also include components that are more advanced than those shown. Figure 6 The more or fewer components shown, or having the same Figure 6 The different allocations are shown. Figure 6 The components shown can be implemented using hardware, software, or a combination thereof.

[0088] This application provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, performs the following... Figure 1 The method process executed by the electronic device in the illustrated method embodiment.

[0089] This embodiment discloses a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions, and when the program instructions are executed by a computer, the computer can execute the methods provided in the above-described method embodiments. For example, it includes: when it is determined that the performance of the system's Quality of Service (QoS) service does not meet the set performance, determining a target processing core among multiple processing cores that is allocated a packet dequeue scheduling task; wherein each processing core is allocated multiple different types of tasks, and each different type of task is used to perform different processing on the packets; and disabling at least one other type of task in the target processing core other than the packet dequeue scheduling task.

[0090] In summary, the embodiments of this application provide a task scheduling method, apparatus, electronic device, and storage medium. When it is determined that the performance of the system's QoS service does not meet the set performance, a target processing core with packet dequeue scheduling tasks is identified among multiple processing cores. Then, at least one other type of task in the target processing core, excluding packet dequeue scheduling tasks, is disabled. In this way, the target processing core can have more resources available for packet dequeue scheduling tasks, and more resources can be used to schedule QoS queues, thereby improving the performance of QoS services.

[0091] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some communication interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0092] Furthermore, the units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0093] Furthermore, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0094] In this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any such actual relationship or order between these entities or operations.

[0095] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A task scheduling method, characterized in that, The method includes: When it is determined that the performance of the system's Quality of Service (QoS) service does not meet the set performance, a target processing core with packet dequeue scheduling tasks is identified from among multiple processing cores; each processing core is assigned multiple different types of tasks, and each different type of task is used to perform different processing on the packets. Disable at least one other type of task in the target processing core, other than the message dequeue scheduling task; Specifically, before determining the target processing core allocated packet dequeue scheduling tasks among multiple processing cores when it is determined that the performance of the system's Quality of Service (QoS) service does not meet the set performance requirements, the method further includes: When it is determined that the physical interface corresponding to one of the processing cores is allocated with hierarchical HQoS services, the packet dequeue scheduling task of the first-level queue corresponding to the HQoS service is assigned to the processing core, and the packet dequeue scheduling task of the second-level queue corresponding to the HQoS service is assigned to other processing cores; wherein, the packets dequeued from the first-level queue enter the second-level queue.

2. The method according to claim 1, characterized in that, If the number of target processing cores is N, where N is an integer greater than or equal to 2, disabling at least one other type of task in the target processing cores besides the message dequeue scheduling task includes: At most, at least one other type of task other than the message dequeueing scheduling task can be disabled in N-1 target processing cores; or, Select to disable at least one other type of task in N target processing cores, excluding the message dequeue scheduling task, wherein when one other type of task in one target processing core is disabled, the other other type of task in at least one other target processing core is not disabled.

3. The method according to claim 1 or 2, characterized in that, The at least one other type of task includes a message receiving task.

4. The method according to claim 1, characterized in that, Each processing core is assigned a corresponding physical interface. The packet dequeueing scheduling task in each processing core is used for packet dequeueing scheduling of the physical interface corresponding to that core. The processing cores corresponding to each physical interface are allocated according to the creation order of each physical interface or according to the bandwidth of each physical interface.

5. The method according to claim 1, characterized in that, If there are multiple secondary queues, the task of scheduling the dequeueing of packets from the secondary queues corresponding to the HQoS service is allocated to other processing cores, including: The message dequeue scheduling tasks for the multiple secondary queues corresponding to the HQoS service are evenly distributed among other different processing cores.

6. The method according to claim 1, characterized in that, If there are multiple secondary queues, the task of scheduling the dequeueing of packets from the secondary queues corresponding to the HQoS service is allocated to other processing cores, including: According to the creation order of the multiple secondary queues, the packet dequeue scheduling tasks of the multiple secondary queues corresponding to the HQoS service are allocated to other processing cores.

7. A task scheduling device, characterized in that, The device includes: The processing core determination module is used to determine the target processing core among multiple processing cores that is assigned packet dequeue scheduling tasks when the performance of QoS services in the system does not meet the set performance. Each processing core is assigned multiple different types of tasks, and each different type of task is used to perform different processing on the packets. The task processing module is used to disable at least one other type of task in the target processing core, except for the message dequeue scheduling task. The task allocation module is used to allocate the packet dequeue scheduling task of the first-level queue corresponding to the HQoS service to the processing core when it is determined that the physical interface corresponding to one of the processing cores is allocated with hierarchical HQoS services, and to allocate the packet dequeue scheduling task of the second-level queue corresponding to the HQoS service to other processing cores; wherein, the packets dequeued from the first-level queue enter the second-level queue.

8. An electronic device, characterized in that, It includes a processor and a memory, the memory storing computer-readable instructions that, when executed by the processor, perform the method as described in any one of claims 1-6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it performs the method as described in any one of claims 1-6.

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