Self-calibration circuits, methods, equipment, and storage media for device testing systems

CN116299114BActive Publication Date: 2026-08-11BEIJING JIALUN ELECTRONIC TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-31
Publication Date
2026-08-11

AI Technical Summary

Technical Problem

然而对于一套测试系统而言,有很多关键指标的下限值,受到是每种仪器的指标最弱项影响

Benefits of technology

[0035]通过本申请提出的技术方案,能够使用常用仪器组合架构的实现对器件测试系统的自校准,通过普通性能器件能快速实现自校准,并能够实现整体系统精度的优化,相较于传统的分模块的校准方法提供了更好的校准精度和用户体验,具有可推广价值。

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Abstract

This invention provides a self-calibration circuit, method, device, and storage medium for a device testing system. The self-calibration circuit includes a reference voltage source; a voltage switching circuit for adjusting the output voltage of the reference voltage source to an intermediate standard value between the maximum positive voltage and the minimum negative voltage; a first node at the output of the voltage switching circuit is connected to a waveform acquisition unit via a first switch, and simultaneously connected to an error amplifier circuit via a second switch. The error amplifier circuit is also connected to a waveform generation unit, a waveform acquisition unit, and a preamplifier unit. The technical solution proposed in this application enables self-calibration of a device testing system using a common instrument combination architecture. Self-calibration can be quickly achieved using ordinary performance devices, and the overall system accuracy can be optimized. Compared to traditional modular calibration methods, it provides better calibration accuracy and user experience, and has significant potential for widespread application.
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Description

Technical Field

[0001] This invention relates to the field of circuit calibration technology, and specifically, discloses a self-calibration circuit, method, device, and storage medium for use in device testing systems. Background Technology

[0002] Many high-precision measuring instruments are composed of a combination of precision instruments / modules. This allows for the utilization of the best performance components from each instrument to achieve better accuracy and more powerful or entirely different functions. However, for a testing system, the lower limits of many key indicators are influenced by the weakest aspects of each instrument's performance. Instrument self-calibration can minimize system errors, but because modular calibration has different calibration rules for each module, it usually increases calibration time and difficulty. Furthermore, after the system is assembled, it still needs to be recalibrated. Summary of the Invention

[0003] To address the aforementioned problems in the prior art, this application provides a self-calibration circuit, method, device, and storage medium for use in a device testing system. Specifically, the first aspect of this application provides a self-calibration circuit for use in a device testing system, wherein the device testing system includes a waveform generation unit, a waveform acquisition unit, and a preamplifier unit. This self-calibration circuit includes:

[0004] Reference voltage source;

[0005] A voltage switching circuit, connected to a reference voltage source, is used to adjust the output voltage of the reference voltage source to an intermediate standard value between the maximum preset positive voltage and the minimum preset negative voltage.

[0006] The first node at the output of the voltage switching circuit is connected to the waveform acquisition unit via the first switch W6;

[0007] The first node of the voltage switching circuit output is connected to the error amplifier circuit through the second switch W5. The error amplifier circuit is also connected to the waveform generation unit, the waveform acquisition unit and the preamplifier unit.

[0008] In one possible implementation of the first aspect above, the voltage switching circuit uses several parallel feedback resistors to form several intermediate standard values;

[0009] The voltage switching circuit includes:

[0010] The first operational amplifier U10 has its inverting input terminal connected to a reference voltage source via a first resistor R27, its non-inverting input terminal grounded, and its output terminal connected to the first node via a third switch W11.

[0011] The fourth switch W10, the second resistor R30 connected in series, the fifth switch W3, the third resistor R29 connected in series, the sixth switch W2, the fourth resistor R28 connected in series, and the seventh switch W1 are connected in parallel between the inverting input terminal and the output terminal of the first operational amplifier U10.

[0012] The second operational amplifier U12 has its inverting input terminal grounded through the fifth resistor R33, its non-inverting input terminal connected to a reference voltage source, and its output terminal connected to the first node through the eighth switch W12.

[0013] The sixth resistor R35 and the ninth switch W9, the seventh resistor R32 and the tenth switch W8, and the eighth resistor R31 and the eleventh switch W7, which are connected in series, are connected in parallel between the inverting input and output terminals of the second operational amplifier U12.

[0014] In one possible implementation of the first aspect described above, the error amplifier circuit includes:

[0015] The third operational amplifier U11 has its inverting input terminal connected to the second switch W5 via the ninth resistor R34, its non-inverting input terminal grounded via the tenth resistor R38, and its output terminal connected to the waveform acquisition unit via the twelfth switch W13.

[0016] The eleventh resistor R36 is connected in parallel between the inverting input and output of the third operational amplifier U11;

[0017] The second node between the non-inverting input of the third operational amplifier U11 and the tenth resistor R38 is connected to the waveform generation unit through the twelfth resistor R37 and the thirteenth switch W14.

[0018] The second node is also connected to the preamplifier unit via the twelfth resistor R37 and the fourteenth switch W28.

[0019] The second aspect of this application provides a self-calibration method for a device testing system, wherein the device testing system includes a waveform generation unit, a waveform acquisition unit, and a preamplifier unit. This self-calibration method is applied to the self-calibration circuit provided in the first aspect, including:

[0020] The waveform acquisition unit acquires intermediate standard values ​​and compares the differences between the acquired values ​​and intermediate standard values ​​to correct the waveform acquisition unit.

[0021] The error is amplified by an error amplifier circuit, and the intermediate standard value after the amplification error is collected by the waveform generation unit. The difference between the collected value and the intermediate standard value is compared to correct the waveform generation unit.

[0022] The accuracy of the feedback voltage of the preamplifier unit is corrected by testing the calibration resistor inside the preamplifier unit.

[0023] In one possible implementation of the second aspect above, the self-calibration method is applied to the self-calibration circuit of claim 4, comprising:

[0024] Step S1: Disconnect all switches in the self-calibration circuit;

[0025] Step S2: Close the first switch W6, the third switch W11 and the fourth switch W10, and acquire waveforms through the waveform acquisition unit to record them as uncalibrated data;

[0026] Step S3: Disconnect the fourth switch W10, and turn on the seventh switch W1, the sixth switch W2, and the fifth switch W3 in sequence, and acquire waveforms through the waveform acquisition unit to record them as data to be calibrated.

[0027] Step S4: Calibrate the waveform acquisition unit based on the uncalibrated data and the data to be calibrated;

[0028] Step S5: Disconnect all switches in the self-calibration circuit, and then close the second switch W5, the twelfth switch W13, and the thirteenth switch W14.

[0029] Step S6: Repeat steps S2 to S3 above to calibrate the waveform generating unit based on the uncalibrated data and the data to be calibrated.

[0030] Step S7: Disconnect all switches in the self-calibration circuit, and then close the second switch W5, the twelfth switch W13, and the fourteenth switch W28.

[0031] In step S8, the preamplifier unit sequentially measures the internal calibration resistors and feeds back the measured signals to the waveform acquisition unit for comparison to correct the accuracy of the feedback voltage of the preamplifier unit.

[0032] The third aspect of this application provides a self-calibration device for a device testing system, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the self-calibration method for a device testing system provided in the second aspect.

[0033] The fourth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the self-calibration method for a device testing system provided in the second aspect above.

[0034] Compared with the prior art, this application has the following beneficial effects:

[0035] The technical solution proposed in this application enables self-calibration of the device testing system using a common instrument combination architecture. Self-calibration can be quickly achieved using ordinary performance devices, and the overall system accuracy can be optimized. Compared with the traditional modular calibration method, it provides better calibration accuracy and user experience, and has promotional value. Attached Figure Description

[0036] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0037] Figure 1 According to an embodiment of this application, a schematic diagram of a self-calibration circuit applied to a device testing system is shown;

[0038] Figure 2 According to an embodiment of this application, a flowchart of a self-calibration method applied to a device testing system is shown;

[0039] Figure 3 According to an embodiment of this application, a structural schematic diagram of a self-calibration device applied to a device testing system is shown;

[0040] Figure 4 According to an embodiment of this application, a schematic diagram of the structure of a computer-readable storage medium is shown. Detailed Implementation

[0041] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0042] The term "comprising" and its variations as used herein signify open inclusion, i.e., "including but not limited to". Unless otherwise stated, the term "or" means "and / or". The term "based on" means "at least regionally based on". The terms "one example embodiment" and "one embodiment" mean "at least one example embodiment". The term "another embodiment" means "at least one additional embodiment". The terms "first", "second", etc., may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0043] To address the aforementioned problems in the prior art, this application provides a self-calibration circuit, method, device, and storage medium for device testing systems, capable of calibrating errors at the entire system level. The technical solution provided in this application will be explained and illustrated below with reference to embodiments.

[0044] In some embodiments of this application, Figure 1 A schematic diagram of a self-calibration circuit applied to a device testing system is shown. It can be understood that the device testing system includes a waveform generation unit, a waveform acquisition unit, and a preamplifier unit. The waveform generation unit generates a signal, the preamplifier receives the signal, amplifies it, and applies it to the device under test (DUT). The minute voltage or current of the DUT is amplified by the preamplifier, collected by the waveform acquisition unit, and fed back to the host computer. In traditional error calibration methods, each functional unit needs to be calibrated individually to a specified value, requiring three calibrations, and the errors are cumulative, resulting in deficiencies in calibration accuracy and speed.

[0045] like Figure 1 As shown, this self-calibration circuit includes:

[0046] A reference voltage source U1; a voltage switching circuit 100, connected to the reference voltage source U1, used to adjust the output voltage of the reference voltage source to an intermediate standard value between the maximum preset positive voltage and the minimum preset negative voltage; the first node a of the output end of the voltage switching circuit 100 is connected to the waveform acquisition unit through the first switch W6; the first node a of the output end of the voltage switching circuit 100 is connected to the error amplifier circuit 200 through the second switch W5, and the error amplifier circuit 200 is also connected to the waveform generation unit, the waveform acquisition unit and the preamplifier unit respectively.

[0047] like Figure 1 As shown, the voltage switching circuit 100 uses several parallel feedback resistors to form several intermediate standard values, which may specifically include:

[0048] The first operational amplifier U10 has its inverting input connected to a reference voltage source via a first resistor R27, its non-inverting input grounded, and its output connected to the first node via a third switch W11.

[0049] The fourth switch W10, the second resistor R30 connected in series, the fifth switch W3, the third resistor R29 connected in series, the sixth switch W2, the fourth resistor R28 connected in series, and the seventh switch W1 are connected in parallel between the inverting input terminal and the output terminal of the first operational amplifier U10.

[0050] The second operational amplifier U12 has its inverting input terminal grounded through the fifth resistor R33, its non-inverting input terminal connected to a reference voltage source, and its output terminal connected to the first node through the eighth switch W12.

[0051] The sixth resistor R35 and the ninth switch W9, the seventh resistor R32 and the tenth switch W8, and the eighth resistor R31 and the eleventh switch W7, which are connected in series, are connected in parallel between the inverting input and output terminals of the second operational amplifier U12.

[0052] like Figure 1 As shown, the error amplifier circuit 200 may specifically include:

[0053] The third operational amplifier U11 has its inverting input connected to the second switch W5 via the ninth resistor R34, and its non-inverting input grounded via the tenth resistor R38. The output of the third operational amplifier U11 is connected to the waveform acquisition unit via the twelfth switch W13. The eleventh resistor R36 is connected in parallel between the inverting input and output of the third operational amplifier U11. The second node b between the non-inverting input of the third operational amplifier U11 and the tenth resistor R38 is connected to the waveform generation unit via the twelfth resistor R37 and the thirteenth switch W14. The second node b is also connected to the preamplifier unit via the twelfth resistor R37 and the fourteenth switch W28.

[0054] In some embodiments of this application, a self-calibration method for a device testing system is also provided, applied to the self-calibration circuit provided in the foregoing embodiments, comprising:

[0055] The waveform acquisition unit acquires intermediate standard values ​​and compares the differences between the acquired values ​​and the intermediate standard values ​​to correct the waveform acquisition unit.

[0056] The error is amplified by an error amplifier circuit, and the waveform generation unit collects the intermediate standard value after the amplification error, and the difference between the collected value and the intermediate standard value is compared to correct the waveform generation unit.

[0057] The accuracy of the feedback voltage of the preamplifier unit is corrected by testing the calibration resistor inside the preamplifier unit.

[0058] Understandably, in the self-calibration method described above, the waveform acquisition unit is calibrated first. The waveform acquisition section collects the standard voltage, and the collected value is compared with the actual value and recorded as the error value of the waveform acquisition unit for correction. After calibrating the waveform acquisition, the entire system can be calibrated using the acquisition module and the reference voltage. By comparing the generated waveform with the reference voltage, the error needs to be amplified before being acquired by the waveform generator. The waveform generator and waveform acquisition module typically have accuracies on the same order of magnitude, requiring error amplification to indirectly improve their relative accuracy. After calibration, the waveform acquisition and generation module can work normally with the preamplifier module. At this point, the accuracy of the preamplifier's feedback voltage can be calibrated by testing the internal calibration resistor of the preamplifier.

[0059] Specifically, in conjunction with this application Figure 1 The self-calibration circuit shown above, and the self-calibration method described above, can be used as follows: Figure 2 As shown, it can specifically include:

[0060] Step S1: Disconnect all switches in the self-calibration circuit.

[0061] Step S2: Close the first switch W6, the third switch W11, and the fourth switch W10, and acquire waveforms through the waveform acquisition unit to record them as uncalibrated data.

[0062] Step S3: Disconnect the fourth switch W10, and turn on the seventh switch W1, the sixth switch W2, and the fifth switch W3 in sequence. Then, acquire waveforms through the waveform acquisition unit to record them as data to be calibrated.

[0063] Step S4: Calibrate the waveform acquisition unit based on the uncalibrated data and the data to be calibrated.

[0064] Step S5: Disconnect all switches in the self-calibration circuit, and then close the second switch W5, the twelfth switch W13, and the thirteenth switch W14.

[0065] Step S6: Repeat steps S2 to S3 above to calibrate the waveform generation unit based on the uncalibrated data and the data to be calibrated.

[0066] Step S7: Disconnect all switches in the self-calibration circuit, and then close the second switch W5, the twelfth switch W13, and the fourteenth switch W28.

[0067] In step S8, the preamplifier unit sequentially measures the internal calibration resistors and feeds back the measured signals to the waveform acquisition unit for comparison to correct the accuracy of the feedback voltage of the preamplifier unit.

[0068] It is understood that steps S2 to S4 are used to calibrate the waveform acquisition part, steps S5 to S6 are used to calibrate the waveform generation part, and steps S7 to S8 are used to calibrate the preamplifier system, which will not be elaborated here.

[0069] It is understood that various aspects of the technical solution of this application can be implemented as a system, method, or program product. Therefore, various aspects of the technical solution of this application can be specifically implemented in the following forms: a completely hardware implementation method, a completely software implementation method (including firmware, microcode, etc.), or an implementation method combining hardware and software aspects, which can be collectively referred to here as a "circuit", "module", or "platform".

[0070] Those skilled in the art should understand that the units, modules, or steps of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. Optionally, they can be implemented using computer-executable program code, thereby storing them in a storage medium for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those described herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module.

[0071] Figure 3 According to some embodiments of this application, a schematic diagram of a self-calibration device applied to a device testing system is shown. This self-calibration device is used to implement the self-calibration method for device testing systems provided in the foregoing embodiments. The following refers to... Figure 3 The electronic device 600 implemented according to the method described in this embodiment will be described in detail below. Figure 3 The electronic device 600 shown is merely an example and should not impose any limitation on the functionality and scope of use of any embodiment of the technical solution in this application.

[0072] like Figure 3 As shown, the electronic device 600 is presented in the form of a general-purpose computing device. The components of the electronic device 600 may include, but are not limited to: at least one processing unit 610, at least one storage unit 620, a bus 630 connecting different platform components (including storage unit 620 and processing unit 610), a display unit 640, etc.

[0073] The storage unit stores program code, which can be executed by the processing unit 610, enabling the processing unit 610 to implement the various functional modules of the self-calibration system applied to the device testing system described above in this embodiment.

[0074] Storage unit 620 may include a readable medium in the form of a volatile storage unit, such as random access unit (RAM) 6201 and / or cache storage unit 6202, and may further include read-only storage unit (ROM) 6203.

[0075] Storage unit 620 may also include a program / utility 6204 having a set (at least one) of program modules 6205, such program modules 6205 including but not limited to: operating system, one or more application programs, other program modules, and program data, each or some combination of these examples may include an implementation of a network environment.

[0076] Bus 630 can represent one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, an image acceleration port, a processing unit, or a local bus using any of the various bus structures.

[0077] The audio / video signal synchronization processing device 600 can also communicate with one or more external devices 700 (e.g., keyboard, pointing device, Bluetooth device, etc.), and with one or more devices that enable user interaction with the electronic device 600, and / or with any device that enables the electronic device to communicate with one or more other computing devices (e.g., router, modem, etc.). This communication can be performed via the input / output (I / O) interface 650. Furthermore, the electronic device 600 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via the network adapter 660. The network adapter 660 can communicate with other modules of the electronic device 600 via the bus 630. It should be understood that, although... Figure 3 As not shown in the diagram, other hardware and / or software modules may be used in conjunction with the electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage platforms.

[0078] In some embodiments of this application, a computer-readable storage medium is also provided, on which a computer program is stored. When the computer program is executed by a processor, it can implement the various steps of the self-calibration method applied to the device testing system described above.

[0079] Although other specific implementation methods are not listed in detail in this embodiment, in some possible implementation methods, various aspects of the technical solution described in this application can also be implemented in the form of a program product, which includes program code. When the program product is run on a terminal device, the program code is used to cause the terminal device to perform the steps described in the self-calibration method applied to the device testing system in this application according to the various embodiments of the technical solution of this application.

[0080] Figure 4 A schematic diagram of the structure of a computer-readable storage medium is shown according to some embodiments of this application. For example... Figure 4As shown, a program product 800 for implementing the self-calibration method applied to a device testing system according to an embodiment of the technical solution of this application is described. This product can be a portable compact disc read-only memory (CD-ROM) and includes program code, and can run on a terminal device, such as a personal computer. Of course, the program product generated according to this embodiment is not limited to this. In the technical solution of this application, the readable storage medium can be any tangible medium containing or storing a program, which can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0081] The program product may employ any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0082] Computer-readable storage media may include data signals propagated in baseband or as a carrier wave region, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A readable storage medium may also be any readable medium other than a readable storage medium that can transmit, propagate, or transfer a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.

[0083] Program code for executing the technical solutions of this application can be written in any combination of one or more programming languages. These programming languages ​​include object-oriented programming languages—such as Java and C++—and conventional procedural programming languages—such as C or similar languages. The program code can execute entirely on the user's computing device, locally on the user's device, as a standalone software package, locally on the user's computing device, locally on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device.

[0084] In summary, the technical solution proposed in this application enables self-calibration of the device testing system using a common instrument combination architecture. Self-calibration can be quickly achieved using ordinary performance devices, and the overall system accuracy can be optimized. Compared with the traditional modular calibration method, it provides better calibration accuracy and user experience, and has promotional value.

[0085] The above description is only a description of the preferred embodiment of the technical solution of this application, and is not intended to limit the scope of the technical solution of this application. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A self-calibration circuit for a device testing system, the device testing system comprising a waveform generation unit, a waveform acquisition unit, and a preamplifier unit, characterized in that, The self-calibration circuit includes: Reference voltage source; A voltage switching circuit, connected to the reference voltage source, is used to adjust the output voltage of the reference voltage source to an intermediate standard value between the maximum preset positive voltage and the minimum preset negative voltage; the voltage switching circuit forms several intermediate standard values ​​through several parallel feedback resistors; The first node at the output of the voltage switching circuit is connected to the waveform acquisition unit via the first switch W6; The first node of the output terminal of the voltage switching circuit is connected to the error amplifier circuit through the second switch W5. The error amplifier circuit is also connected to the waveform generation unit, the waveform acquisition unit and the preamplifier unit respectively. The error amplifier circuit includes: The third operational amplifier U11 has its inverting input terminal connected to the second switch W5 via the ninth resistor R34, its non-inverting input terminal grounded via the tenth resistor R38, and its output terminal connected to the waveform acquisition unit via the twelfth switch W13. The eleventh resistor R36 is connected in parallel between the inverting input terminal and the output terminal of the third operational amplifier U11; The second node between the non-inverting input terminal of the third operational amplifier U11 and the tenth resistor R38 is connected to the waveform generating unit through the twelfth resistor R37 and the thirteenth switch W14; The second node is also connected to the preamplifier unit via the twelfth resistor R37 and the fourteenth switch W28.

2. The self-calibration circuit for a device testing system as described in claim 1, characterized in that, The voltage switching circuit includes: The first operational amplifier U10 has its inverting input terminal connected to the reference voltage source via a first resistor R27, its non-inverting input terminal grounded, and its output terminal connected to the first node via a third switch W11. The fourth switch W10, the second resistor R30 connected in series, the fifth switch W3, the third resistor R29 connected in series, the sixth switch W2, the fourth resistor R28 connected in series, and the seventh switch W1 are connected in parallel between the inverting input terminal and the output terminal of the first operational amplifier U10. The second operational amplifier U12 has its inverting input terminal grounded through the fifth resistor R33, its non-inverting input terminal connected to the reference voltage source, and its output terminal connected to the first node through the eighth switch W12. The sixth resistor R35 and the ninth switch W9, the seventh resistor R32 and the tenth switch W8, and the eighth resistor R31 and the eleventh switch W7, which are connected in series, are connected in parallel between the inverting input terminal and the output terminal of the second operational amplifier U12.

3. A self-calibration method for a device testing system, the device testing system comprising a waveform generation unit, a waveform acquisition unit, and a preamplifier unit, characterized in that, The self-calibration method is applied to the self-calibration circuit as described in claim 2, including: The waveform acquisition unit acquires intermediate standard values, and the difference between the acquired values ​​and the intermediate standard values ​​is compared to correct the waveform acquisition unit. The error is amplified by an error amplifier circuit, and the waveform acquisition unit acquires an intermediate standard value after the amplification error is obtained. The difference between the acquired value and the intermediate standard value is compared to correct the waveform generation unit. The accuracy of the feedback voltage of the preamplifier unit is corrected by testing the calibration resistor inside the preamplifier unit. Specifically, it includes: Step S1: Disconnect all switches in the self-calibration circuit; Step S2: Close the first switch W6, the third switch W11 and the fourth switch W10, and acquire waveforms through the waveform acquisition unit to record them as uncalibrated data; Step S3: Disconnect the fourth switch W10, turn on the seventh switch W1, the sixth switch W2, and the fifth switch W3 in sequence, and acquire waveforms through the waveform acquisition unit to record them as data to be calibrated. Step S4: Calibrate the waveform acquisition unit based on the uncalibrated data and the data to be calibrated; Step S5: Disconnect all switches in the self-calibration circuit, and then close the second switch W5, the twelfth switch W13 and the thirteenth switch W14. Step S6: Repeat steps S2 to S3 above to calibrate the waveform generating unit based on the uncalibrated data and the data to be calibrated. Step S7: Disconnect all switches in the self-calibration circuit, and then close the second switch W5, the twelfth switch W13 and the fourteenth switch W28. In step S8, the preamplifier unit sequentially measures the internal calibration resistors and feeds back the measured signals to the waveform acquisition unit for comparison to correct the accuracy of the feedback voltage of the preamplifier unit.

4. A self-calibration device for use in a device testing system, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the self-calibration method for a device testing system as described in claim 3.

5. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the self-calibration method for a device testing system as described in claim 3.

Citation Information

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