A page fault processing method, device and storage medium
By finding the target MMIO address and ending the interrupt after receiving a page fault, accessing the data using the target storage device, and performing an asynchronous memory copy task, the problem of low memory access efficiency caused by page faults is solved, and fast memory access can be restored.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ALIBABA CLOUD COMPUTING CO LTD
- Filing Date
- 2023-03-16
- Publication Date
- 2026-07-24
AI Technical Summary
If a page fault lasts too long, it will affect memory access efficiency.
Upon receiving a page fault instruction, the system locates the target MMIO address and terminates the interrupt, then accesses the target storage device to perform data, asynchronously copies memory, and maintains the page table state to avoid data conflicts.
It effectively reduces the duration of page faults and improves memory access efficiency.
Smart Images
Figure CN116303123B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computer technology, and in particular to a page fault handling method, device and storage medium. Background Technology
[0002] Memory swapping is a technique that copies infrequently used memory pages to disk, freeing up physical memory and increasing the available memory in the system. Using memory swapping can significantly improve the memory utilization of a physical machine, playing a crucial role in memory-density data centers and cloud computing.
[0003] Memory swapping can lead to page faults. In response, the Memory Management Unit (MMU) on the physical machine can issue a page fault interrupt, which suspends the program that initiated the memory access request. The page fault can only end and the original program can continue execution after the missing memory page is swapped back into physical memory. As memory page sizes increase, the time required to swap back memory pages also increases, leading to excessively long page fault durations and impacting memory access efficiency. Summary of the Invention
[0004] This application provides a page fault handling method, apparatus, and storage medium to reduce the duration of page fault interruptions.
[0005] This application provides a page fault handling method, including:
[0006] Upon receiving a page fault instruction for a memory access request, the system searches the specified page table for the target MMIO address that maps to the target virtual address pointed to by the memory access request. The target MMIO address is a physical address in the MMIO address space generated by memory mapping of the target storage device used for memory swapping.
[0007] The page fault interrupt instruction is terminated;
[0008] According to the target MMIO address, access the data required for the memory access request from the target storage device.
[0009] Optionally, the method may further include:
[0010] In response to the page fault instruction, a memory page is allocated from physical memory for the virtual page corresponding to the target virtual address;
[0011] Initiate a memory copy task asynchronous with the memory access request. The memory copy task is used to copy the physical page corresponding to the target MMIO address in the target storage device to the memory page.
[0012] Optionally, the method may further include:
[0013] After starting the memory copy task and before ending the page fault interrupt instruction, the target virtual address in the specified page table is set to a non-page fault and read-only state;
[0014] After the memory copy task is completed, the target virtual address is mapped to the physical address corresponding to the memory page in the designated page table.
[0015] Optionally, accessing the data required for the memory access request from the target storage device according to the target MMIO address includes:
[0016] If the memory access request is a write request, the memory copy task is interrupted based on the read-only state corresponding to the target virtual address.
[0017] Set the target virtual address in the specified page table to a state where there are no page faults and it is readable and writable;
[0018] Based on the read / write status corresponding to the target virtual address, the data required for the write request is accessed from the target storage device according to the target MMIO address.
[0019] Optionally, the method may further include:
[0020] After the write request is completed, restart the memory copy task;
[0021] Set the target virtual address in the specified page table to a read-only state with no page faults.
[0022] Optionally, accessing the data required for the memory access request from the target storage device according to the target MMIO address includes:
[0023] If the memory access request is a read request, then based on the read-only state corresponding to the target virtual address, the data required for the read request is accessed from the target storage device according to the target MMIO address.
[0024] Optionally, the method may further include:
[0025] If it is determined that there exists a memory page in physical memory that maps to the virtual page corresponding to the target virtual address and needs to be swapped out, then a physical page that matches the specification of the memory page is allocated from the MMIO address space, wherein the physical address corresponding to the physical page in the MMIO address space is used as the target MMIO address;
[0026] Copy the data in the memory page to the target storage device according to the target MMIO address;
[0027] Reclaim the memory pages;
[0028] The target virtual address is mapped to the target MMIO address in the specified table entry.
[0029] Optionally, the physical page has the same specifications as the memory page.
[0030] Optionally, accessing the data required for the memory access request from the target storage device according to the target MMIO address includes:
[0031] The memory access request is converted into a device access request, the device access request containing the target MMIO address and the page offset specified in the target virtual address;
[0032] The device access request is initiated to the target storage device so that the target storage device can find the target device storage address in its device storage address space that maps to the target MMIO address and the page offset, and respond to the device access request according to the target device storage address and the storage granularity adopted by the target storage device.
[0033] Optionally, the memory access request is initiated by an application or virtual machine running on the computer device; the target storage device is a PCI device or a PCIe device.
[0034] This application embodiment also provides a computer device, the computer device including a processor and physical memory, and the computer device is further equipped with a target storage device based on MMIO access;
[0035] The target storage device is used for memory swapping;
[0036] The physical memory is used to store the computer programs involved in the aforementioned methods;
[0037] The processor is used to execute the computer program to implement the aforementioned method.
[0038] This application also provides a computer-readable storage medium for storing computer instructions, which, when executed by one or more processors, cause the one or more processors to perform the aforementioned page fault handling method.
[0039] In this embodiment, a target storage device based on MMIO access, mounted on a computer device, is used as a memory swapping medium. Memory pages can be swapped to the target storage device to free up physical memory. Furthermore, after memory swapping, the physical address mapped to the virtual address in the page table can be modified to the MMIO address in the MMIO address space corresponding to the target storage device. Based on this, in the event of a page fault, the MMIO address containing the data required for the memory access request can be found in the page table, and the page fault can be terminated immediately. This allows the memory access request to be resumed immediately, and the required data can be accessed from the target storage device according to the MMIO mapping. Therefore, in the event of a page fault, there is no need to wait for memory swapping back; instead, the page fault can be terminated immediately, and the required data can be accessed according to the MMIO mapping. This virtually eliminates the duration of the page fault, thereby effectively improving memory access efficiency. Attached Figure Description
[0040] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:
[0041] Figure 1 A schematic flowchart illustrating a page fault handling method provided for an exemplary embodiment of this application;
[0042] Figure 2 A logical schematic diagram of a page fault handling method provided for an exemplary embodiment of this application;
[0043] Figure 3 A modification logic for a specified table entry is provided for an exemplary embodiment of this application;
[0044] Figure 4 A schematic diagram illustrating an application scenario provided for an exemplary embodiment of this application;
[0045] Figure 5 This is a schematic diagram of the structure of a computer device provided for another exemplary embodiment of this application. Detailed Implementation
[0046] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0047] Currently, page faults are characterized by excessively long durations, leading to poor memory access efficiency. To address this, some embodiments of this application utilize a target storage device equipped on a computer device with MMIO (Memory-mapped I / O) access as a memory swapping medium. Memory pages can be swapped to the target storage device to free up physical memory. Furthermore, after memory swapping, the physical addresses mapped to virtual addresses in the page table can be modified to the MMIO addresses in the MMIO address space corresponding to the target storage device. Based on this, in the event of a page fault, the MMIO address containing the data required for the memory access request can be found in the page table, and the page fault can be terminated immediately. This allows the memory access request to be resumed immediately, and the required data can be accessed from the target storage device according to the MMIO mapping. Therefore, in the event of a page fault, there is no need to wait for memory swapping back; instead, the page fault can be terminated immediately, and the required data can be accessed according to the MMIO mapping. This virtually eliminates the duration of page faults, thereby effectively improving memory access efficiency.
[0048] The technical solutions provided by the various embodiments of this application are described in detail below with reference to the accompanying drawings.
[0049] Figure 1 This is a flowchart illustrating a page fault handling method provided for an exemplary embodiment of this application. The method can be executed by a memory management device, which can be implemented as software, hardware, or a combination of both, and can be integrated into a computer device. (Reference) Figure 1 The method may include:
[0050] Step 100: After receiving a page fault instruction for a memory access request, search the specified page table for the target MMIO address that maps to the target virtual address pointed to by the memory access request. The target MMIO address is the physical address in the MMIO address space generated by memory mapping of the target storage device used for memory swapping.
[0051] Step 102: End the page fault interrupt instruction;
[0052] Step 103: Access the data required for the memory access request from the target storage device according to the target MMIO address.
[0053] The page fault handling method provided in this embodiment can be applied to memory management scenarios in various types of computer devices. The computer device in this embodiment can be a cloud server in a data center for cloud computing, or it can be a regular server, personal computer, etc. This embodiment does not limit the physical implementation type of the computer device.
[0054] Furthermore, in a virtualization scenario, the page fault handling method provided in this embodiment can be implemented by a virtual machine manager running on the computer device, specifically by the memory management module (MM) within the virtual machine manager. The virtual machine manager (VMM) is an intermediate software layer running between the underlying physical server and the operating system, allowing multiple operating systems and applications to share hardware. It can also be called a hypervisor. Accordingly, in a virtualization scenario, memory access requests occurring on the computer device can be initiated by the virtual machine.
[0055] In non-virtualized scenarios, i.e., traditional scenarios, the page fault handling method provided in this embodiment can be implemented by the computer device's operating system, specifically by the memory management module (MM) running within the operating system. Correspondingly, memory access requests occurring in the computer device can be initiated by applications.
[0056] Currently, computer devices manage memory based on page tables. A page table is a special data structure, typically located in the page table area of the system space, used to store the mapping between virtual addresses and physical addresses. Information is stored in memory in units of bytes. To correctly store or retrieve information, each byte is assigned a unique memory address, called the physical address. The logical address used by a program to access memory is called the virtual address, also known as the linear address. Memory access requests in a computer device carry the virtual address, which may contain a virtual page number and a page offset. Based on this, when the CPU receives a memory access request, it can translate the virtual address into a physical address by consulting the corresponding page table. This translation is performed by a dedicated module—the MMU (Memory Management Unit).
[0057] All virtual addresses can form a virtual address space, and all physical addresses can form a physical address space. It should be understood that not all memory ranges of the virtual address space are mapped to physical addresses; a portion of them will be used for other purposes.
[0058] MMIO (Memory Mapping I / O) is part of the PCI (Peripheral Component Interconnect) specification. Input / output (I / O) devices are placed in memory space instead of I / O space. After MMIO is completed, the CPU can access I / O devices using the same assembly instructions as memory access. A portion of the physical addresses in the aforementioned physical address space can be mapped to other types of memory loaded on the computer device through memory mapping technology, such as PCI devices, PCIE (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) devices, or other non-volatile storage media accessible based on MMIO. For ease of description, in this embodiment, the address space constituted by the physical addresses used due to memory mapping is described as the MMIO address space.
[0059] Figure 2 This is a logical schematic diagram of a page fault handling method provided for an exemplary embodiment of this application. (Reference) Figure 2 In this embodiment, a target storage device for memory swapping can be mounted on the computer device. Optionally, the target storage device in this embodiment can be a PCI device, a PCIe device, or other non-volatile storage media accessible via MMIO, as mentioned above. Therefore, in this embodiment, the MMIO address space corresponding to the target storage device can be generated by memory mapping the target storage device. It is understood that the MMIO address space is located within the physical address space; correspondingly, the MMIO addresses contained in the MMIO address space are essentially physical addresses.
[0060] The following section will first describe the memory swapping scheme based on the target storage device.
[0061] If it is determined that the target memory page in physical memory needs to be swapped out, then allocate a physical page that matches the target memory page specification from the MMIO address space corresponding to the target storage device.
[0062] Copy the data in the target memory page to the target storage device according to the target MMIO address corresponding to the physical page in the MMIO address space;
[0063] Reclaim the target memory page;
[0064] In the specified table entry, the target virtual address that was originally mapped to the target memory page is modified to be mapped to the target MMIO address.
[0065] Preferably, the physical page size is the same as the target memory page size. For example, if the target memory page size is 2MB, then the physical page size is also allocated to be 2MB to fully store the data in the target memory page. Of course, without considering storage costs, the physical page size can also be larger than the target memory page size; this embodiment does not limit this.
[0066] In practical applications, the MMIO address recorded in a specified entry can include the starting address of the physical address segment corresponding to the physical page in the MMIO address space, also known as the base address. Furthermore, after modifying the mapping relationship for the target virtual address, the target virtual address can be set to a page fault state. In practice, the present_bit in the entry attribute corresponding to the target virtual address can be set to 0 to indicate the page fault state of the target virtual address.
[0067] Figure 3 This application provides a modification logic for a specified table entry as an exemplary embodiment. (See reference...) Figure 3 After memory swapping out, the mapping relationship of the target virtual address in the specified table entry changes from (target virtual address, physical address corresponding to the target memory page) to (target virtual address, target MMIO address).
[0068] It should be understood that during memory swapping, swapping is usually done in units of "pages".
[0069] After memory is swapped out, page faults may occur. Following the memory swapping solutions discussed earlier, the following explanation uses a memory access request to a target virtual address in a computer device as an example to illustrate page fault handling.
[0070] refer to Figure 1 and Figure 2 In step 100, after receiving a page fault instruction for a memory access request, the system searches the designated page table for the target MMIO address mapped to the target virtual address pointed to by the memory access request. Each process in the computer device corresponds to its own page table; here, the designated page table refers to the page table corresponding to the application or virtual machine that initiated the memory access request. In practical applications, after receiving a memory access request, the computer device can query the designated page table through the aforementioned MMU to see if a physical address mapped to the target virtual address exists. It is worth noting that the physical address here refers to the physical address mapped to physical memory mentioned earlier. If it does not exist (for example, the MMU finds that the entry corresponding to the target virtual address indicates that it is in a page fault state), the MMU can issue a page fault instruction to the computer device's CPU or the operating system within the CPU.
[0071] In step 100, if the target MMIO address mapped to the target virtual address is found in the specified page table, then step 101 can be executed, that is, the page fault interrupt instruction is terminated immediately. Considering various special cases that may occur in practical applications, if the target MMIO address mapped to the target virtual address is not found in the specified page table, the page fault interrupt can be maintained, and the traditional page fault handling process can be entered. These special cases may include, for example, the swapping of some memory pages from physical memory to other storage media outside the target storage device in this embodiment, etc., which will not be exhaustively listed here.
[0072] In this way, upon receiving a page fault instruction, the page fault instruction can be terminated almost without delay. Memory access requests can then continue to be executed.
[0073] refer to Figure 1 and Figure 2 In step 102, the data required for the memory access request can be accessed from the target storage device according to the target MMIO address.
[0074] In one optional implementation: the memory access request can be translated into a device access request, which may include the target MMIO address and the page offset specified in the target virtual address; and the device access request can be initiated to the target storage device. In practical applications, after the MMU in the computer device translates the physical address, it can submit the physical address and the page offset specified in the target virtual address to the root complex in the computer device. The root complex then translates the memory access request into a device access request and initiates the device access request to the target storage device.
[0075] For the target storage device, the target device storage address mapped to the target MMIO address and the page offset can be found in its device storage address space. The device storage address is then used to respond to the device access request according to the target device storage address and the storage granularity adopted by the target storage device. In practical applications, the target storage device may include an address translation unit that records the mapping relationship between the MMIO address and the device storage address. The device storage address is a physical address defined by the target storage device for internal addressing, and data can be directly read based on the device storage address. In this embodiment, the address space formed by the device storage addresses is described as the device storage address space. Based on this, the address translation unit first determines the device storage address mapped to the target MMIO address, and then adds the aforementioned page offset to the device storage address to obtain the target device storage address. Thus, the target storage device can respond to the received device access request based on the data in the target device storage address, thereby completing the response to the memory access request.
[0076] Furthermore, the target storage device can employ various storage types, such as block storage or file storage. Different storage types may have different storage granularities; for example, block storage typically uses sectors, such as 512 bytes. Therefore, in this embodiment, memory access requests can be responded to based on the storage granularity used by the target storage device, eliminating the need for page-based responses as in traditional memory interaction schemes. This significantly reduces the amount of data the target storage device needs to respond to, improving response efficiency.
[0077] In summary, this embodiment uses a target storage device equipped on a computer device with MMIO-based access as a memory swapping medium. Memory pages can be swapped to the target storage device to free up physical memory. Furthermore, after memory swapping, the physical addresses mapped to virtual addresses in the page table can be modified to the MMIO addresses in the MMIO address space corresponding to the target storage device. Therefore, in the event of a page fault, the MMIO address containing the data required for the memory access request can be found in the page table, and the page fault can be terminated immediately. This allows the memory access request to be resumed immediately, and the required data can be accessed from the target storage device according to the MMIO mapping. Consequently, in the event of a page fault, there is no need to wait for memory swapping back; instead, the page fault can be terminated immediately, and the required data can be accessed according to the MMIO mapping. This virtually eliminates the duration of page faults, thereby effectively improving memory access efficiency.
[0078] In the above or below embodiments, considering that the response time required to respond to memory access requests in accordance with MMIO mapping is longer than the response time required to directly access memory, a technical concept of asynchronous memory swapping back is further proposed.
[0079] Therefore, in this embodiment, in response to a page fault instruction, a memory page can be allocated from physical memory for the virtual page corresponding to the target virtual address; a memory copy task asynchronous with the memory access request is initiated, which is used to copy the physical page corresponding to the target MMIO address in the target storage device to the memory page.
[0080] In practical applications, a process or thread that is asynchronous with the application or virtual machine that initiated the memory access request can be started to perform the aforementioned memory copying task.
[0081] Referring to the preceding text, in this embodiment, the target storage device is used as the memory swapping medium, and the target storage device communicates with the CPU as a supplementary memory through memory mapping technology. Therefore, the memory swapping task based on the target storage device is essentially a memory copying task, that is, a task of copying / moving data in memory space. In practical applications, the CPU in a computer device, or rather the operating system within the CPU, can perform memory copying by calling functions such as memcpy or memmove. It is understandable that compared to traditional memory swapping schemes that rely on storage protocols such as SCSI (Small Computer System Interface), NVMe (Non-Volatile Memory Express), VIRTIO-BLK (virtual i / o-block), and interfaces such as PCI, the memory swapping scheme provided in this embodiment through memory copying obviously achieves higher swapping efficiency. After the memory copy is completed, subsequent memory access requests can directly access data from physical memory, thereby improving memory access efficiency.
[0082] In this way, memory access requests and memory copy tasks are asynchronous and do not affect each other. This ensures the normal execution of memory access requests and prevents page faults from occurring.
[0083] Since memory access requests and memory copy tasks may operate on the same data, this embodiment proposes an optimization scheme to avoid conflicts.
[0084] In this optimized scheme: after starting the memory copy task and before ending the page fault interrupt instruction, the target virtual address in the specified page table can be set to a non-page fault and read-only state. Setting the target virtual address to a non-page fault state before ending the page fault interrupt instruction ensures that no page fault interrupt will be triggered after restarting the memory access request, thus allowing successful access to the data required by the memory access request according to the MMIO mapping method. Setting the target virtual address to a read-only state before ending the page fault interrupt instruction ensures that the memory access request will not write or modify the data stored in the target storage device during the execution of the memory copy task, avoiding the generation of dirty pages in the target storage device, thereby ensuring the consistency and integrity of the data copied in the memory copy task.
[0085] As mentioned earlier, the read-only state of the target virtual device prohibits write operations, while memory access requests can be either write or read requests. To ensure the normal execution of write requests, this optimization scheme works as follows: if the memory access request is a write request, the memory copy task is interrupted based on the read-only state corresponding to the target virtual address; the target virtual address in the specified page table is set to a non-page fault and readable / writable state; based on the readable / writable state corresponding to the target virtual address, the data required for the write request is accessed from the target storage device according to the target MMIO address.
[0086] In other words, if the memory access request is a write request, the memory copy task can be interrupted first, and the write request can be executed normally according to the MMIO mapping method. This can effectively avoid the problem of data inconsistency between the target storage device and physical memory caused by the write request.
[0087] In this optimization scheme, the memory copy task can be restarted after the write request is completed, and the target virtual address in the specified page table can be set to a read-only state without page faults. Preferably, the memory copy task can be restarted after a specified period of time following the completion of the write request. This specified period can be set as needed, for example, to 20ms or 30ms. Waiting for the specified period before restarting the memory copy task reduces the probability of the task being interrupted again. This is because, in practical applications, write requests for the same data are usually distributed over time; therefore, waiting for the specified period ensures that the data to be copied by the memory copy task is unlikely to be written again during the execution of the memory copy task.
[0088] If the memory access request is a read request, then based on the read-only state corresponding to the target virtual address, the data required for the read request can be accessed from the target storage device according to the target MMIO address. In other words, when the memory access request is a read request, the execution of the memory access request will not conflict with the memory copy task; therefore, both can execute normally.
[0089] In this embodiment, after the memory copy task is completed, the target virtual address can be mapped to the physical address corresponding to the memory page in a specified page table. It should be understood that mapping the target virtual address to the physical address corresponding to the memory page means that the target virtual memory has completed page fault recovery. Correspondingly, the target virtual address will be marked as non-page fault, so that subsequent memory access requests pointing to the target virtual address can directly access the required data from physical memory.
[0090] In summary, in this embodiment, a memory copy task asynchronous with the memory access request can be initiated, and data consistency problems that may be caused by the memory copy task can be avoided by maintaining the state of the target virtual address in the specified page table, and the memory access request can be executed normally after the page fault interrupt instruction ends without being interrupted by the memory copy task.
[0091] Figure 4 This is a schematic diagram illustrating an application scenario provided for an exemplary embodiment of this application. Wherein, Figure 4 Figure (a) shows the effect of page fault handling according to the traditional memory interaction scheme, and Figure (b) shows the effect of page fault handling method provided in this embodiment.
[0092] refer to Figure 4 In Figure (a), the page fault handling process generally includes:
[0093] Step 1: The application initiates a memory access request to access the virtual address (including the virtual page number A and the offset within the page);
[0094] Step 2: The MMU queries the page table and finds that virtual page number A is set to a page fault status, thus confirming that a page fault has occurred;
[0095] Step 3: The MMU sends a page fault interrupt to the CPU;
[0096] Step 4: The CPU suspends the application and starts the page fault handler, reading the faulty page from the disk into a free memory page. The size of the data accessed from the disk is 2MB. , The application was suspended for 3ms. ;
[0097] Step 5: After the page fault is resolved, establish the mapping between the virtual page number A and the corresponding physical page number B.
[0098] Step 6: Re-execute the memory access request from Step 1.
[0099] refer to Figure 4 In Figure (b), the page fault handling process generally includes:
[0100] Step 1: The application initiates a memory access request to access the virtual address (including the virtual page number A and the offset within the page);
[0101] Step 2: The MMU queries the page table and finds that virtual page number A is set to a page fault status, thus confirming that a page fault has occurred;
[0102] Step 3: The MMU sends a page fault interrupt to the CPU;
[0103] Step 4: The CPU allocates a memory page for this virtual page, starts a memory copy task asynchronous with the application, sets virtual page number A to a non-page fault and read-only state, and terminates the page fault interrupt. The application was suspended for 0.000001ms. ;
[0104] Step 5: The MMU provides the CPU with the MMIO address C mapped to the virtual page number A retrieved from the page table and the page offset of the virtual address;
[0105] Step 6: The CPU, using the MMIO mapping method and the address information from Step 5, accesses the data required for the memory access request from the target storage device. The size of the data accessed from the target storage device is 512k. .
[0106] pass Figure 4 As can be seen from Figures (a) and (b), the page fault handling scheme provided in this embodiment almost completely eliminates the duration of page fault interruption compared with the traditional scheme. Moreover, the amount of data that the target storage device needs to transfer during memory access is greatly reduced, thus effectively improving memory access efficiency.
[0107] It should be noted that some processes described in the above embodiments and figures include multiple operations that appear in a specific order. However, it should be clearly understood that these operations may not be executed in the order they appear in this document or may be executed in parallel. The operation numbers, such as 101, 102, etc., are only used to distinguish different operations, and the numbers themselves do not represent any execution order.
[0108] Figure 5 This is a schematic diagram of the structure of a computer device provided for another exemplary embodiment of this application. (See diagram below.) Figure 5 As shown, the computer device may include physical memory 50 and a processor 51, and the computer device is also equipped with a target storage device 52 based on MMIO access.
[0109] Target storage device 52, used for memory swapping;
[0110] Physical memory 50 is used to store computer programs, and processor 51 is used to execute the computer programs stored in physical memory 50 for:
[0111] Upon receiving a page fault instruction for a memory access request, the system searches the specified page table for the target MMIO address that maps to the target virtual address pointed to by the memory access request. The target MMIO address is the physical address in the MMIO address space generated by memory mapping of the target storage device 52.
[0112] End page fault interrupt instruction;
[0113] According to the target MMIO address, access the data required for the memory access request from the target storage device 52.
[0114] Alternatively, the processor 51 can also be used for:
[0115] In response to a page fault instruction, a memory page is allocated from physical memory 50 for the virtual page corresponding to the target virtual address;
[0116] Initiate a memory copy task asynchronous with the memory access request. The memory copy task is used to copy the physical page corresponding to the target MMIO address in the target storage device 52 to the memory page.
[0117] Alternatively, the processor 51 can also be used for:
[0118] After starting the memory copy task and before ending the page fault interrupt instruction, set the target virtual address in the specified page table to a non-page fault and read-only state;
[0119] After the memory copy task is completed, the target virtual address is mapped to the physical address corresponding to the memory page in the specified page table.
[0120] Optionally, when the processor 51 accesses the data required for the memory access request from the target storage device 52 according to the target MMIO address, it can specifically be used for:
[0121] If the memory access request is a write request, the memory copy task is interrupted based on the read-only state of the target virtual address.
[0122] Set the target virtual address in the specified page table to a non-page fault and readable / writable state;
[0123] Based on the read / write status corresponding to the target virtual address, the data required for the write request is accessed from the target storage device 52 according to the target MMIO address.
[0124] Alternatively, the processor 51 can also be used for:
[0125] Restart the memory copy task after the write request is completed;
[0126] Set the target virtual address in the specified page table to a read-only state with no page faults.
[0127] Optionally, according to the target MMIO address, the data required for the memory access request is accessed from the target storage device 52, including:
[0128] If the memory access request is a read request, then based on the read-only state corresponding to the target virtual address, the data required for the read request is accessed from the target storage device 52 according to the target MMIO address.
[0129] Alternatively, the processor 51 can also be used for:
[0130] If it is determined that there exists a memory page in physical memory that maps to the virtual page corresponding to the target virtual address and needs to be swapped out, then a physical page that matches the memory page specification is allocated from the MMIO address space. The physical address corresponding to the physical page in the MMIO address space is used as the target MMIO address.
[0131] Copy the data in the memory page to the target storage device 52 according to the target MMIO address;
[0132] Reclaim memory pages;
[0133] Map the target virtual address to the target MMIO address in the specified table entry.
[0134] Alternatively, physical pages and memory pages can have the same specifications.
[0135] Optionally, when the processor 51 accesses the data required for the memory access request from the target storage device 52 according to the target MMIO address, it can specifically be used for:
[0136] Translate the memory access request into a device access request, which contains the target MMIO address and the page offset specified in the target virtual address;
[0137] A device access request is initiated to the target storage device 52 so that the target storage device 52 can find the target device storage address that maps to the target MMIO address and the page offset in its device storage address space, and respond to the device access request according to the target device storage address and the storage granularity adopted by the target storage device 52.
[0138] Furthermore, such as Figure 5 As shown, the computer device also includes other components such as a communication component 53 and a power supply component 54. Figure 5 The diagram only shows some components and does not mean that the computer device includes only these components. Figure 5 The components shown.
[0139] It is worth noting that the technical details of the above embodiments of the computer device can be referred to the relevant descriptions in the foregoing method embodiments. To save space, they will not be repeated here, but this should not cause any loss to the scope of protection of this application.
[0140] Accordingly, embodiments of this application also provide a computer-readable storage medium storing a computer program, which, when executed, can implement the steps in the above method embodiments.
[0141] The above Figure 5The communication component is configured to facilitate wired or wireless communication between the device containing the communication component and other devices. The device containing the communication component can access wireless networks based on communication standards, such as WiFi, 2G, 3G, 4G / LTE, 5G, or combinations thereof. In one exemplary embodiment, the communication component receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, the communication component also includes a Near Field Communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID), Infrared Data Association (IrDA) technology, Ultra-Wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.
[0142] The above Figure 5 The power supply component provides power to the various components of the device in which it resides. The power supply component may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the device in which it resides.
[0143] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0144] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0145] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1The function specified in one or more boxes.
[0146] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0147] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
[0148] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of the relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation portals are provided for users to choose to authorize or refuse.
[0149] The above are merely embodiments of this application and are not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A page fault handling method, comprising: Upon receiving a page fault instruction for a memory access request, the system searches the specified page table for the target MMIO address that maps to the target virtual address pointed to by the memory access request. The target MMIO address is a physical address in the MMIO address space generated by memory mapping of the target storage device used for memory swapping. The page fault interrupt instruction is terminated; The memory access request is converted into a device access request, the device access request containing the target MMIO address and the page offset specified in the target virtual address; The device access request is initiated to the target storage device so that the target storage device can find the target device storage address in its device storage address space that maps to the target MMIO address and the page offset, and respond to the device access request according to the target device storage address and the storage granularity adopted by the target storage device.
2. The method according to claim 1, further comprising: In response to the page fault instruction, a memory page is allocated from physical memory for the virtual page corresponding to the target virtual address; Initiate a memory copy task asynchronous with the memory access request. The memory copy task is used to copy the physical page corresponding to the target MMIO address in the target storage device to the memory page.
3. The method according to claim 2, further comprising: After starting the memory copy task and before ending the page fault interrupt instruction, the target virtual address in the specified page table is set to a non-page fault and read-only state; After the memory copy task is completed, the target virtual address is mapped to the physical address corresponding to the memory page in the designated page table.
4. The method according to claim 3, wherein accessing the data required for the memory access request from the target storage device according to the target MMIO address comprises: If the memory access request is a write request, the memory copy task is interrupted based on the read-only state corresponding to the target virtual address. Set the target virtual address in the specified page table to a state where there are no page faults and it is readable and writable; Based on the read / write status corresponding to the target virtual address, the data required for the write request is accessed from the target storage device according to the target MMIO address.
5. The method according to claim 4, further comprising: After the write request is completed, restart the memory copy task; Set the target virtual address in the specified page table to a read-only state with no page faults.
6. The method according to claim 3, wherein accessing the data required for the memory access request from the target storage device according to the target MMIO address comprises: If the memory access request is a read request, then based on the read-only state corresponding to the target virtual address, the data required for the read request is accessed from the target storage device according to the target MMIO address.
7. The method according to claim 1, further comprising: If it is determined that there exists a memory page in physical memory that maps to the virtual page corresponding to the target virtual address and needs to be swapped out, then a physical page that matches the specification of the memory page is allocated from the MMIO address space, wherein the physical address corresponding to the physical page in the MMIO address space is used as the target MMIO address; Copy the data in the memory page to the target storage device according to the target MMIO address; Reclaim the memory pages; The target virtual address is mapped to the target MMIO address in the specified page table.
8. The method according to claim 7, wherein the physical page and the memory page have the same specifications.
9. The method according to claim 1, wherein the memory access request is initiated by an application or virtual machine running on a computer device; and the target storage device is a PCI device or a PCIe device.
10. A computer device, the computer device including a processor and physical memory, the computer device further comprising a target storage device based on MMIO access; The target storage device is used for memory swapping; The physical memory is used to store the computer program involved in the method according to any one of claims 1-9; The processor is configured to execute the computer program to implement the method according to any one of claims 1-9.
11. A computer-readable storage medium storing computer instructions, which, when executed by one or more processors, cause the one or more processors to perform the page fault handling method according to any one of claims 1-9.