Rule description method for object-oriented physical verification of integrated circuits

CN116306475BActive Publication Date: 2026-10-27SHENZHEN GUOWEI FUXIN TECH CO LTD
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Patent Information

Application Number
CN202310131421.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-02-02
Publication Date
2026-10-27
Estimated Expiration
2043-02-02

AI Technical Summary

Technical Problem

[0009]为了解决现有技术中的规则描述的方式较为复杂、可读性差的技术问题,本发明提出了面向对象的集成电路的物理验证的规则描述方法

Benefits of technology

[0023]本发明的规则描述方法直观、简洁、并且可维护,降低了规则实现的复杂度。同时对复杂规则也有足够的灵活性,能快速对其建模,相比较于传统的规则描述方法不管问题是复杂的还是简单的都统统使用边来描述而言,传统的规则描述方法只有一条路可走,导致传统的规则描述比较复杂,如果一个规则描述很复杂,那么其实现起来也会很复杂,本发明直接构建基础几何处理对象,使得用户可以直接在对象上操作,从而使得物理验证的几何图形得到简化,比如可以直接获得line-end,直接获得图形的角,直接获得图形多个连续角的特征等等,也就是灵活度更高,更容易开发。

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Abstract

The application discloses a rule description method for physical verification of an object-oriented integrated circuit, which comprises the following steps: creating a rule file; defining basic geometric processing objects in the rule file according to the geometric figures of the physical verification of the integrated circuit; providing a method for accessing common attributes and / or specific attributes of each basic geometric processing object in the rule file; and creating a rule parser, so that the rule file is lexically parsed and syntactically parsed by the rule parser when a layout of the integrated circuit describes rules for the physical verification based on the rule file. The rule description method is intuitive and simple, and the complexity of rule implementation is reduced.
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Description

Technical Field

[0001] This invention relates to the technical field of physical verification of integrated circuits, and in particular to a rule-based description method for physical verification of integrated circuits that can concisely describe process hotspots. Background Technology

[0002] In the chip design process, physical design is the step closest to the manufacturing process. In addition to ensuring that there are no short circuits or open circuits, most of the work is geared towards manufacturing and requires solving various problems that may arise during manufacturing. These problems are all reflected in a series of rules.

[0003] like Figure 1 As shown, the input for physical design is generally a layout file and a rule file describing process rules, device rules, etc. The layout file is checked against the rules one by one, and then the type, number, and location of violations are reported.

[0004] The layout files are usually in GDS format. Due to data compression considerations, the OASIS format was later developed. Regardless of the format, they are both descriptions of the layout, and both formats are open industry standards.

[0005] The rule files vary greatly and are related to the specific process manufacturer, process feature size, and the EDA tool used. For example, in terms of process manufacturer, the number and content of 28nm rules differ between SMIC and TSMC, with SMIC having significantly more rules to compensate for manufacturing capability limitations. In terms of feature size, the process rules for 28nm and 65nm within SMIC, or for LL and HK processes under 65nm, are quite different. Furthermore, the syntax of rule files differs between different EDA tools.

[0006] Compared to layout files, it's clear that there's no consensus within the industry on how rule files are described. However, for the same rule, the expression methods, keywords used, and overall schemes are very similar, all describing the rule as edges. For example, first find the corresponding edges, then process adjacency relationships, and finally consider special cases to filter violations in specific regions. The advantage of this method is that it reduces the coupling between software development and chip design. No matter how complex the rule, it can be simplified by breaking down complex natural language into constraint descriptions of specific edges. Software development only needs to develop measurement methods; while chip design uses different measurement methods based on the rule description to implement the specific checking functions of the rule.

[0007] However, its drawbacks are also obvious. In advanced processes, especially when introducing optical correction OPC procedures, it falls short when dealing with more complex rules or optical hotspot detection. For example... Figure 2 This rule, the description of a physical verification EDA tool is close to a hundred lines long, and its readability and maintainability are very poor.

[0008] Therefore, the industry urgently needs a new method for describing rules. Summary of the Invention

[0009] To address the technical problems of complex and poorly readable rule descriptions in existing technologies, this invention proposes a rule description method for physical verification of integrated circuits based on object-oriented principles.

[0010] like Figure 3 As shown, the object-oriented integrated circuit physical verification rule description method proposed in this invention includes:

[0011] Create a rules file;

[0012] The basic geometric processing object is defined in the rule file based on the geometry of the physical verification of the integrated circuit;

[0013] The rule file provides methods for accessing public and / or unique properties of each basic geometry processing object;

[0014] A rule parser is created so that when the layout of the integrated circuit is based on the rules described in the rule file for physical verification, the rule parser performs lexical and syntactic parsing on the definitions in the rule file.

[0015] Furthermore, the basic geometric processing object includes at least one of the following: layer, graphic, edge, angle, edge pair, set of edge pairs on the outer sides of two image objects, set of edge pairs on the inner sides of two graphic objects, set of edge pairs from the outer side of one graphic to the inner side of another graphic, set of edge pairs from the inner side of one graphic to the outer side of another graphic, square, oblique rectangle, trapezoid, ring, and polygon.

[0016] Furthermore, the common attributes of the graphics, squares, oblique rectangles, trapezoids, rings, and polygons include the area of ​​basic geometric processing objects.

[0017] Furthermore, the graphic's unique properties include the length of the longest side of the basic geometric processing object.

[0018] Furthermore, the unique attributes of the edge include the edge's length, width, and the previous edge of the current edge.

[0019] Furthermore, the unique attributes of the angle include whether the current angle object is 90 degrees, whether the current angle object is 270 degrees, obtaining the previous angle object of the current angle object, and obtaining the next angle object of the current angle object.

[0020] Furthermore, the common attribute of the set of edge pairs on the outer sides of the two image objects, the set of edge pairs on the inner sides of the two graphic objects, the set of edge pairs from the outer side of one graphic to the inner side of another graphic, and the set of edge pairs from the inner side of one graphic to the outer side of another graphic includes obtaining the distance between the edge pairs.

[0021] Furthermore, the access symbol table corresponding to the basic geometry processing object in the rule file inherits from the TCL scripting language, and the basic geometry processing object is accessed through two different symbols.

[0022] Furthermore, the command keywords for describing the physical verification rules of integrated circuits based on the basic geometric processing object and its corresponding attributes include at least one of the following: design rule constraint logic, create rule, create rule group, create database, create layer graph, and create layer.

[0023] The rule description method of this invention is intuitive, concise, and maintainable, reducing the complexity of rule implementation. It also offers sufficient flexibility for complex rules, enabling rapid modeling. In contrast, traditional rule description methods, which use edges to describe both complex and simple problems, offer only one possible path, leading to complex rule descriptions and implementations. This invention directly constructs basic geometric processing objects, allowing users to manipulate them directly. This simplifies the geometry used for physical verification; for example, it allows direct acquisition of line-end values, angles, and features of multiple consecutive angles, resulting in greater flexibility and easier development. Attached Figure Description

[0024] The present invention will now be described in detail with reference to the embodiments and accompanying drawings, wherein:

[0025] Figure 1 It consists of existing technical process rules documents and basic physical verification procedures.

[0026] Figure 2 It is a rule-based description method for natural language in existing technologies.

[0027] Figure 3 This is a flowchart of the present invention.

[0028] Figure 4 This is a schematic diagram of the edge pair object and its attributes according to the present invention.

[0029] Figure 5 This is a schematic diagram of the set of edge pairs on the outer side of two image objects in the double layer of the present invention.

[0030] Figure 6 This is a schematic diagram of the set of edge pairs inside two single-layer graphic objects according to the present invention.

[0031] Figure 7 This is a schematic diagram of the set of edge pairs on the inner sides of the two graphic objects in the double layer of the present invention.

[0032] Figure 8 This is a schematic diagram of the set of edge pairs from the outer side of one graphic to the inner side of another graphic in the double-layer design of this invention.

[0033] Figure 9 This is a schematic diagram of the set of edge pairs from the inside of one graphic to the outside of another graphic in the double-layer design of this invention. Detailed Implementation

[0034] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0035] Therefore, a feature pointed out in this specification is used to describe one feature of one embodiment of the invention, and does not imply that every embodiment of the invention must have the described feature. Furthermore, it should be noted that this specification describes many features. Although certain features may be combined to illustrate possible system designs, these features may also be used in other combinations not explicitly stated. Therefore, unless otherwise stated, the described combinations are not intended to be limiting.

[0036] The object-oriented integrated circuit physical verification rule description method of the present invention includes:

[0037] Create a rules file;

[0038] Define basic geometric processing objects in the rule file based on the geometry of the physical verification of the integrated circuit;

[0039] The rule file provides methods for accessing public and / or unique properties of each basic geometry processing object;

[0040] A rule parser is created so that when the layout of an integrated circuit is based on the rules described in the rule file for physical verification, the rule parser performs lexical and syntactic parsing on the definitions in the rule file.

[0041] Based on the rule description method for physical verification of integrated circuits of the present invention, a new rule file can be obtained. This rule file is a new physical verification format for integrated circuits (Object Oriented Verification Format, abbreviated as OOVF). The rule description method and physical verification format for physical verification of integrated circuits of the present invention provide common geometric shapes and attributes in physical verification, and also have the characteristics of scripting language programmability. In addition, it also extends many commands and attributes specific to physical verification.

[0042] In one embodiment, the access symbol table corresponding to the basic geometry processing object of the present invention inherits from the TCL scripting language, and the basic geometry processing object is accessed through two different symbols.

[0043] For example, the present invention can access basic geometry processing objects using [] and ., as shown in the table below.

[0044] 1 [] Direct access symbols for object properties 2 . Object property indirect access symbols

[0045] Table 1 Physical Verification Object Access Symbol Table

[0046] The present invention can also provide a large number of keywords to describe different basic geometric processing objects and their attributes. The basic geometric processing objects described include, but are not limited to, layers, shapes, objects, edges, corners, edge pairs, sets of edge pairs on the outer sides of two image objects, sets of edge pairs on the inner sides of two graphic objects, sets of edge pairs from the outer side of one graphic to the inner side of another graphic, sets of edge pairs from the inner side of one graphic to the outer side of another graphic, at least one of regular rectangles, oblique rectangles, trapezoids, rings, and polygons.

[0047] The common properties of shapes, squares, oblique rectangles, trapezoids, rings, and polygons include the area of ​​the basic geometric manipulation objects. Specific properties of shapes may also include the length of the longest side of the basic geometric manipulation object.

[0048] The unique properties of an edge can include its length, width, and the previous edge.

[0049] The unique properties of an angle can include whether the current angle object is 90 degrees, whether the current angle object is 270 degrees, getting the previous angle object of the current angle object, and getting the next angle object of the current angle object.

[0050] The common properties of the set of edge pairs on the outer sides of two image objects, the set of edge pairs on the inner sides of two graphic objects, the set of edge pairs from the outer side of one graphic to the inner side of another graphic, and the set of edge pairs from the inner side of one graphic to the outer side of another graphic can include getting the distance between the edge pairs.

[0051] This invention provides a method for accessing the common and / or unique attributes of each basic geometric processing object in a rule file. The principle is that basic geometric processing objects can be described using existing rules, such as angle objects, and then the corresponding description is encapsulated into an object; for example, an angle object is composed of two edges. Then, the hotspots of the angle object are summarized into corresponding attributes. For example, after describing the characteristics of the angle's corresponding attributes using existing rules, it is encapsulated as an attribute of the angle object. The lexical and syntactic parsing of the basic geometric processing objects, their corresponding attributes, and related statements in this invention is mainly based on existing technologies, such as LEX and YACC techniques.

[0052] Some commonly used typical objects can be found in the table below.

[0053]

[0054]

[0055] Table 2 Keyword List of Physical Verification Objects

[0056] The command keywords for describing the physical verification rules of integrated circuits based on basic geometric processing objects and their corresponding attributes in this invention include at least one of the following: design rule constraint logic, create rule, create rule group, create database, create layer graph, and create layer.

[0057] Given the basic geometric processing objects and corresponding attributes already provided, describing physical design rules becomes much easier and more direct. The commands provided by this invention are shown in the table below.

[0058]

[0059]

[0060] Table 3 Keyword List for Physical Verification Commands

[0061] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A rule description method for physical verification of integrated circuits in an object-oriented manner, characterized in that, include: Create a rules file; The rule file defines a basic geometric processing object based on the geometry of the physical verification of the integrated circuit. The basic geometric processing object includes an angle and at least one of the following: a set of edge pairs on the outer sides of two image objects, a set of edge pairs on the inner sides of two image objects, a set of edge pairs from the outer side of one image to the inner side of another image, and a set of edge pairs from the inner side of one image to the outer side of another image. The rule file provides methods for accessing common and / or unique attributes of each basic geometry processing object. The unique attributes of the angle include whether the current angle object is 90 degrees, whether the current angle object is 270 degrees, obtaining the previous angle object of the current angle object, and obtaining the next angle object of the current angle object. The common attribute of the set of edge pairs outside the two image objects, the set of edge pairs inside the two graphic objects, the set of edge pairs from the outside of one graphic to the inside of another graphic, and the set of edge pairs from the inside of one graphic to the outside of another graphic includes obtaining the distance between the edge pairs. The command keywords for describing the physical verification rules of integrated circuits based on the basic geometric processing objects and their corresponding attributes include design rule constraint logic and rule creation. A rule parser is created so that when the layout of the integrated circuit is based on the rules described in the rule file for physical verification, the rule parser performs lexical and syntactic parsing on the definitions in the rule file.

2. The rule description method for physical verification of object-oriented integrated circuits as described in claim 1, characterized in that, The basic geometric processing objects also include at least one of the following: layers, graphics, edges, edge pairs, squares, oblique rectangles, trapezoids, rings, and polygons.

3. The rule description method for physical verification of object-oriented integrated circuits as described in claim 2, characterized in that, The common properties of the shapes, squares, oblique rectangles, trapezoids, rings, and polygons include the area of ​​the basic geometric processing objects.

4. The rule description method for physical verification of object-oriented integrated circuits as described in claim 2, characterized in that, The graphic's unique properties include the length of the longest side of the basic geometric processing object.

5. The rule description method for physical verification of object-oriented integrated circuits as described in claim 2, characterized in that, The unique properties of an edge include its length, width, and the previous edge.

6. The rule description method for physical verification of object-oriented integrated circuits as described in claim 1, characterized in that, The access symbol table corresponding to the basic geometry processing object in the rule file inherits from the TCL scripting language, and the basic geometry processing object is accessed through two different symbols.

7. The rule description method for physical verification of object-oriented integrated circuits as described in claim 1, characterized in that, The command keywords for describing the physical verification rules of integrated circuits based on the basic geometric processing object and its corresponding attributes also include at least one of creating rule groups, creating databases, creating layer graphics, and creating layers.

Citation Information

Patent Citations

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    CN102663169A

  • Test pattern verification method and device, equipment and storage medium

    CN113627122A