A method for fabricating a Li-doped zinc tin oxide dual-active-layer oxide thin-film transistor
The method of fabricating Li-doped zinc tin oxide dual active layer oxide thin film transistors solves the problem of low mobility in existing TFT devices, achieving higher mobility and electrical performance, and meeting the high-performance requirements of modern display technology.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-02-07
- Publication Date
- 2026-04-03
AI Technical Summary
Existing TFT devices are limited by low mobility, numerous defect states, and high annealing temperatures, making it difficult to meet the high-performance requirements of modern display technology. Furthermore, the scarcity and high cost of indium hinder its widespread application.
The method for fabricating Li-doped zinc tin oxide dual-active-layer oxide thin-film transistors involves depositing Li-doped zinc tin oxide thin films and zinc tin oxide thin films on a substrate, followed by high-temperature annealing and electrode deposition to form a dual-active-layer structure, thereby suppressing the formation of oxygen vacancies and improving mobility.
It achieves higher mobility and electrical performance, improves the current switching ratio and subthreshold swing of TFT devices, reduces the formation of oxygen vacancies, and meets the high-performance requirements of modern display technology.
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Figure CN116313815B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of thin-film transistor technology, and specifically relates to a method for fabricating a double active layer oxide thin-film transistor based on Li-doped zinc tin oxide. Background Technology
[0002] Among flat panel display technologies, TFT-LCD and TFT-OLED technologies are the most representative and widely used. As the core semiconductor device driving pixels and constituting peripheral circuits, the structure, manufacturing process, and device characteristics of TFTs have a crucial impact on the quality and production yield of the entire display panel. Currently, oxides of elements such as Zn, Sn, and In have been experimentally proven to be excellent active layer materials, such as InGaZnO (IGZO), ZnSnO (ZTO), and InZnO (IZO). Indium gallium zinc oxide (a-IGZO), as a representative of amorphous oxide semiconductor materials, has been widely studied due to its high mobility, high transmittance, and low-temperature processing. The ultra-high mobility of IGZO-TFT is mainly due to the indium element in the channel layer. 3+ Ga has the effect of enhancing carrier mobility. The doping of Ga controls oxygen vacancies. However, indium and gallium are rare metals and extremely scarce, and a future shortage of indium supply is possible. Since indium is an expensive and toxic material, its cost and availability will hinder its widespread application in the commercial TFT field. However, due to the slow progress in research on new elements and materials, and the limited performance improvement of thin films with different element ratios, research on oxide thin-film transistors has encountered challenges. With the development and advancement of modern display technology, higher demands are being placed on the performance of TFT devices. Traditional single-layer TFTs, due to limitations such as low mobility, numerous defect states, and high annealing temperatures, are gradually becoming unable to meet the requirements of industrial applications. Simply changing the active layer material is no longer sufficient to fundamentally solve the performance problems of TFT devices. Summary of the Invention
[0003] The purpose of this invention is to provide a method for fabricating a double active layer oxide thin film transistor based on Li-doped zinc tin oxide, which can suppress the formation of oxygen vacancies and achieve higher mobility.
[0004] The technical solution provided by this invention is as follows:
[0005] A method for fabricating a Li-doped zinc tin oxide dual-active-layer oxide thin-film transistor includes the following steps:
[0006] Step 1: After pre-treating the substrate, multiple active layer deposition areas are exposed and developed on the substrate by photolithography stripping method.
[0007] Step 2: Using a Li-doped zinc oxide target and a tin target, a Li-doped zinc oxide tin thin film is deposited by magnetron sputtering on the active layer deposition area to obtain a first active layer; and using a zinc oxide target and a tin target, a zinc oxide tin thin film is deposited by magnetron sputtering on the first active layer to obtain a second active layer.
[0008] In the active layer deposition, a mixture of Ar and O2 gas was used as the working gas; when depositing the first active layer, the partial pressure of O2 was 0 and the deposition time was 5 min; when depositing the second active layer, the partial pressure of O2 was 5% and the deposition time was 10 min.
[0009] Step 3: After removing the adhesive from the substrate where the active layer has been deposited, anneal it.
[0010] Step 4: Expose and develop multiple electrode deposition regions on the annealed substrate using a photolithography lift-off method; each electrode deposition region corresponds one-to-one with the active layer deposition region and is located above the second active layer, and each electrode deposition region includes a source electrode deposition region and a drain electrode deposition region spaced apart.
[0011] Step 5: After depositing electrode layers on the source electrode deposition region and the drain electrode deposition region, remove the adhesive to obtain the transistor.
[0012] Preferably, in step one, the substrate is a rigid silicon-on-silicon dioxide substrate.
[0013] Preferably, in step one, the method for pretreating the substrate is as follows:
[0014] The substrate was washed sequentially with acetone, ethanol and deionized water, dried with high-purity nitrogen, and then dried in an oven at 90°C for 5 minutes.
[0015] Preferably, in step one, multiple active layer deposition regions are exposed and developed on the substrate, including the following steps:
[0016] Step 1: Spin-coat photoresist onto the substrate;
[0017] Step 2: Preheat the substrate coated with photoresist at 90°C for 5 minutes;
[0018] Step 3: Cover the pre-baked substrate with a photomask pattern containing multiple active layer deposition areas and expose it under an exposure machine;
[0019] Step 4: Place the exposed substrate in the developer solution. The photoresist corresponding to the exposed part will dissolve in the developer solution, exposing the silicon dioxide layer.
[0020] Step 5: Rinse the substrate with deionized water to obtain multiple active layer deposition zones.
[0021] Preferably, in step two, the molar ratio of zinc to lithium in the Li-doped zinc oxide target is 50:1.
[0022] Preferably, in step two, when depositing the first active layer, the RF power of the Li-doped zinc oxide target is 100W, the RF power of the tin target is 15W, and the sputtering pressure is 8mTorr. When depositing the second active layer, the RF power of the zinc oxide target is 100W, the RF power of the tin target is 15W, and the sputtering pressure is 8mTorr.
[0023] Preferably, in step two, the thickness of the first active layer is 30 nm and the thickness of the second active layer is 60 nm.
[0024] Preferably, in step three, the annealing method is as follows:
[0025] Place the degummed substrate in an annealing furnace and anneal at 600°C for 1 hour in air.
[0026] Preferably, in step five, the method for depositing the electrode layer is as follows:
[0027] The substrate was placed in an electron beam evaporation apparatus, and metallic aluminum was deposited in a chamber at 60°C.
[0028] Preferably, the thickness of the electrode layer is 50 nm.
[0029] The beneficial effects of this invention are:
[0030] The present invention provides a method for fabricating a double active layer oxide thin film transistor based on Li-doped zinc oxide tin oxide. The method employs a co-sputtering method with high-purity Li-doped zinc oxide target and high-purity metallic tin target to introduce Li into the thin film, successfully suppressing the formation of oxygen vacancies. Its small ion size and strong binding strength enable Li to act as an oxygen vacancy inhibitor, thereby achieving higher electrical performance.
[0031] The present invention provides a method for fabricating a double active layer oxide thin film transistor based on Li-doped zinc tin oxide, which has a double active layer and adjusts the electrical performance through a front channel (providing high mobility) and a back channel (maintaining low turn-off current), thereby achieving higher mobility. Attached Figure Description
[0032] Figure 1 This is a schematic diagram of the first photomask described in this invention.
[0033] Figure 2 This is a schematic diagram of the active layer deposition region etched out according to the present invention.
[0034] Figure 3 This is a schematic diagram of the shape of the active layer described in this invention.
[0035] Figure 4 This is a side view of the substrate after the active layer has been deposited according to the present invention.
[0036] Figure 5 This is a schematic diagram of the second photomask described in this invention.
[0037] Figure 6 This is a schematic diagram of the etching source electrode deposition region and the drain electrode deposition region described in this invention.
[0038] Figure 7 This is a schematic diagram of the source and drain electrode shapes described in this invention.
[0039] Figure 8 This is a side view of the substrate with deposited electrodes as described in this invention.
[0040] Figure 9 This is a transfer characteristic curve of the ZTO:Li / ZTO dual active layer TFT device described in this invention.
[0041] Figure 10 This is a graph showing the output characteristics of the ZTO:Li / ZTO dual active layer TFT device described in this invention.
[0042] Figure 11 This is a transmission characteristic curve of the ZTO single active layer TFT device described in this invention. Detailed Implementation
[0043] The present invention will now be described in further detail with reference to the accompanying drawings, so that those skilled in the art can implement it based on the description.
[0044] This invention provides a method for fabricating a double active layer oxide thin film transistor based on Li-doped zinc tin oxide, the specific fabrication process of which is as follows.
[0045] 1. Select a rigid silicon dioxide substrate, wash it in acetone, ethanol and deionized water in sequence, then blow it dry with high-purity nitrogen gas and put it in an oven at 90°C for 5 minutes.
[0046] Photoresist is spin-coated onto a substrate, and the active layer stack region is etched by exposure, development, and etching. The specific process is as follows:
[0047] 1. Coating: Fix the silicon dioxide substrate on the silicon spin coater and spin coat the photoresist at 250 rpm for 7 seconds, then increase to 500 rpm for 8 seconds, and then increase to 3000 rpm for 30 seconds.
[0048] 2. Pre-baking: Pre-bake the substrate coated with photoresist at 90°C for 5 minutes.
[0049] 3. Exposure: After applying photoresist and pre-baking, cover the sample with a photomask (first photomask) containing a pattern of multiple active layer deposition regions 110 (e.g., Figure 1 (As shown); Place it under an exposure machine for exposure. At this time, the part covered by the pattern is exposed, while the rest is not exposed to light.
[0050] 4. Development: The sample after photoresist exposure is placed in the developing solution. The photoresist corresponding to the exposed portion dissolves in the developing solution and is removed, exposing the gate dielectric layer (silicon dioxide layer) of the substrate, which is the active layer deposition area 210. The unexposed photoresist layer 220 surrounds the active layer deposition area 210 and is subsequently peeled off during photoresist removal. Figure 2 As shown.
[0051] 5. Rinse with deionized water to obtain the area where the active layer will be deposited.
[0052] 2. A 30 nm thick Li-doped zinc oxide film was deposited by room temperature magnetron sputtering on the substrate treated in step 1 using a high-purity (99.99%) Li-doped zinc oxide target (molar ratio Zn:Li = 50:1) and a high-purity (99.99%) tin target. The RF power of the Li-doped zinc oxide target was 100 W, the RF power of the tin target was 15 W, the sputtering pressure was 8 mTorr, the sputtering time was 5 min, and the partial pressure of O2 in the Ar / O2 mixed gas was 0 (gas volume ratio Ar:O = 100:0). After completion, the high-purity (99.99%) Li-doped zinc oxide target was replaced with a high-purity (99.99%) zinc oxide target, and a 60 nm thick zinc oxide tin film was deposited on the first active layer by magnetron sputtering co-sputtering. The RF power of the zinc oxide target was 100 W, the RF power of the tin target was 15 W, the sputtering pressure was 8 mTorr, the sputtering time was 10 min, and the partial pressure of O2 in the Ar / O2 mixed gas was 5% (gas volume ratio Ar:O = 95:5). Then, the upper active layer (second active layer) of zinc oxide tin was deposited.
[0053] When depositing the first active layer, setting the partial voltage of O2 to 0 (i.e., pure argon) results in a higher carrier concentration and higher conductivity in the Li-doped ZTO TFT. When depositing the second active layer, setting the partial voltage of O2 to 5% results in a thin film with low oxygen vacancy content due to oxygen flowing through the surface, leading to a positive shift in the threshold voltage.
[0054] 3. Photoresist Removal. The sample was ultrasonically cleaned in acetone solution for 1 minute. The photoresist dissolved in the acetone solution, and the surface photoresist was removed, exposing the gate dielectric layer 310 (silicon dioxide layer). The remaining portion formed active layer islands 320, including a first active layer 321 and a second active layer 322, shaped like small barbells. The samples were then rinsed thoroughly with anhydrous ethanol and deionized water, and dried with nitrogen gas to obtain the active layer substrate, as shown below. Figure 3-4 As shown. The gate dielectric layer 310 is located on a Si substrate 300.
[0055] 4. Place the degummed sample into an annealing furnace and anneal at 600°C for 1 hour in air.
[0056] 5. The electrode growth area is etched by exposure, development, and etching using photolithography lift-off technology. The specific process is as follows:
[0057] 1. Coating: Fix the annealed sample on the spin coater and spin coat the photoresist at 250 rpm for 7 seconds, then increase to 500 rpm for 8 seconds, and then increase to 3000 rpm for 30 seconds.
[0058] 2. Pre-baking: Pre-bake the sample coated with photoresist at 90℃ for 5 minutes.
[0059] 3. Exposure: After the photoresist is applied and the sample has been pre-baked, it is covered with a second photoresist plate. The second photoresist plate includes a patterned area formed by a chromium-coated region and an uncoated region. Each pattern 410 has a rectangular strip of chromium layer in the center as an electrode channel. After alignment, the patterned area on the second photoresist plate overlaps with the dual active layer and is placed under an exposure machine for exposure. At this time, the patterned area is exposed, while the remaining areas are not exposed to light. The second photoresist plate is as follows: Figure 5 As shown.
[0060] 4. Development: Place the photoresist-exposed sample in the developing solution. The photoresist corresponding to the exposed portion dissolves in the developing solution and is removed, exposing the second active layer 322. Rectangular strips of photoresist 510 remain at the inter-electrode channels, i.e., the middle area of the small barbell shape. These will be used to peel off the active layer channels during subsequent resist removal. The developed sample is shown below. Figure 6 The two sides of the channel are the source electrode deposition area and the drain electrode deposition area, respectively.
[0061] 5. Rinse with deionized water to obtain the area where the source electrode and drain electrode will be deposited.
[0062] 6. Electron beam evaporation deposition of electrode layers: The developed sample is placed on a tray and put into an electron beam evaporation device, where 50 nm of metallic aluminum is deposited in a chamber at 60°C.
[0063] 7. After the above steps, the sample is ultrasonically cleaned in acetone solution for 1 minute. The photoresist dissolves in the acetone solution, and the photoresist along with the aluminum metal on it is removed, exposing the gate dielectric layer 310 and the zinc oxide tin channel layer (second active layer 322), forming the metal source electrode and drain electrode 610. Figure 7-8 As shown, it is then rinsed with ethanol and deionized water, and dried with nitrogen gas to obtain a thin-film transistor.
[0064] Lithium (Li) has a low standard electrode potential (-3.04V) and a high binding energy with oxygen ions, which can be used as an inhibitor to reduce the formation of oxygen vacancies in the active channel layer and improve the field-effect mobility of the device. In addition, the radius of lithium ions is much smaller than that of zinc and tin, making it easy for them to occupy interstitial sites and release free electrons.
[0065] By employing a dual active layer design, utilizing a front channel (providing high mobility) and a rear channel (maintaining low turn-off current) to modulate electrical performance, higher mobility can be achieved. The main electrical performance parameters of the fabricated thin-film transistors include saturation mobility (μ). SAT Threshold voltage (V) TH ), current switching ratio and subthreshold swing (SS), threshold voltage (V) TH The saturation mobility, current on / off ratio, and subthreshold swing are derived from linear fitting using the following formulas:
[0066]
[0067]
[0068]
[0069] In the above formula, C i The capacitance per unit area of the gate insulator is given by W, where W is the channel width and L is the channel length. DS Leakage current, V GS This is the gate voltage.
[0070] Figure 9-10 These are test images of the electrical performance of a TFT device prepared using the method provided in this invention. Figure 9 This is a graph showing the transfer characteristics of a ZTO:Li / ZTO dual active layer TFT device. Figure 10 This is a graph showing the output characteristics of a ZTO:Li / ZTO dual active-layer TFT. Figure 9 I can be obtained drain 1 / 2 With V gate The rate of change of change, i.e., I DS 1 / 2 With V GSThe saturated mobility (μ) is calculated by combining the rate of change with formula (1). SAT The length is 13.98cm. 2 V -1 s -1 Threshold voltage (V) TH ) is by I drain 1 / 2 The gate voltage corresponding to the intersection point of the linearly fitted portion and the horizontal axis is -13.54V; from Figure 9 logI drain Curve yields I ON It is 5.4 × 10 -3 I OFF 4.8×10 -12 The current switching ratio is calculated to be 1.13 × 10⁻⁶ using formula (2). 9 ;Depend on Figure 9 LogI can be obtained drain With V gate The rate of change is logI DS With V GS The rate of change, combined with formula (3), yields a subthreshold swing (SS) of 0.84V / decade. Figure 11 The transmission characteristic curves of single-active-layer (zinc oxide thin film) TFT devices deposited on zinc oxide and tin targets with a thickness of 90 nm are shown under the same conditions. The calculated saturation mobility of the fabricated single-active-layer (zinc oxide thin film) TFT device is 10.21 cm⁻¹. 2 V -1 s -1 The threshold voltage is -11.33V, and the current switching ratio is 1.92×10⁻⁶. 9 The subthreshold swing is 0.78V / decade. It is evident that the TFT device fabricated using the method provided in this invention, compared to TFT devices with a single active layer (zinc oxide-tin thin film) deposited on zinc oxide and tin targets, exhibits a slightly negative shift in threshold voltage, while maintaining the same order of magnitude for current on / off ratio, essentially unchanged subthreshold swing, and a significant improvement in mobility performance, approximately 37%, achieving higher electrical performance.
[0071] Although embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the specification and embodiments. They can be applied to various fields suitable for the present invention. For those skilled in the art, other modifications can be easily made. Therefore, without departing from the general concept defined by the claims and their equivalents, the present invention is not limited to the specific details and illustrations shown and described herein.
Claims
1. A method for fabricating a Li-doped zinc tin oxide dual-active-layer oxide thin-film transistor, characterized in that, Includes the following steps: Step 1: After pre-treating the substrate, multiple active layer deposition areas are exposed and developed on the substrate by photolithography stripping method. Step 2: Using a Li-doped zinc oxide target and a tin target, a Li-doped zinc oxide tin thin film is deposited by magnetron sputtering on the active layer deposition region to obtain the first active layer; And a zinc oxide tin thin film is deposited on the first active layer by magnetron sputtering using a zinc oxide target and a tin metal target to obtain a second active layer; In this process, a mixture of Ar and O2 is used as the working gas during the deposition of the active layer; the partial pressure of O2 is 0 during the deposition of the first active layer; and the partial pressure of O2 is 5% during the deposition of the second active layer. Step 3: After removing the adhesive from the substrate where the active layer has been deposited, anneal it. Step 4: Expose and develop multiple electrode deposition regions on the annealed substrate using a photolithography lift-off method; each electrode deposition region corresponds one-to-one with the active layer deposition region and is located above the second active layer, and each electrode deposition region includes a source electrode deposition region and a drain electrode deposition region spaced apart. Step 5: After depositing electrode layers on the source electrode deposition region and the drain electrode deposition region, remove the adhesive to obtain the transistor.
2. The method for fabricating a double active layer oxide thin-film transistor based on Li-doped zinc tin oxide according to claim 1, characterized in that, In step one, the substrate is a rigid silicon-on-silicon dioxide substrate.
3. The method for fabricating a double active layer oxide thin-film transistor based on Li-doped zinc tin oxide according to claim 2, characterized in that, In step one, the method for pretreating the substrate is as follows: The substrate was washed sequentially with acetone, ethanol and deionized water, dried with high-purity nitrogen, and then dried in an oven at 90°C for 5 minutes.
4. The method for fabricating a double active layer oxide thin-film transistor based on Li-doped zinc tin oxide according to claim 3, characterized in that, In step one, multiple active layer deposition regions are exposed and developed on the substrate, including the following steps: Step 1: Spin-coat photoresist onto the substrate; Step 2: Preheat the substrate coated with photoresist at 90°C for 5 minutes; Step 3: Cover the pre-baked substrate with a photomask pattern containing multiple active layer deposition areas and expose it under an exposure machine; Step 4: Place the exposed substrate in the developer solution. The photoresist corresponding to the exposed part will dissolve in the developer solution, exposing the silicon dioxide layer. Step 5: Rinse the substrate with deionized water to obtain multiple active layer deposition zones.
5. The method for fabricating a Li-doped zinc tin oxide dual-active-layer oxide thin-film transistor according to claim 3 or 4, characterized in that, In step two, the molar ratio of zinc to lithium in the Li-doped zinc oxide target is 50:
1.
6. The method for fabricating a double active layer oxide thin-film transistor based on Li-doped zinc tin oxide according to claim 5, characterized in that, In step two, when depositing the first active layer, the radio frequency power of the Li-doped zinc oxide target is 100W, the radio frequency power of the tin target is 15W, and the sputtering pressure is 8mTorr; when depositing the second active layer, the radio frequency power of the zinc oxide target is 100W, the radio frequency power of the tin target is 15W, and the sputtering pressure is 8mTorr.
7. The method for fabricating a double active layer oxide thin-film transistor based on Li-doped zinc tin oxide according to claim 6, characterized in that, In step two, the thickness of the first active layer is 30 nm; the thickness of the second active layer is 60 nm.
8. The method for fabricating a double active layer oxide thin-film transistor based on Li-doped zinc tin oxide according to claim 7, characterized in that, In step three, the annealing method is as follows: Place the degummed substrate in an annealing furnace and anneal at 600°C for 1 hour in air.
9. The method for fabricating a double active layer oxide thin-film transistor based on Li-doped zinc tin oxide according to claim 8, characterized in that, In step five, the method for depositing the electrode layer is as follows: The substrate was placed in an electron beam evaporation apparatus, and metallic aluminum was deposited in a chamber at 60°C.
10. The method for fabricating a double active layer oxide thin-film transistor based on Li-doped zinc tin oxide according to claim 9, characterized in that, The thickness of the electrode layer is 50 nm.
Citation Information
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