一种芯片的扇出型封装方法及芯片封装件
By using additive manufacturing to grow fan-out circuits on chip electrodes, the problems of difficult solder joint quality control and high packaging costs are solved, realizing an efficient packaging method and improving product reliability and heat dissipation performance.
CN116313842BActive Publication Date: 2026-07-17SHENZHEN REWO MICRO SEMICON TECH CO LTD
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHENZHEN REWO MICRO SEMICON TECH CO LTD
- Filing Date
- 2022-12-02
- Publication Date
- 2026-07-17
AI Technical Summary
Technical Problem
The existing fan-out packaging process is difficult to implement, has high quality control, high packaging costs, and poor heat dissipation performance of the packaged products.
Method used
Fan-out lines are grown on chip electrodes using additive manufacturing. By using additive manufacturing, the electrodes extend radially outward and form conductive paths and terminals in the encapsulation adhesive layer. This avoids traditional soldering processes and allows fan-out lines to be grown directly on the chip electrodes, eliminating the need for a redistribution layer substrate.
Benefits of technology
It improves product reliability, reduces packaging costs, and enhances heat dissipation performance, making it suitable for mass production.
✦ Generated by Eureka AI based on patent content.
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Figure CN116313842B_ABST
Abstract
本申请提供了一种芯片的扇出型封装方法及芯片封装件。所述扇出型封装方法用于对包括由内至外依次设置的至少两圈电极的芯片进行封装，包括：将所述芯片放置在第一载板的表面；其中，所述电极朝上；按照由外圈至内圈的顺序，依次通过增材制造方式分别使对应圈的所述电极沿径向向外延伸和使全部所述电极的端部沿通孔向上延伸；将所述芯片翻转至第二载板的表面，并对所述芯片灌胶封装，得到芯片封装件。本申请通过直接在芯片电极上生长扇出线路，避免了传统焊接工艺造成焊点品质难以控制的问题，提高了产品的可靠性，并且免除了重布线层载板，适合批量生产，大幅降低了封装成本，同时提高了产品的散热性能。
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