Three-dimensional package structure and method of forming the same

CN116314067BActive Publication Date: 2026-10-27JCET GROUP CO LTD
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Patent Information

Application Number
CN202310264432.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-03-17
Publication Date
2026-10-27
Estimated Expiration
2043-03-17

AI Technical Summary

Benefits of technology

[0035]本申请前述一实施例三维封装结构的形成方法,将第一芯片倒装在第一基板上后,将所述散热导板贴装在所述第一基板上,使所述散热导板的两块竖直板的底部贴附在所述第一基板的表面,所述横向板贴附在所述第一芯片的远离所述第一基板的表面;将所述第二基板贴装在所述第一基板上方,所述散热导板的两块竖直板的顶部分别嵌入所述两个缺口内;在第一基板和第二基板之间的空间填充满塑封层,所述塑封层包覆所述第一芯片和所述横向板;将所述第二芯片倒装在所述第二基板的远离所述塑封层的表面;将所述散热片贴装在所述第二基板的远离所述塑封层的表面上,所述散热片包围所述第二芯片的外表面。所述散热导板包括两块竖直板和将所述两块竖直板的中间位置固定的横向板,通过贴装可以很方便的将散热导板固定在所述第一基板上,使所述散热导板的两块竖直板的底部贴附在所述第一基板的表面,所述横向板贴附在所述第一芯片的远离所述第一基板的表面,因而通过横向板可以吸附所述第一芯片产生的热量并将所述热量传导至所述竖直板,所述竖直板除了本身能释放部分热量外,所述竖直板还可以将部分热量向上传到至后续第二基板上形成的散热片进行释放,从而可以有效的和快速的实现将底层封装的第一芯片产生的热量进行释放,提高了第一芯片的性能并能防止第一芯片的损伤。并且第二基板中缺口的存在,使得散热导板中的热量可以更容易的通过竖直板向上传导至所述散热片上,所述第二基板不会阻挡热量的传递。

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Abstract

A three-dimensional packaging structure and a forming method thereof, the forming method comprises the following steps: after a first chip is inverted and attached on a first substrate, a heat dissipation guide plate is attached on the first substrate, the bottom of two vertical plates of the heat dissipation guide plate is attached on the surface of the first substrate, and a transverse plate is attached on the surface of the first chip away from the first substrate; a second substrate is attached above the first substrate, the top of the two vertical plates of the heat dissipation guide plate is respectively embedded in two gaps; the space between the first substrate and the second substrate is filled with a plastic sealing layer, the plastic sealing layer covers the first chip and the transverse plate; the second chip is inverted and attached on the surface of the second substrate away from the plastic sealing layer; and a heat dissipation fin is attached on the surface of the second substrate away from the plastic sealing layer, the heat dissipation fin surrounds the outer surface of the second chip. The heat dissipation of the underlying chip is better realized.
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Description

Technical Field

[0001] This application relates to the field of semiconductor packaging, and more particularly to a three-dimensional packaging structure and a method for forming the same. Background Technology

[0002] In the past, integrating chips together mostly used System in a Package (SiP) technology, such as PiP (Package in Package) and PoP (Package on Package). However, with the development of applications such as smartphones and AIoT, not only is higher performance required, but also small size and low power consumption must be maintained. Under such circumstances, it is necessary to find ways to stack more chips to further reduce the size. Therefore, in addition to the original SiP, packaging technologies are now moving towards three-dimensional (3D) packaging technology.

[0003] Due to the stacking of multiple layers of chips, the heat dissipation of chips, especially the heat dissipation of the bottom layer chips, is an urgent problem to be solved in this field. Summary of the Invention

[0004] In view of this, one embodiment of this application provides a method for forming a three-dimensional packaging structure, including:

[0005] The system provides a first substrate, a second substrate, a first chip, a second chip, a heat dissipation guide plate, and a heat sink. The heat dissipation guide plate includes two vertical plates and a horizontal plate that fixes the middle position of the two vertical plates. The second substrate has two notches that penetrate the second substrate.

[0006] The first chip is flip-mounted onto the first substrate;

[0007] The heat dissipation guide plate is attached to the first substrate, such that the bottom of the two vertical plates of the heat dissipation guide plate are attached to the surface of the first substrate, and the horizontal plate is attached to the surface of the first chip away from the first substrate.

[0008] The second substrate is attached above the first substrate, and the tops of the two vertical plates of the heat dissipation guide plate are respectively embedded in the two notches;

[0009] The space between the first substrate and the second substrate is filled with a molding compound layer, which covers the first chip and the lateral plate.

[0010] The second chip is flip-chip mounted on the surface of the second substrate away from the molding layer;

[0011] The heat sink is attached to the surface of the second substrate away from the molding layer, and the heat sink surrounds the outer surface of the second chip.

[0012] In some embodiments, the system further includes: a connecting structure located between the first substrate and the second substrate, and on both sides of the transverse plate of the heat dissipation guide plate, the connecting structure being used to electrically connect the first substrate and the second substrate.

[0013] In some embodiments, the first substrate has a first line, the second substrate has a second line, the first chip is electrically connected to the first line, the second chip is electrically connected to the second line, and the adapter structure is electrically connected to the first line and the second line; the adapter structure includes an adapter plate or a columnar conductive structure.

[0014] In some embodiments, the number of the first chips is one or more; when the number of the first chips is multiple, the multiple first chips are chips with the same function or different functions, the multiple first chips are flip-chip mounted on the first substrate, the bottom of the two vertical plates of the heat dissipation guide plate are attached to the surface of the first substrate outside the multiple first chips, and the horizontal plate is sequentially attached to the surface of each first chip away from the first substrate.

[0015] In some embodiments, the heights of the plurality of the first chips may be the same or different after being flip-chipped onto the first substrate.

[0016] In some embodiments, when multiple first chips are flip-mounted onto the first substrate at the same height, the horizontal plate of the heat dissipation guide plate is a planar plate.

[0017] In some embodiments, when the heights of the multiple first chips after being flip-mounted on the first substrate are different, the upper surface of the horizontal plate of the heat dissipation guide plate is a flat surface, and the lower surface of the horizontal plate has a raised portion or a recessed portion. The recessed portion of the lower surface of the horizontal plate is respectively adhered to the surface of the first chip with a higher height that is away from the first substrate, or the raised portion of the lower surface of the horizontal plate is respectively adhered to the surface of the first chip with a lower height that is away from the first substrate.

[0018] In some embodiments, the bottom of the two vertical plates of the heat dissipation guide plate are attached to the surface of the first substrate by adhesive, the horizontal plate is attached to the surface of the first chip away from the first substrate by thermally conductive adhesive, the heat sink is attached to the second chip by thermally conductive adhesive, and the heat sink is attached to the second substrate by thermally conductive adhesive and / or adhesive.

[0019] In some embodiments, a portion of the heat sink covers a notch in the second substrate, and the location where the heat sink covers the notch in the second substrate is attached by thermally conductive adhesive.

[0020] Some embodiments of this application also provide a three-dimensional packaging structure, including:

[0021] The package includes at least one first package, a second substrate, a second chip, and a heat sink, wherein the second substrate has two notches penetrating through the second substrate;

[0022] The first package includes a first substrate, a first chip, a heat dissipation plate, and a molding compound. The heat dissipation plate includes two vertical plates and a horizontal plate that fixes the middle position of the two vertical plates. The first chip is flip-mounted onto the surface of the first substrate. The heat dissipation plate is attached to the surface of the first substrate such that the bottom of the two vertical plates of the heat dissipation plate is attached to the surface of the first substrate, and the horizontal plate is attached to the surface of the first chip away from the first substrate. The molding compound covers the first chip and the horizontal plate, and exposes the top surfaces of the two vertical plates.

[0023] The second substrate is located on the first package, and the tops of the two vertical plates of the heat dissipation guide plate are respectively embedded in the two notches;

[0024] The second chip is located on the surface of the second substrate away from the molding layer;

[0025] The heat sink is located on the surface of the second substrate away from the molding layer, and the heat sink surrounds the outer surface of the second chip.

[0026] In some embodiments, the system further includes: a connecting structure located between the first substrate and the second substrate, and on both sides of the transverse plate of the heat dissipation guide plate, the connecting structure being used to electrically connect the first substrate and the second substrate.

[0027] In some embodiments, the first substrate has a first line, the second substrate has a second line, the first chip is electrically connected to the first line, the second chip is electrically connected to the second line, and the adapter structure is electrically connected to the first line and the second line; the adapter structure includes an adapter plate or a columnar conductive structure.

[0028] In some embodiments, the number of the first chips is one or more; when the number of the first chips is multiple, the multiple first chips are chips with the same function or different functions, the multiple first chips are flip-chip mounted on the first substrate, the bottom of the two vertical plates of the heat dissipation guide plate are attached to the surface of the first substrate outside the multiple first chips, and the horizontal plate is sequentially attached to the surface of each first chip away from the first substrate.

[0029] In some embodiments, the heights of the plurality of the first chips may be the same or different after being flip-chipped onto the first substrate.

[0030] In some embodiments, when multiple first chips are flip-mounted onto the first substrate at the same height, the horizontal plate of the heat dissipation guide plate is a planar plate.

[0031] In some embodiments, when the heights of the multiple first chips after being flip-mounted on the first substrate are different, the upper surface of the horizontal plate of the heat dissipation guide plate is a flat surface, and the lower surface of the horizontal plate has a raised portion or a recessed portion. The recessed portion of the lower surface of the horizontal plate is respectively adhered to the surface of the first chip with a higher height that is away from the first substrate, or the raised portion of the lower surface of the horizontal plate is respectively adhered to the surface of the first chip with a lower height that is away from the first substrate.

[0032] In some embodiments, the bottom of the two vertical plates of the heat dissipation guide plate are attached to the surface of the first substrate by adhesive, the horizontal plate is attached to the surface of the first chip away from the first substrate by thermally conductive adhesive, the heat sink is attached to the second chip by thermally conductive adhesive, and the heat sink is attached to the second substrate by thermally conductive adhesive and / or adhesive.

[0033] In some embodiments, a portion of the heat sink covers a notch in the second substrate, and the location where the heat sink covers the notch in the second substrate is attached by thermally conductive adhesive.

[0034] In some embodiments, when the first package is multi-layered, the multi-layered first packages are stacked in the vertical direction, and the second substrate is mounted on top of the first substrate in the topmost first package; the first substrates in the upper and lower first packages are electrically connected through a second transition structure.

[0035] The method for forming a three-dimensional packaging structure according to the foregoing embodiment of this application involves flip-chip mounting a first chip onto a first substrate, then attaching a heat dissipation guide plate to the first substrate such that the bottoms of the two vertical plates of the heat dissipation guide plate are attached to the surface of the first substrate, and the horizontal plate is attached to the surface of the first chip away from the first substrate; a second substrate is attached above the first substrate, with the tops of the two vertical plates of the heat dissipation guide plate respectively embedded in the two notches; the space between the first substrate and the second substrate is filled with a molding compound, which covers the first chip and the horizontal plate; the second chip is flip-chip mounted on the surface of the second substrate away from the molding compound; and a heat sink is attached to the surface of the second substrate away from the molding compound, the heat sink surrounding the outer surface of the second chip. The heat dissipation plate includes two vertical plates and a horizontal plate fixed at the middle position of the two vertical plates. It can be easily fixed to the first substrate via mounting, with the bottom of the two vertical plates attached to the surface of the first substrate, and the horizontal plate attached to the surface of the first chip furthest from the first substrate. Therefore, the horizontal plate can absorb the heat generated by the first chip and conduct it to the vertical plates. In addition to releasing some heat itself, the vertical plates can also transfer some heat upwards to the heat sink formed on the subsequent second substrate for further release. This effectively and quickly dissipates the heat generated by the first chip in the underlying package, improving the performance of the first chip and preventing damage to it. Furthermore, the presence of a notch in the second substrate allows heat from the heat dissipation plate to be more easily conducted upwards to the heat sink through the vertical plates, without the second substrate obstructing heat transfer. Attached Figure Description

[0036] Figures 1-28 This is a schematic diagram illustrating the formation process of a three-dimensional packaging structure according to some embodiments of the present invention. Detailed Implementation

[0037] The specific embodiments of this application will be described in detail below with reference to the accompanying drawings. In describing the embodiments of this application in detail, for ease of explanation, the schematic diagrams may be partially enlarged without adhering to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of this application. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0038] Some embodiments of this application first provide a method for forming a three-dimensional packaging structure.

[0039] refer to Figures 1-6 ,in Figure 2 and Figure 3 They are respectively Figure 1Cross-sectional structural diagrams along cutting line AA1 and cutting line BB1. Figure 5 and Figure 6 They are respectively Figure 4 A cross-sectional structural diagram along the cutting line AA1 and the cutting line BB1, providing a first substrate 100 (reference). Figure 1-3 ), second substrate 200 (reference) Figure 4-6 The second substrate 200 has two notches 201 that penetrate the second substrate 200.

[0040] The first substrate 100 serves as a carrier for subsequent processes. The upper and lower surfaces of the first substrate 100 are respectively provided with a plurality of first electrical connection points (such as exposed pads or metal connection terminals, not shown in the figure). The first substrate 100 has first lines (not shown in the figure) used to electrically connect the plurality of first electrical connection points and subsequently to electrically connect with the first chip and the adapter structure.

[0041] In some embodiments, the first substrate 100 may be one of a resin substrate, a ceramic substrate, a glass substrate, a silicon substrate, a metal substrate, a printed circuit board (PCB), or a flexible printed circuit board (FPC). In some embodiments, the first substrate 100 may be a single-layer board or a multilayer board.

[0042] The second substrate 200 has a plurality of second electrical connection points (such as exposed pads or metal connection terminals, not shown in the figure) respectively on its upper and lower surfaces. The second substrate 200 has a second line (not shown in the figure) for electrically connecting the plurality of second electrical connection points and for subsequent electrical connection with the second chip and the adapter structure.

[0043] The second substrate 200 has two through-holes 201, which subsequently serve as a connection channel between the heat dissipation guide plate and the heat sink, allowing heat on the heat dissipation guide plate to be more easily conducted to the heat sink for release. In some embodiments, the through-hole 201 can be a closed opening with four sidewalls, the upper and lower ends of which penetrate the upper and lower surfaces of the second substrate 200. Alternatively, it can be a semi-closed opening with three sidewalls, the upper and lower ends of which penetrate the upper and lower surfaces of the second substrate 200.

[0044] In some embodiments, a plurality of first bumps 202 are formed on the lower surface of the second substrate 200, and the plurality of first bumps 202 are connected to corresponding second electrical connection points disposed on the lower surface of the second substrate 200. The material of the first bumps 202 is tin or a tin alloy, and the tin alloy can be one or more of tin silver, tin lead, tin silver copper, tin silver zinc, tin zinc, tin bismuth indium, tin indium, tin gold, tin copper, tin zinc indium, or tin silver antimony.

[0045] This application also requires a first chip (not shown in the figure), a second chip (not shown in the figure), an adapter structure (not shown in the figure), a heat dissipation board (not shown in the figure), and a heat sink (not shown in the figure), which will be described in detail later.

[0046] refer to Figures 7-9 , Figure 7 exist Figure 1 Based on this, among which Figure 8 and Figure 9 They are respectively Figure 7 A cross-sectional structural diagram along the cutting line AA1 and the cutting line BB1 ​​shows a first chip 300, which is flip-mounted onto a first substrate 100.

[0047] The first chip 300 includes a back surface and an active surface opposite to the back surface. The active surface has a plurality of second bumps 301, which are connected to an integrated circuit formed within the first chip 300. In this embodiment, the active surface of the first chip 300 is flip-mounted onto a first substrate 100 (or the upper surface of the first substrate 100), and the second bumps 301 on the active surface of the first chip 300 are soldered together with a portion of the first electrical connection points on the first substrate 100.

[0048] The first chip 300 is a chip with specific functions. In a specific embodiment, the first chip 300 includes, but is not limited to, a sensor chip, a power chip, a signal processing chip, a logic control chip, a memory chip, or a radio frequency chip.

[0049] The number of the first chip 300 can be one or more (≥2).

[0050] In some embodiments, when there are multiple first chips 300, the multiple first chips 300 are chips with the same or different functions, and the multiple first chips 300 are flip-chip mounted on the first substrate 100. In some specific embodiments, when the multiple first chips 300 are flip-chip mounted on the first substrate 100, some of the first chips 300 can be flip-chip mounted on the first substrate 100 along the dicing line AA1, and some of the first chips can also be flip-chip mounted on the first substrate 100 along the dicing line BB1.

[0051] In some embodiments, the heights of the plurality of first chips 300 after being flip-chipped onto the first substrate 100 may be the same or different, that is, the distances between the back surfaces of the plurality of first chips 300 and the surface of the first substrate 100 are different.

[0052] In some embodiments, the second bump 301 is a solder ball. In other embodiments, the second bump 301 may include a metal pillar and a solder ball located on the top surface of the metal pillar. In some embodiments, the solder ball is made of tin or a tin alloy. The metal pillar is made of aluminum, nickel, tungsten, platinum, copper, titanium, chromium, tantalum, a tin alloy, gold, or silver.

[0053] In some embodiments, after the first chip 300 is flip-chip mounted on the first substrate 100, a first underfill layer 302 is formed between the active surface of the first chip 300 and the first substrate 100. The material of the first underfill layer 302 is resin.

[0054] In some embodiments, the method further includes soldering an adapter structure 400 to first substrates 100 on both sides of the first chip 300. The adapter structure 400 is subsequently used to electrically connect the first substrate 100 and the second substrate to achieve electrical connection between the first chip 300 on the first substrate 100 and the second chip on the subsequent second substrate. The adapter structure 400 has a third bump 401 on the surface opposite to the first substrate 100, and the third bump 401 is soldered to a portion of the first electrical connection point on the first substrate 100. In this embodiment, the adapter structure 400 is disposed on the first substrates 100 on both sides of the first chip 300 along the cutting line AA1 direction, and space is left on the first substrates 100 on both sides of the first chip 300 along the cutting line BB1 ​​direction for subsequent installation of heat dissipation plates.

[0055] In some embodiments, the adapter structure 400 includes an adapter plate or a columnar conductive structure. In this embodiment, the adapter structure 400 is an adapter plate, which has a third circuit, and a third protrusion 401 is provided on the lower surface of the adapter structure 400, the third protrusion 401 being electrically connected to the third circuit. In other embodiments, when the adapter structure 400 is a columnar conductive structure, the material of the columnar conductive structure is metal, and the columnar conductive structure is directly soldered onto the first substrate 100.

[0056] refer to Figures 10-12 ,in Figure 11 and Figure 12 They are respectively Figure 10A cross-sectional structural diagram along the cutting line AA1 and the cutting line BB1 ​​shows a heat dissipation guide plate 500. The heat dissipation guide plate 500 includes two vertical plates 501 and a horizontal plate 502 that fixes the middle position of the two vertical plates 501. The heat dissipation guide plate 500 is mounted on the first substrate 100, such that the bottom of the two vertical plates 501 of the heat dissipation guide plate 500 is attached to the surface of the first substrate 100, and the horizontal plate 502 is attached to the surface of the first chip 300 away from the first substrate 100 (or attached to the back of the first chip 300).

[0057] The heat dissipation guide plate 500 has an "H" shaped cross-section along the cutting line BB1. The heat dissipation guide plate 500 includes two vertical plates 501 and a horizontal plate 502 fixing the middle position of the two vertical plates 501. The vertical plates 501 and the horizontal plate 502 are an integral structure, resulting in high mechanical stability and firmness. Furthermore, the heat dissipation guide plate 500 can be easily fixed to the first substrate 100 through mounting, with the bottom of the two vertical plates 501 attached to the surface of the first substrate 100, and the horizontal plate 502 attached to... The surface of the first chip 300 is far from the first substrate 100, so the horizontal plate 502 can absorb the heat generated by the first chip 300 and conduct the heat to the vertical plate 501. In addition to releasing some heat itself, the vertical plate 501 can also transfer some heat upward to the heat sink formed on the subsequent second substrate for release. This can effectively and quickly release the heat generated by the first chip 300 in the bottom package, improve the performance of the first chip 300 and prevent damage to the first chip 300.

[0058] The heat dissipation plate 500 is made of metal or alloy. In some embodiments, the heat dissipation plate 500 is made of copper, aluminum, or other metals and alloys with good thermal conductivity.

[0059] In this embodiment, the number of flip-chip 300s on the first substrate 100 is one. In other embodiments, refer to... Figure 13 When there are multiple flip-chips 300 on the first substrate 100 (e.g., including 300A and 300B), the bottoms of the two vertical plates 501 of the heat dissipation plate 500 are attached to the surface of the first substrate 100 outside the multiple first chips (300A and 300B), and the horizontal plate 502 is attached to the surface of each first chip (300A and 300B) away from the first substrate 100 (the back side of the first chip (300A and 300B)) in sequence, so that the heat generated by the multiple first chips can be released through a heat dissipation plate 500.

[0060] In some embodiments, continue to refer to Figure 13 Multiple first chips 300 (such as 300A and 300B) are flip-mounted on the first substrate 100 at the same height, and the horizontal plate 502 of the heat dissipation guide plate 500 is a flat plate.

[0061] In some embodiments, reference Figure 14 The number of flip-chips 300 on the first substrate 100 is multiple (e.g., including 300A and 300B), and the heights of the multiple first chips (300A and 300B) after being flip-chipped onto the first substrate 100 are different (e.g., ...). Figure 14 When the height of the first chip 300A on the left in the left or right diagram is greater than the height of the first chip 300B on the right, the upper surface of the horizontal plate 502 of the heat dissipation guide plate 500 is a flat surface, and the lower surface of the horizontal plate 502 has a raised portion (see reference). Figure 14 (Middle left image) or the concave part (reference) Figure 14 (See right image). The raised portion can have different heights depending on the height difference, and the recessed portion can have different depths depending on the height difference. Taking two flip-chips (300A and 300B) with different heights as an example, after flipping, the height of the first chip 300A is greater than the height of the first chip 300B. Correspondingly, the lower surface of the horizontal plate 502 has a raised portion (see reference). Figure 14 (Middle left image) or a recessed area (see reference) Figure 14 (Middle right figure). When adhering two different transverse plates 502, refer to... Figure 14 In the left-middle figure, the raised portion of the lower surface of the horizontal plate 502 is respectively adhered to the surface of the lower-height first chip 300B that is away from the first substrate 100, and the flat portion of the lower surface of the horizontal plate 502 is respectively adhered to the surface of the higher-height first chip 300A that is away from the first substrate 100; Reference Figure 14 In the right-middle figure, the recessed portion of the lower surface of the horizontal plate 502 is respectively adhered to the surface of the first chip 300A with a higher height that is away from the first substrate 100, and the flat portion of the lower surface of the horizontal plate 502 is respectively attached to the surface of the first chip 300B with a lower height that is away from the first substrate 100. Therefore, it is possible to achieve effective and high-speed heat release from multiple first chips 300 with different flip-chip heights at the same time.

[0062] In some embodiments, reference Figure 13When some of the first chips 300 (e.g., 300A, 300B) are flip-mounted onto the first substrate 100 along the dicing line BB1, the transverse plate 502 is sequentially attached to the surface of each of the first chips (300A, 300B) flip-mounted along the dicing line BB1 ​​that is away from the first substrate 100. In other embodiments, see reference to Figure 15 When some of the first chips 300 (such as 300A and 300C) are flip-mounted onto the first substrate 100 along the cutting line AA1, the transverse plate 502 is also attached sequentially to the surface of each of the first chips (300A and 300C) flip-mounted along the cutting line AA1 that is away from the first substrate 100. Thus, multiple first chips 300 flip-mounted in different directions can simultaneously achieve effective and high-speed heat release.

[0063] In some embodiments, the surface of the horizontal plate 502 on which the first chip 300 is attached is a rough surface, thereby increasing the contact area between the horizontal plate 502 and the first chip 300, which can absorb the heat generated by the first chip 300 more quickly.

[0064] In some embodiments, the bottom of the two vertical plates 501 of the heat dissipation guide plate 500 are attached to the surface of the first substrate 100 by adhesive (not shown in the figure), and the horizontal plate 502 is attached to the surface of the first chip 300 away from the first substrate 100 by thermally conductive adhesive 503, so that the heat dissipation guide plate 500 is well fixed while the heat conduction is not affected.

[0065] refer to Figures 16-18 ,in Figure 17 and Figure 18 They are respectively Figure 16 A cross-sectional view along the cutting line AA1 and the cutting line BB1 ​​shows that the second substrate 200 is mounted on top of the first substrate 100, and the tops of the two vertical plates 501 of the heat dissipation guide plate 500 are respectively embedded in the two notches 201; the space between the first substrate 100 and the second substrate 200 is filled with a molding compound 101, which covers the first chip 300 and the horizontal plate 502.

[0066] In some embodiments, when the second substrate 200 is mounted above the first substrate 100, a first bump 202 on the lower surface of the second substrate 200 is soldered to the upper surface of the adapter structure 400. When the adapter structure 400 is an adapter plate, the first bump 202 is electrically connected to a third line in the adapter plate. In other embodiments, when the adapter structure 400 is a columnar conductive structure, the first bump 202 is directly soldered to the upper surface of the columnar conductive structure.

[0067] In some embodiments, when the second substrate 200 is mounted above the first substrate 100, the lower surface of the second substrate 200 does not contact the horizontal plate 502 of the heat dissipation guide plate 500.

[0068] In some embodiments, when the second substrate 200 is mounted above the first substrate 100, the tops of the two vertical plates 501 of the heat dissipation guide plate 500 are respectively embedded in the two notches 201. After the heat sink is attached, the heat in the heat dissipation guide plate 500 can be more easily conducted upward to the heat sink through the vertical plates 501, and the second substrate 200 will not block the heat transfer.

[0069] The molding compound 101 is manufactured using injection molding or transfer molding. In some embodiments, the material of the molding compound 101 may be epoxy resin, polyimide resin, benzocyclobutene resin, or polybenzoxazole resin. In other embodiments, the material of the molding compound 101 may also be polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyimide, ethylene-vinyl acetate copolymer, or polyvinyl alcohol.

[0070] refer to Figures 19-21 ,in Figure 20 and Figure 21 They are respectively Figure 19 A cross-sectional structural diagram along the cutting line AA1 and the cutting line BB1 ​​shows a second chip 310, which is flip-chip mounted on the surface of the second substrate 200 away from the molding layer 101 (or the upper surface of the second substrate).

[0071] The second chip 310 includes a back surface and an active surface opposite to the back surface. The active surface has a plurality of fourth bumps 311, which are connected to an integrated circuit formed within the second chip 310. In this embodiment, the active surface of the second chip 310 is flip-mounted onto the second substrate 200 (or the upper surface of the second substrate 200), and the fourth bumps 311 on the active surface of the second chip 310 are soldered together with a portion of the second electrical connection points on the second substrate 200.

[0072] The second chip 310 is a chip with specific functions. In one specific embodiment, the second chip 310 includes, but is not limited to, a sensor chip, a power chip, a signal processing chip, a logic control chip, a memory chip, or a radio frequency chip. In some embodiments, the second chip 310 has a different function from the first chip 300.

[0073] In some embodiments, the fourth bump 311 is a solder ball. In other embodiments, the fourth bump 311 may include a metal post and a solder ball located on the top surface of the metal post.

[0074] In some embodiments, after the second chip 310 is flip-chip mounted on the second substrate 200, a second underfill layer 312 is formed between the active surface of the second chip 310 and the second substrate 200. The material of the second underfill layer 312 is resin.

[0075] refer to Figures 22-24 ,in Figure 23 and Figure 24 They are respectively Figure 22 A cross-sectional structural diagram along the cutting line AA1 and the cutting line BB1 ​​shows a heat sink 510 provided. The heat sink 510 is attached to the surface of the second substrate 200 away from the molding layer 101 (the upper surface). The heat sink 510 surrounds the outer surface of the second chip 310 (the outer surface includes the side surface of the second chip 310 and the surface away from the second substrate 200 (the back surface)).

[0076] The heat sink 510 has a groove corresponding to the shape of the outer surface of the second chip 310. The heat sink 510 is attached to the surface of the second substrate 200 away from the molding layer 101, and the groove corresponds to the outer surface of the second chip 310.

[0077] In some embodiments, the heat sink 510 is mounted on the surface of the second substrate 200 away from the molding layer 101. The heat sink 510 is attached to the second chip 310 by thermally conductive adhesive 508, and the heat sink 510 is attached to the second substrate 200 by thermally conductive adhesive and / or adhesive 509.

[0078] In some embodiments, a portion of the heat sink 510 covers a notch in the second substrate 200, and the location where the heat sink 510 covers the notch in the second substrate 200 is attached by thermally conductive adhesive.

[0079] In some embodiments, reference Figures 25-26 A plurality of external protrusions 102 are formed on the lower surface of the first substrate 100.

[0080] The external protrusion 102 can be a solder ball or a solder bump. The external protrusion 102 may also include a metal pillar and a solder ball located on the top surface of the metal pillar.

[0081] Some embodiments of this application also provide a three-dimensional packaging structure, see reference. Figures 22-24 ,include:

[0082] The package includes at least one first package, a second substrate 200, a second chip 310, and a heat sink 510, wherein the second substrate 200 has two notches that penetrate the second substrate.

[0083] The first package includes a first substrate 100, a first chip 300, a heat dissipation plate 500, and a molding compound 101. The heat dissipation plate 500 includes two vertical plates 501 and a horizontal plate 502 that fixes the middle position of the two vertical plates 501. The first chip 300 is flip-mounted on the surface (upper surface) of the first substrate 100. The heat dissipation plate 500 is attached to the first substrate 100 such that the bottom of the two vertical plates 501 of the heat dissipation plate 500 is attached to the surface (upper surface) of the first substrate, and the horizontal plate 502 is attached to the surface of the first chip 300 away from the first substrate 100. The molding compound 101 covers the first chip 300 and the horizontal plate 502, and exposes the top surfaces of the two vertical plates 501.

[0084] The second substrate 200 is located on the first package, and the tops of the two vertical plates 501 of the heat dissipation guide plate 500 are respectively embedded in the two notches;

[0085] The second chip 310 is located on the surface of the second substrate 200 that is away from the molding layer 100;

[0086] The heat sink 510 is located on the surface of the second substrate 200 away from the molding layer 100, and the heat sink 510 surrounds the outer surface of the second chip 310 (the side surface of the second chip 310 and the surface away from the second substrate).

[0087] In some embodiments, the system further includes: a transition structure 400, which is located between the first substrate 100 and the second substrate 200 and on both sides of the transverse plate 502 of the heat dissipation guide plate 500, and the transition structure 400 is used to electrically connect the first substrate 100 and the second substrate 200.

[0088] In some embodiments, the first substrate 100 has a first line, the second substrate 200 has a second line, the first chip 300 is electrically connected to the first line, the second chip 310 is electrically connected to the second line, and the adapter structure 400 is electrically connected to the first line and the second line; the adapter structure 400 includes an adapter plate or a columnar conductive structure.

[0089] In some embodiments, the number of the first chips 300 is one or more; when the number of the first chips 300 is multiple, the multiple first chips 300 are chips with the same or different functions, the multiple first chips 300 are flip-chip mounted on the first substrate, the bottoms of the two vertical plates 501 of the heat dissipation plate 500 are attached to the surface of the first substrate 100 outside the multiple first chips 300, and the horizontal plates 502 are sequentially attached to the surface of each first chip 300 away from the first substrate 100 (see reference). Figure 13 ).

[0090] In some embodiments, the heights of the plurality of first chips 300 after being flip-mounted onto the first substrate 100 may be the same or different. When the heights of the plurality of first chips 300 after being flip-mounted onto the first substrate 100 are the same, the horizontal plate 502 of the heat dissipation guide plate 500 is a planar plate (see reference). Figure 13 ).

[0091] In some embodiments, the number of flip-chips 300 on the first substrate 100 is multiple (e.g., including 300A and 300B), and the heights of the multiple first chips (300A and 300B) after being flip-chipped onto the first substrate 100 are different (e.g., ...). Figure 14 When the height of the first chip 300A on the left in the left or right diagram is greater than the height of the first chip 300B on the right, the upper surface of the horizontal plate 502 of the heat dissipation guide plate 500 is a flat surface, and the lower surface of the horizontal plate 502 has a raised portion (see reference). Figure 14 (Middle left image) or the concave part (reference) Figure 14 (See right image). The raised portion can have different heights depending on the height difference, and the recessed portion can have different depths depending on the height difference. Taking two flip-chips (300A and 300B) with different heights as an example, after flipping, the height of the first chip 300A is greater than the height of the first chip 300B. Correspondingly, the lower surface of the horizontal plate 502 has a raised portion (see reference). Figure 14 (Middle left image) or a recessed area (see reference) Figure 14 (Middle right figure). When adhering two different transverse plates 502, refer to... Figure 14 In the left-middle figure, the raised portion of the lower surface of the horizontal plate 502 is respectively adhered to the surface of the lower-height first chip 300B that is away from the first substrate 100, and the flat portion of the lower surface of the horizontal plate 502 is respectively adhered to the surface of the higher-height first chip 300A that is away from the first substrate 100; Reference Figure 14In the right-middle figure, the recessed portion of the lower surface of the horizontal plate 502 is respectively adhered to the surface of the first chip 300A, which is higher in height and farther away from the first substrate 100, while the flat portion of the lower surface of the horizontal plate 502 is respectively adhered to the surface of the first chip 300B, which is lower in height and farther away from the first substrate 100.

[0092] In some embodiments, the surface of the transverse plate 502 on which the first chip 300 is attached is a rough surface.

[0093] In some embodiments, the bottoms of the two vertical plates 501 of the heat dissipation guide plate 500 are attached to the surface of the first substrate 100 by adhesive, the horizontal plate 502 is attached to the surface of the first chip 300 away from the first substrate 100 by thermally conductive adhesive, the heat sink 510 is attached to the second chip 310 by thermally conductive adhesive 508, and the heat sink 510 is attached to the second substrate 200 by thermally conductive adhesive and / or adhesive.

[0094] In some embodiments, a portion of the heat sink 510 covers a notch in the second substrate 200, and the location where the heat sink 510 covers the notch in the second substrate 200 is attached by thermally conductive adhesive.

[0095] In some embodiments, reference Figure 27 and Figure 28 When the first package is multi-layered, the multi-layered first packages are stacked in a vertical direction (the vertical direction is the direction perpendicular to the upper surface of the first substrate), and the second substrate 200 is mounted on top of the first substrate 100 in the top layer of the first package; the first substrates 100 in the upper and lower layers of the first package are electrically connected through a second adapter structure 406, and the upper and lower surfaces of the adapter structure 406 are connected to the surfaces of the upper and lower substrates of the upper and lower layers through solder bumps 103 and solder bumps 405, respectively.

[0096] It should be noted that the limitations or descriptions of the same or similar parts in some embodiments of the aforementioned three-dimensional packaging structure and some embodiments of the aforementioned three-dimensional packaging structure forming method will not be repeated here. For details, please refer to the limitations or descriptions of the corresponding parts in some embodiments of the aforementioned three-dimensional packaging structure forming method.

[0097] Although this application has been disclosed above with reference to preferred embodiments, it is not intended to limit this application. Any person skilled in the art can make possible changes and modifications to the technical solutions of this application by utilizing the methods and techniques disclosed above without departing from the spirit and scope of this application. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this application without departing from the content of the technical solutions of this application shall fall within the protection scope of the technical solutions of this application.

Claims

1. A method for forming a three-dimensional encapsulation structure, characterized in that, include: The system provides a first substrate, a second substrate, a first chip, an adapter structure, a second chip, a heat dissipation guide plate, and a heat sink. The heat dissipation guide plate includes two vertical plates and a horizontal plate that fixes the middle position of the two vertical plates. The second substrate has two notches that penetrate the second substrate. The first chip is flip-chip mounted on the first substrate, and the adapter structure is soldered to the first substrate on both sides of the first chip; The heat dissipation guide plate is attached to the first substrate, such that the bottom of the two vertical plates of the heat dissipation guide plate are attached to the surface of the first substrate, and the horizontal plate is attached to the surface of the first chip away from the first substrate. The adapter structure is located on both outer sides of the horizontal plate of the heat dissipation guide plate. The second substrate is mounted on top of the first substrate, the adapter structure electrically connects the first substrate and the second substrate, the tops of the two vertical plates of the heat dissipation guide plate are respectively embedded in the two notches, and the lower surface of the second substrate does not contact the horizontal plate of the heat dissipation guide plate. The space between the first substrate and the second substrate is filled with a molding compound layer, which covers the first chip and the lateral plate. The second chip is flip-chipped onto the surface of the second substrate that is away from the molding layer; The heat sink is attached to the surface of the second substrate away from the molding layer. The heat sink has a groove to accommodate the second chip. The heat sink surrounds the outer surface of the second chip through the groove, and part of the heat sink covers the two notches and is connected to the top of the vertical plate through thermally conductive adhesive.

2. The method for forming a three-dimensional packaging structure according to claim 1, characterized in that, The first substrate has a first circuit, the second substrate has a second circuit, the first chip is electrically connected to the first circuit, the second chip is electrically connected to the second circuit, and the adapter structure is electrically connected to the first circuit and the second circuit. The adapter structure includes an adapter plate or a columnar conductive structure.

3. The method for forming a three-dimensional packaging structure according to claim 1, characterized in that, The number of the first chips is one or more; when the number of the first chips is multiple, the multiple first chips are chips with the same function or different functions, the multiple first chips are flip-mounted on the first substrate, the bottom of the two vertical plates of the heat dissipation guide plate are attached to the surface of the first substrate outside the multiple first chips, and the horizontal plate is attached to the surface of each first chip away from the first substrate in sequence.

4. The method for forming a three-dimensional packaging structure according to claim 3, characterized in that, The heights of multiple first chips after being flip-mounted on the first substrate may be the same or different.

5. The method for forming a three-dimensional encapsulation structure according to claim 4, characterized in that, When multiple first chips are flip-mounted onto the first substrate at the same height, the horizontal plate of the heat dissipation guide plate is a flat plate.

6. The method for forming a three-dimensional encapsulation structure according to claim 4, characterized in that, When multiple first chips are flip-mounted onto the first substrate at different heights, the upper surface of the horizontal plate of the heat dissipation guide plate is a flat surface, and the lower surface of the horizontal plate has a raised portion or a recessed portion. The recessed portion of the lower surface of the horizontal plate is attached to the surface of the first chip with a higher height that is away from the first substrate, or the raised portion of the lower surface of the horizontal plate is attached to the surface of the first chip with a lower height that is away from the first substrate.

7. The method for forming a three-dimensional packaging structure according to claim 1, characterized in that, The bottom of the two vertical plates of the heat dissipation plate are attached to the surface of the first substrate with adhesive, the horizontal plate is attached to the surface of the first chip away from the first substrate with thermally conductive adhesive, the heat sink is attached to the second chip with thermally conductive adhesive, and the heat sink is attached to the second substrate with thermally conductive adhesive and / or adhesive.

8. A three-dimensional packaging structure, characterized in that, include: The package includes at least one first package, a second substrate, a connecting structure, a second chip, and a heat sink, wherein the second substrate has two notches penetrating through the second substrate; The first package includes a first substrate, a first chip, an adapter structure, a heat dissipation plate, and a molding compound. The heat dissipation plate includes two vertical plates and a horizontal plate fixing the middle position of the two vertical plates. The first chip is flip-mounted onto the surface of the first substrate. The heat dissipation plate is attached to the surface of the first substrate such that the bottom of the two vertical plates are attached to the surface of the first substrate, and the horizontal plate is attached to the surface of the first chip away from the first substrate. The molding compound covers the first chip and the horizontal plate, exposing the top surfaces of the two vertical plates. The adapter structure is soldered to the first substrate on both sides of the first chip and is located on both outer sides of the horizontal plate of the heat dissipation plate. The adapter structure is used for electrical connection between the first substrate and the second substrate. The second substrate is located on the first package, the tops of the two vertical plates of the heat dissipation guide are respectively embedded in the two notches, and the lower surface of the second substrate does not contact the horizontal plate of the heat dissipation guide; The second chip is located on the surface of the second substrate away from the molding layer; The heat sink is located on the surface of the second substrate away from the molding layer. The heat sink has a groove for accommodating the second chip. The heat sink surrounds the outer surface of the second chip through the groove, and part of the heat sink covers the two notches and is connected to the top of the vertical plate through thermally conductive adhesive.

9. The three-dimensional packaging structure according to claim 8, characterized in that, The first substrate has a first circuit, the second substrate has a second circuit, the first chip is electrically connected to the first circuit, the second chip is electrically connected to the second circuit, and the adapter structure is electrically connected to the first circuit and the second circuit. The adapter structure includes an adapter plate or a columnar conductive structure.

10. The three-dimensional packaging structure according to claim 8, characterized in that, The number of the first chips is one or more; when the number of the first chips is multiple, the multiple first chips are chips with the same function or different functions, the multiple first chips are flip-mounted on the first substrate, the bottom of the two vertical plates of the heat dissipation guide plate are attached to the surface of the first substrate outside the multiple first chips, and the horizontal plate is attached to the surface of each first chip away from the first substrate in sequence.

11. The three-dimensional packaging structure according to claim 10, characterized in that, The heights of multiple first chips after being flip-mounted on the first substrate may be the same or different.

12. The three-dimensional packaging structure according to claim 11, characterized in that, When multiple first chips are flip-mounted onto the first substrate at the same height, the horizontal plate of the heat dissipation guide plate is a flat plate.

13. The three-dimensional packaging structure according to claim 11, characterized in that, When multiple first chips are flip-mounted onto the first substrate at different heights, the upper surface of the horizontal plate of the heat dissipation guide plate is a flat surface, and the lower surface of the horizontal plate has a raised portion or a recessed portion. The recessed portion of the lower surface of the horizontal plate is attached to the surface of the first chip with a higher height that is away from the first substrate, or the raised portion of the lower surface of the horizontal plate is attached to the surface of the first chip with a lower height that is away from the first substrate.

14. The three-dimensional packaging structure according to claim 8, characterized in that, The bottom of the two vertical plates of the heat dissipation plate are attached to the surface of the first substrate with adhesive, the horizontal plate is attached to the surface of the first chip away from the first substrate with thermally conductive adhesive, the heat sink is attached to the second chip with thermally conductive adhesive, and the heat sink is attached to the second substrate with thermally conductive adhesive and / or adhesive.

15. The three-dimensional packaging structure according to claim 8, characterized in that, When the first package is multi-layered, the multi-layered first packages are stacked vertically, and the second substrate is mounted on top of the first substrate in the topmost first package; the first substrates in the upper and lower first packages are electrically connected through a second adapter structure.

Citation Information

Patent Citations

  • Stacked semiconductor package element

    CN102856296A