High resistivity single crystal silicon ingot and wafer with improved mechanical strength

Abstract

This application relates to high resistivity monocrystalline silicon ingots and wafers with improved mechanical strength. The invention provides a method for preparing monocrystalline silicon ingots and wafers diced from them. The ingots and wafers comprise at least about 1x10⁻⁶ crystalline silicon wafers. 14 atoms / cm 3 The concentration of nitrogen and / or at least about 1 x 10 19 atoms / cm 3 The concentration of germanium is less than about 6 ppma, the concentration of interstitial oxygen is less than about 6 ppma, and the resistivity is at least about 1000 ohm cm.

Description

[0001] This application is a divisional application of the invention patent application filed on June 6, 2017, with application number "201780035592.2" and titled "High Resistivity Single Crystal Silicon Ingot and Wafer with Improved Mechanical Strength".

[0002] Cross-reference of related applications

[0003] This application is the Chinese national phase application of International Application No. PCT / US2017 / 036061, filed June 6, 2017, the entire disclosure of which is incorporated herein by reference as if in full. International Application No. PCT / US2017 / 036061 claims the benefits of U.S. Provisional Patent Application No. 62 / 347143, filed June 8, 2016, and U.S. Provisional Patent Application No. 62 / 347145, filed June 8, 2016. The entire disclosure of both priority documents is incorporated herein by reference as if in full. Technical Field

[0004] This invention generally relates to the production of monocrystalline silicon ingots and wafers having low oxygen concentration, high resistivity and improved mechanical strength. Background Technology

[0005] Monocrystalline silicon is the starting material in many processes used to manufacture semiconductors, electronic components, and solar energy materials. For example, semiconductor wafers produced from silicon ingots are commonly used in the production of integrated circuit chips. In the solar energy industry, monocrystalline silicon can be used instead of polycrystalline silicon due to the absence of grain boundaries and dislocations. Monocrystalline silicon ingots are processed into desired shapes (e.g., silicon wafers) from which semiconductors or solar energy wafers can be produced.

[0006] Existing methods for producing high-purity single-crystal silicon ingots include the floating zone method and the magnetic field-applied Czochralski (MCZ) method. The floating zone method involves melting a narrow region of an ultrapure polycrystalline silicon rod and slowly translating it along the rod through the melting zone to produce a single-crystal silicon ingot with high purity. The MCZ process produces a single-crystal silicon ingot by melting polycrystalline silicon in a crucible, immersing a seed crystal in the molten silicon, and withdrawing the seed crystal in a manner sufficient to achieve the desired ingot diameter. Horizontal and / or vertical magnetic fields can be applied to the molten silicon to suppress the incorporation of impurities (e.g., oxygen) into the growing single-crystal silicon ingot. While floating zone ingots typically contain relatively low concentrations of impurities (e.g., oxygen), the diameter of ingots grown using the floating zone method is typically no greater than about 200 mm due to the limitations imposed by surface tension. MCZ ingots can produce larger ingot diameters compared to floating zone ingots, but MCZ ingots typically contain higher concentrations of impurities.

[0007] During the production of single-crystal silicon ingots using the MCZ method, oxygen is introduced into the silicon ingot through the melt-solid or melt-crystal interface. Oxygen causes various defects in the wafers produced from the ingot, thereby reducing the yield of semiconductor devices manufactured using the ingot. For example, substrates for insulated-gate bipolar transistors (IGBTs), high-quality radio frequency (RF) applications, high-resistivity silicon-on-insulator (HR-SOI), charge-detaining layer SOI (CTL-SO1), and GaN epitaxial applications typically require low oxygen concentrations (Oi) to achieve high resistivity.

[0008] Floating region silicon has been used to fabricate at least some known semiconductor devices to achieve low Oi and high resistivity. However, floating region materials are relatively expensive and limited to producing ingots with diameters less than about 200 mm. Therefore, floating region silicon is expensive and cannot produce larger diameter silicon ingots with relatively low oxygen concentrations.

[0009] High-quality radio frequency (RF) devices built on high-resistivity silicon-on-insulator (HR-SOI) require very high resistivity to achieve good second harmonic performance (HD2). To maintain the high resistivity of the wafer during device fabrication and packaging, very low Oi is required to minimize the thermal donor effects of Oi and avoid PN junction formation. However, low-Oi wafers suffer from significantly reduced mechanical strength and are prone to slippage during high-temperature process steps in the SOI line, EPI reactor, and device fabrication. This results in high yield losses for both SOI wafer manufacturers and device manufacturers.

[0010] This background section is intended to introduce the reader to various aspects of the technology that may be associated with various aspects of the present invention, which are described and / or claimed below. It is believed that this discussion helps to provide the reader with background information to facilitate a better understanding of the various aspects of the present invention. Therefore, it should be understood that these statements should be read in this context rather than as an endorsement of prior art. Summary of the Invention

[0011] In one embodiment, the present invention relates to a monocrystalline silicon wafer comprising: two principal parallel surfaces, one being a front surface of the monocrystalline silicon wafer and the other being a rear surface of the monocrystalline silicon wafer; a circumferential edge joining the front surface and the rear surface of the monocrystalline silicon wafer; a bulk region between the front surface and the rear surface; and a center plane of the monocrystalline silicon wafer between the front surface and the rear surface, wherein the bulk region includes impurities comprising at least about 1 x 10⁻⁶. 14 atoms / cm 3 The concentration of nitrogen is at least about 1 x 10⁻⁶. 19 atoms / cm 3 Germanium concentration, or at least about 1 x 10⁻⁶. 14atoms / cm 3 The concentration of nitrogen is at least about 1 x 10 19 atoms / cm 3 The combination of germanium at a concentration of less than about 6 ppma and interstitial oxygen at a concentration of less than about 6 ppma (new ASTM from 1980 to 1983: ASTM F 121; DIN 50438 / 1 from 1978), and further wherein the body of the single crystal silicon ingot has a resistivity of at least about 1000 ohm cm.

[0012] In one embodiment, the invention further relates to a method for growing a single-crystal silicon ingot. The method includes: preparing a silicon melt, wherein the silicon melt is prepared by melting polycrystalline silicon in a quartz-lined crucible and adding an impurity source to the quartz-lined crucible, the impurity including germanium, nitrogen, or a combination of germanium and nitrogen; and drawing the single-crystal silicon ingot from the silicon melt, the single-crystal silicon ingot including a central axis, a crown, an end opposite to the crown, and a body between the crown and the opposite end, the body having a lateral surface and a radius R extending from the central axis to the lateral surface, wherein the body of the single-crystal silicon ingot comprises at least about 1 x 10⁻⁶ ppm. 14 atoms / cm 3 The concentration of nitrogen is at least about 1 x 10⁻⁶. 19 atoms / cm 3 Germanium concentration, or at least about 1 x 10⁻⁶. 14 atoms / cm 3 The concentration of nitrogen is at least about 1 x 10 19 atoms / cm 3 The combination of germanium concentrations, further wherein the pulling conditions are sufficient to produce an interstitial oxygen concentration of less than about 6 ppma in the body of the single-crystal silicon ingot (new ASTM F121 from 1980 to 1983; DIN 50438 / 1 from 1978), and further wherein the body of the single-crystal silicon ingot has a resistivity of at least about 1000 ohm cm.

[0013] In one embodiment, the invention further relates to a monocrystalline silicon ingot comprising: a central axis, a crown, an end portion opposite to the crown, and a body between the crown and the opposite end portion, the body having a lateral surface and a radius R extending from the central axis to the lateral surface, wherein the body of the monocrystalline silicon ingot includes impurities comprising at least about 1 x 10⁻⁶. 14 atoms / cm 3 The concentration of nitrogen is at least about 1 x 10⁻⁶. 19 atoms / cm 3 Germanium concentration, or at least about 1 x 10⁻⁶. 14 atoms / cm 3The concentration of nitrogen is at least about 1 x 10 19 atoms / cm 3 The combination of germanium at a concentration of less than about 6 ppma and interstitial oxygen at a concentration of less than about 6 ppma (new ASTM from 1980 to 1983: ASTM F 121; DIN 50438 / 1 from 1978), and further wherein the body of the single crystal silicon ingot has a resistivity of at least about 1000 ohm cm.

[0014] Various improvements exist to the features mentioned in the foregoing aspects. Further features may also be incorporated into the foregoing aspects. These improvements and additional features may exist individually or in any combination. For example, the various features discussed below with respect to any of the illustrated embodiments may be incorporated individually or in any combination into any of the aspects described above. Attached Figure Description

[0015] Figure 1 This is a top view of a crucible in one embodiment.

[0016] Figure 2 Is Figure 1 The crucible shown in the image is a side view.

[0017] Figure 3 This is a schematic diagram illustrating a pointed magnetic field applied to a crucible containing melt in a crystal growth apparatus.

[0018] Figure 4 Is with Figure 1 A block diagram of the crystal growth system of the same embodiment.

[0019] Figure 5A It is a cross-sectional view showing the flow lines and oxygen concentration of a portion of the crucible near the crucible wall during intermediate bulk growth at a given crystal rotation rate.

[0020] Figure 5B It is a cross-sectional view of an exemplary crucible portion, showing the flow lines near the crucible wall and the oxygen concentration during the later stages of bulk growth according to the crystal rotation rate.

[0021] Figure 5C It is a cross-sectional view of the portion of the crucible near the crucible wall, mapped onto the later bulk growth at different crystal rotation rates, and the oxygen concentration.

[0022] Figure 6 It is a graph plotted during the later stages of the main growth, showing the simulated oxygen concentration (Oi) versus the position (BL) along the crystal, based on the change in crystal rotation rate.

[0023] Figure 7A This is a graph showing the oxygen concentration during the later stages of host growth compared to the crucible rotation rate at a host rotation rate of 6 rpm.

[0024] Figure 7B This is a graph showing the oxygen concentration during the later stages of host growth compared to the crucible rotation rate at a host rotation rate of 8 rpm.

[0025] Figure 8A It is an illustrative cross-sectional view of a crucible mapped onto the streamlines and velocity values ​​near the crucible wall during the later stages of body growth at a magnetic field strength corresponding to 50% equilibrium.

[0026] Figure 8B It is an illustrative cross-sectional view of a crucible mapped onto the streamlines and velocity values ​​near the crucible wall during the later stages of body growth at a magnetic field strength corresponding to 95% equilibrium.

[0027] Figure 8C It is an illustrative cross-sectional view of a crucible mapped onto the streamlines and velocity values ​​near the crucible wall during the later stages of body growth at a magnetic field strength corresponding to 150% equilibrium.

[0028] Figure 9 It is a graph plotting the oxygen concentration as a function of the bulk length of the crystal, based on the quantitative curves of the rotation rate of two different crystals.

[0029] Figure 10A and 10B It is a graph depicting the no-sliding temperature window test according to Example 3.

[0030] Figure 11 It is a graph depicting the no-sliding temperature window test according to Example 4.

[0031] Similar reference symbols in various diagrams indicate similar elements. Detailed Implementation

[0032] The method of the present invention relates to growing a monocrystalline silicon ingot under conditions sufficient to produce an ingot having low oxygen concentration, high resistivity, and improved mechanical strength. The invention further relates to the monocrystalline silicon ingot produced by the said method, and even further relates to monocrystalline silicon wafers diced from the monocrystalline silicon ingot, the wafers having low oxygen concentration, high resistivity, and improved mechanical strength.

[0033] According to some embodiments of the present invention, crystal growth conditions are sufficient to prepare single-crystal silicon ingots by the Chuklaski method, said ingot comprising at least about 1 x 10⁻⁶ crystalline silicon. 19 atoms / cm 3 The silicon ingot contains germanium (Ge) dopant at a concentration of less than about 6.0 ppma and interstitial oxygen (Oi). According to some embodiments of the invention, the crystal growth conditions are sufficient to prepare a single-crystal silicon ingot by the Chuklaski method, the ingot comprising at least about 1 x 10⁻⁶ ppma of silicon. 14 atoms / cm 3The crystal contains nitrogen (N) dopant at a concentration of less than about 6.0 ppma and interstitial oxygen (Oi). According to some embodiments of the invention, the crystal growth conditions are sufficient to prepare single-crystal silicon ingots by the Chuklaski method, the ingots comprising at least about 1 x 10⁻⁶ ppma of nitrogen (N) dopant and having interstitial oxygen (Oi) at a concentration of less than about 6.0 ppma. 14 atoms / cm 3 Nitrogen (N) dopant concentration and at least about 1 x 10 19 atoms / cm 3 The silicon ingot is doped with germanium (Ge) at a concentration of less than about 6.0 ppma and has interstitial oxygen (Oi) at a concentration of less than about 6.0 ppma. Furthermore, the single-crystal silicon ingot and the wafers cut from it have a resistivity of at least about 1000 ohm-cm. In a preferred embodiment, the ingot is pulled according to the Chuklaski (Cz) batch crystal pulling process. Using germanium-doped single-crystal silicon ingots advantageously improves the mechanical strength of the ingot without affecting the resistivity of Si. In some embodiments, nitrogen and Ge can be co-doped to improve mechanical strength without significantly affecting resistivity. The concentration of Ge and / or N dopants is low enough that the wafer is characterized by low or no thermal donor generation during thermal processing. Additionally, Ge doping does not degrade second-harmonic performance, which can be degraded by other dopants (e.g., nitrogen, boron, or metals).

[0034] In some embodiments, the resistivity can be controlled by selecting high-purity polycrystalline silicon with a resistivity >1000 ohm·cm and by preparing the melt in a crucible lined with high-purity synthetic quartz. In some embodiments, a small amount of diluent of the P / N type can be added to compensate for electroactive impurities to achieve the desired resistivity of the crystal. Thus, crystal pulling conditions and materials can be selected to provide a single-crystal silicon ingot, wherein the bulk of the single-crystal silicon ingot has a resistivity of at least about 1000 ohm·cm, at least about 3000 ohm·cm, at least about 4000 ohm·cm, at least about 5000 ohm·cm, at least about 10000 ohm·cm, at least about 15000 ohm·cm, or even at least about 20000 ohm·cm.

[0035] In some embodiments, interstitial oxygen (Oi) can be controlled within a range required by optimization through the pulling process. A methodology for manufacturing very low Oi monocrystalline silicon ingots can comprise a combination of three key process mechanisms. These three mechanisms include: 1) optimization of crucible wall temperature and crucible dissolution; 2) transport of Oi from the crucible wall to the grown crystal; and 3) evaporation of SiO from the melt surface to the gas phase. The three mechanisms described above depend heavily on and are significantly influenced by the melt flow conditions established by the applied magnetic field. In some embodiments, the pulling conditions are sufficient to produce an interstitial oxygen concentration of less than about 6 ppma (e.g., less than about 5 ppma, less than about 4 ppma, or even less than about 3 ppma) in the bulk of the monocrystalline silicon ingot. These concentrations are based on the new ASTM standard from 1980 to 1983: ASTM F 121; and DIN 50438 / 1 from 1978.

[0036] In some embodiments, germanium can be incorporated into the single-crystal silicon ingot by adding a germanium source (e.g., elemental germanium and / or silicon-germanium) to the melt during the melting process. This incorporates germanium into the single-crystal silicon ingot based on the principle of segregation. Therefore, in some embodiments, sufficient germanium (e.g., elemental germanium and / or silicon-germanium) can be added to the silicon melt to thereby pull a single-crystal silicon ingot, wherein the body of the single-crystal silicon ingot comprises at least about 1 x 10⁻⁶ ppm. 19 atoms / cm 3 (for example, at least about 3x10) 19 atoms / cm 3 Or at least about 5x10 19 atoms / cm 3 germanium concentration of approximately 1 x 10⁻⁶. The bulk of a single-crystal silicon ingot may include less than approximately 1 x 10⁻⁶. 22 atoms / cm 3 (for example, less than approximately 1x10) 21 atoms / cm 3 or less than about 1x10 20 atoms / cm 3 The concentration of germanium is [missing information]. In some embodiments, the body of the single-crystal silicon ingot comprises at least about 1 x 10 [missing information]. 19 atoms / cm 3 And less than approximately 1x10 22 atoms / cm 3 The concentration of germanium is specified. In some embodiments, the body of the single-crystal silicon ingot comprises at least about 3 x 10⁻⁶ ppm. 19 atoms / cm 3 And less than approximately 1x10 22 atoms / cm 3 (for example, in approximately 5x10) 19 atoms / cm 3 With less than approximately 1x10 21 atoms / cm 3 Between, or at approximately 5x1019 atoms / cm 3 With less than approximately 1x10 20 atoms / cm 3 Germanium concentrations between (between).

[0037] In some embodiments, nitrogen can be incorporated into the monocrystalline silicon ingot by adding a nitrogen source (e.g., silicon nitride and / or nitrogen gas) to the melt during the melting process. This incorporates nitrogen into the monocrystalline silicon ingot based on the principle of segregation. In some embodiments, the body of the monocrystalline silicon ingot comprises at least about 1 x 10⁻⁶ ppm. 14 atoms / cm 3 (for example, at least about 2x10) 14 atoms / cm 3 Or at least about 5x10 14 atoms / cm 3 The concentration of nitrogen is [missing information]. In some embodiments, the body of the single-crystal silicon ingot comprises at least about 1 x 10 [missing information]. 14 atoms / cm 3 And less than approximately 1x10 16 atoms / cm 3 The concentration of nitrogen is [missing information]. In some embodiments, the body of the single-crystal silicon ingot comprises at least approximately 2 x 10 [missing information]. 14 atoms / cm 3 With less than approximately 2x10 15 atoms / cm 3 Between (e.g., at least approximately 5x10) 14 atoms / cm 3 With less than approximately 1x10 16 atoms / cm 3 The nitrogen concentration is between (and) [between]. In some embodiments, the body of the single-crystal silicon ingot comprises at least about 1 x 10 [units]. 15 atoms / cm 3 And less than approximately 1x10 16 atoms / cm 3 The concentration of nitrogen.

[0038] In some embodiments, during the melting process, germanium can be incorporated into the monocrystalline silicon ingot by adding a germanium source (e.g., elemental germanium and / or silicon germanium) to the melt, and nitrogen can be incorporated into the monocrystalline silicon ingot by adding a nitrogen source (e.g., silicon nitrogen or nitrogen gas) to the melt. Therefore, in some embodiments, sufficient germanium (e.g., elemental germanium and / or silicon germanium) can be added to the silicon melt to thereby pull a monocrystalline silicon ingot, wherein the body of the monocrystalline silicon ingot comprises at least about 1 x 10⁻⁶ ppm. 19 atoms / cm 3 (for example, at least about 3x10) 19 atoms / cm 3 Or at least about 5x10 19 atoms / cm 3The concentration of germanium is 1 x 10⁻⁶, and the bulk of the single-crystal silicon ingot comprises at least about 1 x 10⁻⁶. 14 atoms / cm 3 (for example, at least about 2x10) 14 atoms / cm 3 Or at least about 5x10 14 atoms / cm 3 The concentration of nitrogen is [missing information]. In some embodiments, the body of the single-crystal silicon ingot comprises at least about 1 x 10 [missing information]. 19 atoms / cm 3 And less than approximately 1x10 22 atoms / cm 3 Germanium concentration and at least about 1x10 14 atoms / cm 3 And less than approximately 1x10 16 atoms / cm 3 The concentration of nitrogen is [missing information]. In some embodiments, the body of the single-crystal silicon ingot comprises at least approximately 3 x 10 [missing information]. 19 atoms / cm 3 And less than approximately 1x10 22 atoms / cm 3 Germanium concentration and at least about 2 x 10 14 atoms / cm 3 And less than approximately 1x10 15 atoms / cm 3 The concentration of nitrogen.

[0039] refer to Figure 1 and 2 In one embodiment, the crucible is generally designated as 10. The cylindrical coordinate system of the crucible 10 includes a radial direction R12, an angular direction θ14, and an axial direction Z16. Coordinates R12, θ14, and Z16 are used herein to describe a method and system for producing low-oxygen silicon ingots. The crucible 10 contains a melt 25 having a melt surface 36. A crystal 27 grows from the melt 25. The melt 25 may contain one or more convection units 17, 18 induced by heating the crucible 10 and / or rotation of the crucible 10 and / or the crystal 27 in the angular direction θ14. The structure and interaction of the one or more convection units 17, 18 are modulated by adjusting one or more process parameters to reduce the oxygen contained within the formed crystal 27, as described in detail below. The crucible wall 103 (see Figures 5A to 5C and Figures 8A to 8C A high-purity quartz liner can be used to enhance resistivity control. In some embodiments, crucible 10 may be a synthetic crucible comprising a high-purity quartz liner crucible wall 103.

[0040] refer to Figure 3The block diagram illustrates a pointed magnetic field applied to a crucible 10 containing melt 23 in a crystal growth apparatus. As shown, crucible 10 contains silicon melt 23 from which crystal 27 is grown. The pointed magnetic field configuration is designed to overcome the shortcomings of axial and horizontal magnetic field configurations. A pair of coils 31 and 33 (e.g., Helmholtz coils) are coaxially positioned above and below the melt surface 36. Coils 31 and 33 operate in opposing current modes to generate magnetic fields having a pure radial field component close to the melt surface 36 (i.e., along R12) and a pure axial field component close to the axis of symmetry 38 of crystal 27 (i.e., along Z16). The combination of the upper magnetic field 40 and the lower magnetic field 42 generated by coils 31 and 33, respectively, results in axial and radial pointed magnetic field components.

[0041] Figure 4 A block diagram of the crystal growth system 100 is provided. The crystal growth system 100, its components, and various operating parameters are further described in detail in International Application No. PCT / US2014 / 039164 (published as WO2014 / 190165), the entire contents of which are incorporated herein by reference. See again Figure 4 System 100 employs the Chuklaski crystal growth method to produce semiconductor ingots. In this embodiment, system 100 is configured to produce cylindrical semiconductor ingots with an ingot diameter greater than 150 mm (150 mm) (more specifically, in the range of about 150 mm to 460 mm, and even more specifically, about 300 mm (300 mm)). In other embodiments, system 100 is configured to produce semiconductor ingots with an ingot diameter of 200 mm or 450 mm (450 mm). Additionally, in one embodiment, system 100 is configured to produce semiconductor ingots with a total ingot length of at least 500 mm (500 mm) (e.g., at least 900 mm). In other embodiments, system 100 is configured to produce semiconductor ingots with a total ingot length in the range of about 500 mm (500 mm) to 3000 mm (3000 mm) (e.g., between 900 mm and 1200 mm).

[0042] Refer again Figure 4The crystal growth system 100 includes a vacuum chamber 101 enclosing a crucible 10. Side heaters 105 (e.g., resistance heaters) surround the crucible 10. A bottom heater 106 (e.g., resistance heater) is positioned below the crucible 10. During heating and crystal pulling, a crucible drive unit 107 (e.g., a motor) rotates the crucible 10 in a direction indicated by arrow 108. The crucible drive unit 107 may also raise and / or lower the crucible 10 as needed during the growth process. A melt 25 having a melt level or melt surface 36 is contained within the crucible 10. In operation, the system 100 pulls a single crystal 27 from the melt 25, starting with a seed crystal 115 attached to a pull shaft or cable 117. One end of the pull shaft or cable 117 is connected to a winch (not shown) via a pulley (not shown) or any other suitable type of lifting mechanism (e.g., a shaft), and the other end is connected to a chuck (not shown) that holds the seed crystal 115 and the crystal 27 grown from the seed crystal 115.

[0043] The crucible 10 and the single crystal 27 share a common axis of symmetry 38. When the melt 25 is exhausted to maintain the melt level 36 at the desired height, the crucible drive unit 107 can raise the crucible 10 along axis 38. Similarly, the crystal drive unit 121 rotates the pull shaft or cable 117 in a direction 110 opposite to the direction in which the crystal drive unit 107 rotates the crucible 10 (e.g., counterclockwise). In embodiments using co-rotation, the crystal drive unit 121 can rotate the pull shaft or cable 117 in the same direction as the direction in which the crystal drive unit 107 rotates the crucible 10 (e.g., clockwise). Co-rotation can also be referred to as co-enhancing. Additionally, the crystal drive unit 121 raises and lowers the crystal 27 relative to the melt level 36 as needed during the growth process.

[0044] According to the Chuklaski single-crystal growth process, a certain amount of polycrystalline silicon is added to crucible 10. The polycrystalline silicon feed includes a germanium source (which may be elemental germanium or silicon-germanium), a nitrogen source (which may be nitrogen or silicon nitride), or both a germanium and nitrogen source, to dope the single-crystal silicon ingot pulled from the melt. A suitable germanium source includes elemental germanium and silicon-germanium. In some embodiments, elemental, pure germanium is purified by a floating zone process. The germanium purified by the floating zone is crushed into small flakes / blocks and then used to dope the silicon melt. The silicon-germanium may include a germanium content having a molar ratio generally from about 0.1 to about 0.9. Therefore, in some embodiments, sufficient germanium (e.g., elemental germanium and / or silicon-germanium) may be added to the silicon melt to thereby pull a single-crystal silicon ingot, wherein the body of the single-crystal silicon ingot comprises at least about 1 x 10⁻⁶. 19 atoms / cm 3 (for example, at least about 3x10) 19 atoms / cm 3Or at least about 5x10 19 atoms / cm 3 germanium concentration of approximately 1 x 10⁻⁶. The bulk of a single-crystal silicon ingot may include less than approximately 1 x 10⁻⁶. 22 atoms / cm 3 (for example, less than approximately 1x10) 21 atoms / cm 3 or less than about 1x10 20 atoms / cm 3 Germanium concentration of 10⁻⁶ is added. Sufficient germanium is added to the silicon melt so that the resulting monocrystalline silicon ingot contains at least approximately 1 x 10⁻⁶ ppm of germanium. 19 atoms / cm 3 And less than approximately 1x10 22 atoms / cm 3 (for example, at least about 3x10) 19 atoms / cm 3 At least approximately 5x10 19 atoms / cm 3 With less than approximately 1x10 21 atoms / cm 3 Between, or at approximately 5x10 19 atoms / cm 3 With less than approximately 1x10 20 atoms / cm 3 Germanium concentrations between (between).

[0045] In some embodiments, the polysilicon feed includes a nitrogen source, such as silicon nitride and / or nitrogen gas. In some embodiments, sufficient nitrogen may be added such that the body of the monocrystalline silicon ingot comprises at least about 1 x 10⁻⁶ ppm. 14 atoms / cm 3 And less than approximately 1x10 16 atoms / cm 3 The concentration of nitrogen is [missing information]. In some embodiments, the body of the single-crystal silicon ingot comprises approximately 2 x 10 [missing information]. 14 atoms / cm 3 With less than approximately 2x10 15 atoms / cm 3 The concentration of nitrogen is between [a certain value]. In some embodiments, the body of the single-crystal silicon ingot comprises at least about 5 x 10 [units of measurement missing]. 14 atoms / cm 3 And less than approximately 1x10 16 atoms / cm 3 The concentration of nitrogen is [missing information]. In some embodiments, the body of the single-crystal silicon ingot comprises at least about 1 x 10 [missing information]. 15 atoms / cm 3 And less than approximately 1x10 16 atoms / cm 3 The concentration of nitrogen.

[0046] In some embodiments, the polycrystalline silicon feed includes a germanium source and a nitrogen source. Therefore, in some embodiments, sufficient germanium (e.g., elemental germanium and / or silicon-germanium) can be added to the silicon melt to pull a single-crystal silicon ingot, wherein the body of the single-crystal silicon ingot comprises at least about 1 x 10⁻⁶ ppm. 19 atoms / cm 3 (for example, at least about 3x10) 19 atoms / cm 3 Or at least about 5x10 19 atoms / cm 3 A concentration of germanium of at least 1 x 10⁻⁶ m³ can be added to the silicon melt to pull single-crystal silicon ingots, which contain at least approximately 1 x 10⁻⁶ m³ of germanium. 14 atoms / cm 3 (for example, at least about 2x10) 14 atoms / cm 3 Or at least about 5x10 14 atoms / cm 3 ( ) concentration of nitrogen.

[0047] A heater power supply 123 powers resistance heaters 105 and 106, and an insulating layer 125 is lined to the inner wall of the vacuum chamber 101. While the vacuum pump 131 removes gas from the vacuum chamber 101, an air supply 127 (e.g., a bottle) feeds argon gas into the vacuum chamber 101 via a gas flow controller 129. An outer chamber 133 (fed using cooling water from a reservoir 135) surrounds the vacuum chamber 101.

[0048] Next, cooling water is drawn into the cooling water return manifold 137. Typically, a temperature sensor (e.g., phototube 139 (or pyrometer)) measures the temperature of the melt 25 at its surface, and a diameter transducer 141 measures the diameter of the single crystal 27. In this embodiment, the system 100 does not include an upper heater. The presence or absence of an upper heater alters the cooling characteristics of the crystal 27.

[0049] In this embodiment, the upper magnet (e.g., solenoid coil 31) and the lower magnet (e.g., solenoid coil 33) are positioned above and below the melt horizontal plane 36, respectively. Coils 31 and 33 (shown in cross-section) surround a vacuum chamber (not shown) and share an axis with the axis of symmetry 38. In one embodiment, the upper coil 31 and the lower coil 33 have separate power supplies, including, but not limited to, an upper coil power supply 149 and a lower coil power supply 151, each of which is connected to and controlled by a control unit 143.

[0050] In this embodiment, current flows in opposite directions in the two solenoid coils 31 and 33 to generate a magnetic field (as in...). Figure 3(As shown in the image). The reservoir 153 provides cooling water to the upper coil 31 and the lower coil 33 before drawing it in via the cooling water return manifold 137. The ferrimetallic shield 155 surrounds the coils 31 and 33 to reduce stray magnetic fields and enhance the generated field strength.

[0051] Control unit 143 is used to adjust a plurality of process parameters, including, but not limited to, at least one of crystal rotation rate, crucible rotation rate, and magnetic field strength. In various embodiments, control unit 143 may include processor 144 (which processes signals received from various sensors of system 100, including, but not limited to, phototube 139 and diameter transducer 141), and one or more devices of control system 100, including, but not limited to: crucible drive unit 107, crystal drive unit 121, heater power supply 123, vacuum pump 131, gas flow controller 129 (e.g., argon gas flow controller), upper coil power supply 149, lower coil power supply 151, and any combination thereof.

[0052] In an exemplary embodiment, system 100 produces a single-crystal silicon ingot suitable for device fabrication. The single-crystal silicon ingot is generally cylindrical and, due to the pulling conditions, is capped with a conical crown and a cylindrical end opposite the crown. Thus, the single-crystal silicon ingot pulled according to the method of the invention comprises a central axis, a crown, an end opposite the crown, and a body between the crown and the opposite end, the body having lateral surfaces and a radius R extending from the central axis to the lateral surfaces. Advantageously, system 100 can be used to produce single-crystal silicon ingots 27, a significant portion or all of which are free of agglomerated intrinsic point defects. Furthermore, system 100 can be used to produce single-crystal silicon ingots 27 that are generally free of agglomerated defects with a diameter greater than about 120 nanometers (nm) or more specifically about 90 nm. The shape of the melt-solid or melt-crystal interface and the pulling speed are controlled during crystal growth to limit and / or suppress the formation of agglomerated intrinsic point defects.

[0053] During production, oxygen is introduced into a single-crystal silicon ingot through the melt-solid or melt-crystal interface. However, oxygen can cause various defects in the wafers produced from the ingot, thereby reducing the yield of semiconductor devices. Therefore, it is desirable to produce silicon ingots with low oxygen concentration values. Using the method described herein, single-crystal silicon ingots with oxygen concentrations of less than about 6 ppma, less than about 5 ppma, less than about 4 ppma, or less than about 3 ppma are produced. These concentrations are based on the new ASTM standard from 1980 to 1983: ASTM F 121; and DIN 50438 / 1 from 1978.

[0054] Not limited to any particular theory, oxygen is introduced into the growing silicon ingot from the melt through a series of interacting events, each of which is affected by at least one process parameter as described below. SiO is introduced into the melt via dissolution at the crucible wall. The SiO introduced at the crucible wall can be moved elsewhere in the melt via flow induced by buoyancy generated by localized heating of the melt near the crucible wall. Further movement of SiO can be induced by additional flow induced by the rotational rate of the crystals at the melt crystal interface and the rotational rate of the crucible itself. The concentration of SiO in the melt can be reduced by evaporation from the melt at exposed surfaces. The interaction of any combination of dissolution, convection, and evaporation of SiO in the melt affects the concentration of SiO in the melt near the crystal melt interface formed as a silicon ingot. In various respects, any one or more process parameters are simultaneously adjusted to reduce the concentration of SiO near the melt crystal interface, and thus reduce the oxygen concentration within the silicon ingot formed according to the method.

[0055] In various embodiments, various process parameters are simultaneously adjusted to facilitate the production of silicon ingots with low oxygen concentrations. In one embodiment, the various process parameters are adjusted in at least two stages, said at least two stages comprising: an intermediate bulk growth stage, corresponding to the growth of the silicon ingot to an intermediate ingot length of approximately 800 mm; and a late bulk growth stage, corresponding to the growth of the silicon ingot from the intermediate ingot length of approximately 800 mm to the total ingot length. In this embodiment, adjusting the various process parameters in at least two different stages causes changes in the nature of the interactions of dissolution, convection, and evaporation of SiO in the melt, the depth of the melt in the crucible, and the flow units within the melt in the crucible during the length growth of the silicon ingot.

[0056] Specifically, the effect of convection is modified by the reduction in melt depth within the crucible associated with the growth of the silicon ingot, as described in detail below. Therefore, in the later bulk growth stage, the regulation of these same parameters is modified differently than that of at least one process parameter in the intermediate bulk growth stage. In some embodiments, in the later bulk growth stage, the regulation of these same parameters is modified differently than that of at least three process parameters in the intermediate bulk growth stage. As described below, the modulation of process parameters is related to various factors related to the convection of SiO in the melt during the later bulk growth stage. In one embodiment, the modified process parameters during the later bulk growth stage include, but are not limited to: seed crystal rotation rate, crucible rotation rate, and magnetic field strength.

[0057] Refer again Figure 4The seed rotation rate refers to the rate at which the seed crystal 115 rotates around axis 38 due to the pull shaft or cable 117. The seed rotation rate affects the flow rate of SiO from crucible 10 to crystal 27 and the rate of SiO evaporation from melt 25. (See again...) Figure 2 The flow of SiO from crucible 10 to crystal 27 is largely influenced by the interaction between crystal flow unit 18 driven by the rotation of crystal 27 within melt 25 at the seed rotation rate and buoyancy flow unit 17 driven by the heating of melt 25 within crucible 10. The effect of seed rotation rate on the flow of SiO from crucible 10 to crystal 27 varies depending on the growth stage of crystal 27.

[0058] Figure 5A The simulated streamlines 109 and oxygen concentration (reference) within melt 25 during the intermediate main growth stage. Figure 2 A cross-sectional view of the crystal 27, the stage corresponding to the growth of the crystal up to an intermediate ingot length of approximately 800 mm (reference). Figure 1 During the intermediate bulk growth stage, the depth 200 of the melt 25 within the crucible 10 is sufficiently deep to effectively decouple the interaction between the fluid motions induced by the crystal flow unit 18 and the buoyancy flow unit 17. A high seed rotation rate (i.e., 12 rpm) reduces the boundary layer thickness between the melt line 36 and the gas above the melt 25, thereby increasing SiO evaporation. Furthermore, the high seed rotation rate reduces the melt flow from the crucible 10 to the crystal 27 by suppressing the buoyancy flow unit 17 with the induced crystal flow unit 18, as in... Figure 5A As explained in the text. Furthermore, the high seed rotation rate generates an outward radial flow that hinders the inward flow (e.g., transport) of SiO from the crucible 10, thereby reducing the oxygen concentration in the crystal 27.

[0059] Figure 5B This is a cross-sectional view of the melt 25 in the later bulk growth stage, with simulated flow lines 109 and oxygen concentration, corresponding to the growth of crystal 27 from an intermediate ingot length of approximately 800 mm to the total ingot length. The depth 200 in the later bulk growth stage is relative to the depth of the melt 25 in the crucible 10, which is attributed to the removal of melt 25 from the crucible 10 in association with the formation of crystal 27. Figure 5A The intermediate main growth stage described in the text is shallower than 200. This is similar to what is used to perform... Figure 5A The high seed rotation rate (i.e., 12 rpm) described in the simulation allows the crystal flow unit 18 to contact the inner wall of the crucible 10, thereby causing the SiO formed on the inner wall of the crucible 10 to convection into the crystal 27 formed in the later bulk growth stage.

[0060] Figure 5CThis is a cross-sectional view of the simulated flow lines 109 and oxygen concentration within the melt 25 during the later bulk growth stage, calculated at a lower seed rotation rate (e.g., 8 rpm). The crystal flow units 18 induced by the lower seed rotation rate do not extend to the inner wall of the crucible 10, but are instead excluded by the buoyancy units 17. Therefore, the flow of SiO to the crystal 27 generated at the inner wall of the crucible 10 breaks down, thereby reducing the oxygen concentration within the crystal 27 formed during the later bulk growth stage at the reduced seed rotation rate.

[0061] As described herein, the transition from the intermediate to the late bulk growth stage is a soft transition. The transition can vary depending on various process parameters, such as crucible size, shape, melt depth, modeling parameters, and the like. Generally, in the intermediate bulk growth stage, the parameters are such that there is a finite or no interaction between the fluid movements induced by the crystal flow unit 18 and the buoyancy flow unit 17; effectively decoupling the crystal flow unit 18 and the buoyancy flow unit 17. In the late bulk growth stage, the parameters are such that there is an interaction between the fluid movements induced by the crystal flow unit 18 and the buoyancy flow unit 17; effectively coupling the crystal flow unit 18 and the buoyancy flow unit 17. As a non-limiting example, in an embodiment containing an initial melt mass between 180 kg and 450 kg in a crucible 10 with an inner diameter of approximately 36 inches, the late bulk growth stage occurs when less than approximately 37% of the initial melt 25 remains in the crucible 10. In various embodiments, the depth 200 of the melt 25 within the crucible 10 is monitored to identify the transition from the intermediate to the late bulk growth stage. In other instances, a later bulk growth stage occurs when less than about 35%, less than about 40%, less than about 45%, or less than about 50% of the initial mass of melt 25 remains in crucible 10. In some embodiments, the transition from the intermediate to the later bulk growth stage is determined based on the depth of melt 25 or any other suitable parameter.

[0062] In various embodiments, the method includes adjusting the seed rotation rate in at least two stages, said stages including, but not limited to, an intermediate host growth stage and a late host growth stage. In one embodiment, the method includes rotating the crystal 27 during the intermediate host growth stage at a seed rotation rate in the range of about 8 rpm to 14 rpm (and more specifically 12 rpm). In this embodiment, the method further includes reducing the seed rotation rate during the late host growth stage to a seed rotation rate in the range of about 6 rpm to 8 rpm (and more specifically 8 rpm).

[0063] In another embodiment, the seed crystal rotation rate can be reduced according to the intermediate ingot length. As a non-limiting example, for an intermediate ingot length of up to approximately 850 mm, the seed crystal rotation rate can be adjusted to approximately 12 rpm, and at an intermediate ingot length of approximately 950 mm, the seed crystal rotation rate can be further adjusted to linearly decrease by approximately 8 rpm, and then the seed crystal rotation rate is adjusted to approximately 8 rpm until the total ingot length, as in... Figure 9 The explanation is in the text. (For example, it is also in...) Figure 9 The study explains that, compared to crystals formed at a constant seed rotation rate of approximately 12 rpm, the oxygen content of crystals within the bulk length, ranging from approximately 800 mm to the total ingot length, is reduced. Figure 6 This is a chart comparing the simulated oxygen concentration of crystals formed according to three rotation schedules at seed rotation rates: a) 12 rpm for forming the entire crystal; b) 12 rpm for an intermediate crystal length of 900 mm, followed by 8 rpm for forming the remaining crystal length; and c) 12 rpm for an intermediate crystal length of 900 mm, followed by 6 rpm for forming the remaining crystal length. (As shown in...) Figure 6 The text explains that a lower seed rotation rate reduces the oxygen concentration within the portion of the crystal formed during the later main growth stage.

[0064] The crucible rotation rate can further affect the oxygen concentration within the crystal 27 formed according to embodiments of the method. The crucible rotation rate refers to the rate at which the crucible 10 is rotated about axis 38 using the crucible drive unit 107. The crucible rotation rate affects the flow of SiO from the crucible 10 to the crystal 27 and the amount of SiO evaporating from the melt 25. A high crucible rotation rate reduces both the boundary layer thickness between the crucible 10 and the melt 25 and the boundary layer thickness between the melt line 36 and the gas above the melt 25. However, to minimize the oxygen concentration in the crystal 27, a thicker boundary layer thickness between the crucible 10 and the melt 25 is desirable to reduce the SiO transport rate, while a thinner boundary layer thickness between the melt line 36 and the gas above the melt 25 is desirable to increase the SiO evaporation rate. Therefore, the crucible rotation rate is chosen to balance the conflicting benefits of a higher boundary layer thickness between the crucible 10 and the melt 25 resulting from a slower crucible rotation rate and a lower boundary layer thickness between the melt line 36 and the gas above the melt 25 resulting from a higher crucible rotation rate.

[0065] The change in the depth 200 of the melt 10 between the intermediate and late host growth stages described above affects the effect of the crucible rotation rate on the oxygen concentration in a manner similar to the effect of the seed rotation rate previously described herein. In various embodiments, the method includes adjusting the crucible rotation rate in at least two stages, including, but not limited to, the intermediate and late host growth stages. In one embodiment, the method includes rotating the crucible 10 during the intermediate host growth stage at a crucible rotation rate ranging from about 1.3 rpm to 2.2 rpm (and more specifically 1.7 rpm). In this embodiment, the method further includes reducing the crucible rotation rate during the late host growth stage to a crucible rotation rate ranging from about 0.5 rpm to about 1.0 rpm (and more specifically 1 rpm).

[0066] Figure 7A and 7B This is a graph showing the simulated oxygen concentration within a silicon ingot, varying according to the crucible rotation rate during the later stages of bulk growth. Examples of the method are formed. Figure 7A The silicon ingot, wherein the seed crystal rotation rate is reduced from 12 rpm to 6 rpm during the later body growth stage, and the crucible rotation rate is reduced from approximately 1.7 rpm to 1 rpm or 1.5 rpm during the later body growth stage. Examples of the method are formed. Figure 7B The silicon ingots were subjected to a reduction in seed crystal rotation rate from 12 rpm to 8 rpm during the later body growth stage, and a reduction in crucible rotation rate from approximately 1.7 rpm to 0.5 rpm, 1 rpm, or 1.5 rpm during the later body growth stage. In both simulations, the lower crucible rotation rate was associated with a lower oxygen concentration within the resulting silicon ingot.

[0067] The method may further include adjusting the magnet strength in at least two stages, including, but not limited to, an intermediate host growth stage and a late host growth stage. Magnet strength refers to the intensity of the sharp magnetic field within the vacuum chamber. More specifically, the magnet strength is characterized by a current flowing through coils 31 and 33, controlled to adjust the magnetic field strength. The magnetic field strength affects the flow of SiO from crucible 10 to crystal 27. That is, a high magnetic field strength minimizes the flow of SiO from crucible 10 to crystal 27 by suppressing buoyancy within melt 25. When the magnetic field suppresses buoyancy flow, it reduces the dissolution rate of the quartz crucible, thus reducing interstitial oxygen incorporated into the crystal. However, if the magnetic field strength increases beyond a certain level, further obstruction in the buoyancy flow can lead to a reduced evaporation rate at the free surface of the melt, thus increasing the interstitial oxygen level. Due to the difference in the relative contribution of buoyancy flow to the oxygen content of the crystal compared to the intermediate host formation stage, as previously described in this paper, the adjustment of magnet strength in the later host formation stage achieves appropriate modulation of buoyancy flow to reduce oxygen in the crystal formed in the later host formation stage.

[0068] In various embodiments, the method includes adjusting the magnetic field in at least two stages, said stages including, but not limited to, an intermediate host growth stage and a late host growth stage. In one embodiment, the method includes adjusting the magnetic field strength during the intermediate host growth stage such that the magnetic field strength is about 0.02 to 0.05 Tesla (T) at the edge of crystal 27 at the melt-solid interface and about 0.05 to 0.12 T on the wall of crucible 10. In another embodiment, the method includes adjusting the magnetic field strength during the late host growth stage such that the magnetic field strength is about 150% of the magnetic field strength used during the intermediate host growth stage, corresponding to about 0.03 to 0.075 Tesla (T) at the edge of crystal 27 at the melt-solid interface and about 0.075 to 0.18 T on the wall of crucible 10.

[0069] Figure 8A , 8B Figure 8C is a cross-sectional view of the simulated streamlines 109 and total velocity within the melt 25 during the later bulk growth stage. The simulation was performed using a magnetic field strength corresponding to 50% of the magnetic field used in the intermediate bulk growth stage (i.e., approximately 0.01 to 0.025 Tesla (T) at the edges of crystal 27 at the melt-solid interface and approximately 0.025 to 0.06 T at the walls of crucible 10). Figure 8A Simulations were performed using a magnetic field strength corresponding to 95% of the magnetic field used during the intermediate body growth stage. Figure 8BThe magnetic field strength is approximately 0.019 to 0.0475 Tesla (T) at the edge of crystal 27 at the melt-solid interface and approximately 0.0475 to 0.114 T on the wall of crucible 10. Simulations were performed using a magnetic field strength corresponding to 150% of the magnetic field used in the intermediate bulk growth stage (i.e., approximately 0.03 to 0.075 Tesla (T) at the edge of crystal 27 at the melt-solid interface and approximately 0.075 to 0.18 T on the wall of crucible 10). Figure 8C .Compare Figure 8A , 8B At 8C, as the magnetic field strength increases, the flow 300 from the bottom of the crucible 10 to the melt crystal interface 302 increases from the low magnetic field strength. Figure 8A The relatively high convection at the melt-crystal interface 302 transitions to relatively low convection at a higher magnetic field strength. This suppression of buoyancy flow within the melt 25 by the increased magnetic field results in a lower oxygen concentration in the resulting silicon ingot, as outlined in Table 1 below. At a magnetic field strength of 150%, the simulated oxygen concentration is in the desired range of less than 5 parts per million (ppma).

[0070] Table 1

[0071] The effect of magnetic field strength on oxygen concentration in silicon ingots during the later stages of bulk growth.

[0072]

[0073] One or more additional process parameters can be adjusted to facilitate the production of silicon ingots with low oxygen concentrations. However, during the growth of crystal 27, the effects of these additional process parameters are insensitive to changes in the depth 200 of melt 25 within crucible 10. Therefore, the adjustment of the additional process parameters described herein is essentially the same across different crystal growth stages, as described in further detail below.

[0074] In at least some embodiments, an additional controlled process parameter is the wall temperature of crucible 10. The wall temperature of crucible 10 corresponds to the dissolution rate of crucible 10. Specifically, the higher the wall temperature of crucible 10, the faster a portion of crucible 10 reacts with and dissolves into melt 25, thereby generating SiO into the melt and potentially increasing the oxygen concentration of crystal 27 via the melt crystal interface. Therefore, as used herein, reducing the wall temperature of crucible 10 is equivalent to reducing the dissolution rate of crucible 10. By reducing the wall temperature of crucible 10 (i.e., reducing the dissolution rate of crucible 10), the oxygen concentration of crystal 27 can be reduced. The wall temperature can be adjusted by controlling one or more additional process parameters (including, but not limited to, heater power and melt-to-reflector gap).

[0075] Heater power is another process parameter controlled in some embodiments to regulate the wall temperature of crucible 10. Heater power refers to the power of the side heater 105 and the bottom heater 106. Specifically, relative to a typical heating configuration, by increasing the power of the side heater 105 and decreasing the power of the bottom heater 106, the hot spots on the wall of crucible 10 are raised closer to the melt line 36. When the wall temperature of crucible 10 is lower at or below the melt line 36, the amount of SiO produced by the melt 25 reacting with crucible 10 is also lower. The heater power configuration also affects melt flow by reducing the flow (i.e., transport) of SiO from crucible 10 to single crystal 27. In this embodiment, the power of the bottom heater 106 is approximately 0 to 5 kW, and more specifically, approximately 0 kW, and the power of the side heater 105 is in the range of approximately 100 to 125 kW. Variations in the power of the side heater 105 can be attributed to, for example, variations in the hot zone lifetime due to the puller.

[0076] In some embodiments, the melt-to-reflector gap is an additional process parameter controlled to adjust the wall temperature of crucible 10. The melt-to-reflector gap refers to the gap between the melt line 36 and the thermal reflector (not shown). The melt-to-reflector gap affects the wall temperature of crucible 10. Specifically, a larger melt-to-reflector gap reduces the wall temperature of crucible 10. In this embodiment, the melt-to-reflector gap is between approximately 60 mm and 80 mm, and more specifically 70 mm.

[0077] Seed lifting is an additional process parameter controlled to regulate the flow of SiO from crucible 10 to crystal 27. Seed lifting refers to the rate at which the pull spool or cable 117 lifts the seed crystal 115 away from melt 25. In one embodiment, the seed crystal 115 is lifted at a rate between about 0.4 mm / min and about 0.7 mm / min (e.g., between about 0.42 and 0.55 mm / min, and more specifically 0.46 mm / min for a 300 mm product). This pulling rate is slower than that typically used for smaller diameter crystals (e.g., 200 mm). For example, the seed lifting rate for a 200 mm product may be between about 0.55 mm / min and about 0.95 mm / min (e.g., in the range of about 0.55 to 0.85 mm / min, and more specifically 0.7 mm / min).

[0078] The pulling speed is an additional process parameter that can be adjusted to control the defect quality of the crystal. For example, using SP2 laser light scattering, the detected agglomerate defects produced by the process described herein can be counted at less than 400 for defects smaller than 60 nm, less than 100 for defects between 60 nm and 90 nm, and less than 100 for defects between 90 nm and 120 nm.

[0079] In some embodiments, the inert gas flow is an additional process parameter controlled to regulate the evaporation of SiO from crucible 25. As described herein, the inert gas flow refers to the rate at which argon gas flows through vacuum chamber 101. Increasing the argon gas flow rate sweeps more SiO gas away from crystal 27 above melt line 36, thereby minimizing the SiO gas partial pressure and increasing SiO evaporation. In this embodiment, the argon gas flow rate is in the range of approximately 100 slpm to 150 slpm.

[0080] In some embodiments, the inert gas pressure is an additional process parameter that is also controlled to regulate the evaporation of SiO from melt 27. As described herein, the inert gas pressure refers to the pressure of the argon gas flow through vacuum chamber 101. Reducing the argon gas pressure increases SiO evaporation and thus reduces the SiO concentration in melt 25. In this embodiment, the argon gas pressure is in the range of about 10 Torr to 30 Torr.

[0081] In a suitable embodiment, the tip position is an additional process parameter controlled to regulate the wall temperature of crucible 10 and the flow of SiO from crucible 10 to crystal 27. As described herein, the tip position refers to the location of the tip of the magnetic field generated by coils 31 and 33. Maintaining the tip position below the melt line 36 promotes a reduction in oxygen concentration. In this embodiment, the tip position is set to be in the range of approximately 10 mm to approximately 40 mm below the melt line 36 (more specifically, in the range of approximately 25 mm to approximately 35 mm below the melt line 36, and even more specifically, approximately 30 mm below the melt line 36).

[0082] By controlling the process parameters described above (i.e., heater power, crucible rotation rate, magnet strength, seed lift, melt-to-reflector gap, inert gas flow, inert gas pressure, seed rotation rate, and tip position), and adjusting multiple process parameters (i.e., crucible wall temperature, SiO flow from the crucible to the single crystal, and SiO evaporation from the melt), a single-crystal silicon ingot with a low oxygen concentration can be produced. In one embodiment, the method described herein facilitates the production of silicon ingots with an ingot diameter greater than about 150 mm, a total ingot length of at least about 900 mm, and an oxygen concentration of less than 6 ppma (e.g., less than about 5 ppma, less than about 4 ppma, or even less than about 3 ppma). In another embodiment, the method described herein facilitates the production of silicon ingots with an ingot diameter in the range of about 150 mm to 460 mm (specifically about 300 mm) and an oxygen concentration of less than 6 ppma (e.g., less than about 5 ppma, less than about 4 ppma, or even less than about 3 ppma). In another additional embodiment, the method described herein facilitates the production of silicon ingots having a total ingot length ranging from about 900 mm to 1200 mm and an oxygen concentration of less than 6 ppma (e.g., less than about 5 ppma, less than about 4 ppma, or even less than about 3 ppma). These concentrations are in accordance with the new ASTM: ASTM F 121, 1980-1983; DIN 50438 / 1, 1978.

[0083] Monocrystalline silicon wafers can be cut from monocrystalline silicon ingots or blocks prepared according to the method of the present invention using conventional techniques. Generally, a monocrystalline silicon ingot wafer comprises: two main parallel surfaces, one being the front surface and the other the rear surface; a circumferential edge joining the front and rear surfaces; a bulk region between the front and rear surfaces; and a central plane between the front and rear surfaces. The wafer then undergoes conventional processing. Therefore, any sharp, brittle edges are rounded or “contouring” to provide strength and stability to the wafer. This ultimately prevents breakage or fracture during subsequent processing. Each wafer is then laser-marked using very small alphanumeric or barcode characters. This laser-marked ID provides complete traceability to a specific date, machine, and facility where the wafer was manufactured. The wafer is then loaded into a precision “thinning” machine using pressure from a rotating plate and an abrasive slurry to ensure greater uniformity while removing saw damage present on both the front and rear surfaces. This step also provides stock removal and promotes flatness uniformity. The wafer must now undergo an "etching" cycle. Chemical etching is necessary to remove residual surface damage caused by thinning; it also provides some stock removal. During the etching cycle, the wafer is propelled by precise hydrodynamics along another series of chemical baths and rinsing tanks. These chemical solutions produce flatter, stronger wafers with a smoother surface finish. All wafers are then sampled for mechanical parameter and process feedback.

[0084] Monocrystalline silicon wafers with low oxygen concentrations (e.g., less than about 6 ppma, less than about 5 ppma, less than about 4 ppma, or even less than about 3 ppma) using the systems and methods described herein are advantageous in a variety of applications. For example, substrates for insulated gate bipolar transistors (IGBTs), high-quality radio frequency (RF), high-resistivity silicon-on-insulator (HR-SOI), charge-detaining layer SOI (CTL-SOI), and GaN EPI applications benefit from low oxygen concentrations because they achieve high resistivity and do not have pn junctions. In some embodiments, the resistivity of the monocrystalline silicon wafer is at least about 3000 ohm cm (e.g., at least about 4000 ohm cm, at least about 5000 ohm cm, at least about 10000 ohm cm, for example at least about 15000 ohm cm, or even at least about 20000 ohm cm). Wafers produced using the methods described herein for IGBT applications can, for example, have an N-type resistivity of 30 to 300 ohm-cm or an N / P-type resistivity greater than 750 ohm-cm. Furthermore, wafers produced using the methods described herein for radio frequency (RF), high-resistivity silicon-on-insulator (HR-SOI), charge-detaining layer SOI (CTL-SOI), and / or GaN EPI applications can have, for example, a P-type wafer greater than 750 ohm-cm, or at least about 3000 ohm-cm (e.g., at least about 4000 ohm-cm, at least about 5000 ohm-cm, at least about 10000 ohm-cm, for example at least about 15000 ohm-cm, or even at least about 20000 ohm-cm). Wafers produced by the described systems and methods can also be used as disposal wafers. For P-type wafers produced using the methods described herein, boron, aluminum, gallium, and / or indium can suitably be used as majority carriers, and red phosphorus, phosphorus, arsenic, and / or antimony can be used as minority carriers. For N-type wafers produced using the methods described herein, red phosphorus, phosphorus, arsenic and / or antimony may be suitably used as majority carriers, and boron, aluminum, gallium and / or indium may be used as minority carriers.

[0085] To improve mechanical strength and sliding properties, wafers produced using the described method are co-doped with germanium and / or nitrogen (e.g., by doping to form a single crystal ingot). Germanium can be incorporated into the single-crystal silicon ingot by adding a germanium source (e.g., elemental germanium and / or silicon-germanium) to the melt during the melting process. This incorporates germanium into the solid crystal form based on the principle of segregation. Therefore, in some embodiments, the single-crystal silicon wafers cut from the ingot drawn according to the method of the invention comprise at least about 1 x 102 19 atoms / cm 3 (for example, at least about 3x10) 19 atoms / cm 3 Or at least about 5x10 19 atoms / cm 3Germanium concentration of 10⁻⁶. Single-crystal silicon wafers cut from ingots drawn according to the method of the invention may include those less than about 1 x 10⁻⁶. 22 atoms / cm 3 (for example, less than approximately 1x10) 21 atoms / cm 3 or less than about 1x10 20 atoms / cm 3 The concentration of germanium is [missing information]. In some embodiments, the single-crystal silicon wafer comprises at least about 1 x 10 [missing information]. 19 atoms / cm 3 And less than approximately 1x10 22 atoms / cm 3 The concentration of germanium is specified. In some embodiments, the single-crystal silicon wafer comprises at least about 5 x 10⁻⁶ ppm. 19 atoms / cm 3 And less than approximately 1x10 22 atoms / cm 3 Germanium concentrations within these ranges. Monocrystalline silicon wafers cut from the bulk portion of a monocrystalline silicon ingot include germanium within these concentration ranges.

[0086] In some embodiments, nitrogen can be incorporated into the monocrystalline silicon ingot by adding a nitrogen source (e.g., silicon nitride and / or nitrogen gas) to the melt during the melt-burning process. In addition to improving mechanical strength, nitrogen dopants can also interact with Oi to partially alter the electrical properties of the wafer by forming thermal donors. This electrical property can vary with temperature because the generation and lethal temperatures of such species differ for each individual species. Thermal donors generated by Oi, NO, and Ge-O have different thermal stabilities. For example, NO thermal donors have been found to be generated at about 600°C and can be stable at a maximum of <900°C. Therefore, a thermal donor lethal (TDK) step at >900°C may be required to control the resistivity of the wafer in order to dissociate NO thermal donors. Alternatively, in the absence of this TDK process step, the doping of the crystal can be adjusted to compensate for the resistivity shift through TD to achieve a target resistivity. In some embodiments, the monocrystalline silicon ingot is co-doped with germanium and nitrogen. In some embodiments, the body of the monocrystalline silicon ingot comprises at least about 1 x 10⁻⁶ oz. 19 atoms / cm 3 At least approximately 3x10 19 atoms / cm 3 (for example, at least about 5x10) 19 atoms / cm 3 germanium concentrations of at least about 1 x 10⁻⁶ 14 atoms / cm 3 The concentration of nitrogen is [missing information]. In some embodiments, the body of the single-crystal silicon ingot comprises at least approximately 1 x 10 [missing information]. 19 atoms / cm 3 And less than approximately 1x10 22atoms / cm 3 Germanium concentration and at least about 1x10 14 atoms / cm 3 And less than approximately 1x10 16 atoms / cm 3 The concentration of nitrogen is specified. In some embodiments, the body of the single-crystal silicon ingot comprises at least about 5 x 10⁻⁶ ppm. 14 atoms / cm 3 And less than approximately 1x10 16 atoms / cm 3 The concentration of nitrogen is [missing information]. In some embodiments, the body of the single-crystal silicon ingot comprises at least about 2 x 10 [missing information]. 14 atoms / cm 3 And less than approximately 1x10 15 atoms / cm 3 The concentration of nitrogen is [missing information]. In some embodiments, the body of the single-crystal silicon ingot comprises at least approximately 3 x 10 [missing information]. 19 atoms / cm 3 And less than approximately 1x10 22 atoms / cm 3 Germanium concentration and at least about 1x10 15 atoms / cm 3 And less than approximately 1x10 16 atoms / cm 3 Nitrogen concentrations within these ranges. Monocrystalline silicon wafers cut from the bulk portion of a monocrystalline silicon ingot include germanium and nitrogen within these concentration ranges.

[0087] This document describes example systems and methods for producing monocrystalline silicon ingots with relatively low oxygen concentrations from a melt formed of polycrystalline silicon. These methods utilize changes in the structure of the flow units in the melt between a first stage and a second stage of ingot production to produce relatively low-oxygen silicon. During the first stage, the silicon ingot is relatively small and the melt depth is relatively deep. The second stage is characterized by a depleted melt depth within the crucible due to the formation of the silicon ingot. In this second stage, flow units induced by rotation of the silicon ingot within the melt can contact the bottom of the crucible, causing silicon oxide that would otherwise form at the bottom of the crucible to be undesirably included in the growing crystal ingot. The methods and systems described herein control the ingot production to limit the inclusion of undesirable silicon oxide. Generally, at least one process parameter changes during the second stage relative to its value in the first stage. Non-limiting examples of process parameter changes from the first stage to the second stage include: a reduced crystal rotation rate, a reduced crucible rotation rate, an increased magnetic field strength, and any combination thereof. For example, in some embodiments, the silicon ingot is rotated more slowly during the second stage to reduce the contact between the rotation-induced flow unit and the bottom of the crucible, thereby reducing the amount of oxygen contained in the silicon ingot.

[0088] The systems and methods described herein enable the formation of single-crystal silicon ingots with low oxygen concentrations maintained over ingot lengths longer than those achieved by previous methods. The effects of these process parameter variations on the structure of the flow units within the crucible and on the oxygen content of the silicon ingots formed using the methods of various embodiments are further described in detail herein.

[0089] Embodiments of the methods described herein achieve superior results compared to existing methods and systems. For example, the methods described herein facilitate the production of silicon ingots with oxygen concentrations lower than those of at least some known methods. Furthermore, unlike at least some known methods, the methods described herein can be used to produce ingots with diameters greater than 150 mm (e.g., about 300 mm).

[0090] Furthermore, incorporating germanium and / or nitrogen impurities into low-oxygen, high-resistivity wafers improves the mechanical strength of wafers that typically suffer from reduced mechanical strength and are susceptible to wafer slippage during high-temperature operation. The fracture strength of germanium-doped low-oxygen wafers can be improved during both growth and post-annealing. Another advantage of germanium doping is reduced thermal donor formation, thereby lowering the free carrier concentration and achieving wafers with higher resistivity. Further, germanium doping in single-crystal silicon ingots and wafers effectively suppresses void defects. Germanium dopant atoms combine with vacancies, thereby suppressing vacancy aggregation necessary for void formation. An additional effect of vacancy combination is strain relaxation originating from the mismatch of Ge atoms in the silicon lattice. The reduction of free vacancies leads to the suppression of native voids and lowers the formation temperature and therefore the size of the voids, resulting in poorer thermal stability of the voids. In addition, germanium doping improvement in single-crystal silicon ingots and wafers can be achieved in a single-step high-temperature annealing process to form an etch zone (DZ, i.e., a low or no oxygen precipitation zone) in the near-surface region, due to oxygen precipitation in the germanium-reinforced bulk region and outward diffusion of oxygen in the near-surface region.

[0091] Furthermore, both N and Ge doping in Si crystals effectively suppress interstitial defects and significantly reduce the concentration of free vacancies (J. Cry. Growth, 243(2002) 371-374). Therefore, during crystal growth, it can be pulled at the same defect concentration much faster than conventional processes, thus improving throughput. This is particularly beneficial for charge-trapping layer SOI applications (CTL-SOI), where a polysilicon-based charge-trapping layer is added between a high-resistivity, low-oxygen treatment wafer and a P-type donor wafer. Due to the presence of the polysilicon layer, high-density crystal defects (COP) can be allowed on the treatment wafer without disrupting the process flow during device fabrication (specifically during LLS inspection).

[0092] Wafers diced from ingots prepared according to the method of the present invention are suitable for use as disposal wafers and / or donor wafers in the fabrication of silicon-on-insulator (SOI) structures. Semiconductor wafers (e.g., silicon wafers) can be used to fabricate composite layer structures. Composite layer structures (e.g., semiconductor-on-insulator, and more specifically, silicon-on-insulator (SOI) structures) generally include a disposal wafer or layer, a device layer, and an insulating (i.e., dielectric) film (typically an oxide layer) between the disposal layer and the device layer. Generally, the thickness of the device layer is between 0.01 micrometers and 20 micrometers, for example, between 0.05 micrometers and 20 micrometers. Thick-film device layers may have a device layer thickness between about 1.5 micrometers and about 20 micrometers. Thin-film device layers may have a thickness between about 0.01 micrometers and about 0.20 micrometers. Generally, composite layer structures (e.g., silicon-on-insulator (SOI), silicon-on-sapphire (SOS), and silicon-on-quartz) are created by placing two wafers in close contact, thereby initiating bonding via van der Waals forces, followed by heat treatment to strengthen the bonding. Annealing can convert terminal silanol groups into siloxane bonds between the two interfaces, thereby strengthening the bond.

[0093] Following thermal annealing, the bonded structure undergoes further processing to remove a significant portion of the donor wafer to achieve layer transfer. For example, wafer thinning techniques (e.g., etching or polishing), commonly known as etch-back SOI (i.e., BESOI), can be used, in which the silicon wafer is bonded to a disposal wafer and then slowly etched away until only a thin silicon layer remains on the disposal wafer. See, for example, U.S. Patent No. 5,189,500, the entire disclosure of which is incorporated herein by reference as if incorporated herein by reference in its entirety. This method is time-consuming and costly, wastes a portion of the substrate, and generally does not provide adequate thickness uniformity for layers thinner than a few micrometers.

[0094] Another common method for achieving layer transfer utilizes hydrogen implantation, followed by thermally induced layer separation. Particles (atoms or ionized atoms, such as hydrogen atoms or combinations of hydrogen and helium atoms) are implanted at a specific depth beneath the front surface of the donor wafer. The implanted particles form a splitting plane in the donor wafer at their implanted depth. The surface of the donor wafer is then cleaned to remove organic compounds or other contaminants (such as boron compounds) deposited on the wafer during the implantation process.

[0095] Next, the front surface of the donor wafer is bonded to the treatment wafer using a hydrophilic bonding process to form a bonded wafer. Prior to bonding, both the donor and treatment wafers are activated by exposing certain surfaces of the wafers to a plasma containing, for example, oxygen or nitrogen. Exposure to plasma modifies the surface structure in a process commonly referred to as surface activation, which makes one or both of the donor and treatment wafer surfaces hydrophilic. The wafer surfaces may also be chemically activated by wet treatment (e.g., SC1 cleaning or a hydrophilic acid). Wet treatment and plasma activation can occur in either order, or the wafer may undergo only one treatment. The wafers are then pressed together to form a bond. This bond is relatively weak (due to van der Waals forces) and must be strengthened before further processing can occur.

[0096] In some processes, the hydrophilic bonding between the donor and disposal wafers (i.e., the bonding wafers) is strengthened by heating or annealing the bonding wafer pair. In some processes, wafer bonding can occur at low temperatures, such as between about 300°C and 500°C. In some processes, wafer bonding can occur at high temperatures, such as between about 800°C and 1100°C. The high temperature causes covalent bonds to form between the adjacent surfaces of the donor and disposal wafers, thus solidifying the bond between them. During the heating or annealing of the bonding wafers, particles previously implanted in the donor wafer weaken the split plane.

[0097] Next, a portion of the donor wafer is separated from the bonded wafer along the split plane (i.e., split) to form an SOI wafer. Splitting can be performed by placing the bonded wafer in a jig, with mechanical force applied on opposite sides of the jig perpendicular to the bonded wafer to pull a portion of the donor wafer away from the bonded wafer. According to some methods, chucks are used to apply the mechanical force. Separation of the portion of the donor wafer is initiated by applying a mechanical wedge at the edge of the bonded wafer at the split plane to initiate the propagation of a crack along the split plane. The mechanical force applied by the chuck then pulls said portion of the donor wafer away from the bonded wafer, thus forming an SOI wafer. The donor wafer can be recycled for multiple uses as an SOI donor wafer.

[0098] According to other methods, the bonding pair can alternatively be subjected to high temperatures for a period of time to cause a portion of the donor wafer to separate from the bonding wafer. Exposure to high temperatures causes cracks to initiate and propagate along the split plane, thus separating a portion of the donor wafer. These cracks are attributed to voids formed from implanted ions grown via Ostwald ripening. Hydrogen and helium are used to fill these voids. The voids become platelets. Pressurized gas within the platelets expands the microcavities and microcracks, which weaken the silicon on the implantation plane. If annealing stops at the appropriate time, the weakened bonding wafer can be split by mechanical processes. However, if the heat treatment continues for a longer duration and / or at higher temperatures, the microcracks propagate to the point where all cracks merge along the split plane, thus separating a portion of the donor wafer. This method allows for the recycling of the donor wafer but typically requires heating the implanted and bonded pairs to temperatures approaching 500°C.

[0099] For RF-related devices (e.g., antenna switches), the use of high-resistivity insulator-on-semiconductor (e.g., silicon-on-insulator) wafers offers advantages over conventional substrates in terms of cost and integration. To reduce parasitic power losses and minimize harmonic distortion inherent in the use of conductive substrates for high-frequency applications, the use of substrate wafers with high resistivity is necessary (but not sufficient). Therefore, the resistivity of the disposal wafer for RF devices is generally greater than about 500 Ohm-cm. As a disposal wafer, the wafer prepared according to the method of the present invention is particularly suitable for high-resistivity SO1 structures in RF devices. The HR-SO1 structure may include a high-resistivity disposal wafer with low oxygen concentration and high resistivity, and is doped with germanium to achieve improved mechanical strength. Therefore, some embodiments of the present invention relate to an HR-SOI structure, which includes a Ge-doped disposal wafer, a dielectric layer (generally a buried silicon oxide layer or BOX), and a device layer.

[0100] This substrate is prone to forming a highly conductive charge reversal or accumulation layer at the BOX / disposal interface, leading to the generation of free carriers (electrons or holes). This reduces the effective resistivity of the substrate and causes parasitic power loss and device nonlinearity when the device operates at RF frequencies. These reversal / accumulation layers can be attributed to BOX fixed charges, oxide trapped charges, interface trapped charges, and even the DC bias applied to the device itself.

[0101] Therefore, methods are needed to trap charges in any induced inversion or accumulation layers, such that even the high resistivity of the substrate is maintained in a very close surface region. It is known that a charge trapping layer (CTL) between a high-resistivity substrate and a buried oxide (BOX) can improve the performance of RF devices fabricated using SOI wafers. Several methods have been proposed to form these high-interface trapping layers. For example, one method for producing an insulator-on-a-structure semiconductor (e.g., silicon-on-insulator or SOI) with a CTL for an RF device is based on depositing an undoped polysilicon thin film on a silicon substrate with high resistivity, followed by forming an oxide stack and a top silicon layer thereon. The polysilicon layer acts as a high-defect-rate layer between the silicon substrate and the buried oxide layer. An alternative method is the implantation of heavy ions to create a near-surface damage layer. The device (e.g., an RF device) is then built into the top silicon layer.

[0102] Academic research has demonstrated that a polysilicon layer between the oxide and the substrate improves device isolation, reduces transmission line loss, and lowers harmonic distortion. See, for example: HS Gamble et al., “Low-loss CPW lines on surface stabilized high resistivity silicon,” Microwave Guided Wave Lett., 9(10), pp. 395-397, 1999; D. Lederer, R. Lobet and J.-P. Raskin, “Enhanced high resistivity SOI wafers for RF applications,” IEEE Intl. SOI Conf., pp. 46-47, 2004; D. Lederer and J.-P. Raskin, “New substrate passivation method dedicated to high resistivity SOI wafer fabrication.” "SOI wafer fabrication with increased substrate resistivity", IEEE Electron Device Letters, Vol. 26, No. 11, pp. 805-807, 2005; D. Lederer, B. Aspar, C. Lagha, and J.-P. Raskin, "Performance of RF passive structures and SOI MOSFETs transferred on a passivated HR SOI substrate", IEEE International SOI Conference, pp. 29-30, 2006; and Daniel C.(See Kerret et al., "Identification of RF harmonic distortion on Si substrates and its reduction using a trap-rich layer," *Silicon Monolithic Integrated Circuits in RF Systems*, 2008. SiRF 2008 (IEEE Topical Meeting), pp. 151-154, 2008.)

[0103] In some embodiments, a high-resistivity, low-oxygen, germanium-doped wafer is a suitable substrate for epitaxial deposition. Epitaxial deposition is preferably performed by chemical vapor deposition (CVD). Generally, CVD involves exposing the wafer surface to a silicon-containing atmosphere in an epitaxial deposition reactor (e.g., a Centura reactor available from Applied Materials). Preferably, the wafer surface is exposed to an atmosphere containing silicon-containing volatile gases (e.g., SiCl4, SiHCl3, SiH2Cl2, SiH3Cl, or SiH4). The atmosphere also preferably contains a carrier gas (preferably H2). For example, the silicon source during epitaxial deposition can be SiH2Cl2 or SiH4. If SiH2Cl2 is used, the reactor vacuum pressure during deposition is preferably from about 500 Torr to about 760 Torr. On the other hand, if SiH4 is used, the reactor pressure is preferably about 100 Torr. Most preferably, the silicon source during deposition is SiHCl3. This tends to be much cheaper than other sources. Additionally, epitaxial deposition using SiHCl3 can be performed at atmospheric pressure. This is advantageous because a vacuum pump is not required and the reactor chamber does not need to be as robust as it would be to prevent rupture. Furthermore, there are fewer safety hazards and a reduced likelihood of air or other gases leaking into the reactor chamber.

[0104] During epitaxial deposition, the temperature of the wafer surface is preferably increased to or maintained at a temperature sufficient to prevent the silicon-containing atmosphere from depositing polysilicon onto the surface. Generally, the surface temperature is preferably at least about 900°C during this cycle. More preferably, the surface temperature is maintained in the range of about 1050°C to about 1150°C. Most preferably, the surface temperature is maintained at the silicon oxide removal temperature.

[0105] The growth rate of epitaxial deposition is preferably from about 0.5 μm / min to about 7.0 μm / min. For example, a rate of about 3.5 μm / min to about 4.0 μm / min can be achieved by using an atmosphere essentially composed of about 2.5 mol% SiHCl3 and about 97.5 mol% H2 at a temperature of about 1150 °C and an absolute pressure of up to about 1 atm.

[0106] In some applications, the wafer includes an epitaxial layer that imparts electrical properties. In some embodiments, a lightly phosphorus-doped epitaxial layer is used. Therefore, the surrounding environment for epitaxial deposition includes phosphorus (e.g., phosphine, PH3) present as a volatile compound. In some embodiments, the epitaxial layer may contain boron. This layer can be prepared, for example, by including B2H6 in the atmosphere during deposition.

[0107] The epitaxial layer may have substantially the same electrical properties as the underlying wafer. Alternatively, the epitaxial layer may have different electrical properties than the underlying wafer. The epitaxial layer may include materials selected from the group consisting of silicon, silicon carbide, silicon germanium, gallium arsenide, gallium nitride, indium phosphide, gallium arsenide phosphide, germanium, and combinations thereof. Depending on the desired properties of the final integrated circuit device, the epitaxial layer may include dopants selected from the group consisting of boron, arsenic, and phosphorus. The resistivity of the epitaxial layer may be in the range of 1 Ohm-cm to 50 Ohm-cm (typically from 5 Ohm-cm to 25 Ohm-cm). In some embodiments, the epitaxial layer may have a thickness between about 20 nanometers and about 3 micrometers, for example, between about 20 nanometers and about 2 micrometers, such as between about 20 nanometers and about 1.5 micrometers, or between about 1.5 micrometers and about 3 micrometers.

[0108] In some embodiments, a high-resistivity, low-oxygen, germanium-doped wafer is a suitable substrate for gallium nitride epitaxial deposition (e.g., by molecular beam epitaxy). GaN molecular beam epitaxy (MBE) growth is an unbalanced process in which a Ga vapor beam from a bleed chamber and an activated nitrogen beam from a plasma source are directed toward a heated substrate. Under appropriate conditions, layer-by-layer deposition of Ga and N atomic planes is possible. The MBE process is performed in an ultra-high vacuum chamber, thereby minimizing film contamination.

[0109] The following non-limiting examples are provided to further illustrate the invention.

[0110] Example

[0111] Example 1 Crystal growth

[0112] Germanium-doped monocrystalline silicon short ingots (crystal ID#1) and germanium-doped monocrystalline silicon full-length ingots (crystal ID#2) were produced in a 200mm FF furnace (SunEdison, South Korea). Polycrystalline silicon and germanium were fed into a high-purity quartz-lined synthesis crucible (Toshiba). The charge for preparing the germanium-doped monocrystalline silicon full-length ingot (crystal ID#2) consisted of 1.3 kg of 5N-grade germanium and 180 kg of high-resistivity polycrystalline silicon (>1000 Ohm·cm). Additionally, 0.024 g of phosphorus was added to the melt to provide approximately 1.1 x 10⁻⁶ ppm. 6 The phosphorus dopant concentration of ppba. The melting and feeding of the silicon ingot is carried out according to the technique disclosed herein, followed by crystal pulling. The single-crystal silicon ingot is targeted to have a resistivity >16,000 Ohm·Cm by adjusting the dopant concentration in the melt before starting the crystal growth process. This is based on the resistivity of the melt calculated by growing short crystals with a diameter <200 mm and a weight <15 kg wt. The single-crystal silicon ingot contains <5.0 ppma Oi.

[0113] Example 2 resistivity of annealed ingots

[0114] A germanium-doped single-crystal silicon full-length ingot (crystal ID#2) prepared according to Example 1 underwent a thermal annealing process. Prior to annealing and pulling the ingot, the pulled ingot was trimmed by removing the seed crystal and end tapers. For analysis, the ingot was cut at different locations, thereby preparing multiple blocks with a thickness of approximately 1350 micrometers. Each trimmed block was edge-ground and subjected to mixed acid etching to a final thickness of approximately 1180 micrometers, followed by wafer thinning and cleaning to a final thickness of 1150 micrometers and pre-RTA cleaning. The blocks were subjected to thermal donor killing in a rapid thermal annealing process at 750°C at a temperature ramp of 360°C / min. After thinning and annealing, the annealed blocks were cooled and held for up to four hours before four-point probe measurements. For resistivity and additional properties, the annealed blocks underwent four-point probe measurements, as provided in Table 2.

[0115] Table 2

[0116]

[0117] Example 3 wafer mechanical strength

[0118] The mechanical strength of a single-crystal silicon wafer cut from an ingot prepared according to Example 1 was compared with that of an undoped germanium silicon wafer (ID#0) also with low Oi, using an EPI reactor slip generation test at a temperature ramp. According to this test, the smaller the amount of slip generated, the greater the mechanical strength. This leads to a lower yield loss. Furthermore, a larger slip-free temperature window obtained through this test corresponds to a larger process window during SOI wafer and device fabrication. Figure 10A and10B The charts depict a significant improvement in slip count provided by germanium doping and nitrogen doping. An undoped germanium silicon wafer is demonstrated with a temperature offset window of ~3°C under 1100°C, 250s process conditions. In comparison, a germanium-doped wafer is demonstrated with a temperature offset window of ~6°C under similar conditions. This improvement is significant enough to enhance slip-free processing of high-resistivity, low-Oi wafers under extremely demanding process conditions.

[0119] Example 4 wafer mechanical strength

[0120] The mechanical strength of a single-crystal silicon wafer cut from an ingot prepared according to Example 1 was compared with that of an undoped germanium silicon wafer (ID#0) also with low Oi, using an EPI reactor slip generation test at a temperature ramp. According to this test, the smaller the amount of slip generated, the greater the mechanical strength. This leads to a lower yield loss. Furthermore, a larger slip-free temperature window obtained through this test corresponds to a larger process window during SOI wafer and device fabrication. Figure 11 The chart illustrates that germanium doping provides a significant improvement in slip count. An undoped germanium silicon wafer is demonstrated with a temperature offset window of ~3°C under 1100°C, 250s process conditions. In comparison, a germanium-doped wafer is demonstrated with a temperature offset window of ~6°C under similar conditions. This improvement is significant enough to enhance slip-free processing of high-resistivity, low-Oi wafers under extremely demanding process conditions.

[0121] Example 5 Mechanical strength

[0122] Nitrogen-doped monocrystalline silicon ingots are produced in a 200mm FF furnace at the SunEdison semiconductor facility in South Korea. The seed-end N concentration is targeted to be ~1.4 x 10⁻⁶ N / a in the wafer by adding an equal amount of silicon nitride during the melt-burning process. 14 nitrogen atoms / cm 3 (Crystal ID#3). Similarly, by setting a target of ~5x10 at the seed end. 14 nitrogen atoms / cm 3 Another crystal (crystal ID#4) was grown using a different concentration. The resistivity of the crystal was determined by adjusting the dopant concentration in the melt before starting the crystal growth process, with a target of >3000 Ohm·cm at the seed crystal end (based on the resistivity of the melt calculated by growing a short crystal with a diameter of <200 mm and a weight of <15 kg wt). The process was optimized to achieve the desired <6.0 ppma Oi.

[0123] Germanium-doped monocrystalline silicon ingots (crystal ID#2) were produced in a 200mm FF furnace at the SunEdison solar facility in South Korea. 1.3 kg of 5N-grade Ge was co-melted with 180 kg of high-resistivity Si (>1000 Ohm·cm) in a synthesis crucible lined with high-purity quartz. The crystal was targeted to achieve a resistivity of >16,000 Ohm·cm by adjusting the dopant concentration in the melt.

[0124] The mechanical strength of wafers was compared with that of undoped germanium silicon wafers (high resistivity, >1000 Ohm·Cm; and low Oi, <6.0 ppma) and wafers with low Oi and different concentrations of nitrogen and Ge doped with EPI reactors using a sliding generation test at elevated temperatures. The lower the number of slides generated by this test, the greater the mechanical strength and the lower the expected yield loss. Furthermore, a larger no-slip temperature window corresponds to a larger process window during SOI wafer and device fabrication. Based on this test, a significant improvement in slide count was observed. Undoped germanium silicon wafers exhibited a temperature offset window of ~3°C under 1100°C, 250s process conditions, while low-concentration nitrogen doped (~1.4 x 10⁻⁶) wafers showed a significantly higher slip count. 14 nitrogen atoms / cm 3 It has a temperature of 9°C and a high concentration of N doping (~5 x 10⁻⁶). 14 nitrogen atoms / cm 3 It exhibits a temperature offset of >20°C. See Table 3. Ge-doped wafers have a temperature offset window of ~6°C under similar conditions. This improvement is significant enough to enhance the slip-free processing of high-resistivity, low-Oi wafers under extremely demanding process conditions.

[0125] Table 3

[0126]

[0127] When describing elements of the present invention or its embodiments(s), the articles “a,” “an,” “the,” and “said” are intended to refer to one or more of the elements. The terms “comprising,” “including,” and “having” are intended to be inclusive and mean that additional elements besides those listed may be present.

[0128] The approximate language used herein and throughout the specification and claims may be applied to modify any quantitative expression that may vary without altering the relevant essential function. Therefore, values ​​modified by terms or terms (e.g., “about,” “approximately,” and “substantially”) are not limited to the specified precise values. In at least some instances, approximate language may correspond to the precision of the instrument used to measure the value. Scope limitations may be combined and / or interchanged herein and throughout the specification and claims; these scopes are identified and include all subscopes contained herein, unless otherwise indicated by context or language.

[0129] Since various changes may be made above without departing from the scope of the invention, everything contained in the above description and shown in the drawings is intended to be interpreted as illustrative and not restrictive.

Claims

1. A single-crystal silicon wafer, comprising: Two principal parallel surfaces, one being the front surface of the monocrystalline silicon wafer and the other being the rear surface of the monocrystalline silicon wafer; a circumferential edge joining the front and rear surfaces of the monocrystalline silicon wafer; a bulk region between the front and rear surfaces; and a central plane of the monocrystalline silicon wafer between the front and rear surfaces, wherein: (a) the bulk region comprises impurities comprising a combination of nitrogen at a concentration of at least 2xlO 14 atoms / cm 3 and less than 1xlO 16 atoms / cm 3 and germanium at a concentration of at least 5xlO 19 atoms / cm 3 and less than 1xlO 22 atoms / cm 3 , (b) The bulk region includes interstitial oxygen at a concentration of less than 5 ppma, wherein the interstitial concentration is in accordance with the new ASTM standards of 1980 to 1983: ASTM F 121; DIN 50438 / 1 of 1978, and (c) Further, the bulk region of the said monocrystalline silicon wafer has a resistivity of at least 3000 ohm cm.

2. The single-crystal silicon wafer according to claim 1, wherein the concentration of interstitial oxygen is less than 4 ppma, wherein the interstitial oxygen concentration is in accordance with the new ASTM standard of 1980 to 1983: ASTM F 121; DIN 50438 / 1 of 1978.

3. The single-crystal silicon wafer according to claim 1, wherein the concentration of interstitial oxygen is less than 3 ppma, wherein the interstitial oxygen concentration is in accordance with the new ASTM standard of 1980 to 1983: ASTM F 121; DIN 50438 / 1 of 1978.

4. The single-crystal silicon wafer according to claim 1, wherein the resistivity is at least 10,000 ohm cm.

5. The single-crystal silicon wafer according to claim 1, wherein the resistivity is at least 15000 ohm cm.

6. The single-crystal silicon wafer of claim 1, wherein the resistivity is at least 20,000 ohm cm.

7. The single crystal silicon wafer of any of claims 1-6, wherein the concentration of nitrogen is at least 5 x 1016 atoms / cm 14 and less than 1 x 1017 atoms / cm 3 . 16 . 3 .

8. The single crystal silicon wafer of any of claims 1-6, wherein the concentration of nitrogen is at least 1 x 1014 atoms / cm 15 and less than 1 x 1015 atoms / cm 3 . 16 . 3 .

9. A method for growing a single-crystal silicon ingot, the method comprising: A silicon melt is prepared by melting polycrystalline silicon in a quartz-lined crucible and adding a source of impurities, including a combination of germanium and nitrogen, to the quartz-lined crucible; and The single-crystal silicon ingot is drawn from the silicon melt. The single-crystal silicon ingot includes a central axis, a crown, an end portion opposite the crown, and a body between the crown and the opposite end portion. The body has a lateral surface and a radius R extending from the central axis to the lateral surface. The body of the single-crystal silicon ingot comprises at least 2x10⁻⁶ ppm. 14 atoms / cm 3 And less than 1x10 16 atoms / cm 3 Nitrogen concentration with at least 5 x 10 19 atoms / cm 3 And less than 1x10 22 atoms / cm 3 The combination of germanium concentrations, further wherein the pulling conditions are sufficient to produce an interstitial oxygen concentration of less than 5 ppma in the body of the single-crystal silicon ingot, wherein the interstitial concentration is in accordance with the new ASTM standard 1980 to 1983: ASTM F 121; DIN 50438 / 1 of 1978, and further wherein the body of the single-crystal silicon ingot has a resistivity of at least 3000 ohm cm.

10. The method of claim 9, wherein the pulling conditions are sufficient to produce an interstitial oxygen concentration of less than 4 ppma in the body of the single-crystal silicon ingot, wherein the interstitial oxygen concentration is in accordance with the new ASTM F121 of 1980 to 1983; DIN 50438 / 1 of 1978.

11. The method of claim 9, wherein the pulling conditions are sufficient to produce an interstitial oxygen concentration of less than 3 ppma in the body of the single-crystal silicon ingot, wherein the interstitial oxygen concentration is in accordance with the new ASTM F121 of 1980 to 1983; DIN 50438 / 1 of 1978.

12. The method of claim 9, wherein the body of the single-crystal silicon ingot has a resistivity of at least 10,000 ohm cm.

13. The method of claim 9, wherein the body of the single-crystal silicon ingot has a resistivity of at least 15,000 ohm cm.

14. The method of claim 9, wherein the body of the single-crystal silicon ingot has a resistivity of at least 20,000 ohm cm.

15. The method according to any one of claims 9 to 14, wherein the body of the single-crystal silicon ingot comprises at least 2 x 10⁻⁶ ppm. 14 atoms / cm 3 And less than 2x10 15 atoms / cm 3 The concentration of nitrogen.

16. The method according to any one of claims 9 to 14, wherein the body of the single-crystal silicon ingot comprises at least 1x10 15 atoms / cm 3 And less than 1x10 16 atoms / cm 3 The concentration of nitrogen.

17. A single-crystal silicon ingot, comprising: A central axis, a crown, an end portion opposite to the crown, and a body between the crown and the opposite end portion, the body having a lateral surface and a radius R extending from the central axis to the lateral surface, wherein: (a) The bulk of the single-crystal silicon ingot includes impurities comprising at least 2 x 10⁻⁶. 14 atoms / cm 3 And less than 1x10 16 atoms / cm 3 Nitrogen concentration with at least 5 x 10 19 atoms / cm 3 And less than 1x10 22 atoms / cm 3 Combinations of germanium concentrations, and (b) The bulk of the single-crystal silicon ingot comprises interstitial oxygen at a concentration of less than 5 ppma, wherein the interstitial oxygen concentration is in accordance with the new ASTM standard of 1980-1983: ASTM F 121; DIN 50438 / 1 of 1978, and (c) Further, the body of the single-crystal silicon ingot has a resistivity of at least 3000 ohm cm.

18. The single-crystal silicon ingot of claim 17, wherein the concentration of interstitial oxygen is less than 4 ppma, wherein the interstitial oxygen concentration is in accordance with the new ASTM standard of 1980 to 1983: ASTM F 121; DIN 50438 / 1 of 1978.

19. The single-crystal silicon ingot according to claim 17, wherein the concentration of interstitial oxygen is less than 3 ppma, wherein the interstitial oxygen concentration is in accordance with the new ASTM standard of 1980 to 1983: ASTM F 121; DIN 50438 / 1 of 1978.

20. The single-crystal silicon ingot of claim 17, wherein the resistivity is at least 5000 ohm cm.

21. The single-crystal silicon ingot of claim 17, wherein the resistivity is at least 10,000 ohm cm.

22. The single-crystal silicon ingot of claim 17, wherein the resistivity is at least 15000 ohm cm.

23. The single-crystal silicon ingot of claim 17, wherein the resistivity is at least 20,000 ohm cm.

24. The single-crystal silicon ingot according to any one of claims 17 to 23, wherein the nitrogen concentration is at least 2 x 10⁻⁶. 14 atoms / cm 3 And less than 2x10 15 atoms / cm 3 .

25. The single-crystal silicon ingot according to any one of claims 17 to 23, wherein the nitrogen concentration is at least 1 x 10⁻⁶. 15 atoms / cm 3 And less than 1x10 16 atoms / cm 3 .

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