A power battery active equalization system, method and vehicle

Abstract

The application discloses a power battery active balancing system and method and a vehicle, which utilizes N+1 balancing switch modules to cooperate with a charging DCDC module, a discharging DCDC module, a discharging total switch and a charging total switch, can realize accurate balancing of each single battery, and can greatly improve balancing efficiency and reduce energy consumption by simultaneously balancing odd-numbered single batteries or even-numbered single batteries.

Description

Technical Field

[0001] This invention belongs to the field of power battery control, specifically relating to a power battery active balancing system, method, and vehicle. Background Technology

[0002] Currently, the power batteries of new energy vehicles are typically composed of multiple battery packs connected in parallel, and each battery pack consists of many individual cells connected in series. However, due to manufacturing processes and other reasons, the electrical properties of individual cells are not uniform. Since a power battery is composed of many individual cells connected in series and parallel, during charging, the uneven electrical properties of individual cells mean that they cannot be fully charged and discharged simultaneously. If this continues for a long time, it will inevitably lead to a reduction in the capacity and lifespan of the power battery. Therefore, equalization technology is needed to address the issue of individual cells not being able to be fully charged and discharged simultaneously during the charging and discharging process.

[0003] There are two main methods for power battery balancing: passive balancing and active balancing. Passive balancing is still widely used due to its simple circuit structure and low cost, but it has an insurmountable drawback: it requires external balancing resistors to release excess energy from individual cells, resulting in significant energy loss. Active balancing, on the other hand, uses external energy storage devices to replenish the energy of low-performance individual cells from high-performance cells. It eliminates resistive energy loss, minimizes energy loss, and produces a larger balancing current, making it more suitable for the power batteries of new energy vehicles with high charge and discharge currents.

[0004] CN113555939A discloses a distributed battery active balancing management system (BMS). This system collects and monitors the voltage of individual battery cells, charges cells with low charge levels, discharges cells with high charge levels, and uses the energy from discharging the cells with high charge levels to charge the cells with low charge levels, thus achieving battery balancing. While this system can balance batteries in real time, it requires repeatedly turning the charging switch on and off, resulting in low balancing efficiency and high energy consumption.

[0005] CN113595203A discloses an active balancing control circuit for a battery management system (BMS), which charges the lowest-charged individual battery cell via a relay. While this method can quickly balance large batteries and is more efficient, it can only charge individual battery cells and cannot discharge them, thus failing to fully utilize electrical energy and accurately balance each individual battery cell.

[0006] In summary, existing active balancing technologies for power batteries have the following problems:

[0007] 1. It requires repeated energy exchange between individual cells, resulting in low balancing efficiency and high energy consumption.

[0008] 2. It is impossible to accurately balance each individual cell. Summary of the Invention

[0009] The purpose of this invention is to provide a power battery active balancing system, method, and vehicle to accurately balance each individual battery cell and improve balancing efficiency.

[0010] The active balancing system for power batteries described in this invention includes a battery voltage monitoring module, a battery temperature monitoring module, an energy storage module, and a main control module. The battery voltage monitoring module and the battery temperature monitoring module are connected to the main control module and send the detected voltage and temperature information of N series-connected and sequentially numbered individual batteries to the main control module. The main control module is connected to the energy storage module and controls the energy storage module to charge or discharge (i.e., store or release electrical energy). The active balancing system also includes a charging DC-DC module, a discharging DC-DC module, N+1 balancing switch modules, a main discharge switch, and a main charging switch. The main discharge switch includes an NMOS transistor Q1 and a PMOS transistor Q2, and the main charging switch includes a PMOS transistor Q3 and an NMOS transistor Q4.

[0011] The source (S) terminal of NMOS transistor Q1 is connected to the positive input terminal of the discharge DC-DC module, and the source (S) terminal of PMOS transistor Q2 is connected to the negative input terminal of the discharge DC-DC module. The positive output terminal of the discharge DC-DC module is connected to the positive terminal of the energy storage module, and the negative output terminal of the discharge DC-DC module is connected to the negative terminal of the energy storage module. The positive input terminal of the charging DC-DC module is connected to the positive terminal of the energy storage module, and the negative input terminal of the charging DC-DC module is connected to the negative terminal of the energy storage module. The positive output terminal of the charging DC-DC module is connected to the source (S) terminal of PMOS transistor Q3, and the negative output terminal of the charging DC-DC module is connected to the source (S) terminal of NMOS transistor Q4.

[0012] The i-th equalization switch module includes a resistor R. i Voltage detection module U i NMOS transistor Q i,1 and PMOS transistor Q i,2 Voltage detection module U i With resistance R i Connect the main control module to the detected resistance R. i The voltage difference across the two ends (i.e., resistance R) i The voltage obtained is sent to the main control module, and the resistor R i One end is connected to the NMOS transistor Q i,1 The drain and PMOS transistor Q i,2 The drain terminal is connected, and the resistor R j The other end is connected to the negative terminal of cell j, with resistance R. N+1 The other end is connected to the positive terminal of the Nth cell, and the NMOS transistor Q... i,1 The gate of the PMOS transistor, Q i,2 The gate (G) of the NMOS transistor is connected to the main control module, and the gate (Q) of the NMOS transistor is connectedi,1 The source (S) terminal of the PMOS transistor is connected to the drain (D) terminal of NMOS transistor Q1 and the drain (D) terminal of NMOS transistor Q4. i,2 The source (S) of transistor Q1 is connected to the drain (D) of PMOS transistor Q2 and the drain (D) of PMOS transistor Q3. The gate (G) of NMOS transistor Q1, the gate (G) of PMOS transistor Q2, the gate (G) of PMOS transistor Q3, and the gate (G) of NMOS transistor Q4 are connected to the main control module. Here, i takes all integers from 1 to N+1, and j takes all integers from 1 to N.

[0013] The active balancing method for power batteries described in this invention employs the aforementioned active balancing system for power batteries. The method includes:

[0014] When the power battery is discharging and needs to be balanced, the main control module first controls the discharge main switch to be turned on and the charging main switch to be turned off. Then, it controls N+1 balancing switch circuits and energy storage modules to discharge all odd-numbered cells or all even-numbered cells to charge the energy storage modules, until all odd-numbered cells or all even-numbered cells meet the conditions for pausing discharge balancing. Then, it continues to control N+1 balancing switch circuits and energy storage modules to discharge the remaining cells to charge the energy storage modules, until the remaining cells meet the conditions for pausing discharge balancing. Finally, it determines whether the power battery meets the uniformity requirements. If it does, the balancing process ends; if it does not, the discharge balancing process continues.

[0015] When the power battery is charging and needs to be balanced, the main control module first controls the discharge main switch to be turned off and the charging main switch to be turned on. Then, it controls the energy storage module and N+1 balancing switch circuits to discharge the energy storage module to charge all odd-numbered individual cells or all even-numbered individual cells until all odd-numbered individual cells or all even-numbered individual cells meet the conditions for pausing charging and balancing. Then, it continues to control the energy storage module and N+1 balancing switch circuits to discharge the energy storage module to charge the remaining individual cells until all remaining individual cells meet the conditions for pausing charging and balancing. Finally, it determines whether the power battery meets the uniformity requirements. If it does, the balancing process ends; if it does not, the charging and balancing process continues.

[0016] Preferably, if the standard deviation of the charge of the N series-connected and sequentially numbered individual cells of the power battery before equalization is greater than the standard deviation threshold of the charge... This indicates that the power battery needs balancing; otherwise, it indicates that the power battery does not need balancing. If the standard deviation of the charge of the N series-connected and sequentially numbered individual cells of the power battery after balancing is paused is less than or equal to the standard deviation threshold, then the balancing process is complete. This indicates that the power battery meets the uniformity requirement; otherwise, it indicates that the power battery does not meet the uniformity requirement. The standard deviation of the charge reflects the dispersion of the charge among N individual cells. The smaller the standard deviation, the smaller the difference in charge among the N individual cells, and the better the uniformity of the individual cells. Using the standard deviation of the charge as a criterion for whether equalization is needed allows for more accurate timing of equalization initiation. Using the standard deviation of the charge as a criterion for whether equalization needs to continue allows for more accurate equalization results.

[0017] Preferably, when the power battery is in a discharged state, if during the equalization process... This indicates that cell number x meets the conditions for paused discharge equalization; where C′ x C represents the charge of cell number x during the equalization process. oth1 This indicates the first discharge equalization charge threshold. Cmin represents the minimum charge of all odd-numbered individual cells before equalization. This represents the error threshold, where x takes all odd numbers from 1 to N. When the power battery is in a discharged state, if during the equalization process... This indicates that cell number y meets the conditions for paused discharge equalization; where C′ y C represents the charge of cell number y during the balancing process. eth1 This indicates the second discharge equalization capacity threshold. Cemin represents the minimum charge of all even-numbered individual cells before equalization, and y takes all even numbers from 2 to N.

[0018] Preferably, when the power battery is charging, if during the equalization process... This indicates that cell number x meets the condition for paused charging equalization; where C oth2 This indicates the first charging equalization power threshold. C omax This represents the maximum charge capacity among all odd-numbered individual cells before equalization. When the battery is charging, if during the equalization process... This indicates that cell number y meets the condition for paused charging equalization; where C eth2 This indicates the second charging equalization power threshold. C emax This represents the maximum charge capacity among all even-numbered individual cells before equalization.

[0019] The above-mentioned settings for pausing charging / discharging equalization conditions for individual batteries can better ensure the consistency of the battery capacity after equalization, and also result in lower energy consumption.

[0020] Preferably, using the formula: Calculate the charge C′ of cell j during the equalization process.j Where t represents the equilibrium time, and η represents the Coulomb efficiency (a known parameter). Represents resistance R j The voltage difference between the two ends (by the voltage detection module U) j (Detected) Represents resistance R j+1 The voltage difference between the two ends (by the voltage detection module U) j+1 (Detected), C j This represents the charge level of cell j before equalization (estimated based on the voltage and temperature information of cell j). R represents the charge and discharge capacity of a single battery cell during the equalization compensation process. j For resistor R j resistance, R j+1 For resistor R j+1 The resistance value. Because estimating the charge of a single cell based on its voltage and temperature information during the equalization process is too complex and inaccurate, it is more accurate to estimate the charge using only the voltage and temperature information of the single cell before equalization begins, and then use the above formula to accurately calculate the charge of the single cell during the equalization process.

[0021] Preferably, if the power battery does not meet the uniformity requirement after all individual cells have met the conditions for pausing charging / discharging for equalization, the error threshold should be reduced. and C′ j The value assigned to C j Then, charging / discharging balancing continues. This ensures that the power battery meets the uniformity requirements.

[0022] Preferably, the method of controlling N+1 equalization switch circuits and energy storage modules to discharge all odd-numbered individual cells to charge the energy storage modules is as follows: controlling PMOS transistor Q x，2 and NMOS transistor Q x+1，1 Turn on, controlling the remaining NMOS and PMOS transistors in the N+1 equalization switching circuits to turn off.

[0023] The method of controlling N+1 equalization switch circuits and energy storage modules to discharge all even-numbered individual cells to charge the energy storage modules is as follows: controlling PMOS transistor Q y，2 and NMOS transistor Q y+1，1 Turn on, controlling the remaining NMOS and PMOS transistors in the N+1 equalization switching circuits to turn off.

[0024] The method of controlling the energy storage module and N+1 equalization switch circuits to discharge the energy storage module to charge all odd-numbered individual cells is as follows: controlling NMOS transistor Q x，1 and PMOS transistor Q x+1，2Turn on, controlling the remaining NMOS and PMOS transistors in the N+1 equalization switching circuits to turn off.

[0025] The method for controlling the energy storage module and N+1 equalization switch circuits to discharge the energy storage module to charge all even-numbered individual cells is as follows: controlling NMOS transistor Q y，1 and PMOS transistor Q y+1，2 Turn on, controlling the remaining NMOS and PMOS transistors in the N+1 equalization switching circuits to turn off.

[0026] Preferably, controlling the discharge master switch to be on and the charging master switch to be off means controlling NMOS transistors Q1 and Q2 to be on and PMOS transistors Q3 and Q4 to be off. Controlling the discharge master switch to be off and the charging master switch to be on means controlling NMOS transistors Q1 and Q2 to be off and PMOS transistors Q3 and Q4 to be on.

[0027] The specific turn-on / turn-off logic for each PMOS and NMOS transistor is shown in Table 1.

[0028] Table 1

[0029]

[0030] The vehicle described in this invention includes the aforementioned active balancing system for power batteries.

[0031] This invention utilizes N+1 equalization switch modules in conjunction with a charging DC-DC module, a discharging DC-DC module, a discharging master switch, and a charging master switch to achieve accurate equalization of each individual battery cell. Furthermore, odd-numbered or even-numbered individual batteries can be equalized simultaneously, greatly improving equalization efficiency and reducing energy consumption. Attached Figure Description

[0032] Figure 1 This is a partial circuit diagram of the active balancing system for the power battery in this embodiment.

[0033] Figure 2 This is a control architecture diagram of the active balancing system for power batteries in this embodiment.

[0034] Figure 3 This is a control flowchart of the main control module in the active balancing method for power batteries in this embodiment. Detailed Implementation

[0035] like Figure 1 , Figure 2As shown, the active balancing system for the power battery in this embodiment includes a battery voltage monitoring module 1, a battery temperature monitoring module 2, an energy storage module 3, a main control module 4, a charging DC-DC module 5, a discharging DC-DC module 6, N+1 balancing switch modules, a main discharge switch 7, and a main charging switch 8. The main discharge switch 7 includes an NMOS transistor Q1 and a PMOS transistor Q2, and the main charging switch 8 includes a PMOS transistor Q3 and an NMOS transistor Q4. The battery voltage monitoring module 1 detects the voltage of N series-connected and sequentially numbered individual batteries, and the battery temperature monitoring module 2 detects the temperature of these N series-connected and sequentially numbered individual batteries. The battery voltage monitoring module 1 and battery temperature monitoring module 2 are connected to the main control module 4 and send the detected voltage and temperature information of the N series-connected and sequentially numbered individual batteries to the main control module 1. The main control module 4 is connected to the energy storage module 3 and controls the charging or discharging of the energy storage module 3. The charging DC-DC module 5 is used to convert the electrical energy voltage released by the energy storage module 3 into a voltage suitable for charging individual batteries, and the discharging DC-DC module 6 is used to convert the electrical energy voltage released by the individual batteries into a voltage suitable for charging the energy storage module 3.

[0036] The source (S) terminal of NMOS transistor Q1 is connected to the positive input terminal of discharge DC-DC module 6, the source (S) terminal of PMOS transistor Q2 is connected to the negative input terminal of discharge DC-DC module 6, and the positive output terminal of discharge DC-DC module 6 is connected to the positive terminal of energy storage module 3.

[0037] The negative output terminal of the DC-DC module 6 is connected to the negative terminal of the energy storage module 3. The positive input terminal of the charging DC-DC module 5 is connected to the positive terminal of the energy storage module 3, the negative input terminal of the charging DC-DC module 5 is connected to the negative terminal of the energy storage module 3, the positive output terminal of the charging DC-DC module 5 is connected to the source terminal of the PMOS transistor Q3, and the negative output terminal of the charging DC-DC module 5 is connected to the source terminal of the NMOS transistor Q4.

[0038] The i-th equalization switch module includes a resistor R. i Voltage detection module U i NMOS transistor Q i,1 and PMOS transistor Q i,2 Voltage detection module U i With resistance R i Connect the main control module 4 to the detected resistance R. i The voltage difference between the two ends is sent to the main control module 4. Resistor R i One end is connected to the NMOS transistor Q i,1 The drain and PMOS transistor Q i,2 The drain terminal is connected, and the resistor R j The other end is connected to the negative terminal of cell j (corresponding resistor R). j+1 The other end is connected to the positive terminal of cell j), resistor R N+1The other end is connected to the positive terminal of the Nth cell, and the NMOS transistor Q... i,1 The gate of the PMOS transistor, Q i,2 The gate (G) of the transistor is connected to the main control module 4, and the NMOS transistor Q is connected to the main control module 4. i,1 The source (S) terminal of the PMOS transistor is connected to the drain (D) terminal of NMOS transistor Q1 and the drain (D) terminal of NMOS transistor Q4. i,2 The source (S) of transistor Q1 is connected to the drain (D) of PMOS transistor Q2 and PMOS transistor Q3. The gate (G) of NMOS transistor Q1, the gate (G) of PMOS transistor Q2, the gate (G) of PMOS transistor Q3, and the gate (G) of NMOS transistor Q4 are connected to the main control module 4. The main control module 4 controls the turn-on / off state of each NMOS and PMOS transistor. Here, i takes all integers from 1 to N+1, and j takes all integers from 1 to N.

[0039] like Figure 3 As shown, the active balancing method for power batteries in this embodiment uses the aforementioned active balancing system for power batteries. In this method, the main control module 4 performs the following steps:

[0040] Step 1: After receiving the active balancing command, enable the active balancing function and set the error threshold. and the standard deviation threshold of electricity Then proceed to step two. In this embodiment, the standard deviation threshold for battery power is... The error threshold is set to 0.5 coulombs. The initial value is set to 0.5 coulombs.

[0041] Step 2: Using the voltage and temperature information of N series-connected and sequentially numbered individual cells, calculate the charge C1, C2, C3, ..., C of each individual cell before equalization. N Then, proceed to step three. The method by which the main control module 4 calculates the charge of each individual cell using the state-of-charge method based on the relationship between the voltage (detected by the battery voltage monitoring module 1), temperature (detected by the battery temperature monitoring module 2), and battery capacity is existing technology.

[0042] Step 3: Using the formula: Calculate the standard deviation C of the charge of N series-connected and sequentially numbered individual cells of the power battery before equalization. σ Then proceed to step four. (The sentence is incomplete and requires more context.) Right now C1, C2, C3, ..., C N The average value.

[0043] Step 4: Determine if If yes, then (indicating that the power battery needs to be balanced) proceed to step five; otherwise (indicating that the power battery does not need to be balanced) end.

[0044] Step 5: Determine if the power battery is in a discharging state. If yes, proceed to Step 6; otherwise, proceed to Step 16.

[0045] Step 6: Control NMOS transistor Q1 and PMOS transistor Q2 to turn on, and control PMOS transistor Q3 and NMOS transistor Q4 to turn off, then proceed to step 7.

[0046] Step 7: Using the formula: Calculate the first discharge equalization charge threshold C oth1 Using the formula: Calculate the second discharge equalization charge threshold C eth1 Then proceed to step eight. Where, C omin This represents the minimum charge of all odd-numbered individual cells before equalization (if N is even, then C). omin =min{C1, C3, ..., C N-1 If N is odd, then C omin =min{C1, C3, ..., C N}), C emin This represents the minimum charge of all even-numbered individual cells before equalization (if N is even, then C). emin =min{C2, C4, ..., C N If N is odd, then C emin =min{C2, C4, ..., C N-1}).

[0047] Step 8: Control the PMOS transistor Q x，2 and NMOS transistor Q x+1，1 The circuit is turned on, and the remaining NMOS and PMOS transistors in the N+1 equalization switch circuits are turned off (corresponding to the opening of the discharge equalization circuit for all odd-numbered individual cells, and all odd-numbered individual cells are simultaneously discharged and equalized), controlling the energy storage module 3 to charge, and then executing step nine. Here, x takes all odd numbers from 1 to N in sequence.

[0048] Step 9: Using the formula: Calculate the charge C′ of cell number x during the equalization process. x Then proceed to step ten. Here, t represents the equilibrium time, and η represents the Coulomb efficiency (a known parameter). Represents resistance R x The voltage difference across the two ends (by the voltage detection module U) x (Detected) Represents resistance R x+1 The voltage difference across the two ends (by the voltage detection module U) x+1 (Detected), C x This indicates the charge level of cell number x before equalization.

[0049] Step 10: Turn off the PMOS and NMOS transistors in the discharge circuit of the individual cells that meet the conditions for paused discharge equalization, and then proceed to Step 11. Wherein, if If the condition is met, it means that cell number x meets the conditions for pausing discharge and equalization; otherwise, it means that cell number x does not meet the conditions for pausing discharge and equalization.

[0050] Step 11: Determine whether all odd-numbered individual cells meet the conditions for pausing discharge and equalization. If yes, proceed to Step 12; otherwise, return to Step 9.

[0051] Step 12: Control PMOS transistor Q y 2 and NMOS transistor Q y+1，1 The circuit is turned on, and the remaining NMOS and PMOS transistors in the N+1 equalization switch circuits are turned off (corresponding to the opening of the discharge equalization circuit for all even-numbered individual cells, and all even-numbered individual cells are simultaneously discharged and equalized), controlling the energy storage module 3 to charge, and then executing step thirteen. Here, y takes all even numbers from 2 to N in sequence.

[0052] Step 13: Using the formula: Calculate the charge C′ of cell number y during the equalization process. y Then proceed to step fourteen. This represents the voltage difference across resistor Ry (as indicated by voltage detection module U). y (Detected) Represents resistance R y+1 The voltage difference between the two ends (by the voltage detection module U) y+1 (Detected), C y This indicates the charge level of cell number y before equalization.

[0053] Step Fourteen: Turn off the PMOS and NMOS transistors in the discharge circuit of the individual cells that meet the conditions for paused discharge equalization, and then proceed to Step Fifteen. Wherein, if If yes, it means that cell number y meets the conditions for paused discharge equalization; otherwise, it means that cell number y does not meet the conditions for paused discharge equalization.

[0054] Step 15: Determine whether all even-numbered individual cells meet the conditions for pausing discharge and equalization. If yes, proceed to step 27; otherwise, return to step 13.

[0055] Step 16: Determine if the power battery is charging. If yes, proceed to Step 17; otherwise, end the process.

[0056] Step 17: Turn off NMOS transistor Q1 and PMOS transistor Q2, and turn on PMOS transistor Q3 and NMOS transistor Q4. Then proceed to step 18.

[0057] Step 18: Using the formula: Calculate the first charging equalization power threshold C oth2 Using the formula: Calculate the second charging equalization power threshold C eth2 Then proceed to step nineteen. Where C... omax C represents the maximum charge of all odd-numbered individual cells before equalization (if N is even, then C). omax =max{C1, C3, ..., C N-1 If N is odd, then C omax =max{C1, C3, ..., C N}); C emax This represents the maximum charge among all even-numbered individual cells before equalization (if N is even, then C). emax =max{C2, C4, ..., C N If N is odd, then C emax =max{C2, C4, ..., C N-1}).

[0058] Step 19: Control NMOS transistor Q x，1 and PMOS transistor Q x+1，2 Turn on the circuit, turn off the remaining NMOS and PMOS transistors in the N+1 equalization switch circuits (corresponding to the charging equalization circuit of all odd-numbered individual cells being turned on, and all odd-numbered individual cells being charged and equalized simultaneously), control the energy storage module 3 to discharge, and then execute step 20.

[0059] Step 20: Using the formula: Calculate the charge C′ of cell number x during the equalization process. x Then proceed to step twenty-one.

[0060] Step 21: Turn off the PMOS and NMOS transistors in the charging circuit of the individual battery cell that meets the pause charging equalization condition, and then proceed to step 22. Wherein, if If the condition is met, it means that cell number x meets the conditions for pausing charging for equalization; otherwise, it means that cell number x does not meet the conditions for pausing charging for equalization.

[0061] Step 22: Determine whether all odd-numbered individual cells meet the condition for pausing charging and equalization. If yes, proceed to step 23; otherwise, return to step 20.

[0062] Step 23: Control NMOS transistor Q y，1 and PMOS transistor Q y+1，2Turn on the circuit, turn off the remaining NMOS and PMOS transistors in the N+1 equalization switch circuits (corresponding to the charging equalization circuit of all even-numbered individual cells being turned on, and all even-numbered individual cells being charged and equalized simultaneously), control the energy storage module 3 to discharge, and then execute step twenty-four.

[0063] Step 24: Using the formula: Calculate the charge C′ of cell number y during the equalization process. y Then proceed to step twenty-five.

[0064] Step 25: Turn off the PMOS and NMOS transistors in the charging circuit of the individual battery cell that meets the pause charging equalization condition, and then proceed to step 26. Wherein, if If the condition is met, it means that cell number y meets the conditions for pausing charging for equalization; otherwise, it means that cell number y does not meet the conditions for pausing charging for equalization.

[0065] Step 26: Determine whether all even-numbered individual cells meet the condition for pausing charging and equalization. If yes, proceed to step 27; otherwise, return to step 24.

[0066] Step 27: Using the formula: Calculate the standard deviation C′ of the charge of the N series-connected and sequentially numbered individual cells of the power battery after the equalization process is paused. σ Then proceed to step twenty-eight. Among them, Right now Let C′1, C′2, C′3, ..., C′ be the numbers. N The average value.

[0067] Step 28: Determine if If yes (indicating that the power battery does not meet the uniformity requirement), proceed to step 29; otherwise (indicating that the power battery meets the uniformity requirement), proceed to step 30.

[0068] Step 29, Setting (imminent error threshold) Reduce by half to the original value. C j =C′ j (soon C′) j The value assigned to C i Then return to step five.

[0069] Step 30: Turn off all PMOS and NMOS transistors (exit equalization), and then end.

[0070] This embodiment also provides a vehicle that includes the above-described active balancing system for power batteries.

Claims

1. A power battery active balancing system, comprising a battery voltage monitoring module (1), a battery temperature monitoring module (2), an energy storage module (3), and a main control module (4); the battery voltage monitoring module (1) and the battery temperature monitoring module (2) are connected to the main control module (4) to send the voltage and temperature information of N serially connected and sequentially numbered individual batteries to the main control module; the main control module (4) is connected to the energy storage module (3) to control the charging or discharging of the energy storage module (3); characterized in that: It also includes a charging DC-DC module (5), a discharging DC-DC module (6), N+1 equalization switch modules, a discharge master switch (7) and a charging master switch (8); the discharge master switch (7) includes an NMOS transistor Q1 and a PMOS transistor Q2, and the charging master switch (8) includes a PMOS transistor Q3 and an NMOS transistor Q4; The source (S) of NMOS transistor Q1 is connected to the positive input terminal of the discharge DC-DC module (6), the source (S) of PMOS transistor Q2 is connected to the negative input terminal of the discharge DC-DC module (6), the positive output terminal of the discharge DC-DC module (6) is connected to the positive terminal of the energy storage module (3), and the negative output terminal is connected to the negative terminal of the energy storage module (3); the positive input terminal of the charging DC-DC module (5) is connected to the positive terminal of the energy storage module (3), the negative input terminal is connected to the negative terminal of the energy storage module (3), the positive output terminal is connected to the source (S) of PMOS transistor Q3, and the negative output terminal is connected to the source (S) of NMOS transistor Q4. The i-th equalization switch module includes a resistor R. i Voltage detection module U i NMOS transistor Q i,1 and PMOS transistor Q i,2 Voltage detection module U i With resistance R i Connect the main control module (4) to the detected resistance R. i The voltage difference between the two ends is sent to the main control module, and the resistor R i One end is connected to the NMOS transistor Q i,1 The drain and PMOS transistor Q i,2 The drain terminal is connected, and the resistor R j The other end is connected to the negative terminal of cell j, with resistance R. N+1 The other end is connected to the positive terminal of the Nth cell, and the NMOS transistor Q... i,1 The gate of the PMOS transistor, Q i,2 The gate (G) of the NMOS transistor is connected to the main control module (4), and the gate (Q) of the NMOS transistor is connected to the main control module (4). i,1 The source (S) terminal of the PMOS transistor is connected to the drain (D) terminal of NMOS transistor Q1 and the drain (D) terminal of NMOS transistor Q4. i,2 The source (S) of the transistor is connected to the drain (D) of PMOS transistor Q2 and the drain (D) of PMOS transistor Q3. The gate (G) of NMOS transistor Q1, the gate (G) of PMOS transistor Q2, the gate (G) of PMOS transistor Q3, and the gate (G) of NMOS transistor Q4 are connected to the main control module (4) respectively. Among them, i takes all integers from 1 to N+1 in sequence, and j takes all integers from 1 to N in sequence. The main control module (4) is configured to: when the power battery is in a discharging state and needs to be balanced, first control the discharge main switch (7) to be turned on and the charging main switch (8) to be turned off, then control N+1 balancing switch circuits and energy storage module (3) to discharge all odd-numbered individual cells or all even-numbered individual cells to charge the energy storage module (3) until all odd-numbered individual cells or all even-numbered individual cells meet the conditions for pausing discharge balancing; then continue to control N+1 balancing switch circuits and energy storage module (3) to discharge the remaining individual cells to charge the energy storage module (3) until the remaining individual cells meet the conditions for pausing discharge balancing. Discharge balancing conditions: When the power battery is in a charging state and needs to be balanced, first control the discharge main switch (7) to be turned off and the charging main switch (8) to be turned on, then control the energy storage module (3) and N+1 balancing switch circuits to discharge the energy storage module (3) to charge all odd-numbered single cells or all even-numbered single cells until all odd-numbered single cells or all even-numbered single cells meet the pause charging balancing conditions; then continue to control the energy storage module (3) and N+1 balancing switch circuits to discharge the energy storage module (3) to charge the remaining single cells until the remaining single cells meet the pause charging balancing conditions.

2. A method for active balancing of power batteries, characterized in that: The method of using the active balancing system for power batteries as described in claim 1 includes: When the power battery is in a discharging state and needs to be balanced, the main control module (4) first controls the discharge main switch (7) to be turned on and the charging main switch (8) to be turned off, and then controls N+1 balancing switch circuits and energy storage module (3) to discharge all odd-numbered individual cells or all even-numbered individual cells to charge the energy storage module (3) until all odd-numbered individual cells or all even-numbered individual cells meet the conditions for pausing discharge balancing; then it continues to control N+1 balancing switch circuits and energy storage module (3) to discharge the remaining individual cells to charge the energy storage module (3) until the remaining individual cells meet the conditions for pausing discharge balancing; finally, it determines whether the power battery meets the uniformity requirements. If it does, it exits the balancing process; if it does not, it continues the discharge balancing process. When the power battery is charging and needs to be balanced, the main control module (4) first controls the discharge main switch (7) to be turned off and the charging main switch (8) to be turned on. Then it controls the energy storage module (3) and N+1 equalization switch circuits to discharge the energy storage module (3) to charge all odd-numbered individual cells or all even-numbered individual cells until all odd-numbered individual cells or all even-numbered individual cells meet the conditions for pausing charging and balancing. Then it continues to control the energy storage module (3) and N+1 equalization switch circuits to discharge the energy storage module (3) to charge the remaining individual cells until the remaining individual cells meet the conditions for pausing charging and balancing. Finally, it determines whether the power battery meets the uniformity requirements. If it does, it exits the balancing process. If it does not, it continues the charging and balancing process.

3. The active balancing method for power batteries according to claim 2, characterized in that: If the standard deviation of the charge of the N series-connected and sequentially numbered individual cells of the power battery before equalization is greater than the standard deviation threshold of the charge... This indicates that the power battery needs to be balanced; If the standard deviation of the charge of the N series-connected and sequentially numbered individual cells of the power battery after the equalization process is paused is less than or equal to the standard deviation threshold of the charge. This indicates that the power battery meets the uniformity requirement.

4. The active balancing method for power batteries according to claim 3, characterized in that: When the power battery is in a discharging state, if during the equalization process This indicates that cell number x meets the condition for paused discharge equalization; where, This represents the charge level of cell number x during the balancing process. This indicates the first discharge equalization charge threshold. , This represents the minimum charge value among all odd-numbered individual cells before equalization. This represents the error threshold, where x takes all odd numbers from 1 to N. When the power battery is in a discharging state, if during the equalization process This indicates that cell number y meets the condition for paused discharge equalization; where, This represents the charge level of cell number y during the balancing process. This indicates the second discharge equalization capacity threshold. , This represents the minimum charge value among all even-numbered individual cells before equalization, with y taking all even numbers from 2 to N.

5. The active balancing method for power batteries according to claim 4, characterized in that: When the power battery is charging, if during the equalization process This indicates that cell number x meets the condition for paused charging equalization; where, This indicates the first charging equalization power threshold. , This represents the maximum charge capacity among all odd-numbered individual cells before equalization. When the power battery is charging, if during the equalization process This indicates that cell number y meets the condition for paused charging equalization; where, This indicates the second charging equalization power threshold. , This represents the maximum charge capacity among all even-numbered individual cells before equalization.

6. The active balancing method for power batteries according to claim 5, characterized in that: Using the formula: Calculate the charge of cell j during the equalization process. ;in, Indicates the equilibrium time. Indicates Coulomb efficiency. Represents resistance R j Pressure difference at both ends, Represents resistance R j+1 Pressure difference at both ends, This indicates the charge level of cell j before equalization.

7. The active balancing method for power batteries according to claim 6, characterized in that: After all individual cells meet the conditions for pausing charging / discharging for equalization, if the power battery does not meet the uniformity requirements, the error threshold should be reduced. and will The value assigned to Then continue with the charging / discharging balancing process.

8. The active balancing method for power batteries according to any one of claims 2 to 7, characterized in that: The method of controlling N+1 equalization switch circuits and energy storage module (3) to discharge all odd-numbered individual cells to charge energy storage module (3) is as follows: control PMOS transistor Q x,2 and NMOS transistor Q x+1,1 Turn on, and turn off the remaining NMOS and PMOS transistors in the N+1 equalization switching circuits; The method of controlling N+1 equalization switch circuits and energy storage module (3) to discharge all even-numbered individual cells to charge energy storage module (3) is as follows: control PMOS transistor Q y,2 and NMOS transistor Q y+1,1 Turn on, and turn off the remaining NMOS and PMOS transistors in the N+1 equalization switching circuits; The method of controlling the energy storage module (3) and N+1 equalization switch circuits to discharge the energy storage module (3) to charge all odd-numbered individual cells is as follows: control the NMOS transistor Q x,1 and PMOS transistor Q x+1,2 Turn on, and turn off the remaining NMOS and PMOS transistors in the N+1 equalization switching circuits; The method of controlling the energy storage module (3) and N+1 equalization switch circuits to discharge the energy storage module (3) to charge all even-numbered individual cells is as follows: control the NMOS transistor Q y,1 and PMOS transistor Q y+1,2 Turn on, controlling the remaining NMOS and PMOS transistors in the N+1 equalization switching circuits to turn off.

9. The active balancing method for power batteries according to claim 8, characterized in that: The control of the discharge main switch (7) being turned on and the charging main switch (8) being turned off means controlling NMOS transistor Q1 and PMOS transistor Q2 to be turned on and PMOS transistor Q3 and NMOS transistor Q4 to be turned off. The control of the discharge main switch (7) being open and the charging main switch (8) being on means controlling NMOS transistor Q1 and PMOS transistor Q2 to be turned off and PMOS transistor Q3 and NMOS transistor Q4 to be turned on.

10. A vehicle, characterized in that: Including the active balancing system for power batteries as described in claim 1.

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