Current limiting circuit breaker for dc interconnection and fault clearing method thereof

Abstract

The application relates to a current-limiting type circuit breaker suitable for DC interconnection and a fault clearing method thereof, and belongs to the technical field of flexible DC interconnection. The application aims to quickly clear the fault current on the DC side of a converter station through cooperation of each branch in a current-limiting type high-voltage DC circuit breaker topology, and can inhibit the rising rate of the fault current and reduce the energy consumption requirement of a lightning arrester. The application is characterized by the following steps: establishing the current-limiting type high-voltage DC circuit breaker topology, and analyzing the fault clearing process of the current-limiting type high-voltage DC circuit breaker topology. The application has the advantages of low steady-state loss, suitability for high-voltage DC power grids, realization of fast isolation and slow energy consumption, and suitability for some working conditions with high requirements for rapidity. In conclusion, the application has the advantages of scientific method, strong applicability and good effect.

Description

Technical Field

[0001] This invention belongs to the field of flexible DC interconnect technology. Background Technology

[0002] Flexible DC interconnection technology based on modular multilevel converters (MMCs) has rapidly developed due to its unique advantages, such as flexible control methods, no need for strong grid support, and the ability to supply power from multiple sources and receive power from multiple points. Meanwhile, DC grids based on flexible DC transmission technology have received widespread attention due to their high power supply reliability and low unit transmission cost. However, due to their interconnected grid characteristics, local faults are more likely to propagate to the entire grid through the lines. Once a short-circuit fault occurs in a DC line, the energy storage components inside the converter station will quickly form a discharge loop with the fault point, causing the fault current to rapidly reach the withstand limit of the power electronic devices within milliseconds, posing a significant threat to the operation of the converter station and the DC grid.

[0003] Equipping DC circuit breakers (DCCBs) is the most direct and effective solution for handling DC faults. After a DC fault occurs, the DCCB quickly disconnects the faulty line, minimizing the impact of the fault on the DC power grid. Hybrid DCCBs, combining the advantages of both mechanical and all-solid-state DCCBs (low conduction losses and fast breaking speed), have become essential equipment in DC power grids. Currently, ABB has developed a hybrid DCCB with a rated voltage of 320kV and a rated current of 2.6kA, capable of breaking faults within 5ms, and it is widely used in DC engineering projects. However, with the increase in DC power grid voltage levels, the rate of fault current rise is faster, causing the DCCB to withstand higher transient voltage values ​​and fault current rise rates during fault current interruption, increasing the energy consumption requirements of surge arresters. Therefore, a new technical solution is urgently needed to address this problem. Summary of the Invention

[0004] The purpose of this invention is to provide a current-limiting circuit breaker and its fault clearing method suitable for DC interconnection, which can quickly clear fault current on the DC side of the converter station by coordinating the branches in the current-limiting high-voltage DC circuit breaker topology, and can suppress the rise rate of fault current and reduce the energy consumption requirements of surge arresters.

[0005] The steps of this invention are: S1. Establishment of the topology for current-limiting high-voltage DC circuit breakers The current-limiting high-voltage DC circuit breaker topology mainly consists of four parts: steady-state branch, current-limiting branch, isolation branch, and auxiliary branch; the steady-state branch is composed of an ultra-fast mechanical switch (UFD) and a load transfer switch connected in series. The current-limiting branch consists of one pre-charge capacitor and four bridge arm branches: ① The branch consisting of the main current-limiting impedances R1, L1 and thyristor valve group T1 connected in series; ② The branch consisting of the pre-charge capacitor C1 alone; ③ The branch consisting of thyristor valve groups T3 and T4; ④ The branch consisting of the auxiliary current-limiting resistor R2, thyristor valve group T2 and diode valve group D connected in series and parallel. The isolation branch consists of a unidirectional IGBT valve assembly and a surge arrester connected in parallel. The auxiliary branch consists of two parts connected in parallel: ① a branch consisting of a power-consuming resistor R3 and a diode D5 connected in series; ② a branch consisting of a pre-charge capacitor C2, a residual current switch, and a thyristor valve group T5 connected in series and parallel. S2. Analyze the fault clearing process of the current-limiting high-voltage DC circuit breaker topology. At time t0, a short circuit fault occurred on the DC line on the right side of the converter station. After a short delay, at time t1, the system detected the fault. The current-limiting high-voltage DC circuit breaker immediately applied a shutdown signal to the steady-state branch and quickly transferred the fault current through the current-limiting branch and the isolation branch. At time t2, after the UFD has acquired a certain level of insulation capability, the pre-charge capacitor C1 is charged and discharged by controlling the timing of the thyristor valve group T1 to T4 in the current limiting branch. Finally, at time t4, L1, R1, and R2 of the current limiting branch are connected in series to the fault discharge circuit of the converter station. Starting at time t4, L1, R1, and R2 are connected in series in the fault discharge circuit of the converter station, increasing the impedance of the fault discharge circuit and suppressing the amplitude and rate of rise of the fault current. At time t5, the fault current is cleared by the surge arrester in the isolation branch. At the same time, the pre-charge capacitor C2 is connected in parallel to the fault circuit to provide a certain reverse voltage and accelerate the fault isolation speed. At time t6, the fault current gradually decreases to 0, the fault line is isolated, and the voltage of C2 drops to 0 because all the stored energy is transferred to the smoothing reactor. Starting at time t6, the smoothing reactor L... dc Part of the energy is used to reverse charge C2, and part is dissipated by R3 until time t7, when the reverse charging of C2 ends and the C2 branch is turned off; from time t7 onwards, R3 continues to dissipate L dc The remaining stored energy, at time t8, R3 finishes consuming energy.

[0006] This invention offers the following advantages: 1) Low steady-state loss, suitable for high-voltage DC power grids; 2) The introduction of a current-limiting branch effectively suppresses the rate and peak value of fault current rise, reducing the technical requirements for circuit breaker breaking current; 3) The introduction of an auxiliary branch enables the smoothing reactor to have active energy-extinguishing capability, decoupling fault isolation and smoothing energy consumption, achieving fast isolation and slow energy consumption, suitable for some operating conditions requiring rapid response. In summary, this invention has the advantages of scientific methodology, strong applicability, and excellent results. Attached Figure Description

[0007] Figure 1 is a schematic diagram of the topology structure of the current-limiting high-voltage DC circuit breaker of the present invention; Figure 2 is a schematic diagram of the single-ended equivalent circuit of the topology of the current-limiting high-voltage DC circuit breaker of the present invention; Figure 3a is a schematic diagram of the current flow path in the fault detection phase (t0<t<t1) during the fault clearing process of the present invention; Figure 3b is a schematic diagram of the current flow path in the current commutation phase (t1<t<t2) during the fault clearing process of the present invention; Figure 3c is a schematic diagram of the current flow path in the current-limiting phase 1 (t2<t<t3) during the fault clearing process of the present invention; Figure 3d is a schematic diagram of the current flow path in the current-limiting phase 2 (t3<t<t4) during the fault clearing process of the present invention; Figure 3e is a schematic diagram of the current flow path in the current-limiting phase 3 (t4<t<t5) during the fault clearing process of the present invention; Figure 3f is a schematic diagram of the current flow path in the current interruption phase (t5<t<t6) during the fault clearing process of the present invention; Figure 3g is a schematic diagram of the current flow path in the energy dissipation phase 1 (t6<t<t7) during the fault clearing process of the present invention; Figure 3h is a schematic diagram of the current flow path in the energy dissipation phase 2 (t7<t<t8) during the fault clearing process of the present invention; Figure 4a is the relationship diagram between the pre-charged capacitor C1 and the fault current i d ; Figure 4b is the relationship diagram between the pre-charged capacitor C1 and the voltage u C1 ; Figure 5 is the relationship diagram between the main current-limiting resistor R1 and the fault current i d ; Figure 6 is the relationship diagram between the main current-limiting inductor L1 and the fault current i d ; Figure 7 is the relationship diagram between the auxiliary current-limiting resistor R2 and the fault current i d ; Figure 8 is a comparison diagram of fault currents during the fault clearing process between the present invention and the conventional hybrid DCCB; Figure 9This is a comparison chart of the surge arrester energy consumption during fault clearing of the present invention and the traditional hybrid DCCB; Figure 10 This is a diagram of the current-limiting circuit breaker proposed in this invention. Detailed Implementation

[0008] The present invention includes the following steps, which are performed sequentially: Step 1: Establishing the topology of a current-limiting high-voltage DC circuit breaker The current-limiting high-voltage direct current circuit breaker topology mainly consists of four parts: a steady-state branch, a current-limiting branch, an isolation branch, and an auxiliary branch. The steady-state branch is composed of an ultra-fast mechanical switch (UFD) and a load commutation switch (LCS) connected in series.

[0009] The current limiting branch of this invention consists of one pre-charge capacitor and four bridge arm branches: ① a branch consisting of the main current limiting impedances R1, L1 and thyristor valve group T1 connected in series; ② a branch consisting of the pre-charge capacitor C1 alone; ③ a branch consisting of thyristor valve groups T3 and T4; ④ a branch consisting of the auxiliary current limiting resistor R2, thyristor valve group T2 and diode valve group D connected in series and parallel.

[0010] The isolation branch of this invention is composed of a unidirectional IGBT valve group and a surge arrester connected in parallel.

[0011] The auxiliary branch of this invention consists of two parts connected in parallel: ① a branch consisting of a power-consuming resistor R3 and a diode D5 connected in series; ② a branch consisting of a pre-charge capacitor C2, a residual current breaker (RCB), and a thyristor valve group T5 connected in series and parallel.

[0012] Step 2: Analyze the fault clearing process of the current-limiting high-voltage DC circuit breaker topology. At time t0, a short-circuit fault occurs on the DC line on the right side of the converter station. After a short delay, at time t1, the system detects the fault. The current-limiting high-voltage DC circuit breaker immediately applies a shutdown signal to the steady-state branch and quickly transfers the fault current through the current-limiting branch and the isolation branch to ensure reliable UFD shutdown.

[0013] At time t2, after the UFD has acquired a certain level of insulation capability, the pre-charge capacitor C1 is charged and discharged by controlling the timing of the thyristor valve group T1 to T4 in the current limiting branch. Finally, at time t4, L1, R1, and R2 of the current limiting branch are connected in series to the fault discharge circuit of the converter station.

[0014] Starting at time t4, L1, R1, and R2 are connected in series in the fault discharge circuit of the converter station, increasing the impedance of the fault discharge circuit and suppressing the amplitude and rate of rise of the fault current. At time t5, the fault current is cut off by the surge arrester in the isolation branch. At the same time, the pre-charge capacitor C2 is connected in parallel to the fault circuit to provide a certain reverse voltage and accelerate the fault isolation speed. At time t6, the fault current gradually decreases to 0, the fault line is isolated, and the voltage of C2 drops to 0 because all the stored energy is transferred to the smoothing reactor.

[0015] Starting at time t6, the smoothing reactor L dc Part of the energy is used to reverse charge C2, and part is dissipated by R3 until time t7, when the reverse charging of C2 ends and the C2 branch is turned off. From time t7 onwards, R3 continues to dissipate L... dc The remaining stored energy is consumed, and at time t8, the energy consumption of R3 ends. The entire process from t0 to t8 is the fault clearing process of the current-limiting high-voltage DC circuit breaker.

[0016] The present invention will now be described in further detail with reference to the accompanying drawings: Fault clearing methods based on current-limiting high-voltage DC circuit breaker topology, such as Figures 1 to 7 As shown, the steps include the following steps, which are performed sequentially: Step 1: Establish the current-limiting high-voltage DC circuit breaker topology: The current-limiting high-voltage DC circuit breaker topology uses a bridge circuit composed of diodes as the main structure, thus having bidirectional current-limiting capability and bidirectional fault clearing capability.

[0017] The steady-state branch consisting of an ultra-fast mechanical switch (UFD) and an LCS connected in series is used for low-loss current carrying during steady-state operation of the system. The transient overvoltage after the LCS is turned off is mainly borne by the UFD. Therefore, the LCS only needs to be connected in series with a small number of IGBTs to meet the requirements.

[0018] The bridge arm branch in the current-limiting branch, consisting of the main current-limiting impedances R1 and L1 connected in series with the thyristor valve group T1, is used to suppress the rise rate of the fault current, reduce the peak value of the fault current, and also to suppress the current during the pre-charging stage, preventing excessive charging current from impacting the flexible DC power grid. By charging and discharging the pre-charging capacitor C1 in the current-limiting branch, the current flow in the four bridge arms of the current-limiting branch can be controlled, ultimately ensuring that L1 and R1 are connected in series into the fault discharge circuit. A bridge arm branch consisting only of thyristor valve groups T3 and T4 is added to the current-limiting branch, which is used to quickly transfer the fault current and ensure that the UFD is turned off under zero current conditions. A bridge arm branch consisting of the auxiliary current-limiting resistor R2, the thyristor valve group T2, and the diode valve group D connected in series is also added to the current-limiting branch. R2 can be connected in series with T2 into the fault discharge circuit, where its function is the same as R1, or it can be connected in series with T2 into the discharge circuit of C1 to suppress the discharge current of C1. After the fault is isolated, R2 can form an energy dissipation circuit with C1 through D5, T4, and dissipate the energy stored in C1, preparing for reclosing.

[0019] The isolation branch consists of only a unidirectional IGBT valve group and a surge arrester connected in parallel. The surge arrester can be connected to the circuit simply by IGBT blocking, so as to achieve rapid fault isolation.

[0020] The auxiliary branch contains two core components: a power dissipation resistor R3 and a pre-charge capacitor C2. The power dissipation resistor R3 is mainly used to absorb the energy of the smoothing reactor after fault isolation. The pre-charge capacitor C2 can form a charging circuit with the pre-charge capacitor C1, and can complete the pre-charging of C1 without the need for an external power supply. Moreover, the pre-charge capacitor C2 can be connected in parallel to the fault circuit through T5 during the current interruption process of the isolation branch to provide a certain reverse voltage and shorten the time required for fault isolation.

[0021] Step 2: Analyze the fault clearing process of the current-limiting HVDC circuit breaker topology: At time t0, a short-circuit fault occurs on the DC line on the right side of the converter station. After a brief delay, at time t1, the control and protection system detects the fault and sends a state transition command to the current-limiting HVDC circuit breaker. Upon receiving the command, the circuit breaker immediately sends a turn-off signal to the UFD and LCS of the steady-state branch, simultaneously turning on the IGBT of the isolation branch and applying trigger pulses to T3 and T4 of the current-limiting branch. The IGBT of the LCS will immediately turn off, and the fault current will quickly transfer to the branches containing T3 and T4. After a brief mechanical breaking delay (2ms), at time t2, the UFD reaches its rated opening distance.

[0022] At time t2, the UFD has a certain insulation capability and applies a trigger pulse to T2 in the current-limiting branch, while continuously triggering T1 to ensure that T1 conducts immediately upon experiencing a forward voltage drop. At the instant T2 is triggered, C1 immediately forms a discharge circuit with the fault point, and the current in the T3 branch immediately transfers to the T2 branch. Simultaneously, T3 turns off due to the reverse voltage drop from C1. At time t3, C1 has finished discharging. Subsequently, the energy storage components inside the converter station continuously reverse charge C1. T1 conducts immediately upon experiencing a forward voltage drop as the voltage of C1 reverses. As the reverse voltage of C1 increases, the current in the T4 branch gradually decreases until time t4, when the current in the T4 branch decreases to 0, and the branch containing C1 disconnects.

[0023] Starting at time t4, L1, R1, and R2 of the current-limiting branch are connected in series to the fault discharge circuit of the converter station, increasing the impedance of the fault discharge circuit and suppressing the amplitude and rate of rise of the fault current. At time t5, the IGBT of the isolation branch is turned off, the surge arrester is connected to the fault circuit, and the fault current is cut off. At the same time, the thyristor valve group T5 in the auxiliary branch is triggered, and the energy stored in C2 begins to transfer to the smoothing reactor. At time t6, the fault current gradually decreases to 0, the fault line is isolated, and all the energy stored in C2 is transferred to the smoothing reactor. At this point, the DC fault has been isolated.

[0024] The fault energy dissipation process begins at time t6. At time t6, the voltage of C2 decreases to 0 due to complete energy transfer, followed by the smoothing reactor L. dc Reverse charging of C2 begins and continues until time t7, when the reverse charging of C2 ends. T5 turns off when the current in the C2 branch drops to 0, and C2 maintains a certain reverse voltage. During the period t6 to t7, D5 conducts due to the reverse voltage, and R3 begins to dissipate L. dc Energy storage. Starting at time t7, R3 and L... dc Forming a series loop, continuing to dissipate L dc The remaining energy storage, until time t8, L dc The remaining energy storage was completely dissipated, and the DC fault was cleared.

[0025] The current-limiting branch is the core branch of the current-limiting circuit breaker topology. The parameters of the components in the current-limiting branch directly affect the current-limiting effect of the current-limiting circuit breaker topology, and thus affect the fault current amplitude that the circuit breaker withstands during fault clearing and the energy absorbed by the surge arrester. Therefore, the component parameters in the current-limiting branch should be optimized.

[0026] The selection of the pre-charge capacitor C1 in this invention: As can be seen from Figure 4, the smaller the value of C1, the lower the amplitude of the fault current and the better the current limiting effect. However, at the same time, the reverse voltage that C1 bears is greater and the number of capacitors required is greater. The selection of C1 should take into account both the current limiting effect and the number of required components.

[0027] The selection of the pre-charge capacitor R1 in this invention: (as per attached...) Figure 5 It can be seen that the larger the main current-limiting resistor R1, the better the current-limiting effect. However, the resistor size and heat dissipation requirements are directly proportional to the resistor value. The selection of the main current-limiting resistor R1 should comprehensively consider heat dissipation, economy and current-limiting effect.

[0028] The selection of the main current-limiting reactance L1 in this invention is as follows: see appendix. Figure 6 The larger the value of the main current-limiting reactor L1, the slower the secondary rise rate of the fault current, which can reduce the technical requirements for circuit breaker manufacturing. However, the corresponding engineering cost will also be higher, and its insulation and safety issues will face greater challenges. Therefore, the selection of the main current-limiting reactor L1 should be carefully considered after taking into account the above factors.

[0029] The selection of the auxiliary current-limiting resistor R2 in this invention is as follows: see appendix. Figure 7 The larger the value of the auxiliary current-limiting resistor R2, the better the current-limiting effect. However, when its value (R2 = 12Ω) no longer satisfies the constraint condition of switching from branch T3 to branch T2, the current-limiting branch switching fails, and the current-limiting circuit breaker no longer has the current-limiting function. In this case, its effectiveness is equivalent to that of a traditional hybrid DCCB. Therefore, the selection of the auxiliary current-limiting resistor R2 should first consider the switching constraint condition, and then consider the current-limiting effect.

[0030] Simulation Analysis: Based on PSCAD electromagnetic simulation software, the following system was built. Figure 10 The simulation model of the four-terminal DC power grid is shown. The DC power grid parameters are shown in Table 1.

[0031] Table 1 DC power grid parameters

[0032] To verify the superiority of the fault clearing method for the current-limiting high-voltage DC circuit breaker topology proposed in this invention, a comparative analysis is conducted between the fault clearing method of this invention and the fault clearing method of a traditional hybrid DCCB. Scheme 1 is the fault clearing method for a traditional hybrid DCCB, and Scheme 2 is the fault clearing method for the current-limiting high-voltage DC circuit breaker topology proposed in this invention. In the current-limiting high-voltage DC circuit breaker topology: the main current-limiting resistor R1 is 10Ω, the main current-limiting reactance L1 is 15mH, the auxiliary current-limiting resistor R2 is 5Ω, and the pre-charging capacitor C1 is 10uF.

[0033] A short-circuit fault occurred on Line 34, the line with the highest rated current, at 2.0 seconds. Assuming a fault detection time of 1 ms and a UFD (Ultra-Flash Filter) time of 2 ms to reach its rated opening distance, the surge arrester began to disconnect the fault current 5.5 ms after the fault occurred. A simulation comparison of the two schemes is attached. Figure 8 and attached Figure 9 .

[0034] From the appendix Figure 8 and attached Figure 9 It is evident that Scheme 1 lacks the ability to suppress fault current. The fault current rises rapidly at the same slope throughout. 5.5ms after the fault occurs, the surge arrester connects to the fault circuit and begins to disconnect the fault current. Because the current amplitude is high at the moment of disconnection, fault isolation is only achieved 6.5ms after the fault occurs, and the surge arrester absorbs a significant amount of energy. Scheme 2, after the current-limiting impedance is fully engaged, significantly reduces the secondary rise rate of the fault current. Compared to Scheme 1, the peak fault current decreases by 19.2%, and the fault current amplitude at the moment of disconnection decreases by 58.8%, significantly reducing the rise rate and peak value of the fault current. Scheme 2 completes fault isolation 5.85ms after the fault occurs, shortening the isolation time by 10% compared to Scheme 1. Furthermore, due to the introduction of an auxiliary branch, the smoothing and extinguishing energy no longer depends on the surge arrester, and the fault current amplitude is lower at the moment of disconnection. Therefore, the surge arrester in Scheme 2 absorbs 66.8% less energy than in Scheme 1.

[0035] Table 2 Performance Comparison of Two Schemes

[0036] The overall performance comparison of the two schemes is shown in Figure 2. Based on the above analysis, the fault clearing method of the current-limiting high-voltage DC circuit breaker topology proposed in this invention has significant advantages over the existing fault clearing method of hybrid DCCB and has strong applicability in DC power grids.

Claims

1. A fault clearing method for current-limiting circuit breakers suitable for DC interconnection, characterized in that: The steps are as follows: S1. Establishment of the topology for current-limiting high-voltage DC circuit breakers The current-limiting high-voltage DC circuit breaker topology consists of four parts: a steady-state branch, a current-limiting branch, an isolation branch, and an auxiliary branch, along with four diodes: D1, D2, D3, and D4. Diodes D1 and D2 are connected in reverse series and then in parallel with the steady-state branch. The current-limiting branch, the isolation branch, and the auxiliary branch are connected in series sequentially and then connected to the common cathode of diodes D1 and D2 through the current-limiting branch. The anodes of diodes D3 and D4 are both connected between the isolation branch and the auxiliary branch. The cathodes of diodes D3 and D4 are connected to the anodes of diodes D1 and D2, respectively. The cathode of diode D4 is also connected to a smoothing reactor L. dc ; The steady-state branch consists of two parts connected in series: UFD and LCS. UFD serves as the input of the steady-state branch, and LCS serves as the output of the steady-state branch. The current-limiting branch consists of thyristors T1, T2, T3, T4, diode D, capacitor C1, resistor R1, resistor R2, and inductor L1. Thyristor T2 and diode D are connected in reverse parallel and then connected in series with resistor R1, resistor R2, inductor L1, and thyristor T1. Thyristor T3 and thyristor T4 are connected in series. The two ends of capacitor C1 are connected to the cathodes of thyristor T3 and thyristor T2, respectively. Resistor R2 is connected to the anode of thyristor T3 as the input of the current-limiting branch. The cathodes of thyristor T1 and thyristor T4 are connected as the output of the current-limiting branch. The isolation branch consists of IGBTs and MOVs connected in parallel, with the emitter of the IGBT serving as the output and the collector of the IGBT serving as the input. The auxiliary branch consists of resistor R3, capacitor C2, diode D5, thyristor T5 and residual current switch RCB. Thyristor T5 and residual current switch RCB are connected in parallel and then in series with capacitor C2. The cathode of thyristor T5 is connected to capacitor C2. Resistor R3 and diode D5 are connected in series. The cathode of diode D5 serves as the input of the auxiliary branch and is connected to capacitor C2. Resistor R3 is connected to the anode of thyristor T5 as the output of the auxiliary branch and is grounded. S2. Analyze the fault clearing process of the current-limiting high-voltage DC circuit breaker topology. At time t0, a short circuit fault occurred on the DC line on the right side of the converter station. After a short delay, at time t1, the system detected the fault. The current-limiting high-voltage DC circuit breaker immediately applied a shutdown signal to the steady-state branch and quickly transferred the fault current through the current-limiting branch and the isolation branch. At time t2, after the UFD has acquired a certain level of insulation capability, the pre-charge capacitor C1 is charged and discharged by controlling the timing of thyristors T1, T2, T3, and T4 in the current-limiting branch. Finally, at time t4, the inductor L1, resistor R1, and resistor R2 of the current-limiting branch are connected in series to the fault discharge circuit of the converter station. Starting from time t4, inductor L1, resistor R1, and resistor R2 are connected in series in the fault discharge circuit of the converter station, which increases the impedance of the fault discharge circuit and suppresses the amplitude and rate of rise of the fault current. At time t5, the fault current is cut off by the surge arrester in the isolation branch. At the same time, the pre-charge capacitor C2 is connected in parallel to the fault circuit to provide a certain reverse voltage and speed up the fault isolation. At time t6, the fault current gradually decreased to 0, the faulty line was isolated, and the stored energy in capacitor C2 was completely transferred to the smoothing reactor L. dc This causes the voltage to drop to 0; Starting at time t6, the smoothing reactor L dc Part of the energy is used to reverse charge capacitor C2, and part is dissipated by resistor R3 until time t7, when the reverse charging of capacitor C2 ends and the branch of capacitor C2 is turned off; starting from time t7, resistor R3 continues to dissipate energy from smoothing reactor L. dc The remaining stored energy is consumed by resistor R3 at time t8.

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