A power supply method and device of a BBU, and a server

Abstract

The application discloses a power supply method and device of a BBU and a server, relates to the field of power supply, and is applied to a processor in a power supply control device of the BBU. When the BBU starts to supply power, the upper field effect tube and the lower field effect tube of the BUCK circuit are controlled to work in a synchronous rectification mode, and the bypass controllable switch is controlled to be turned off. When the voltage of the BBU drops to a preset voltage, the lower field effect tube is controlled to be turned off, so that the body diode of the upper field effect tube and the lower field effect tube of the BUCK circuit works in a non-synchronous rectification mode, and the bypass controllable switch is controlled to be turned off. The seamless switching of the BUCK circuit and the bypass is realized, and the damage of the reverse current, which is caused by the fact that the output voltage of the bypass is greater than the output voltage of the BUCK circuit when the two overlap, to the lower field effect tube and the inductor in the BUCK circuit is avoided, and the power supply reliability and safety of the BBU are increased.

Description

Technical Field

[0001] This invention relates to the field of power supply, and in particular to a power supply method and apparatus for a BBU (Browser Unit). This invention also relates to a server. Background Technology

[0002] To prevent server operation from being affected by external power outages, servers typically have an internal BBU (Battery Backup Unit) that can supply power to the server after an external power failure, preventing data loss. Generally, the initial supply voltage of the BBU is higher than the voltage required by the server. Therefore, during the initial power supply phase, the BBU needs to be stepped down by a BUCK circuit (voltage reduction circuit) before supplying power to the server. As the BBU discharges, its supply voltage will continuously decrease. When the supply voltage drops to a certain level, continuing to supply power through the BUCK circuit will reduce power supply efficiency, and the supply voltage will be too low to meet the server's needs. Therefore, at this point, the BBU needs to output power directly from a bypass circuit.

[0003] Please refer to Figure 1 , Figure 1 This is a schematic diagram of a power supply control device for a BBU provided by the present invention. Generally, the BUCK circuit has two field-effect transistors, namely the upper field-effect transistor Q1 and the lower field-effect transistor Q2. The BBU's power supply current supplies power to the server through inductor L1 from VOUT. The controller controls the BUCK controller to control the on / off state of the upper field-effect transistor Q1 and the lower field-effect transistor Q2, thereby enabling the BBU to be powered through the BUCK circuit. The bypass has only one bypass controllable switch, and the controller controls the on / off state of the bypass controllable switch to enable the BBU to be powered through the bypass. To achieve seamless switching of the BBU power supply process, the field-effect transistors in the bypass need to be turned on in advance, and the BUCK circuit needs to be turned off after a delay. However, when the two overlap, the output voltage of the bypass is greater than the output voltage of the BUCK circuit. When the lower field-effect transistor Q2 in the BUCK circuit is turned on, a reverse current will be generated flowing from inductor L1 to the lower field-effect transistor Q2 and then to ground, which may damage the lower field-effect transistor Q2 and inductor L1, affecting the reliability and safety of the BBU's power supply. Summary of the Invention

[0004] The purpose of this invention is to provide a power supply method and apparatus for a BBU; another purpose of this invention is to provide a server. A processor applied in a power supply control device for a BBU controls the upper and lower field-effect transistors of the BUCK circuit to operate in synchronous rectification mode and controls the bypass controllable switch to turn off when the BBU starts supplying power. When the BBU voltage drops to a preset voltage, the lower field-effect transistor is turned off, so that the body diodes of the upper and lower field-effect transistors of the BUCK circuit operate in asynchronous rectification mode and the bypass controllable switch is turned off. This achieves seamless switching between the BUCK circuit and the bypass, and avoids the backflow current generated when the bypass output voltage is greater than the BUCK circuit output voltage when they overlap, which could damage the lower field-effect transistor and inductor in the BUCK circuit, thus increasing the reliability and safety of the BBU power supply.

[0005] To solve the above technical problems, the present invention provides a power supply method for a BBU, applied to a processor in a power supply control device for a BBU. The output terminal of the processor is connected to the control terminal of the upper field-effect transistor with a body diode, the control terminal of the lower field-effect transistor with a body diode, and the control terminal of the bypass controllable switch of the bypass circuit, respectively. The BBU circuit is connected in parallel with the bypass circuit and includes:

[0006] When the BBU starts to supply power, the upper field-effect transistor and the lower field-effect transistor of the BUCK circuit are controlled to operate in synchronous rectification mode and the bypass controllable switch is controlled to be turned off.

[0007] When the voltage of the BBU drops to a preset voltage, the lower field-effect transistor is turned off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode and the bypass controllable switch is closed.

[0008] Preferably, controlling the lower field-effect transistor to turn off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode and controlling the bypass controllable switch to close, includes:

[0009] The lower field-effect transistor is controlled to turn off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode.

[0010] When the BUCK circuit operates in the asynchronous rectification mode for a first preset time, it controls the bypass controllable switch to close.

[0011] Preferably, the power supply control device further includes a BUCK controller and a rectification mode control module. The input terminal of the BUCK controller is connected to the processor, and the first output terminal is connected to the control terminal of the upper field-effect transistor. The input terminal of the rectification mode control module is connected to the second output terminal of the BUCK controller, and the output terminal is connected to the control terminal of the lower field-effect transistor in the BUCK circuit.

[0012] Controlling the upper and lower field-effect transistors of the BUCK circuit to operate in synchronous rectification mode includes:

[0013] The BUCK controller is triggered to work, and when the BUCK controller is working, its first output terminal and second output terminal output PWM signals with complementary duty cycles;

[0014] The output terminal of the rectification mode control module is controlled to output the PWM signal received at its input terminal, so that the upper field-effect transistor and the lower field-effect transistor of the BUCK circuit work in synchronous rectification mode;

[0015] Controlling the lower field-effect transistor to turn off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode, includes:

[0016] The lower field-effect transistor is turned off by the rectification mode control module;

[0017] The BUCK controller is triggered to operate. When the BUCK controller is operating, its first output terminal and second output terminal output PWM signals with complementary duty cycles, so that the body diodes of the upper field-effect transistor and the lower field-effect transistor of the BUCK circuit operate in asynchronous rectification mode.

[0018] Preferably, the rectification mode control module includes:

[0019] A first controllable switch, the control terminal of the first controllable switch is connected to the processor, the first terminal of the first controllable switch is connected to the BUCK controller, and the second terminal of the first controllable switch is connected to the first terminal of the second controllable switch and the control terminal of the lower field-effect transistor respectively.

[0020] The second controllable switch has its control terminal connected to the processor, and its second terminal grounded.

[0021] Preferably, when both the upper and lower field-effect transistors are N-type field-effect transistors, controlling the output terminal of the rectification mode control module to output the PWM signal received at its input terminal includes:

[0022] Turn off the second controllable switch;

[0023] When the second controllable switch is turned off, the first controllable switch is turned on.

[0024] Controlling the turn-off of the lower field-effect transistor via the rectification mode control module includes:

[0025] Control the first controllable switch to turn off;

[0026] When the first controllable switch is turned off, the second controllable switch is turned on.

[0027] Preferably, the first controllable switch includes:

[0028] The first optocoupler has its anode connected to the first terminal of the first resistor, its cathode grounded, and its collector connected to the emitter of the second optocoupler.

[0029] The first resistor, with its second end connected to the processor;

[0030] The second optocoupler has its anode connected to the first terminal of the second resistor, its cathode grounded, and its collector connected to the emitter of the first optocoupler.

[0031] The second resistor, the second end of the second resistor is connected to the processor.

[0032] Preferably, the second controllable switch is an NPN transistor, the collector of which is connected to the control terminal of the lower field-effect transistor, the emitter is grounded, and the base is connected to the processor.

[0033] Preferably, after controlling the lower field-effect transistor to turn off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode and controlling the bypass controllable switch to close, the method further includes:

[0034] After the BUCK circuit and the bypass of the BBU are simultaneously powered for a second preset time, the BUCK circuit is controlled to stop working.

[0035] To address the aforementioned technical problems, the present invention also provides a power supply control device for a BBU, comprising:

[0036] Memory, used to store computer programs;

[0037] BUCK circuit;

[0038] bypass;

[0039] The processor, the output terminal of which is connected to the control terminal of the upper field-effect transistor with body diode of the BUCK circuit, the control terminal of the lower field-effect transistor with body diode, and the control terminal of the bypass controllable switch of the bypass, respectively. The BUCK circuit is connected in parallel with the bypass and is used to implement the steps of the power supply method of the BBU when executing the computer program.

[0040] To address the aforementioned technical problems, the present invention also provides a server, including a server body, a BBU, and a power supply control device for the BBU, wherein the input terminal of the power supply control device for the BBU is connected to the BBU, and the output terminal is connected to the server body.

[0041] This invention provides a power supply method, apparatus, and server for a BBU (Block Activated Unit). The processor in the BBU power supply control device operates in synchronous rectification mode when the BBU starts supplying power, while controlling the upper and lower MOSFETs of the BUCK circuit to turn off the bypass controllable switch. When the BBU voltage drops to a preset voltage, the lower MOSFET is turned off, causing the body diodes of the upper and lower MOSFETs of the BUCK circuit to operate in asynchronous rectification mode, and the bypass controllable switch is turned off. This achieves seamless switching between the BUCK circuit and the bypass, and avoids the backflow current generated when the bypass output voltage is greater than the BUCK circuit output voltage, which could damage the lower MOSFET and inductor in the BUCK circuit. This increases the reliability and safety of the BBU power supply. Attached Figure Description

[0042] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the prior art and embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 A schematic diagram of the power supply control device for a BBU provided by the present invention;

[0044] Figure 2 A schematic flowchart illustrating a power supply method for a BBU provided by the present invention;

[0045] Figure 3 A schematic diagram of the structure of another power supply control device for a BBU provided by the present invention;

[0046] Figure 4 A schematic diagram illustrating the current magnitude of the inductor during the power supply process of a BBU provided by this invention;

[0047] Figure 5A schematic diagram of the structure of another power supply control device for a BBU provided by the present invention;

[0048] Figure 6 This is a schematic diagram of the structure of a server provided by the present invention. Detailed Implementation

[0049] The core of this invention is to provide a power supply method and apparatus for a BBU; another core aspect of this invention is to provide a server. The processor applied in the power supply control device for the BBU controls the upper and lower MOSFETs of the BUCK circuit to operate in synchronous rectification mode and controls the bypass controllable switch to turn off when the BBU starts supplying power. When the BBU voltage drops to a preset voltage, it controls the lower MOSFET to turn off, so that the body diodes of the upper and lower MOSFETs of the BUCK circuit operate in asynchronous rectification mode and the bypass controllable switch is turned off. This achieves seamless switching between the BUCK circuit and the bypass, and avoids the backflow current generated when the bypass output voltage is greater than the BUCK circuit output voltage, which could damage the lower MOSFET and inductor in the BUCK circuit, thus increasing the reliability and safety of the BBU power supply.

[0050] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0051] Please refer to Figure 2 , Figure 2 This is a flowchart illustrating a power supply method for a BBU provided by the present invention. The present invention provides a power supply method for a BBU, applied to a processor in a BBU power supply control device. The processor's output terminal is connected to the control terminal of the upper field-effect transistor with a body diode in the BUCK circuit, the control terminal of the lower field-effect transistor with a body diode, and the control terminal of the bypass controllable switch of the bypass circuit. The BUCK circuit and the bypass circuit are connected in parallel, including:

[0052] S11: When the BBU starts to supply power, the upper and lower field-effect transistors of the control BUCK circuit operate in synchronous rectification mode and the controllable bypass switch is turned off.

[0053] S12: When the voltage of BBU drops to the preset voltage, control the lower field-effect transistor to turn off, so that the body diodes of the upper and lower field-effect transistors of the BUCK circuit operate in asynchronous rectification mode and control the bypass controllable switch to close.

[0054] This invention divides the control of the processor in the power supply control device into two stages: First, from the start of power supply to the BBU until the BBU voltage drops to a preset voltage (obtained according to the voltage required by the server), the upper and lower MOSFETs of the BUCK circuit are controlled to operate in synchronous rectification mode, so that the BBU is powered through the synchronous rectification mode of the BUCK circuit; then, in the second stage after the BBU voltage drops to the preset voltage, the lower MOSFET is controlled to turn off. Since the lower MOSFET contains a body diode, the body diode starts to work. At this time, the upper and lower MOSFETs of the BUCK circuit operate in asynchronous rectification mode, and the bypass controllable switch is closed. At this time, the BBU is powered through the asynchronous rectification mode of the BUCK circuit and the bypass simultaneously. At this time, the body diode of the lower MOSFET can act as a clamp to prevent the reverse current generated when the lower MOSFET in the BUCK circuit is turned on, which is caused by the output voltage of the bypass being greater than the output voltage of the BUCK circuit, from the inductor to the lower MOSFET and then to ground when both are powered on simultaneously. Since the bypass is connected in parallel with the BUCK circuit, it is equivalent to the bypass short-circuiting the BUCK circuit, so the power is actually supplied through the bypass at this time.

[0055] This invention provides a power supply method for a BBU (Block Activated Unit), applied to a processor in a BBU power supply control device. When the BBU starts supplying power, the upper and lower MOSFETs of the BUCK circuit are controlled to operate in synchronous rectification mode, and the bypass controllable switch is turned off. When the BBU voltage drops to a preset voltage, the lower MOSFET is turned off, so that the body diodes of the upper and lower MOSFETs of the BUCK circuit operate in asynchronous rectification mode, and the bypass controllable switch is turned off. This achieves seamless switching between the BUCK circuit and the bypass, and avoids the backflow current generated when the bypass output voltage is greater than the BUCK circuit output voltage when they overlap, which could damage the lower MOSFET and inductor in the BUCK circuit. This increases the reliability and safety of the BBU power supply.

[0056] Based on the above embodiments:

[0057] As a preferred embodiment, controlling the lower field-effect transistor to turn off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode and controlling the bypass controllable switch to close, includes:

[0058] The lower MOSFET is turned off so that the body diodes of the upper and lower MOSFETs in the BUCK circuit operate in asynchronous rectification mode.

[0059] When the BUCK circuit operates in asynchronous rectification mode for a first preset time, the controllable bypass switch is closed.

[0060] Due to the limitations of the processor's performance, the processor cannot simultaneously control the lower MOSFET to turn off, so that the body diodes of the upper and lower MOSFETs in the BUCK circuit can operate in asynchronous rectification mode and control the bypass controllable switch to close. Therefore, in order to ensure that the BUCK circuit operates in asynchronous rectification mode before the bypass is closed for power supply, this embodiment sets a first preset time. Within the first preset time, it ensures that the BUCK's operating mode is switched from synchronous rectification mode to asynchronous rectification mode first.

[0061] This embodiment ensures that the BUCK circuit operates in asynchronous rectification mode before the bypass is closed for power supply by setting a first preset time, which further improves the safety and reliability of BBU power supply.

[0062] In a preferred embodiment, the power supply control device further includes a BUCK controller and a rectification mode control module. The input terminal of the BUCK controller is connected to the processor, and the first output terminal is connected to the control terminal of the upper field-effect transistor. The input terminal of the rectification mode control module is connected to the second output terminal of the BUCK controller, and the output terminal is connected to the control terminal of the lower field-effect transistor in the BUCK circuit.

[0063] The upper and lower MOSFETs of the BUCK circuit are controlled to operate in synchronous rectification mode, including:

[0064] The BUCK controller is triggered to work. When the BUCK controller is working, its first output terminal and second output terminal output PWM (Pulse-width modulation) signals with complementary duty cycles.

[0065] The output of the control rectification mode control module outputs the PWM signal received at its input terminal so that the upper and lower field-effect transistors of the BUCK circuit can work in synchronous rectification mode.

[0066] Controlling the lower MOSFET to turn off, so that the body diodes of the upper and lower MOSFETs in the BUCK circuit operate in asynchronous rectification mode, including:

[0067] The MOSFET is turned off by controlling the rectification mode control module;

[0068] The BUCK controller is triggered to operate. When the BUCK controller is operating, its first and second output terminals output PWM signals with complementary duty cycles, so that the body diodes of the upper and lower MOSFETs of the BUCK circuit operate in asynchronous rectification mode.

[0069] This embodiment adds a BUCK controller and a rectification mode control module. After receiving the enable signal from the processor, the BUCK controller continuously outputs PWM signals with complementary duty cycles through its first and second output terminals. The processor can only turn the BUCK controller on or off. Therefore, a rectification mode control module is set up to switch the operating mode of the BUCK circuit from synchronous rectification mode to asynchronous rectification mode. Specifically, if the BUCK circuit is to operate in synchronous rectification mode, the output terminal of the rectification mode control module is controlled to output the PWM signal received at its input terminal; if the BUCK circuit is to operate in asynchronous rectification mode, the lower MOSFET is controlled to turn off, and the PWM signal output by the BUCK controller cannot be received by the lower MOSFET. At this time, the body diode of the lower MOSFET starts to work.

[0070] This embodiment achieves the switching of the working mode of the BUCK circuit by adding a BUCK controller and a rectification mode control module, which reduces the control difficulty of the processor and is easy to design and operate.

[0071] In a preferred embodiment, the rectification mode control module includes:

[0072] The first controllable switch has its control terminal connected to the processor, its first terminal connected to the BUCK controller, and its second terminal connected to the first terminal of the second controllable switch and the control terminal of the lower field-effect transistor.

[0073] The second controllable switch has its control terminal connected to the processor, and its second terminal grounded.

[0074] This embodiment illustrates the implementation of a rectification mode control module. The module's operating mode switching function is achieved by using two controllable switches. The specific types of the first and second controllable switches are not limited; achieving the desired effect is sufficient.

[0075] In this embodiment, two controllable switches are used in combination to improve the power supply reliability of the BBU.

[0076] In a preferred embodiment, when both the upper and lower field-effect transistors are N-type field-effect transistors, the output terminal of the control rectification mode control module outputs the PWM signal received at its input terminal, including:

[0077] Turn off the second controllable switch;

[0078] When the second controllable switch is turned off, the first controllable switch is turned on.

[0079] The MOSFET is turned off by controlling the rectification mode control module, including:

[0080] Turn off the first controllable switch;

[0081] When the first controllable switch is turned off, the second controllable switch is turned on.

[0082] This embodiment describes the specific control of the first and second controllable switches when both the upper and lower MOSFETs are N-type MOSFETs: When the second controllable switch is turned off and then the first controllable switch is turned on, the output of the rectification mode control module can output the PWM signal received at its input. At this time, the BUCK circuit operates in synchronous rectification mode. When the first controllable switch is turned off and the second controllable switch is turned on, the second controllable switch in the rectification mode control module pulls the control terminal of the lower MOSFET low, turning off the lower MOSFET. The PWM signal output by the BUCK controller cannot be received by the lower MOSFET, and the body diode of the lower MOSFET starts working, causing the BUCK circuit to operate in asynchronous rectification mode. Since the BUCK controller cannot be directly grounded, the switching on and off of the first and second controllable switches has a specific order.

[0083] This embodiment demonstrates a specific control method for the first and second controllable switches when both the upper and lower field-effect transistors are N-type field-effect transistors, thereby changing the operating mode of the BUCK circuit.

[0084] In a preferred embodiment, the first controllable switch includes:

[0085] The first optocoupler has its anode connected to the first terminal of the first resistor, its cathode grounded, and its collector connected to the emitter of the second optocoupler.

[0086] The first resistor, with its second end connected to the processor;

[0087] The second optocoupler has its anode connected to the first terminal of the second resistor, its cathode grounded, and its collector connected to the emitter of the first optocoupler.

[0088] The second resistor has its second end connected to the processor.

[0089] This embodiment provides a specific implementation of the first controllable switch. Since the optocoupler has unidirectional conductivity while the PWM signal output by the BUCK controller is bidirectional, two optocouplers with opposite conduction directions are required. When both optocouplers are turned on simultaneously and the second controllable switch is turned off, the PWM signal output by the BUCK controller can control the field-effect transistor in synchronous rectification mode. When both optocouplers are turned off simultaneously and the second controllable switch is turned on, the PWM signal output by the BUCK controller cannot control the lower field-effect transistor. At this time, the lower field-effect transistor is turned off, and the BUCK circuit operates in asynchronous rectification mode.

[0090] This embodiment achieves the function of the first controllable switch by setting two optocouplers connected in parallel with opposite conduction directions. The optocouplers have the characteristic of unidirectional signal transmission, complete electrical isolation between the input and output ends, and the output signal has no effect on the input end. They have strong anti-interference ability, stable operation, no contacts, long service life, and high transmission efficiency.

[0091] In addition to the above, other controllable switches such as relays can also be used as the first controllable switch, which will not be elaborated here.

[0092] In a preferred embodiment, the second controllable switch is an NPN transistor. The collector of the NPN transistor is connected to the control terminal of the lower field-effect transistor, the emitter is grounded, and the base is connected to the processor.

[0093] In this embodiment, an NPN transistor is used as the second controllable switch. When both optocouplers are off and the NPN transistor is on, the control terminal of the lower MOSFET is grounded. At this time, the lower MOSFET is off, and the PWM signal output by the BUCK controller cannot be received by the lower MOSFET. At this time, the body diode of the lower MOSFET starts to work, and the BUCK circuit operates in asynchronous rectification mode. When both optocouplers are on and the NPN transistor is off, the PWM signal output by the BUCK controller can control the upper and lower MOSFETs in synchronous rectification mode.

[0094] The NPN transistor used in this embodiment is easy to control and has the function of amplifying current.

[0095] In addition to the above, other controllable switches can also be used as the second controllable switch, which will not be elaborated here.

[0096] Please refer to Figure 3 , Figure 3This is a schematic diagram of another power supply control device for a BBU provided by the present invention. In this invention, two optocouplers, U1 and U2, are connected in series with the gate drive signal LGATE of the synchronous rectifier MOS (Metal-Oxide-Silicon) transistor Q2. When a forward voltage is applied to the light-emitting diode of U1, its phototransistor conducts, allowing current to flow from the BUCK controller to the gate of Q2. When the BUCK controller outputs a high level LGATE_DRV, it pulls up the VGS of Q2, thus turning Q2 on. Similarly, when the phototransistor of U2 conducts, current flows from the gate of Q2 to the BUCK controller. When the BUCK controller outputs a low level LGATE_DRV, it pulls down the VGS of Q2, thus turning Q2 off. By controlling the simultaneous on and off of the two optocouplers, the gate drive signal LGATE can be controlled to turn on and off, thereby allowing the BUCK circuit to operate in synchronous rectification mode and diode rectification mode, respectively.

[0097] When the server's power supply unit experiences a power outage, such as when the 220V AC power fails, the server will switch to the BBU for temporary power. At this time, the initial open-circuit voltage of the BBU battery cell is 16V, while the system requires 12V. The BBU bypasses and outputs through the BUCK step-down converter. The BUCK circuit operates in CCM mode. During this process, the MCU outputs GATE_EN high, turning on the phototransistors U1 and U2, enabling the switching function of the synchronous rectification MOSFET Q2. Simultaneously, it outputs GATE_OFF low, turning off Q4 to prevent the gate voltage of Q2 from being continuously pulled low. The BUCK circuit operates in synchronous rectification mode, resulting in high conversion efficiency.

[0098] As the depth of discharge of the BBU increases, the cell voltage gradually decreases. When it drops to around 12V, the bypass output needs to be switched. First, at time t1, the MCU pulls the GATE_EN signal low, turning off the phototransistors U1 and U2. Simultaneously, it pulls the GATE_OFF signal high, turning on Q4, which in turn pulls the gate voltage of Q2 to 0V, turning Q2 off. Since Q2 is no longer conducting, the current in inductor L1 freewheels through the body diode of Q2 when the upper transistor Q1 is turned off. At this time, the BUCK circuit operates in diode rectification mode, with lower conversion efficiency but a shorter duration. After a 10µs delay, at time t2, the bypass switch is turned on, pulling Bypass_EN high. The cell voltage flows through the bypass MOSFET to VOUT with almost no voltage drop loss. Therefore, VOUT is slightly higher than the output of the BUCK buck converter. Inductor L1 bears a negative voltage, and the inductor current gradually decreases until it reaches 0. Due to the clamping effect of the body diode Q2, the inductor current will not continue to decrease and become a negative current. Therefore, the phenomenon of current backflow burning out the synchronous rectifier MOSFET and inductor will not occur. After another 100µs delay, at time t3, the BUCK enable is pulled low, and BBU is fully switched to bypass output.

[0099] Please refer to Figure 4 , Figure 4 This diagram illustrates the inductor current during the power supply process of a BBU (Brain Buffer Unit) according to the present invention. The horizontal axis represents time, and the vertical axis represents the inductor current magnitude. From time t1 to t2, the BBU outputs through the BUCK circuit, and the inductor current is a pulsating triangular wave. At time t2, the bypass switch is turned on, and the inductor current decreases cycle by cycle with the PWM drive signal of the controller. HGATE in the diagram represents the PWM drive signal of the upper transistor. When the upper transistor is on, the inductor current remains constant; when the upper transistor is off, the inductor current decreases. As the PWM cycle increases, the inductor current gradually decreases to 0 and remains at 0 until time t3. At time t3, the BUCK circuit is turned off, and the BBU fully switches to bypass output.

[0100] The above process shows that from the moment the BBU enters backup power until the cell voltage drops to 12V at time t1, the BBU outputs through the BUCK circuit, which operates in synchronous rectification mode, resulting in high conversion efficiency. From t1 to t2 (lasting 10µs), the BBU outputs through the BUCK circuit, which operates in diode rectification mode, resulting in lower conversion efficiency but a very short duration. From t2 to t3 (lasting 100µs), the BBU outputs simultaneously through the BUCK circuit and bypass, also for a short duration. After time t3, the BBU completely switches to bypass output. This entire process ensures high conversion efficiency, seamless switching between BUCK and bypass outputs, and avoids inductor current backflow during the switching process.

[0101] As a preferred embodiment, after controlling the lower field-effect transistor to turn off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode and controlling the bypass controllable switch to close, the method further includes:

[0102] After the BBU's BUCK circuit and bypass are simultaneously powered for a second preset time, the BUCK circuit is controlled to stop working.

[0103] The above embodiments do not consider when to stop the power supply to the BUCK circuit. This embodiment ensures seamless connection between the BUCK circuit and the bypass by setting a second preset time.

[0104] This embodiment ensures a seamless connection between the BUCK circuit and the bypass switching process, while also saving energy and reducing unnecessary consumption.

[0105] The present invention also provides a power supply control device for a BBU, comprising:

[0106] Memory 51 is used to store computer programs;

[0107] BUCK circuit 53;

[0108] Bypass 54;

[0109] The processor 52 has its output terminal connected to the control terminal of the upper field-effect transistor with body diode in the BUCK circuit 53, the control terminal of the lower field-effect transistor with body diode, and the control terminal of the bypass controllable switch in the bypass 54. The BUCK circuit 53 and the bypass 54 are connected in parallel and are used to implement the steps of the power supply method of the BBU when executing the computer program.

[0110] Please refer to Figure 5 , Figure 5 A schematic diagram of the power supply control device for another BBU provided by the present invention.

[0111] The specific implementation is as described above, which has the same effect as the power supply method for the BBU mentioned above.

[0112] The present invention also provides a server, including a server body 63, a BBU 61, and a power supply control device 62 for the BBU. The input terminal of the power supply control device 62 is connected to the BBU 61, and the output terminal is connected to the server body 63.

[0113] Please refer to Figure 6 , Figure 6 This is a schematic diagram of the structure of a server provided by the present invention.

[0114] The specific implementation is as described above, which has the same effect as the power supply method for the BBU mentioned above.

[0115] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0116] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A power supply method for a BBU, characterized in that, A processor used in the power supply control device of a BBU, wherein the output terminal of the processor is connected to the control terminal of the upper field-effect transistor with a body diode, the control terminal of the lower field-effect transistor with a body diode, and the control terminal of the bypass controllable switch of the bypass circuit, wherein the BBU circuit is connected in parallel with the bypass circuit, and includes: When the BBU starts to supply power, the upper field-effect transistor and the lower field-effect transistor of the BUCK circuit are controlled to operate in synchronous rectification mode and the bypass controllable switch is controlled to be turned off. When the voltage of the BBU drops to a preset voltage, the lower field-effect transistor is turned off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode and the bypass controllable switch is closed. The power supply control device further includes a BUCK controller and a rectification mode control module. The input terminal of the BUCK controller is connected to the processor, and the first output terminal is connected to the control terminal of the upper field-effect transistor. The input terminal of the rectification mode control module is connected to the second output terminal of the BUCK controller, and the output terminal is connected to the control terminal of the lower field-effect transistor in the BUCK circuit. Controlling the upper and lower field-effect transistors of the BUCK circuit to operate in synchronous rectification mode includes: The BUCK controller is triggered to work, and when the BUCK controller is working, its first output terminal and second output terminal output PWM signals with complementary duty cycles; The output terminal of the rectification mode control module is controlled to output the PWM signal received at its input terminal, so that the upper field-effect transistor and the lower field-effect transistor of the BUCK circuit work in synchronous rectification mode; Controlling the lower field-effect transistor to turn off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode, includes: The lower field-effect transistor is turned off by the rectification mode control module; The BUCK controller is triggered to operate. When the BUCK controller is operating, its first output terminal and second output terminal output PWM signals with complementary duty cycles, so that the body diodes of the upper field-effect transistor and the lower field-effect transistor of the BUCK circuit operate in asynchronous rectification mode. The rectification mode control module includes: A first controllable switch, the control terminal of the first controllable switch is connected to the processor, the first terminal of the first controllable switch is connected to the BUCK controller, and the second terminal of the first controllable switch is connected to the first terminal of the second controllable switch and the control terminal of the lower field-effect transistor respectively. The second controllable switch has its control terminal connected to the processor, and its second terminal grounded. When both the upper and lower field-effect transistors are N-type field-effect transistors, the output terminal of the rectification mode control module outputs the PWM signal received at its input terminal, including: Turn off the second controllable switch; When the second controllable switch is turned off, the first controllable switch is turned on. Controlling the turn-off of the lower field-effect transistor via the rectification mode control module includes: Control the first controllable switch to turn off; When the first controllable switch is turned off, the second controllable switch is turned on.

2. The power supply method for the BBU as described in claim 1, characterized in that, Controlling the lower field-effect transistor to turn off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode and controlling the bypass controllable switch to close, includes: The lower field-effect transistor is controlled to turn off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode. When the BUCK circuit operates in the asynchronous rectification mode for a first preset time, it controls the bypass controllable switch to close.

3. The power supply method for the BBU as described in claim 1, characterized in that, The first controllable switch includes: The first optocoupler has its anode connected to the first terminal of the first resistor, its cathode grounded, and its collector connected to the emitter of the second optocoupler. The first resistor, with its second end connected to the processor; The second optocoupler has its anode connected to the first terminal of the second resistor, its cathode grounded, and its collector connected to the emitter of the first optocoupler. The second resistor, the second end of the second resistor is connected to the processor.

4. The power supply method for the BBU as described in claim 3, characterized in that, The second controllable switch is an NPN transistor. The collector of the NPN transistor is connected to the control terminal of the lower field-effect transistor, the emitter is grounded, and the base is connected to the processor.

5. The power supply method for the BBU as described in any one of claims 1 to 4, characterized in that, After controlling the lower field-effect transistor to turn off, so that the body diodes of the upper and lower field-effect transistors in the BUCK circuit operate in asynchronous rectification mode and controlling the bypass controllable switch to close, the method further includes: After the BUCK circuit and the bypass of the BBU are simultaneously powered for a second preset time, the BUCK circuit is controlled to stop working.

6. A power supply control device for a BBU, characterized in that, include: Memory, used to store computer programs; BUCK circuit; bypass; The processor, the output terminal of which is connected to the control terminal of the upper field-effect transistor with body diode of the BUCK circuit, the control terminal of the lower field-effect transistor with body diode, and the control terminal of the bypass controllable switch of the bypass, respectively. The BUCK circuit is connected in parallel with the bypass and is used to implement the steps of the power supply method of the BBU as described in any one of claims 1 to 5 when executing the computer program.

7. A server, characterized in that, It includes a server body, a BBU, and a power supply control device for the BBU as described in claim 6, wherein the input terminal of the power supply control device for the BBU is connected to the BBU, and the output terminal is connected to the server body.

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