Method and apparatus for fec rate adaptation

Abstract

The present disclosure relates to methods and apparatuses, including devices, such as network, server or client devices, for graphics or data processing. In some aspects, the device can transmit a request for an updated FEC rate, the updated FEC rate based on a previous FEC rate. The device can also receive information associated with the updated FEC rate based on the request for the updated FEC rate. Additionally, the device can determine the updated FEC rate based on the received information, the received information associated with a difference between the previous FEC rate and the updated FEC rate.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of U.S. Patent Application No. 17 / 064,572, filed October 6, 2020, entitled “METHODS AND APPARATUS FOR FEC RATEADAPTATION”, the entire contents of which are expressly incorporated herein by reference. Technical Field

[0003] This disclosure generally relates to processing systems, and more specifically, to one or more techniques for data or frame processing. Background Technology

[0004] Computing devices typically utilize graphics processing units (GPUs) to accelerate the rendering of graphics data for display. Such devices can include, for example, computer workstations, mobile phones such as so-called smartphones, embedded systems, personal computers, tablet computers, and video game consoles. The GPU executes a graphics processing pipeline, which includes one or more processing stages that work together to execute graphics processing commands and output frames. The central processing unit (CPU) controls the operation of the GPU by issuing one or more graphics processing commands to it. Modern CPUs are typically capable of executing multiple applications concurrently, each of which may require the use of the GPU during execution. Devices that provide content for visual presentation on a display typically include GPUs.

[0005] Typically, a device's GPU is configured to execute processes in the graphics processing pipeline. However, with the advent of wireless communication and smaller handheld devices, there has been an increasing demand for improved graphics processing. Summary of the Invention

[0006] Below is a simplified overview of one or more aspects to provide a basic understanding of them. This overview is not a comprehensive summary of all anticipated aspects, nor is it intended to identify key elements of all aspects or to describe the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed descriptions that follow.

[0007] In one aspect of this disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a network, a server, a client device, a modem, an infrastructure component, or any apparatus capable of performing data or frame processing. The apparatus may operate or stream data based on a previous forward error correction (FEC) rate. The apparatus may also send a request for an updated FEC rate based on the previous FEC rate. The apparatus may also receive information associated with the updated FEC rate based on the request for the updated FEC rate. Additionally, the apparatus may calculate the average transport block (TB) size per frame based on the received information. The apparatus may also determine the updated FEC rate based on the received information associated with the difference between the previous FEC rate and the updated FEC rate. The apparatus may also send an indication of the updated FEC rate to the network or server. Furthermore, the apparatus may adjust the previous FEC rate to the updated FEC rate based on the received information. The apparatus may also operate or stream data based on the updated FEC rate.

[0008] In another aspect of this disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a network, server, client device, modem, infrastructure component, or any apparatus capable of performing data or frame processing. The apparatus may receive an indication of an updated forward error correction (FEC) rate based on a previous FEC rate, the received indication including the difference between the previous and updated FEC rates. The apparatus may also adjust the previous FEC rate to the updated FEC rate based on the received indication, the adjustment being based on the difference between the previous and updated FEC rates.

[0009] Details of one or more examples of this disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of this disclosure will be apparent from the description, the drawings, and the claims. Attached Figure Description

[0010] Figure 1 This is a block diagram illustrating an example of a system for generating data based on one or more techniques disclosed herein.

[0011] Figure 2 An example GPU is described according to one or more techniques according to this disclosure.

[0012] Figure 3 An example diagram illustrating the relationship between IP packet arrival time and IP packet transmission time according to one or more techniques of this disclosure is provided.

[0013] Figure 4Example diagrams illustrating FEC for video frames according to one or more techniques of this disclosure are provided.

[0014] Figure 5A and Figure 5B Example diagrams illustrating FEC for video frames according to one or more techniques of this disclosure are provided.

[0015] Figure 6 Example diagrams illustrating FEC rate adaptation according to one or more technologies of this disclosure are provided.

[0016] Figure 7A and Figure 7B Example diagrams illustrating FEC rate adaptation according to one or more technologies of this disclosure are provided.

[0017] Figure 8 An example flowchart illustrating an example method according to one or more techniques of this disclosure is provided.

[0018] Figure 9 An example flowchart illustrating an example method according to one or more techniques of this disclosure is provided. Detailed Implementation

[0019] In the current market, many cloud gaming or application platforms (such as extended reality (XR), augmented reality (AR), or virtual reality (VR) platforms) may employ FEC on video frames for reliability purposes. This FEC may occur at a fixed FEC rate. However, operating on certain types of wireless communications (such as 5G networks) presents several potential problems with a fixed FEC rate. For example, insufficient FEC, such as less than one TB, may occur, potentially leading to wasted resources, i.e., when video frames cannot be 100% recovered from a single TB loss. In some aspects, over-provisioning of FEC may also occur, potentially increasing scheduling latency for packets across video frames. Furthermore, the effectiveness of FEC in maintaining low latency (e.g., latency at the 99th percentile) may vary with the allocated TB size and the number of TBs to be transmitted to the video frame. To achieve a balance between latency performance and efficiency, adapting the FEC rate may be beneficial. Aspects of this disclosure can be associated with FEC rate adaptation, for example, based on transport block allocation. Aspects of this disclosure can also adapt the FEC rate to maintain low latency. For example, aspects of this disclosure can adapt the FEC rate based on TB size. Additionally, aspects of this disclosure can adapt the FEC rate to transmit video frames based on the number of TB.

[0020] Various aspects of the systems, apparatuses, computer program products, and methods will be described more fully below with reference to the accompanying drawings. However, this disclosure may be embodied in many different forms and should not be construed as limited to any particular structure or function presented throughout this disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art. Based on the teachings herein, those skilled in the art will understand that the scope of this disclosure is intended to cover any aspect of the systems, apparatuses, computer program products, and methods disclosed herein, whether implemented independently of or in combination with other aspects of this disclosure. For example, any number of aspects set forth herein may be used to implement an apparatus or practice method. Furthermore, the scope of this disclosure is intended to cover such apparatuses or methods that are practiced using structures, functions, or structures and functions that are supplementary to or other than the aspects of this disclosure set forth herein. Any aspect disclosed herein may be embodied by one or more elements of the claims.

[0021] While various aspects are described herein, numerous variations and arrangements of these aspects fall within the scope of this disclosure. Although some potential benefits and advantages of the aspects of this disclosure are mentioned, the scope of this disclosure is not intended to be limited to particular benefits, uses, or objectives. Rather, the aspects of this disclosure are intended to be broadly applicable to different wireless technologies, system configurations, networks, and transport protocols, some of which are illustrated by way of example in the accompanying drawings and the following description. The detailed description and accompanying drawings are illustrative only and not limiting of this disclosure, the scope of which is defined by the appended claims and their equivalents.

[0022] Several aspects are presented with reference to various apparatuses and methods. These apparatuses and methods are described in detail below and illustrated in the accompanying drawings by various blocks, components, circuits, processes, algorithms, etc. (collectively, "elements"). These elements can be implemented using electronic hardware, computer software, or any combination thereof. Whether these elements are implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system.

[0023] For example, an element, any part of an element, or any combination of elements can be implemented as a “processing system” comprising one or more processors (which may also be referred to as processing units). Examples of processors include microprocessors, microcontrollers, graphics processing units (GPUs), general-purpose GPUs (GPGPUs), central processing units (CPUs), application processors, digital signal processors (DSPs), reduced instruction set computing (RISC) processors, system-on-a-chip (SoCs), baseband processors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gate logic, discrete hardware circuits, and other suitable hardware configured to perform the various functions described in this disclosure. One or more processors in a processing system can execute software. Software can be interpreted broadly as instructions, instruction sets, code, code segments, program code, programs, subroutines, software components, applications, software applications, software packages, routines, subroutines, objects, executable files, threads of execution, procedures, functions, etc., whether referring to software, firmware, middleware, microcode, hardware description languages, or others. The term application can refer to software. As described herein, one or more technologies can refer to an application configured to perform one or more functions, i.e., software. In such examples, the application may be stored on memory, such as the processor's on-chip memory, system memory, or any other memory. The hardware described herein, such as a processor, may be configured to execute the application. For example, the application may be described as including code that, when executed by the hardware, causes the hardware to perform one or more techniques described herein. As an example, the hardware may access code from memory and execute the code accessed from memory to perform one or more techniques described herein. In some examples, components are identified in this disclosure. In such examples, the component may be hardware, software, or a combination thereof. These components may be individual components or subcomponents of a single component.

[0024] Therefore, in one or more examples described herein, the described functionality can be implemented in hardware, software, or any combination thereof. If implemented in software, the functionality can be stored on or encoded as one or more instructions or code on a computer-readable medium. Computer-readable media includes computer storage media. Storage media can be any available medium that is accessible to a computer. By way of example and not limitation, such computer-readable media can include random access memory (RAM), read-only memory (ROM), electrically erasable programmable ROM (EEPROM), optical disk storage, magnetic disk storage, other magnetic storage devices, combinations of computer-readable media of the types described above, or any other medium that can be used to store computer-executable code in the form of computer-accessible instructions or data structures.

[0025] In general, this disclosure describes techniques for having a graphics processing pipeline in a single device or multiple devices, improving the rendering of graphics content, and / or reducing the load on processing units (i.e., any processing unit such as a GPU configured to perform one or more of the techniques described herein). For example, this disclosure describes techniques for performing graphics processing in any device that utilizes graphics processing. Other example benefits are described throughout this disclosure.

[0026] As used herein, instances of the term "content" can refer to "graphic content," "image," and vice versa. This is true regardless of whether the term is used as an adjective, noun, or other part of speech. In some examples, as used herein, the term "graphic content" can refer to content produced by one or more processes in the graphics processing pipeline. In some examples, as used herein, the term "graphic content" can refer to content produced by a processing unit configured to perform graphics processing. In some examples, as used herein, the term "graphic content" can refer to content produced by a graphics processing unit.

[0027] In some examples, as used herein, the term "display content" can refer to content generated by a processing unit configured to perform display processing. Graphical content can be processed into display content. For example, a graphics processing unit can output graphical content, such as frames, to a buffer (which may be referred to as a frame buffer). The display processing unit can read graphical content, such as one or more frames, from the buffer and perform one or more display processing techniques on it to generate display content. For example, the display processing unit can be configured to perform compositing on one or more rendered layers to generate frames. As another example, the display processing unit can be configured to composite, blend, or otherwise combine two or more layers into a single frame. The display processing unit can be configured to perform scaling on the frame, such as zooming in or out. In some examples, a frame can refer to a layer. In other examples, a frame can refer to two or more layers that have been blended together to form a frame; that is, a frame comprises two or more layers, and frames comprising two or more layers can subsequently be blended.

[0028] Figure 1This is a block diagram illustrating an example content generation system 100 configured to implement one or more technologies of this disclosure. The content generation system 100 includes a device 104. Device 104 may include one or more components or circuitry for performing the various functions described herein. In some examples, one or more components of device 104 may be components of a System-on-a-Chip (SOC). Device 104 may include one or more components configured to perform one or more technologies of this disclosure. In the illustrated example, device 104 may include a processing unit 120, a content encoder / decoder 122, and system memory 124. In some aspects, device 104 may include multiple optional components, such as a communication interface 126, a transceiver 132, a receiver 128, a transmitter 130, a display processor 127, and one or more displays 131. Reference to display 131 may refer to one or more displays 131. For example, display 131 may include a single display or multiple displays. Display 131 may include a first display and a second display. The first display may be a left-eye display and the second display may be a right-eye display. In some examples, the first and second displays may receive different frames for rendering thereon. In other examples, the first and second displays may receive the same frames to render on them. In further examples, the results of graphics processing may not be displayed on the device; for example, the first and second displays may not receive any frames to render on them. Instead, the frames or graphics processing results may be transmitted to another device. In some respects, this can be called segmented rendering.

[0029] Processing unit 120 may include internal memory 121. Processing unit 120 may be configured to perform graphics processing, such as in graphics processing pipeline 107. Content encoder / decoder 122 may include internal memory 123. In some examples, device 104 may include a display processor, such as display processor 127, to perform one or more display processing techniques on one or more frames generated by processing unit 120 before being rendered by one or more displays 131. Display processor 127 may be configured to perform display processing. For example, display processor 127 may be configured to perform one or more display processing techniques on one or more frames generated by processing unit 120. One or more displays 131 may be configured to display or otherwise render the frames processed by display processor 127. In some examples, one or more displays 131 may include one or more of the following: liquid crystal display (LCD), plasma display, organic light-emitting diode (OLED) display, projection display device, augmented reality display device, virtual reality display device, head-mounted display, or any other type of display device.

[0030] External memory (e.g., system memory 124) of processing unit 120 and content encoder / decoder 122 may be accessible to processing unit 120 and content encoder / decoder 122. For example, processing unit 120 and content encoder / decoder 122 may be configured to read from and / or write to external memory, such as system memory 124. Processing unit 120 and content encoder / decoder 122 may be communicatively coupled to system memory 124 via a bus. In some examples, processing unit 120 and content encoder / decoder 122 may be communicatively coupled to each other via a bus or a different connection.

[0031] Content encoder / decoder 122 can be configured to receive graphical content from any source, such as system memory 124 and / or communication interface 126. System memory 124 can be configured to store received encoded or decoded graphical content. Content encoder / decoder 122 can be configured to receive encoded or decoded graphical content from system memory 124 and / or communication interface 126, for example, in the form of encoded pixel data. Content encoder / decoder 122 can be configured to encode or decode any graphical content.

[0032] Internal memory 121 or system memory 124 may include one or more volatile or non-volatile memories or storage devices. In some examples, internal memory 121 or system memory 124 may include RAM, SRAM, DRAM, erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, magnetic data media or optical storage media, or any other type of memory.

[0033] According to some examples, internal memory 121 or system memory 124 may be a non-transitory storage medium. The term "non-transitory" may indicate that the storage medium is not embodied in a carrier wave or a propagating signal. However, the term "non-transitory" should not be construed as meaning that internal memory 121 or system memory 124 is immovable or that its contents are static. As one example, system memory 124 may be removed from device 104 and moved to another device. As another example, system memory 124 may not be removable from device 104.

[0034] Processing unit 120 may be a central processing unit (CPU), a graphics processing unit (GPU), a general-purpose GPU (GPGPU), or any other processing unit that can be configured to perform graphics processing. In some examples, processing unit 120 may be integrated into the motherboard of device 104. In some examples, processing unit 120 may reside on a graphics card mounted in a port on the motherboard of device 104, or may otherwise be incorporated into a peripheral device configured to interoperate with device 104. Processing unit 120 may include one or more processors, such as one or more microprocessors, GPUs, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), arithmetic logic units (ALUs), digital signal processors (DSPs), discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuits, or any combination thereof. If these techniques are partially implemented in software, processing unit 120 may store instructions for software in a suitable, non-transitory computer-readable storage medium (e.g., internal memory 121), and may use one or more processors to execute the instructions in hardware to perform the techniques of this disclosure. Any of the foregoing (including hardware, software, combinations of hardware and software, etc.) may be considered as one or more processors.

[0035] The content encoder / decoder 122 can be any processing unit configured to perform content decoding. In some examples, the content encoder / decoder 122 can be integrated into the motherboard of device 104. The content encoder / decoder 122 may include one or more processors, such as one or more microprocessors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), arithmetic logic units (ALUs), digital signal processors (DSPs), video processors, discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuits, or any combination thereof. If these techniques are partially implemented in software, the content encoder / decoder 122 may store instructions for software in a suitable, non-transitory computer-readable storage medium (e.g., internal memory 123), and the techniques of this disclosure may be executed in hardware using one or more processors. Any of the foregoing (including hardware, software, combinations of hardware and software, etc.) can be considered as one or more processors.

[0036] In some aspects, the content generation system 100 may include an optional communication interface 126. Communication interface 126 may include a receiver 128 and a transmitter 130. Receiver 128 may be configured to perform any of the receiving functions described herein with respect to device 104. Additionally, receiver 128 may be configured to receive information from another device, such as eye or head position information, rendering commands, or positioning information. Transmitter 130 may be configured to perform any of the transmitting functions described herein with respect to device 104. For example, transmitter 130 may be configured to transmit information to another device, which may include a request for content. Receiver 128 and transmitter 130 may be combined to form transceiver 132. In such instances, transceiver 132 may be configured to perform any of the receiving and / or transmitting functions described herein with respect to device 104.

[0037] Refer again Figure 1 In some aspects, the graphics processing pipeline 107 may include a determination component 198 configured to operate or stream data based on a previous forward error correction (FEC) rate. The determination component 198 may also be configured to send a request for an updated FEC rate based on the previous FEC rate. The determination component 198 may also be configured to receive information associated with an updated FEC rate based on the request for the updated FEC rate. The determination component 198 may also be configured to calculate the average transport block (TB) size per frame based on the received information. The determination component 198 may also be configured to determine the updated FEC rate based on the received information associated with the difference between the previous FEC rate and the updated FEC rate. The determination component 198 may also be configured to send an indication of the updated FEC rate to a network or server. The determination component 198 may also be configured to adjust the previous FEC rate to the updated FEC rate based on the received information. The determination component 198 may also be configured to operate or stream data based on the updated FEC rate. In some aspects, determining component 198 can also be configured to receive an indication of an updated forward error correction (FEC) rate, the updated FEC rate being based on a previous FEC rate, the received indication including the difference between the previous FEC rate and the updated FEC rate. Determining component 198 can also be configured to adjust the previous FEC rate to the updated FEC rate based on the received indication, the adjustment being based on the difference between the previous FEC rate and the updated FEC rate.

[0038] As described herein, a device such as device 104 can refer to any device, apparatus, or system configured to perform one or more of the techniques described herein. For example, a device can be a server, base station, user equipment, client device, site, access point, computer (e.g., personal computer, desktop computer, laptop computer, tablet computer, computer workstation, or mainframe computer), end product, apparatus, telephone, smartphone, server, video game platform or terminal, handheld device (e.g., portable video game device or personal digital assistant (PDA)), wearable computing device (e.g., smartwatch, augmented reality device, or virtual reality device), non-wearable device, display or display device, television set, set-top box, intermediate network device, digital media player, video streaming device, content streaming device, in-vehicle computer, any mobile device, any device configured to generate graphical content, or any device configured to perform one or more of the techniques described herein. The processes herein can be described as being performed by a specific component (e.g., GPU), but in further embodiments, other components (e.g., CPU) may be used for execution, consistent with the disclosed embodiments.

[0039] GPUs can process various types of data or data packets within the GPU pipeline. For example, in some aspects, a GPU can process two types of data or data packets, such as context register packets and drawing call data. Context register packets can be a set of global state information, such as information about global registers, shaders, or constant data, which can adjust how the graphics context is processed. For example, a context register packet may include information about color formats. In some aspects of a context register packet, there may be a bit indicating which workload belongs to the context register. Furthermore, multiple functions or programs can run simultaneously and / or in parallel. For example, a function or program may describe an operation, such as a color mode or color format. Therefore, context registers can define multiple states of the GPU.

[0040] Context states can be used to determine how individual processing units operate, such as vertex fetchers (VFDs), vertex shaders (VSs), shader processors, or geometry processors, and / or in what modes a processing unit operates. For this purpose, the GPU can use context registers and programming data. In some aspects, the GPU can generate workloads in the pipeline based on the mode or state defined by the context registers, such as vertex or pixel workloads. Certain processing units (e.g., VFDs) can use these states to determine certain functions, such as how to assemble vertices. Because these modes or states can change, the GPU may need to modify the corresponding context. Furthermore, the workload corresponding to a mode or state can follow the changing mode or state.

[0041] Figure 2 This describes an example GPU 200 based on one or more technologies according to this disclosure. For example... Figure 2 As shown, GPU 200 includes a command processor (CP) 210, a drawing call group 212, a VFD 220, a VS 222, a vertex cache (VPC) 224, a triangle setup engine (TSE) 226, a rasterizer (RAS) 228, a Z-process engine (ZPE) 230, a pixel interpolator (PI) 232, a fragment shader (FS) 234, a rendering backend (RB) 236, an L2 cache (UCHE) 238, and system memory 240. Although Figure 2 The GPU 200 is shown to include processing units 220-238, but the GPU 200 may include multiple additional processing units. Furthermore, processing units 220-238 are merely examples, and the GPU according to this disclosure may use any combination or order of processing units. The GPU 200 also includes a command buffer 250, a context register group 260, and a context state 261.

[0042] like Figure 2 As shown, the GPU can use a CP (e.g., CP 210) or a hardware accelerator to resolve the command buffer into context register packets (e.g., context register packet 260) and / or draw call data packets (e.g., draw call packet 212). CP 210 can then send the context register packet 260 or the draw call data packet 212 to a processing unit or block in the GPU via a separate path. Furthermore, the command buffer 250 can alternate between different states of the context registers and draw calls. For example, the command buffer can be constructed as follows: context register of context N, draw call of context N, context register of context N+1, and draw call of context N+1.

[0043] GPUs can render images in various ways. In some cases, GPUs can use either tiled rendering or regular rendering to render images. In tiled rendering GPUs, an image can be divided or separated into different parts or tiles. After the image is divided, each part or tile can be rendered individually. Tiled rendering GPUs can divide computer graphics images into a grid format so that each part of the grid, i.e., a tile, can be rendered individually. In some aspects, the image can be divided into different bins or tiles during the binning pass. In some aspects, during this binning pass, a visibility stream can be constructed, where visible primitives or drawing calls can be identified.

[0044] In some respects, a GPU can apply the drawing or rendering process to different bins or chunks. For example, a GPU can render to a bin and perform all drawing for the primitives or pixels within that bin. During the rendering to a bin process, the rendering target can reside in GMEM. In some cases, after rendering to a bin, the contents of the rendering target can be moved to system memory, and GMEM can be freed to render the next bin. Furthermore, a GPU can render to another bin and perform drawing for the primitives or pixels within that bin. Therefore, in some respects, there may be a small number of bins, such as four bins, covering all drawing in a surface. Additionally, a GPU can cycle through all drawing in a bin but perform drawing for visible drawing calls, which are drawing calls containing visible geometry. In some respects, a visibility stream can be generated (e.g., in the binning step) to determine the visibility information of each primitive in an image or scene. For example, this visibility stream can identify whether a primitive is visible. In some respects, this information can be used to remove invisible primitives, for example, in that rendering step. Furthermore, at least some primitives identified as visible can be rendered in that rendering step.

[0045] In some aspects of chunked rendering, there can be multiple processing stages or steps. For example, rendering can be performed in two steps, such as a bin-visibility pass and a bin-rendering pass. During the visibility pass, the GPU can input the rendering workload, record the positions of primitives or triangles, and then determine which primitives or triangles fall into which bins or regions. In some aspects of the visibility pass, the GPU can also identify or label the visibility of each primitive or triangle in the visibility stream. During the rendering pass, the GPU can input the visibility stream and process one bin or region at a time. In some aspects, the visibility stream can be analyzed to determine which primitives or primitive vertices are visible or invisible. In this way, visible primitives or primitive vertices can be processed. By doing so, the GPU can reduce the unnecessary workload of processing or rendering invisible primitives or triangles.

[0046] In some aspects, certain types of primitive geometry, such as position-only geometry, can be processed during the visibility step. Furthermore, primitives can be classified into different bins or regions based on their position or location. In some cases, classifying primitives or triangles into different bins can be performed by determining the visibility information of these primitives or triangles. For example, the GPU can determine or write visibility information for each primitive in each bin or region (e.g., in system memory). This visibility information can be used to determine or generate a visibility stream. In the rendering step, primitives in each bin can be rendered individually. In these cases, the visibility stream can be retrieved from memory used to discard primitives that are not visible to that bin.

[0047] GPUs, or aspects of GPU architecture, can offer many different rendering options, such as software rendering and hardware rendering. In software rendering, the driver or CPU can process each view... Figure 1 The entire frame geometry is copied each time. Furthermore, some different states may change depending on the viewpoint. Therefore, in software rendering, the software can copy the entire workload by changing some states available for each viewpoint in the rendered image. In some respects, this can lead to increased overhead because the GPU may submit the same workload multiple times for each viewpoint in the image. In hardware rendering, the hardware or GPU may be responsible for copying or processing the geometry for each viewpoint in the image. Therefore, the hardware can manage the copying or processing of primitives or triangles for each viewpoint in the image.

[0048] As noted in this article, in some respects, such as in bin or tiled rendering architectures, frame buffers can repeatedly store or write data to them, for example, when rendering from different types of memory. This can be referred to as resolving and de-resolving frame buffers or system memory. For example, when storing or writing to one frame buffer and then switching to another, the data or information on the frame buffer can be resolved from GPU Internal Memory (GMEM) at the GPU to system memory, i.e., memory in Double Data Rate (DDR) RAM or Dynamic RAM (DRAM).

[0049] In some respects, system memory can also be system-on-chip (SoC) memory or another chip-based memory for storing data or information, for example, on a device or smartphone. System memory can also be a physical data storage device shared by the CPU and / or GPU. In some respects, system memory can be a DRAM chip, for example, on a device or smartphone. Accordingly, SoC memory can store data in a chip-based manner.

[0050] In some respects, GMEM can be on-chip memory at the GPU, which can be implemented using static RAM (SRAM). Alternatively, GMEM can be stored on a device, such as a smartphone. As indicated herein, data or information can be transferred between system memory or DRAM and GMEM, for example, at the device. In some respects, system memory or DRAM can reside at the CPU or GPU. Furthermore, data can be stored at DDR or DRAM. In some respects, such as in bin or tiled rendering, a small portion of the memory can be stored at the GPU, for example, at GMEM. In some cases, storing data at GMEM may utilize a larger processing workload and / or consume more power compared to storing data at the frame buffer or system memory.

[0051] Several aspects of wireless communication can be associated with many different applications, such as extended reality (XR), augmented reality (AR), or virtual reality (VR) applications. For cloud gaming or XR / AR / VR applications, video images may be rendered at a network or server based on user control or gesture feedback. These rendered images can then be streamed to client or user devices. When services are operated over wireless communication networks, such as 5G networks, the over-the-air (OTA) latency allowed by the aforementioned operations (including video frame transmission) may be limited. In some aspects of wireless communication, such as 5G networks, Hybrid Automatic Repeat Request (HARQ) or Radio Link Control (RLC) retransmissions can result in higher frame transmission latency, such as 99th percentile latency, which can lead to a poorer user experience.

[0052] Figure 3 This illustrates graph 300, which shows the relationship between IP packet arrival time and IP packet transmission time. More specifically, Figure 3 This displays the IP packets arriving at the base station compared to the frame transmission delay. For example... Figure 3 As shown, the frame transmission delay is the interval from the arrival of the first IP packet at the base station to the transmission of the last IP packet at the UE. Figure 3 It also shows frame transmission delay or latency, which is the difference between the time it takes for an IP packet to arrive at the base station and the time it takes for an IP packet to be transmitted to the UE.

[0053] Figure 4 The diagram 400 illustrates the FEC of a video frame. (For example...) Figure 4 As shown, Figure 400 includes a server 410 and a client device 420. Figure 400 also includes video frame 412 (a single white frame), IP packet 414 (multiple white packets), FEC packet 416 (multiple packets with diagonal lines), video frame 422 (a single white frame), IP packet 424 (multiple white packets), and FEC packet 426 (multiple packets with diagonal lines). Figure 4 As shown, video frame 412, IP packet 414, and FEC packet 416 correspond to server 410, and video frame 422, IP packet 424, and FEC packet 426 correspond to client device 420. Figure 4 Applying forward error correction (FEC) to video frames can help improve frame delivery latency. This can be affected by packet retransmissions, such as HARQ or RLC retransmissions. Figure 4 As shown, the gaps between IP packets correspond to lost or delayed IP packets due to HARQ / RLC retransmission. Redundancy from the FEC allows the UE to reconstruct video frames affected by lost PDUs. In some respects, Packet Data Convergence Protocol (PDCP) out-of-order delivery can be enabled, allowing the UE not to retain received IP packets for any delayed packets preceding them.

[0054] Figure 5A and Figure 5B The diagrams 500 and 550 illustrate the FEC of the video frame, respectively. (For example...) Figure 5A As shown, Figure 500 includes video frame 512 (a single white frame), IP packets 514 (multiple white packets), and transport block 522 (a single block with dots). Figure 5B As shown, Figure 550 includes video frame 562 (a single white frame), IP packet 564 (multiple white packets), and transport block 572 (multiple blocks with dots). Figure 5A and Figure 5B The amount of FEC to be added may depend on the number of transport blocks (TB) or the number of time slots used to carry video frames.

[0055] like Figure 5A As shown, Figure 500 depicts a high signal-to-noise ratio (SNR) or modulation and coding scheme (MCS), and a high resource block (RB) allocation. Additionally, Figure 5A This describes a single large transport block (TB) of 522. For example... Figure 5A As shown, a single large TB can convey that all IP packets belong to a video frame. In some respects, when all IP packets of a video frame are carried by the same TB, the loss of a single TB may correspond to a 100% frame loss. In these cases, there may be 100% FEC redundancy for saving a single TB loss, but the probability of loss may be low because the residual BLER target is low. Thus, the probability of RLC retransmission during video frame transmission may also be low.

[0056] like Figure 5B As shown, Figure 550 depicts low SNR or MCS, and low RB allocation. Furthermore, Figure 5B This illustrates multiple smaller TBs, such as N TBs. In Figure 550, a single TB loss could correspond to a loss of ~1 / N frames. Figure 5B As shown, for a single TB of data loss, there may be ~(100 / N)% FEC. In some respects, the probability of any IP packet loss in a video frame may be approximately N times higher than that of residual BLER.

[0057] FEC (%) 99％ 0 27.125 10 4.875 20 5 30 5.25

[0058] Table 1

[0059] Table 1 above shows an example of video frame delivery latency with a low signal-to-interference-plus-noise ratio (SINR), such as corresponding to a small terabyte (TB). For example, using 10% FEC, 99% of the frame delivery latency could be reduced from 27ms to 5ms. The overhead of increasing FEC by 20% or 30% could increase scheduling latency and / or increase the amount of latency experienced.

[0060] FEC (%) 99％ 0 4.125 10 4 20 3.25 30 3.25

[0061] Table 2

[0062] Table 2 above shows an example of video frame transmission latency with medium or high SINR (e.g., corresponding to large TB). In Table 2, the effect of FEC at the 99th percentile may be small. Furthermore, a 0.1% residual BLER may correspond to a retransmission probability of less than 1%, for example, for less than 10 TB. A fallback to small TB scenarios is also possible if packets are distributed across many time slots. For example, server packets would naturally be distributed over several milliseconds.

[0063] Many cloud gaming or XR / AR / VR platforms on the market employ Frame Equipping (FEC) on video frames for reliability. This FEC may occur at a fixed FEC rate. However, a fixed FEC rate presents several potential problems when operating on certain types of wireless communications, such as 5G networks. For example, FEC may be insufficient, i.e., less than TB, which can lead to wasted resources; for instance, video frames may not be 100% recovered from a single TB loss. In some respects, there may also be over-provisioned FEC, which can result in increased scheduling latency for packets across video frames.

[0064] Furthermore, the effectiveness of FEC in maintaining low latency (e.g., latency at the 99th percentile) can vary with the allocated TB size and the number of TBs to be sent to the video frame. To strike a balance between latency performance and efficiency, adapting the FEC rate can be beneficial. For example, adapting the FEC rate based on the TB size may be advantageous. Adapting the FEC rate based on the number of TBs used to send the video frame may also be beneficial.

[0065] The aspects of this disclosure can be associated with FEC rate adaptation, for example, based on transport block allocation. The aspects of this disclosure can also adapt the FEC rate to maintain low latency. For example, the disclosure can adapt the FEC rate based on TB size. Additionally, the aspects of this disclosure can adapt the FEC rate based on the number of TBs used to transmit video frames.

[0066] In some aspects of this disclosure, for example, a client device or application can query various information from another component (e.g., a modem or infrastructure component). For example, aspects of this disclosure can query the average TB size over a time window. Aspects of this disclosure can also query the average number of Internet Protocol (IP) packets carried in a single transmission or TB. Aspects of this disclosure can also query the residual block error rate (BLER) of the HARQ process. Based on the above information, aspects of this disclosure, such as a client device, can derive a target FEC rate and forward a recommendation for the target FEC rate to, for example, a server.

[0067] The aspects of this disclosure can perform updated or targeted FEC determination in a variety of different ways. For example, this disclosure can estimate the number of transport blocks (Num_TB) based on the sum of the number of IP packets in the frame and / or the 5G overhead, and then divide that amount by the average TB size. Furthermore, this disclosure can estimate Num_TB by the average number of IP packets per video frame (which can be divided by the average number of IP packets carried per TB). The aspects of this disclosure can also estimate the frame loss probability (P) during HARQ transmission. frameloss ), which can be approximated as Num_TB multiplied by the residual BLER. In some respects, if P frameloss If it's less than a certain amount, such as 1%, then it may not be necessary for FEC. Otherwise, the target FEC percentage = (N x TB – 5G and IP overhead) / video frame size, where N represents the number of TBs lost in the frame at the 99th percentile. In some respects, the default value could be N = 1, and this default value can be increased to handle burst errors.

[0068] In some respects, the server can receive updated FEC rate recommendations or indications from the client device. Upon receiving the updated FEC rate, the server can adjust the FEC rate according to the client device recommendation. In other respects, other information can also be obtained and applied when determining the FEC rate, such as downlink SINR, NACK or discontinuous transmission (DTX) to ACK detection probability and / or base station retransmission time (K3).

[0069] Figure 6 The diagram 600 illustrates the FEC rate adaptation. (See diagram 600.) Figure 6As shown in Figure 600, client device 610, modem 620, and server 630 are included. At 611, client device 610 can query or request multiple metrics from modem 620, such as TB size, number of packets per TB, and / or residual BLER. At 612, modem 620 can report the requested metrics to client device 610. At 613, client device 610 can estimate the number of TBs used per frame and determine the target FEC rate. At 614, client device 610 can forward the recommended FEC rate to server 630. Finally, at 615, server 630 can adjust the FEC rate.

[0070] Some aspects of this disclosure (e.g., a network or server) can query various information from another component (e.g., a 5G infrastructure component). In some cases, this information can be queried via certain types of signaling. For example, aspects of this disclosure can query the average TB size over a time window. Aspects of this disclosure can also query the average number of Internet Protocol (IP) packets carried in a single transmission or TB. Aspects of this disclosure can also query the residual block error rate (BLER) of the HARQ process. Based on the above information, aspects of this disclosure (e.g., a network or server) can derive a target FEC rate and apply the target FEC rate accordingly.

[0071] In other aspects, this disclosure (e.g., a network or server) can query various information, such as the target FEC rate, from other components (e.g., 5G infrastructure components). This information can also be queried via signaling. For example, based on, for example, TB size and / or BLER measurements from a base station, aspects of this disclosure (e.g., dedicated 5G infrastructure components) can calculate an updated FEC rate and forward it to an application server or network. The network and server can receive the updated FEC rate from the dedicated 5G infrastructure component. Based on the above information, aspects of this disclosure (e.g., a network or server) can adjust the target FEC rate and / or apply the target FEC rate accordingly. In some aspects, a client device can query a modem for the target FEC rate. The modem can derive or calculate the target FEC rate based on TB size and / or BLER. The modem can then forward the target FEC rate to the client device. After receiving the target FEC rate, the client device can adjust the target FEC rate and / or apply the target FEC rate.

[0072] Figure 7A and Figure 7B The diagrams 700 and 750 illustrate FEC rate adaptation respectively. For example... Figure 7AAs shown in Figure 700, server 710 and infrastructure component 720 are included. At 711, server 710 can query or request multiple metrics from infrastructure component 720, such as TB size, number of packets per TB, and / or residual BLER. At 712, infrastructure component 720 can report the requested metrics to server 710. At 713, server 710 can calculate and / or adjust the FEC rate based on the metrics from infrastructure component 720.

[0073] like Figure 7B As shown in Figure 750, server 760 and infrastructure component 770 are included. At 761, server 760 can query or request a target FEC rate from infrastructure component 770. At 762, infrastructure component 770 can calculate the target FEC rate based on measurements provided by the base station. At 763, infrastructure component 770 can report the target FEC rate to server 760. At 764, server 760 can adjust the FEC rate based on the report from infrastructure component 770.

[0074] The aspects of this disclosure may include numerous benefits or advantages. For example, the aspects of this disclosure may utilize statistics from certain components, such as TB-related statistics obtained via modems or 5G infrastructure components, to help cloud gaming servers or XR / AR / VR servers configure the correct amount of FEC. By doing so, the aspects of this disclosure can achieve improved latency. Furthermore, the aspects of this disclosure can enable FEC-adapted applications via certain components (e.g., modems or 5G infrastructure components).

[0075] Figures 3-7B Examples of the methods and processes described above for FEC rate adaptation are illustrated. For example... Figures 3-7B As shown, various aspects of this disclosure (such as the network, server, and client devices described herein) can perform multiple different steps or processes for FEC rate adaptation in order to reduce the amount of latency experienced. For example, the network, server, and client devices herein can operate or stream data based on a previous forward error correction (FEC) rate.

[0076] The network, server, and client devices (e.g., client device 610) described herein may also send requests for updated FEC rates, such as query 611, whereby the updated FEC rate is based on the previous FEC rate. In some aspects, the sent request may include a request for at least one of the following: the average transport block (TB) size over the time window, the average number of Internet Protocol (IP) packets in the TB, or the residual block error rate (BLER) of the Hybrid Automatic Repeat Request (HARQ) process. Furthermore, the request may be sent by at least one of the client device, server, or network.

[0077] The network, server, and client devices (e.g., client device 610) described herein can also receive information associated with the updated FEC rate, such as report 612, based on a request for the updated FEC rate. This information can be received from at least one of the modems or network infrastructure components.

[0078] Furthermore, the network, server, and client devices described herein (e.g., client device 610) can calculate the average transport block (TB) size per frame based on received information (e.g., estimate 613). The updated FEC rate can be based on the average TB size per frame, which is associated with one or more Internet Protocol (IP) packets.

[0079] The network, server, and client devices described herein (e.g., client device 610) may also determine the updated FEC rate based on received information (e.g., determination 613), which is correlated with the difference between the previous FEC rate and the updated FEC rate. The updated FEC rate may be determined based on at least one of the estimated number of transport blocks (TB) or the estimated frame loss probability. Furthermore, the estimated number of TBs may be based on the total number of Internet Protocol (IP) packets in the frame and the average TB size, or the estimated number of TBs may be based on the average number of IP packets per frame and the average number of IP packets per TB. In some cases, when the estimated frame loss probability is less than a frame loss threshold, the previous FEC rate may not be adjusted to the updated FEC rate.

[0080] The network, server, and client devices (e.g., client device 610) described herein may also send instructions to the network or server regarding updated FEC rates, such as recommendation 614. In some respects, the updated FEC rate may correspond to a target FEC rate, which is predetermined or pre-configured.

[0081] Furthermore, the network, server, and client devices (e.g., client device 610 or server 630) here can adjust the previous FEC rate to the updated FEC rate based on the received information (e.g., adjustment 615).

[0082] The network, server, and client devices (such as client device 610) described in this article can also operate or stream data based on the updated FEC rate.

[0083] Figure 8 A flowchart 800 illustrates an example method according to one or more techniques of this disclosure. This method can be performed by means such as a network, server, client device, modem, infrastructure component, or means for data or frame processing.

[0084] In 802, the device can operate or stream data based on a prior forward error correction (FEC) rate, such as in combination with... Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document / reference] is as follows.

[0085] At 804, the device can send a request for an updated FEC rate, which is based on the previous FEC rate, such as in combination with... Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in the text. In some aspects, the request sent may include the average transport block (TB) size over the time window, the average number of Internet Protocol (IP) packets in the TB, or the residual block error rate (BLER) of the Hybrid Automatic Repeat Request (HARQ) process, such as in combination with... Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described above. Furthermore, the request can be sent by at least one of the client device, server, or network, as in combination. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document / reference] is as follows.

[0086] At 806, the device can receive information associated with the updated FEC rate based on a request for the updated FEC rate, such as in conjunction with... Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in the text indicates that information can be received from at least one of the modem or network infrastructure components, such as in combination. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document / reference] is as follows.

[0087] In 808, the device can calculate the average transport block (TB) size per frame based on the received information, such as in combination with... Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document] illustrates this. The updated FEC rate can be based on the average TB size per frame, which is associated with one or more Internet Protocol (IP) packets, such as in combination with [other data]. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document / reference] is as follows.

[0088] In 810, the device can determine the updated FEC rate based on the received information, which is correlated with the difference between the previous FEC rate and the updated FEC rate, such as in combination with... Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document] illustrates that the updated FEC rate can be determined based on at least one of the estimated number of transport blocks (TB) or the estimated frame loss probability, such as in combination with [other factors]. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in the text. Furthermore, the estimated TB number can be based on the total number of Internet Protocol (IP) packets in the frame and the average TB size, or the estimated TB number can be based on the average number of IP packets per frame and the average number of IP packets per TB, as combined. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described above. In some cases, when the estimated frame loss probability is less than the frame loss threshold, the previous FEC rate may not be adjusted to the updated FEC rate, as in combination with... Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document / reference] is as follows.

[0089] In 812, the device can send an indication of the updated FEC rate to the network or server. In some respects, the updated FEC rate can correspond to a target FEC rate, which is predetermined or pre-configured, such as in combination with... Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document / reference] is as follows.

[0090] In 814, the device can adjust the previous FEC rate to an updated FEC rate based on the received information, such as in combination with Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document / reference] is as follows.

[0091] In 816, the device can operate or stream data based on the updated FEC rate, such as in combination with Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document / reference] is as follows.

[0092] Figure 9 A flowchart 900 illustrates an example method according to one or more techniques of this disclosure. This method can be performed by means such as a network, server, client device, modem, infrastructure component, or means for data or frame processing.

[0093] At 902, the device can receive an indication of an updated forward error correction (FEC) rate, the updated FEC rate being based on a previous FEC rate. The received indication includes the difference between the previous FEC rate and the updated FEC rate, such as in combination. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7BThe example described herein. In some respects, the received indication is based on a request for at least one of the following: the average transport block (TB) size within the time window, the average number of Internet Protocol (IP) packets in the TB, or the residual block error rate (BLER) of the Hybrid Automatic Repeat Request (HARQ) process, such as in combination with Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described above. Furthermore, the instruction can be received from at least one of the client device, server, or network, and the instruction can be received by at least one of the server or network, as in combination. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document / reference] is as follows.

[0094] At 904, the device can adjust the previous FEC rate to an updated FEC rate based on a received instruction, the adjustment being based on the difference between the previous FEC rate and the updated FEC rate, such as in combination. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document] illustrates this. In some aspects, the updated FEC rate can be based on at least one of the estimated number of transport blocks (TB) or the estimated frame loss probability, such as in combination with [other factors]. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in the text. The estimated number of TBs can be based on the total number of Internet Protocol (IP) packets in the frame and the average TB size, or the estimated number of TBs can be based on the average number of IP packets per frame and the average number of IP packets per TB, as combined. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described above. In some cases, when the estimated frame loss probability is less than the frame loss threshold, the previous FEC rate may not be adjusted to the updated FEC rate, as in combination with... Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document / reference] is as follows.

[0095] Furthermore, the average transport block size (TB) per frame can be calculated based on the received indications, such as by combining... Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document] illustrates this. The updated FEC rate can be based on the average TB size per frame, which is associated with one or more Internet Protocol (IP) packets, such as in combination with [other data]. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document] shows that data can be streamed based on the updated FEC rate, such as in combination with [other methods]. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document] further illustrates this. Additionally, data can be streamed based on the previous FEC rate, such as in combination with [other methods]. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document] illustrates this. The updated FEC rate can correspond to a target FEC rate, which is predetermined or pre-configured, as in [the context of] [the document]. Figure 3 , Figure 4 , Figure 5A , Figure 5B , Figure 6 , Figure 7A and Figure 7B The example described in [the document / reference] is as follows.

[0096] In one configuration, a method or apparatus for graphics processing is provided. The apparatus may be a network, server, client device, modem, infrastructure component, or other processor capable of performing data or frame processing. In one aspect, the apparatus may be a processing unit 120 within device 104, or other hardware within device 104 or another device. The apparatus may include a unit for sending a request for an updated forward error correction (FEC) rate, the updated FEC rate being based on a previous FEC rate. The apparatus may also include a unit for receiving information associated with an updated FEC rate based on the request for the updated FEC rate. The apparatus may further include a unit for determining the updated FEC rate based on the received information, the received information being associated with the difference between the previous FEC rate and the updated FEC rate. The apparatus may further include a unit for calculating the average transport block (TB) size per frame based on the received information. The apparatus may further include a unit for sending an indication of the updated FEC rate to the network or server. The apparatus may further include a unit for adjusting the previous FEC rate to the updated FEC rate based on the received information. The apparatus may further include units for operating or streaming data based on an updated FEC rate. The apparatus may also include units for operating or streaming data based on a previous FEC rate. In some aspects, the apparatus may further include units for receiving an indication of an updated forward error correction (FEC) rate, the updated FEC rate being based on a previous FEC rate, the received indication including the difference between the previous FEC rate and the updated FEC rate. The apparatus may further include units for adjusting the previous FEC rate to the updated FEC rate based on the received indication, the adjustment being based on the difference between the previous FEC rate and the updated FEC rate.

[0097] The subjects described herein can be implemented to achieve one or more benefits or advantages. For example, the described data or frame processing techniques can be used by networks, servers, client devices, or some other processors that can perform data or frame processing to implement the FEC rate adaptation techniques described herein. This can also be achieved at a lower cost compared to other data or frame processing techniques. Furthermore, the data or frame processing techniques of this invention can improve or accelerate data processing or execution. In addition, the data or frame processing techniques of this invention can improve resource or data utilization and / or resource efficiency. Furthermore, aspects of this disclosure can utilize FEC rate adaptation techniques to improve processing time, reduce latency, and / or reduce performance overhead.

[0098] According to this disclosure, the term "or" may be interpreted as "and / or" unless otherwise specified in the context. Furthermore, while phrases such as "one or more" or "at least one" may be used for some features disclosed herein but not others, features not using such language may be interpreted as implying such meanings where the context does not specify otherwise.

[0099] In one or more examples, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term “processing unit” is used throughout this disclosure, such a processing unit may be implemented in hardware, software, firmware, or any combination thereof. If any function, processing unit, technique, or other module described herein is implemented in software, then such function, processing unit, technique, or other module may be stored or transmitted as one or more instructions or code on a computer-readable medium. A computer-readable medium may include a computer data storage medium or a communication medium, including any medium that facilitates the transfer of a computer program from one place to another. In this way, a computer-readable medium may generally correspond to (1) a tangible computer-readable storage medium that is non-transitory, or (2) a communication medium such as a signal or carrier wave. A data storage medium may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, code, and / or data structures to implement the techniques described herein. By way of example and not limitation, such a computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices, or other magnetic storage devices. The disks and optical discs used herein include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks, and Blu-ray discs. Disks typically reproduce data magnetically, while optical discs reproduce data optically using lasers. Combinations of these should also be included within the scope of computer-readable media. Computer program products may include computer-readable media.

[0100] The code can be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), arithmetic logic units (ALUs), field-programmable arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Therefore, the term "processor" as used herein can refer to any of the foregoing structures or any other structure suitable for implementing the techniques described herein. Furthermore, these techniques can be fully implemented in one or more circuit or logic elements.

[0101] The techniques disclosed herein can be implemented in a wide variety of devices or apparatuses, including wireless handheld devices, integrated circuits (ICs), or a set of ICs, such as chipsets. Various components, modules, or units are described in this disclosure to emphasize functional aspects of a device configured to perform the disclosed techniques, but they do not necessarily need to be implemented by different hardware units. Rather, as described above, various units can be combined in any hardware unit or provided by a collection of interoperable hardware units, including one or more processors as described above, along with suitable software and / or firmware.

[0102] Various examples have been described. These and other examples are within the scope of the appended claims.

Claims

1. A data processing method, comprising: Send a request for an updated forward error correction (FEC) rate, which is based on the previous FEC rate; Based on the request for the updated FEC rate, receive information associated with the updated FEC rate; The average transport block (TB) size of each frame is calculated based on the received information, and the average TB size of each frame is associated with one or more Internet Protocol (IP) packets; as well as The updated FEC rate is determined based on the received information and the average TB size per frame, and the received information is associated with the difference between the previous FEC rate and the updated FEC rate.

2. The method as described in claim 1, wherein, The requests sent include requests for at least one of the following: the average TB size over the time window, the average number of IP packets in the TB, or the residual block error rate (BLER) of the Hybrid Automatic Repeat Request (HARQ) procedure.

3. The method as described in claim 1, wherein, The updated FEC rate is determined based on at least one of the following: the estimated number of TBs, or the estimated frame loss probability.

4. The method of claim 3, wherein, The estimated number of TBs is based on the total number of IP packets in the frame and the average TB size, or the estimated number of TBs is based on the average number of IP packets per frame and the average number of IP packets per TB.

5. The method of claim 3, wherein, When the estimated frame loss probability is less than the frame loss threshold, the previous FEC rate is not adjusted to the updated FEC rate.

6. The method of claim 1, further comprising: Send the updated FEC rate indication to the network or server.

7. The method of claim 1, further comprising: The previous FEC rate is adjusted to the updated FEC rate based on the received information.

8. The method of claim 1, further comprising: To operate or stream data based on the updated FEC rate.

9. The method of claim 1, wherein, The updated FEC rate corresponds to the target FEC rate, which is predetermined or pre-configured.

10. The method of claim 1, further comprising: To operate or stream data based on the previously mentioned FEC rate.

11. The method of claim 1, wherein, The request is sent by at least one of the following: a client device, a server, or a network.

12. The method of claim 1, wherein, The information is received from at least one of the following: a modem, or a network infrastructure component.

13. An apparatus for data processing, comprising: Memory; as well as At least one processor, coupled to the memory, is configured to: Send a request for an updated forward error correction (FEC) rate, which is based on the previous FEC rate; Based on the request for the updated FEC rate, receive information associated with the updated FEC rate; The average transport block (TB) size of each frame is calculated based on the received information, and the average TB size of each frame is associated with one or more Internet Protocol (IP) packets; as well as The updated FEC rate is determined based on the received information and the average TB size per frame, and the received information is associated with the difference between the previous FEC rate and the updated FEC rate.

14. The apparatus of claim 13, wherein, The requests sent include requests for at least one of the following: the average TB size over the time window, the average number of IP packets in the TB, or the residual block error rate (BLER) of the Hybrid Automatic Repeat Request (HARQ) procedure.

15. The apparatus of claim 13, wherein, The updated FEC rate is determined based on at least one of the following: the estimated number of TBs or the estimated frame loss probability, wherein the estimated number of TBs is based on the total number of IP packets in the frame and the average TB size, or the estimated number of TBs is based on the average number of IP packets per frame and the average number of IP packets per TB.

16. The apparatus of claim 15, wherein, When the estimated frame loss probability is less than the frame loss threshold, the previous FEC rate is not adjusted to the updated FEC rate.

17. The apparatus of claim 13, wherein, The at least one processor is further configured to: Send the updated FEC rate indication to the network or server.

18. The apparatus of claim 13, wherein, The at least one processor is further configured to: The previous FEC rate is adjusted to the updated FEC rate based on the received information.

19. The apparatus of claim 13, wherein, The at least one processor is further configured to: To operate or stream data based on the updated FEC rate.

20. The apparatus of claim 13, wherein, The updated FEC rate corresponds to the target FEC rate, which is predetermined or pre-configured.

21. The apparatus of claim 13, wherein, The at least one processor is further configured to: To operate or stream data based on the previously mentioned FEC rate.

22. The apparatus of claim 13, wherein, The request is sent by at least one of the following: a client device, a server, or a network.

23. The apparatus of claim 13, wherein, The information is received from at least one of the following: a modem, or a network infrastructure component.

24. A data processing method, comprising: The system receives an indication of an updated Forward Error Correction (FEC) rate, based on a previous FEC rate, the received indication including the difference between the previous FEC rate and the updated FEC rate, wherein the average transport block (TB) size per frame is calculated based on the received indication, the average TB size per frame being associated with one or more Internet Protocol (IP) packets; and The previous FEC rate is adjusted to the updated FEC rate based on the received indication and the average TB size per frame, the adjustment being based on the difference between the previous FEC rate and the updated FEC rate.

25. The method of claim 24, wherein, The received indication is based on a request for at least one of the following: the average TB size over the time window, the average number of IP packets in the TB, or the residual block error rate (BLER) of the Hybrid Automatic Repeat Request (HARQ) process.

26. The method of claim 24, wherein, The updated FEC rate is based on at least one of the following: the estimated number of TBs, or the estimated frame loss probability.

27. The method of claim 26, wherein, The estimated number of TBs is based on the total number of IP packets in the frame and the average TB size, or the estimated number of TBs is based on the average number of IP packets per frame and the average number of IP packets per TB.

28. The method of claim 26, wherein, When the estimated frame loss probability is less than the frame loss threshold, the previous FEC rate is not adjusted to the updated FEC rate.

29. The method of claim 24, wherein, Data is streamed based on the updated FEC rate.

30. The method of claim 24, wherein, The updated FEC rate corresponds to the target FEC rate, which is predetermined or pre-configured.

31. The method of claim 24, wherein, The data is streamed based on the previously mentioned FEC rate.

32. The method of claim 24, wherein, The instruction is received from at least one of the following: a client device, a server, or a network, and wherein the instruction is received from at least one of the following: the server or the network.

33. An apparatus for data processing, comprising: Memory; as well as At least one processor, coupled to the memory, is configured to: The system receives an indication of an updated forward error correction (FEC) rate, which is based on a previous FEC rate. The received indication includes the difference between the previous FEC rate and the updated FEC rate. The average transport block (TB) size per frame is calculated based on the received indication and is associated with one or more Internet Protocol (IP) packets. as well as The previous FEC rate is adjusted to the updated FEC rate based on the received indication and the average TB size per frame, the adjustment being based on the difference between the previous FEC rate and the updated FEC rate.

34. The apparatus of claim 33, wherein, The received indication is based on a request for at least one of the following: the average TB size over the time window, the average number of IP packets in the TB, or the residual block error rate (BLER) of the Hybrid Automatic Repeat Request (HARQ) process.

35. The apparatus of claim 33, wherein, The updated FEC rate is based on at least one of the following: the estimated number of TBs, or the estimated frame loss probability.

36. The apparatus of claim 35, wherein, The estimated number of TBs is based on the total number of IP packets in the frame and the average TB size, or the estimated number of TBs is based on the average number of IP packets per frame and the average number of IP packets per TB.

37. The apparatus of claim 35, wherein, When the estimated frame loss probability is less than the frame loss threshold, the previous FEC rate is not adjusted to the updated FEC rate.

38. The apparatus of claim 33, wherein, Data is streamed based on the updated FEC rate.

39. The apparatus of claim 33, wherein, The updated FEC rate corresponds to the target FEC rate, which is predetermined or pre-configured.

40. The apparatus of claim 33, wherein, The data is streamed based on the previously mentioned FEC rate.

41. The apparatus of claim 33, wherein, The instruction is received from at least one of the following: a client device, a server, or a network, and wherein the instruction is received from at least one of the following: the server or the network.

Images