Image sticking removal circuit, fingerprint collection device and electronic device

Abstract

The application discloses a residual image removing circuit, a fingerprint collecting device and electronic equipment, and relates to the technical field of removing residual images. The application discloses a residual image removing circuit, a fingerprint collecting device and electronic equipment, and relates to the technical field of removing residual images. The application discloses a residual image removing circuit, a fingerprint collecting device and electronic equipment, and relates to the technical field of removing residual images. The application discloses a residual image removing circuit, a fingerprint collecting device and electronic equipment, and relates to the technical field of removing residual images. The application discloses a residual image removing circuit, a fingerprint collecting device and electronic equipment, and relates to the technical field of removing residual images. The application discloses a residual image removing circuit, a fingerprint collecting device and electronic equipment, and relates to the technical field of removing residual images. The application discloses a residual image removing circuit, a fingerprint collecting device and electronic equipment, and relates to the technical field of removing residual images. The application discloses a residual image removing circuit, a fingerprint collecting device and electronic equipment, and relates to the technical field of removing residual images. The application discloses a residual image removing circuit, a fingerprint collecting device and electronic equipment, and relates to the technical field of removing

Description

Technical Field

[0001] This application relates to the field of optics, specifically to an image retention removal circuit, a fingerprint acquisition device, and an electronic device. Background Technology

[0002] Due to the advantages of OLED (Organic Light-Emitting Diode) displays, such as easy assembly and large recognition area, and with the development of optical under-display fingerprint technology, optical under-display fingerprint unlocking is gradually being accepted by the current market and the demand is showing an upward trend.

[0003] PIN (Intrinsic-Negative Photodiode) is currently the mainstream optical under-display fingerprint sensor. It converts photons into electrons to collect fingerprint signals. The photosensitive properties of PIN cause it to accumulate charge when light signals are input. When a crystal is exposed to strong light, defects in the crystal lattice capture electrons during exposure, forming defect charges. If the current frame is overexposed under strong light, after a period of time, due to the presence of defect charges, the residual charge will be released during the next frame capture, resulting in image retention. Figure 1 As shown, under strong light, the grayscale distribution becomes uneven due to the trapping of charge carriers by defects in the PIN. Therefore, an overlapping area 13 appears between the first image acquisition area 11 and the second image acquisition area 12. This overlapping area is called a fingerprint ghost. If a fingerprint ghost is captured during the fingerprint acquisition process, it will seriously reduce the security level of fingerprint unlocking.

[0004] In existing technologies, image retention is eliminated by adding additional components to the pixel structure. This occupies a large amount of space and makes it difficult to provide a stable positive voltage. Furthermore, under extreme conditions such as strong light or low temperatures, the efficiency of image retention elimination is low due to the inherent characteristics of the components. Summary of the Invention

[0005] The purpose of this application is to provide a ghost image removal circuit, a fingerprint acquisition device, and an electronic device that can provide a circuit for removing ghost images outside the IC chip, which not only saves internal space of the chip, but also provides a stable positive voltage to remove residual charge in strong light or low temperature environments.

[0006] The first aspect of this application provides a ghost image removal circuit, including:

[0007] Linear regulator;

[0008] A control circuit, wherein the voltage input terminal of the control circuit is connected to the positive voltage output terminal of the linear regulator;

[0009] The control circuit is used to apply a positive voltage to the sensing unit before fingerprint image acquisition; the voltage input terminal of the sensing unit is used to connect to the regulated output terminal of the control circuit.

[0010] In one embodiment, the control circuit includes:

[0011] A first switching circuit, wherein the first terminal of the first switching circuit is grounded, and the second terminal of the first switching circuit is connected to the positive voltage output terminal of the linear regulator; the control terminal of the first switching circuit is used to input an enable signal.

[0012] A second switching circuit, wherein the control terminal of the second switching circuit is connected to the second terminal of the first switching circuit, the first terminal of the second switching circuit is connected to the positive voltage output terminal of the linear regulator, and the second terminal of the second switching circuit is connected to the sensing unit.

[0013] The first switching circuit is used to control the second switching circuit to turn on when an enable signal is received, so that the second terminal of the second switching circuit applies a positive voltage to the sensing unit.

[0014] In one embodiment, the first switching circuit includes an NMOS device; the first terminal of the first switching circuit is the source of the NMOS device, the second terminal is the drain of the NMOS device, and the control terminal is the gate of the NMOS device.

[0015] The second switching circuit includes a PMOS device; the first terminal of the second switching circuit is the source of the PMOS device, the second terminal of the second switching circuit is the drain of the PMOS device, and the control terminal of the second switching circuit is the gate of the PMOS device.

[0016] In one embodiment, the control circuit further includes:

[0017] A current-limiting resistor, one end of which is connected to the second terminal of the first switching circuit, and the other end of which is connected to the linear regulator.

[0018] In one embodiment, the linear regulator includes a first linear regulator and a second linear regulator;

[0019] The positive voltage output terminal of the first linear regulator is connected to the second terminal of the first switching circuit and the first terminal of the second switching circuit;

[0020] The positive voltage output terminal of the second linear regulator is connected to the first terminal of the second switching circuit and the second terminal of the first switching circuit.

[0021] The first linear regulator and the second linear regulator are used to output voltages of different volt values, and the branch containing the first linear regulator and the branch containing the second linear regulator are selectively connected.

[0022] In one embodiment, the control circuit further includes:

[0023] The selection module is connected to the first switch circuit and the second switch circuit respectively, and is used to select one of the first switch circuit and the second switch circuit.

[0024] In one embodiment, the gating module includes:

[0025] The first resistor has one end connected to the positive voltage output terminal of the first linear regulator and the other end connected to the second terminal of the first switching circuit.

[0026] The second resistor has one end connected to the positive voltage output terminal of the second linear regulator and the other end connected to the first terminal of the second switching circuit.

[0027] The first resistor and the second resistor can be selected to operate.

[0028] A second aspect of this application provides a fingerprint acquisition device, the device comprising:

[0029] A sensor array for converting optical signals into electrical signals;

[0030] The image retention removal circuit described in the above embodiments of this application is used to provide a positive voltage to the sensor array before fingerprint image acquisition;

[0031] A readout unit, connected to the sensor array, converts the electrical signal into a digital signal;

[0032] The display unit, connected to the readout unit, is used to receive the digital signal and display the fingerprint image.

[0033] In one embodiment, the sensor array includes:

[0034] Multiple sensing units, wherein the voltage input terminal of the sensing unit is used to connect to the regulated output terminal of the control circuit;

[0035] Each sensing unit includes a photodiode and an equivalent capacitor. The first end of the photodiode is connected to the regulated output terminal of the control circuit; the equivalent capacitor is connected in parallel across the two ends of the photodiode.

[0036] A third aspect of this application provides an electronic device, which includes the fingerprint acquisition device described in the above embodiments.

[0037] The technical solution provided in the above embodiments of this application offers a circuit outside the IC chip to clear fingerprint afterimages during fingerprint acquisition and recognition. A linear voltage regulator and a control circuit are incorporated into the fingerprint acquisition device. The control circuit includes an NMOS transistor, a PMOS transistor, a current-limiting resistor, and a gating module. Depending on actual needs, a circuit is selected to provide a stable positive voltage to eliminate residual charge on the photodiode. This saves internal chip space and provides a more stable positive voltage, improving the efficiency of afterimage removal. Attached Figure Description

[0038] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly described below.

[0039] Figure 1 This is a diagram illustrating the afterimage that appears during fingerprint collection.

[0040] Figure 2 A schematic diagram of the frame of the image removal circuit provided in the embodiments of this application;

[0041] Figure 3 For the embodiments of this application in Figure 2 A schematic diagram of the basic image retention removal circuit;

[0042] Figure 4 This is a schematic diagram of a linear regulator structure provided in an embodiment of this application;

[0043] Figure 5 This is a schematic diagram of the control circuit and sensing unit provided in the embodiments of this application;

[0044] Figure 6 This is a timing diagram of the image retention removal circuit provided in an embodiment of this application;

[0045] Figure 7 This is a schematic diagram of the fingerprint acquisition device provided in an embodiment of this application. Detailed Implementation

[0046] In the description of this application, the terms "first," "second," etc., are used only to distinguish descriptions and do not indicate a sequence number, nor should they be construed as indicating or implying relative importance.

[0047] In the description of this application, the terms "comprising," "including," etc., indicate the presence of the described features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or collections thereof.

[0048] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0049] The technical solution of this application will now be clearly and completely described with reference to the accompanying drawings.

[0050] Please refer to Figure 2 This is a schematic diagram of the image retention removal circuit 20 provided in this embodiment of the application. The image retention removal circuit 20 includes a linear regulator 21 and a control circuit 22. The voltage input terminal of the control circuit 22 is connected to the positive voltage output terminal of the linear regulator 21. The linear regulator 21 outputs a regulated voltage to provide a positive voltage to the control circuit 22. The control circuit 22 is connected to the sensing unit 23. Before acquiring the fingerprint image, the control circuit 22 can provide a positive voltage to the sensing unit 23 according to actual needs, thereby clearing the residual charge on the photodiode in the sensing unit 23 and achieving the effect of removing image retention.

[0051] Please refer to Figure 3 The control circuit 22 includes a first switching circuit 221 and a second switching circuit 222. The first terminal of the first switching circuit 221 is grounded, and the second terminal of the first switching circuit 221 is connected to the positive voltage output terminal of the linear regulator 21. The control terminal of the first switching circuit 221 is used to input an enable signal. The control terminal of the second switching circuit 222 is connected to the second terminal of the first switching circuit 221, the first terminal of the second switching circuit 222 is connected to the positive voltage output terminal of the linear regulator 21, and the second terminal of the second switching circuit 222 is connected to the sensing unit 23.

[0052] When an enable voltage is input from the control terminal of the first switching circuit 221, the first switching circuit 221 is turned on and controls the second switching circuit 222 to be turned on. The second switching circuit 222 obtains a positive voltage from the linear regulator 21 and provides it to the sensing unit 23, thereby clearing the residual charge on the photodiode in the sensing unit 23.

[0053] Please refer to Figure 4 This is a schematic diagram of the linear regulator structure provided in an embodiment of this application. The linear regulator 21 includes a first linear regulator 211 and a second linear regulator 212. The positive voltage output terminal of the first linear regulator 211 is connected to... Figure 5 The first input terminal of the control circuit 22 is connected to the second terminal of the first switching circuit 221 and the first terminal of the second switching circuit 222. The positive voltage output terminal of the second linear regulator 212 is connected to... Figure 5The second input terminal of the control circuit 22 is connected to the first terminal of the second switching circuit 222 and the second terminal of the first switching circuit 221. The first linear regulator 211 and the second linear regulator 212 are used to output voltages of different volt values, and the branch containing the first linear regulator 211 and the branch containing the second linear regulator 212 are selectively connected.

[0054] Please refer to Figure 5 This is a schematic diagram of the control circuit and sensing unit provided in the embodiments of this application. The first switching circuit 221 may include an NMOS device 301, and the second switching circuit 222 may include a PMOS device 302. The source of the NMOS device 301 is grounded as the first terminal of the first switching circuit 221, the gate of the NMOS device 301 is the control terminal of the first switching circuit 221, and the drain of the NMOS device 301 is the second terminal of the first switching circuit 221.

[0055] The drain of NMOS device 301 is connected to the gate of PMOS device 302. The source of PMOS device 302 is connected to the positive voltage output terminal of linear regulator 21 as the first terminal of second switching circuit 222. The drain of PMOS device 302 is connected to the sensing unit 23 as the second terminal of second switching circuit 222.

[0056] The first input terminal of the control circuit 22 is connected to Figure 4 The positive voltage output terminal and the second input terminal of the first linear regulator 211 are connected to... Figure 4 The positive voltage output terminal of the second linear regulator.

[0057] The control circuit 22 may also include a current-limiting resistor 303 and a gating module 300. The gating module 300 is connected to the first switch circuit and the second switch circuit respectively, and is used to select one of the first switch circuit 221 and the second switch circuit 222.

[0058] In one embodiment, the selection module 300 may include a first resistor 304 and a second resistor 305, with one of the first resistor 304 and the second resistor 305 selectively selected. One end of the first resistor 304 is connected to the positive output terminal of the first linear regulator 211, and the other end of the first resistor 304 is connected to a current-limiting resistor 303. One end of the second resistor 305 is connected to the positive output terminal of the second linear regulator 212, and the other end of the second resistor 305 is connected to the first terminal of the second switching circuit 222. The current-limiting resistor 303 is connected to the drain of the NMOS device 301, and the other end of the current-limiting resistor 303 is connected to both the first resistor 304 and the second resistor 305.

[0059] The function of the selection module 300 is not limited to being implemented by the first resistor 304 and the second resistor 305; it can also be implemented by a switch or any other component that can be used to implement the function of selecting one circuit to conduct.

[0060] The sensing unit 23 includes a photodiode 231 and an equivalent capacitor 232. The first end of the photodiode 231 is connected to the regulated output terminal of the control circuit 22, that is, connected to the drain of the PMOS device 302. The photodiode 231 and the equivalent capacitor 232 are connected in parallel.

[0061] Please refer to Figure 6 During the image retention removal stage, which is the pre-image acquisition stage, the gate of the NMOS device is at a high level. In this stage, an enable signal is input to the gate of the NMOS device 301 (using a programmable GPIO output pin for control), controlling the gate of the NMOS device 301 to be at a high level. This turns on the source and drain of the NMOS device 301, and at this time, the first switching circuit 221 is turned on. Since the first switching circuit 221 is connected to the second switching circuit 222, the gate of the PMOS device 302 is at a low level, turning on the source and drain of the PMOS device 302, and thus turning on the second switching circuit 222.

[0062] The first and second linear regulators provide two different voltages to the control circuit. One is selected to provide the forward voltage based on actual needs. Assume the first linear regulator provides a 3.3V forward voltage and the second linear regulator provides a 5.5V forward voltage. If the first linear regulator 211 is selected, a 3.3V forward voltage is input through the first input terminal, connecting to the first resistor 304. The drain of the PMOS device 302 outputs a 3.3V forward voltage to the photodiode 231, thereby clearing residual charge in the photodiode and eliminating image retention.

[0063] Once the image removal phase is complete, reset, exposure, and image acquisition can proceed. The gate of NMOS device 301 is at a low level, the first switching circuit 221 is not conducting, and PMOS device 302 is at a high level, with its drain outputting a 0V voltage.

[0064] Please refer to Figure 7 This is a schematic diagram of the fingerprint acquisition device provided in the embodiments of this application. The fingerprint acquisition device includes a sensor array 410, a ghost image removal circuit 20, a readout unit 420, and a display unit 430.

[0065] The sensor array 410 is mainly used to convert optical signals into electrical signals. The sensor array 410 includes multiple sensing units 23, each of which includes a photodiode 231 and an equivalent capacitor 232. The voltage input terminal of the sensing unit 23 is connected to the regulated output terminal of the control circuit 22.

[0066] The image retention removal circuit 20 is integrated externally to the IC chip and can provide different positive voltages to remove image retention.

[0067] The readout unit 420 is connected to the sensor array 410 and is used to convert electrical signals into digital signals. The readout unit includes an AFE module, which includes a charge release unit, mainly used to provide a certain positive pressure inside the chip to clear residual charge on the sensor array 410.

[0068] The display unit 430 is connected to the readout unit 420. The display unit 430 can be a computer, mobile phone, etc., and is mainly used to receive the digital signal output by the readout unit 420 and display the fingerprint image after the afterimage is cleared.

[0069] This application also provides an electronic device, including the fingerprint acquisition device described in the above embodiments. This electronic device can be a mobile phone, computer, tablet computer, television set, etc.

[0070] The technical solution provided in this application offers a circuit outside the IC chip that can clear afterimages appearing during fingerprint acquisition and recognition. A linear voltage regulator and a control circuit are incorporated into the fingerprint acquisition device. The control circuit includes an NMOS transistor, a PMOS transistor, a current-limiting resistor, and a gating module. Depending on the actual needs, a circuit is selected to provide a stable positive voltage to eliminate residual charge on the photodiode. This saves internal chip space and provides a more stable positive voltage, improving the efficiency of afterimage removal.

[0071] The apparatuses and methods disclosed in the several embodiments provided in this application can also be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatuses, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0072] In addition, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0073] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A ghost image removal circuit, characterized in that, include: Linear regulator; A control circuit, wherein the voltage input terminal of the control circuit is connected to the positive voltage output terminal of the linear regulator; The control circuit is used to apply a positive voltage to the sensing unit before fingerprint image acquisition; The voltage input terminal of the sensing unit is used to connect to the regulated output terminal of the control circuit; The control circuit includes: A first switching circuit, wherein the first terminal of the first switching circuit is grounded, and the second terminal of the first switching circuit is connected to the positive voltage output terminal of the linear regulator; the control terminal of the first switching circuit is used to input an enable signal. A second switching circuit, wherein the control terminal of the second switching circuit is connected to the second terminal of the first switching circuit, the first terminal of the second switching circuit is connected to the positive voltage output terminal of the linear regulator, and the second terminal of the second switching circuit is connected to the sensing unit. The first switching circuit is used to control the second switching circuit to turn on when an enable signal is received, so that the second terminal of the second switching circuit applies a positive voltage to the sensing unit.

2. The image retention removal circuit according to claim 1, characterized in that, The first switching circuit includes an NMOS device; the first terminal of the first switching circuit is the source of the NMOS device, the second terminal is the drain of the NMOS device, and the control terminal is the gate of the NMOS device. The second switching circuit includes a PMOS device; the first terminal of the second switching circuit is the source of the PMOS device, the second terminal of the second switching circuit is the drain of the PMOS device, and the control terminal of the second switching circuit is the gate of the PMOS device.

3. The image retention removal circuit according to claim 1, characterized in that, The control circuit also includes: A current-limiting resistor, one end of which is connected to the second terminal of the first switching circuit, and the other end of which is connected to the linear regulator.

4. The image retention removal circuit according to claim 1, characterized in that, The linear regulator includes a first linear regulator and a second linear regulator; The positive voltage output terminal of the first linear regulator is connected to the second terminal of the first switching circuit and the first terminal of the second switching circuit; The positive voltage output terminal of the second linear regulator is connected to the first terminal of the second switching circuit and the second terminal of the first switching circuit. The first linear regulator and the second linear regulator are used to output voltages of different volt values, and the branch containing the first linear regulator and the branch containing the second linear regulator can be selected to be connected.

5. The image retention removal circuit according to claim 4, characterized in that, The control circuit also includes: The selection module is connected to the first switch circuit and the second switch circuit respectively, and is used to select one of the first switch circuit and the second switch circuit.

6. The image retention removal circuit according to claim 5, characterized in that, The gating module includes: The first resistor has one end connected to the positive voltage output terminal of the first linear regulator and the other end connected to the second terminal of the first switching circuit. The second resistor has one end connected to the positive voltage output terminal of the second linear regulator and the other end connected to the first terminal of the second switching circuit. The first resistor and the second resistor can be selected to operate.

7. A fingerprint acquisition device, characterized in that, include: A sensor array for converting optical signals into electrical signals; The image retention removal circuit according to any one of claims 1-6 is used to provide a positive voltage to the sensor array before fingerprint image acquisition; A readout unit, connected to the sensor array, converts the electrical signal into a digital signal; The display unit, connected to the readout unit, is used to receive the digital signal and display the fingerprint image.

8. The apparatus according to claim 7, characterized in that, The sensor array includes: Multiple sensing units, wherein the voltage input terminal of the sensing unit is used to connect to the regulated output terminal of the control circuit; Each sensing unit includes a photodiode and an equivalent capacitor. The first end of the photodiode is connected to the regulated output terminal of the control circuit. The equivalent capacitor is connected in parallel across the two ends of the photodiode.

9. An electronic device, characterized in that, Includes the fingerprint acquisition device as described in claim 8.

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