Pixel circuits and their driving methods, display panels

Abstract

This invention discloses a pixel circuit and its driving method, as well as a display panel. The pixel circuit includes a driving module, a data writing module, and a light-emitting module. The pixel circuit further includes a compensation module; and / or, the pixel circuit further includes a first initialization module. The compensation module includes a first diode and a first sub-transistor connected in series between a second terminal and a control terminal of the driving module. The first diode and the first sub-transistor are turned on during the compensation phase to perform threshold compensation on the driving module. The first initialization module includes a second diode and a fourth sub-transistor connected in series between a first initialization signal line and the control terminal of the driving module. The second diode and the fourth sub-transistor are turned on during the first initialization phase to transmit a first initialization voltage to the control terminal of the driving module. This solution can maintain the stability of the voltage at the control terminal of the driving module, which is beneficial to improving the display effect of the display panel.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a pixel circuit and its driving method, and a display panel. Background Technology

[0002] Organic light-emitting diode (OLED) display panels have become a research hotspot in the field due to their low power consumption, low production cost, and self-emissive characteristics.

[0003] Existing pixel circuits typically include a driving transistor and an OLED light-emitting element, with the driving transistor driving the light-emitting element to emit light. Currently, during operation, pixel circuits suffer from leakage current at the gate of the driving transistor, leading to unstable gate potential and affecting the display effect of the display device. Summary of the Invention

[0004] This invention provides a pixel circuit and its driving method, as well as a display panel, to improve the leakage phenomenon of the pixel circuit and enhance the display effect.

[0005] According to one aspect of the present invention, a pixel circuit is provided, comprising: a driving module, a data writing module, and a light-emitting module;

[0006] The data writing module is connected between the data line and the driver module. The data writing module is used to transmit the data voltage on the data line to the driver module.

[0007] The driving module and the light-emitting module are connected between the first power line and the second power line. The driving module is used to drive the light-emitting module to emit light during the light-emitting stage.

[0008] The pixel circuit also includes: a compensation module; and / or, the pixel circuit also includes: a first initialization module;

[0009] The compensation module includes a first diode and a first sub-transistor, which are connected in series between the second terminal and the control terminal of the drive module; the first diode and the first sub-transistor are used to conduct during the compensation phase to perform threshold compensation on the drive module;

[0010] The first initialization module includes a second diode and a fourth sub-transistor; the second diode and the fourth sub-transistor are connected in series between the first initialization signal line and the control terminal of the drive module; the second diode and the fourth sub-transistor are used to turn on during the first initialization phase to transmit the first initialization voltage on the first initialization signal line to the control terminal of the drive module.

[0011] Optionally, the first diode and the first sub-transistor are used to turn off during the light-emitting stage; the first electrode of the first diode is electrically connected to the control terminal of the driving module, and the second electrode of the first diode is connected to the second terminal of the driving module via the first sub-transistor;

[0012] Optionally, the compensation module includes a first sub-transistor and a second sub-transistor connected in series, with the gate and first electrode of the second sub-transistor shorted to form a first diode.

[0013] Optionally, the pixel circuit further includes a first voltage control module, a first terminal of which is connected to a first voltage signal line, and a second terminal of which is connected to a first node where the first sub-transistor and the first diode are connected. The first voltage control module is used to turn off during the compensation phase and turn on during the light emission phase to turn off the first diode.

[0014] Optionally, the first sub-transistor is a P-type transistor;

[0015] Optionally, one of the electrodes connected to the control terminal of the first diode is the cathode, and the first voltage on the first voltage signal line is less than the data voltage.

[0016] Optionally, the first voltage on the first voltage signal line is the same as the voltage transmitted on the second power supply line.

[0017] Optionally, the control terminal of the data writing module and the gate of the first sub-transistor are both connected to the first scan line, and the control terminal of the first voltage control module is connected to the second scan line; the effective level of the second scan signal transmitted on the second scan line overlaps with the effective level of the first scan signal transmitted on the first scan line.

[0018] Optionally, the first voltage control module includes a first transistor, the first electrode of the first transistor is connected to a first voltage signal line, the second electrode of the first transistor is connected to a first node, and the gate of the first transistor is connected to a second scan line.

[0019] Optionally, the second diode and the fourth sub-transistor are used to turn off during the light-emitting phase;

[0020] Optionally, the first terminal of the second diode is connected to the first initialization signal line via the fourth sub-transistor, and the second terminal of the second diode is electrically connected to the control terminal of the drive module.

[0021] Optionally, the first initialization module includes a third sub-transistor and a fourth sub-transistor connected in series, with the gate of the third sub-transistor and its first electrode shorted to form a second diode.

[0022] Optionally, the pixel circuit further includes a second voltage control module. The first end of the second voltage control module is connected to the second voltage signal line, and the second end of the second voltage control module is connected to the second node where the second diode and the fourth sub-transistor are connected. The second voltage control module is used to turn off during the first initialization phase and turn on during the light emission phase to turn off the second diode.

[0023] Optionally, the second electrode of the second diode is the anode, and the second voltage on the second voltage signal line is greater than the data voltage;

[0024] Optionally, the second voltage on the second voltage signal line is the same as the voltage transmitted on the first power supply line.

[0025] Optionally, the gate of the fourth sub-transistor is connected to the third scan line, and the control terminal of the second voltage control module is connected to the fourth scan line;

[0026] The effective level of the fourth scan signal transmitted on the fourth scan line is located after the effective level of the third scan signal transmitted on the third scan line, or overlaps with the effective level of the third scan signal.

[0027] Optionally, the second voltage control module includes a second transistor, the first terminal of the second transistor is connected to a second voltage signal line, the second terminal of the second transistor is connected to a second node, and the gate of the second transistor is connected to a fourth scan line.

[0028] The pixel circuit also includes a storage module, with a first end connected to the control end of the drive module and a second end connected to the first power line.

[0029] Optionally, the storage module includes a storage capacitor, the first electrode of the storage capacitor being the first terminal of the storage module, and the second electrode of the storage capacitor being the second terminal of the storage module.

[0030] Optionally, the pixel circuit further includes a first light-emitting control unit and a second light-emitting control unit. The first light-emitting control unit is connected between the first power line and the first end of the driving module, and the second light-emitting control unit is connected between the second end of the driving module and the first end of the light-emitting module. The second end of the light-emitting module is connected to the second power line, and the control terminals of the first and second light-emitting control units are both connected to the light-emitting control signal line.

[0031] Optionally, the pixel circuit further includes a second initialization module, which is connected between the second initialization signal line and the first end of the light-emitting module, and the control end of the second initialization module is connected to the fifth scan line;

[0032] Optionally, the second initialization module, the data writing module, and the compensation module are simultaneously turned on.

[0033] According to another aspect of the present invention, a driving method for a pixel circuit is provided. The pixel circuit includes a driving module, a data writing module, and a light-emitting module. The data writing module is connected between a data line and the driving module, and is used to transmit data voltage on the data line to the driving module. The driving module and the light-emitting module are connected between a first power line and a second power line, and the driving module is used to drive the light-emitting module to emit light during the light-emitting phase. The pixel circuit further includes a compensation module; and / or, the pixel circuit further includes a first initialization module. The compensation module includes a first diode and a first sub-transistor, which are connected in series between a second terminal and a control terminal of the driving module. The first initialization module includes a second diode and a fourth sub-transistor, which are connected in series between a first initialization signal line and the control terminal of the driving module.

[0034] The driving methods for pixel circuits include:

[0035] In the first initialization phase, the second diode and the fourth sub-transistor are turned on to transmit the first initialization voltage on the first initialization signal line to the control terminal of the drive module; and / or,

[0036] During the compensation phase, the first diode and the first sub-transistor are turned on to perform threshold compensation on the drive module.

[0037] According to another aspect of the present invention, a display panel is provided, including the pixel circuit provided in any embodiment of the present invention.

[0038] The technical solution provided in this invention involves writing data voltage to a driving module via a data writing module. The driving module then provides driving current to the light-emitting module based on the voltage at the control terminal, thereby driving the light-emitting module to emit light. The pixel circuit further includes a compensation module, which comprises a first diode and a first sub-transistor connected in series. The first diode and the first sub-transistor are connected through a first node, and the first diode is connected to the control terminal of the driving module. Alternatively, the pixel circuit may also include a first initialization module, which comprises a second diode and a fourth sub-transistor connected in series between the first initialization signal line and the control terminal of the driving module. After the first and fourth sub-transistors are turned off, the compensation module is entirely in a turned-off state. Utilizing the unidirectional conduction characteristic of diodes, the control terminal of the driving module cannot be turned on through the first and second diodes. Compared to compensation modules and first initialization modules using a single transistor in related technologies, the first and second diodes have lower turn-off leakage current, thereby maintaining the stability of the voltage at the control terminal of the driving module and improving the display effect of the display panel.

[0039] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a schematic diagram of the structure of a pixel circuit in related technologies;

[0042] Figure 2 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention;

[0043] Figure 3 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0044] Figure 4 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0045] Figure 5 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0046] Figure 6 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0047] Figure 7 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0048] Figure 8 A schematic diagram of the driving timing of a pixel circuit provided in an embodiment of the present invention;

[0049] Figure 9 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0050] Figure 10 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0051] Figure 11 A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention;

[0052] Figure 12 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0053] Figure 13 A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention;

[0054] Figure 14 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0055] Figure 15 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Detailed Implementation

[0056] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0057] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0058] As mentioned in the background section, in existing pixel circuits, the gate potential of the driving transistor is unstable during operation. OLED light-emitting elements are current-driven control devices, which use driving transistors to drive the OLED light-emitting element to emit light. The output current of the driving transistor is greatly affected by its gate voltage. Therefore, the stability of the gate potential of the driving transistor directly affects the light-emitting state of the OLED light-emitting element. Figure 1 This is a schematic diagram of a pixel circuit in related technologies, for reference. Figure 1The source of the driving transistor DT is connected to the first power supply voltage VDD. The light-emitting diode (OLED) is connected between the drain of the driving transistor DT and the second power supply voltage VSS. The compensation transistor CT is connected between the drain and gate of the driving transistor DT. The initialization transistor RT is connected to the gate of the driving transistor DT and the initialization signal line VREF. The initialization transistor RT turns on in response to the second control signal SN2 at its gate, initializing the potential of the gate of the driving transistor DT. During the data writing phase, the compensation transistor CT turns on in response to the first control signal SN1 at its gate, compensating for the threshold voltage of the driving transistor DT. During the light-emitting phase, when the initialization transistor RT and the compensation transistor CT are turned off, the leakage current flowing through them causes a change in the potential of the gate of the driving transistor DT, resulting in a change in the driving current and thus affecting the light-emitting effect of the OLED. This is one of the reasons for the instability of the gate potential of the driving transistor DT.

[0059] To address the aforementioned problems, this invention provides a pixel circuit to improve leakage current and enhance display performance. Figure 2 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention, with reference to... Figure 2 The pixel circuit provided in this embodiment of the invention includes a driving module 110, a data writing module 120, a compensation module 130, and a light-emitting module 140. The data writing module 120 is connected between a data line and the driving module 110, for example, it can be connected between the data line and a first terminal S of the driving module 110. The compensation module 130 is connected between a second terminal D of the driving module 110 and a control terminal G. The data writing module 120 is used to transmit the data voltage Vdata on the data line to the driving module 110, and the compensation module 130 is used to write data information containing the threshold voltage of the driving module 110 to the control terminal G of the driving module 110. The driving module 110 and the light-emitting module 140 are connected between a first power line L1 and a second power line L2, and the driving module 110 is used to drive the light-emitting module 140 to emit light.

[0060] Specifically, the voltage transmitted on the first power line L1 is the first power supply voltage VDD, and the voltage transmitted on the second power line L2 is the second power supply voltage VSS. After the connection path between the first power supply voltage VDD and the second power supply voltage VSS is made open, the driving module 110 drives the light-emitting module 140 to emit light according to the voltage of its control terminal G and the first terminal S.

[0061] During the data writing phase, the data writing module 120 transmits the data voltage Vdata on the data line to the first terminal S of the driver module 110. During the compensation phase, the compensation module 130 captures the threshold voltage of the driver module 110 and writes data information containing that threshold voltage to the control terminal G of the driver module 110. That is, based on the captured threshold voltage, the voltage written to the control terminal of the driver module 110 is correlated with the threshold voltage of the driver module 110, thus achieving threshold compensation. Here, the data writing phase and the compensation phase can overlap.

[0062] Figure 3 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 3 In this embodiment, the compensation module 130 includes a first diode TD1 and a first sub-transistor M01 connected in series, and the first diode TD1 and the first sub-transistor M01 are connected through a first node N1. Here, the first diode TD1 is configured to only allow high potential to be written to the control terminal G of the driving module 110. That is, the end of the first diode TD1 connected to the control terminal G of the driving module 110 is the cathode, and the end connected to the first node N1 is the anode. During the data writing stage, the voltage at the second terminal D of the driving module 110 is higher than the gate voltage G, the first diode TD1 can conduct, and the data voltage Vdata is normally written to the gate of the driving module 110. During the light-emitting stage, the first sub-transistor M01 is turned off in response to the first scan signal S1 on the first scan line. Due to the unidirectional conductivity of the diode, the first diode TD1 is reverse-biased and cut off, causing the compensation module 130 to be turned off. Moreover, the first diode TD1 has a very small leakage current relative to the first sub-transistor M01, which can maintain the voltage stability of the control terminal G of the driving module 110.

[0063] Figure 4 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 4 In another optional embodiment, the pixel circuit includes: a driving module 110, a data writing module 120, a first initialization module 181, and a light-emitting module 140. The first initialization module 181 includes a second diode TD2 and a fourth sub-transistor M04. The second diode TD2 and the fourth sub-transistor M04 are connected in series between the first initialization signal line and the control terminal G of the driving module 110. The second diode TD2 and the fourth sub-transistor M04 are used to conduct during the first initialization phase to transmit the first initialization voltage Vref1 on the first initialization signal line to the control terminal G of the driving module 110. For example, during the light-emitting phase, by properly configuring the first initialization voltage Vref1, the second diode TD2 is reverse-biased and the first initialization module 181 is turned off. The second diode TD2 has a very small leakage current, which can maintain the voltage stability of the control terminal G of the driving module 110.

[0064] The technical solution provided in this invention involves writing data voltage to a driving module via a data writing module. The driving module then provides driving current to the light-emitting module based on the voltage at the control terminal, thereby driving the light-emitting module to emit light. The pixel circuit further includes a compensation module, which comprises a first diode and a first sub-transistor connected in series. The first diode and the first sub-transistor are connected through a first node, and the first diode is connected to the control terminal of the driving module. Alternatively, the pixel circuit may also include a first initialization module, which comprises a second diode and a fourth sub-transistor connected in series between the first initialization signal line and the control terminal of the driving module. After the first and fourth sub-transistors are turned off, the compensation module is entirely in a turned-off state. Utilizing the unidirectional conduction characteristic of diodes, the control terminal of the driving module cannot be turned on through the first and second diodes. Compared to compensation modules and first initialization modules using a single transistor in related technologies, the first and second diodes have lower turn-off leakage current, thereby maintaining the stability of the voltage at the control terminal of the driving module and improving the display effect of the display panel.

[0065] In this embodiment, the first diode TD1 and the first sub-transistor M01 are used to turn off during the light-emitting phase. Optionally, the first terminal of the first diode TD1 is electrically connected to the control terminal G of the driving module 110, and the second terminal of the first diode TD1 is connected to the second terminal D of the driving module 110 via the first sub-transistor M01. Optionally, the terminal of the first diode TD1 connected to the control terminal G of the driving module 110 is the cathode.

[0066] Figure 5 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 5 In a preferred embodiment of the present invention, the compensation module 130 includes a first sub-transistor M01 and a second sub-transistor M02 connected in series. The gate and first electrode of the second sub-transistor M02 are shorted to form a first diode TD1. The first sub-transistor M01 and the second sub-transistor M02 are connected to the first node N1. The gate and first electrode of the second sub-transistor M02, which is connected to the control terminal G of the driving module 110, are shorted to form the first diode TD1.

[0067] In related technologies, to reduce leakage current, the transistors in the compensation module 130 are typically configured as dual-gate transistors, meaning that the gates of both the first sub-transistor M01 and the second sub-transistor M02 are connected to the first scan line. In this embodiment, the gate and first terminal of the second sub-transistor connected to the control terminal G of the driving module 110 can be shorted, thereby enabling the second sub-transistor M02 to form a diode structure to serve as the first diode TD1. This improves the stability of the potential at the control terminal G of the driving module 110 without requiring significant modifications to the existing pixel circuit structure.

[0068] On the other hand, in the compensation module with a dual-gate transistor structure, a flickering display occurs. The inventors discovered through research that the cause of this problem is: Figure 1 As shown, at the end of the data writing phase, if the compensation transistor CT is a dual-gate transistor formed by two transistors connected in series, and the two gates of the dual-gate transistor are connected to the same scan signal line, the control signal of the dual-gate transistor (such as the first control signal SN1) jumps from an active level to an inactive level, causing the dual-gate transistor to turn off. For example, the active level is the level that turns on the compensation transistor CT, which can be a low level, and the inactive level is the level that turns off the compensation transistor CT, which can be a high level. Due to the influence of parasitic capacitance, when the first control signal SN1 jumps from a low level to a high level, the potential of node N between the first compensation transistor CT1 and the second compensation transistor CT2 is coupled up. The high potential at node N slowly discharges through the first compensation transistor CT1, thereby affecting the potential of the gate of the driving transistor DT. When the next frame arrives, the potential of the gate of the driving transistor DT is significantly different from that of the previous frame, resulting in a difference in the brightness of the two frames, thus causing screen flickering.

[0069] To address the aforementioned issues, this embodiment of the invention adds a voltage control module to the above technical solution to eliminate the potential coupling phenomenon of the first node N1. Figure 6 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 6 Based on the above technical solution, optionally, the pixel circuit includes a first voltage control module 171. The first end of the first voltage control module 171 is connected to the first voltage signal line, and the second end of the first voltage control module 171 is connected to the first node N1. The first voltage control module 171 is used to turn off during the compensation stage and turn on during the light emission stage, transmitting the first voltage V1 on the first voltage signal line to the first node N1 so that the first diode TD1 is turned off.

[0070] Figure 7 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 7Optionally, based on the above technical solution, the control terminal of the data writing module 120 and the gate of the first sub-transistor M01 are both connected to the first scan line to respond to the first scan signal S1 output by the first scan line; the control terminal of the first voltage control module 171 is connected to the second scan line to respond to the second scan signal S2 output by the second scan line. The first voltage control module 171 includes a first transistor M1, the first electrode of the first transistor M1 is connected to a first voltage signal line, the first voltage signal line is used to transmit a first voltage V1, the second electrode of the first transistor M1 is connected to a first node N1, and the gate of the first transistor M1 is connected to the second scan line.

[0071] Figure 8 This is a schematic diagram of the driving timing of a pixel circuit provided in an embodiment of the present invention, wherein, Figure 8 Only the driving timing of the first scan signal S1 and the second scan signal S2 is shown. (Reference) Figure 8 In this embodiment, the first scan signal S1 is a pulse signal, and the second scan signal S2 is a transition voltage. The effective level of the second scan signal S2 overlaps with the effective level of the first scan signal S1. That is, the level of the second scan signal S2 transitions during the effective level phase of the first scan signal S1. The effective level of the second scan signal S2 enables the first voltage control module 171 to conduct. The effective level of the first scan signal S1 enables the first sub-transistor M01 to conduct. Within the same display frame, the start time of the effective level of the second scan signal S2 can be before the end time of the effective level of the first scan signal S1.

[0072] Combination Figure 6 and Figure 7 The first scan signal S1 is a low-level signal, the first sub-transistor M01 and the third transistor M3 are turned on, and the data voltage Vdata is written to the gate of the driving transistor DT through the third transistor M3, the driving transistor DT, the first sub-transistor M01 and the first diode TD1. When the first scan signal S1 changes, the second scan signal S2 changes from high level to low level, the first transistor M1 is turned on, and the first voltage V1 is transmitted to the first node N1, clamping the potential of the first node N1 at the low level of the first voltage V1, so as to control the potential of the first node N1.

[0073] Specifically, during the data writing phase, the data voltage Vdata is written to the first terminal S of the driving module 110 via the data writing module 120. During the compensation phase, the data voltage Vdata is written to the control terminal G of the driving module 110 via the first sub-transistor M01 and the second sub-transistor M02 (first diode TD1). After the first sub-transistor M01 is turned on for a first preset time and before it is turned off, the first voltage control module 171 is turned on to transmit the first voltage V1 to the first node N1 and control the potential of the first node N1. In this way, when the first scan signal S1 transitions from an effective level to an ineffective level, the first node N1 is clamped by the first voltage V1 and will not be coupled out to a high potential. The first preset time can be set according to the actual situation to ensure that the data voltage Vdata can be fully written to the control terminal G of the driving module 110. The data writing module 120 includes a third transistor M3, the storage module 110 includes a storage capacitor C1, and the light-emitting module 140 includes a light-emitting diode D0.

[0074] Taking the driving transistor DT and the first sub-transistor M01, which are P-type transistors, as an example, before the first sub-transistor M01 is turned off, the first voltage control module 171 is turned on to transmit the first voltage V1 to the first node N1. When the first scan signal S1 transitions from low to high level, a high potential is no longer coupled out at the first node N1. Therefore, after the data writing stage, the first node N1 will not continue to charge the gate of the driving transistor DT (the control terminal G of the driving module 110). Further, in this embodiment, the second sub-transistor M02 is a diode connection. The gate and the first terminal of the second sub-transistor M02 are connected together as the negative terminal of the first diode TD1 and connected to the gate of the driving transistor DT. The second terminal of the second sub-transistor M02 is connected to the first node N1 as the positive terminal of the first diode TD1. In this process, the first voltage V1 is less than the data voltage Vdata. Since the positive terminal of the first diode TD1 is subjected to the low potential of the first voltage V1, the first diode TD1 is reverse cut off. During the light-emitting stage, the potential at the first node N1 cannot be transmitted to the gate of the driving transistor DT through the first diode TD1. Therefore, it will not affect the gate potential of the driving transistor DT, which can improve the stability of the gate potential of the driving transistor DT. This can reduce the potential difference with the next frame and help improve the display quality.

[0075] In this embodiment, after the compensation phase, since the potential of the first node N1 is low, there will be no leakage to the gate of the driving transistor DT, which is at a high potential. This can improve the stability of the gate voltage of the driving transistor DT after charging is completed. Also, since the first diode TD1 is in the reverse cutoff state, the low potential first voltage V1 at the first node N1 will not be written to the gate of the driving transistor DT, which is beneficial to further improve the stability of the gate voltage and thus improve the phenomenon of screen flickering.

[0076] The technical solution provided by this invention, by setting a first voltage control module, transmits a first voltage to the first node before the first sub-transistor in the compensation module is turned off in response to the first scan signal, thereby controlling the voltage at the first node. This prevents a high potential from being coupled out and pulling up the potential of the first node when the first scan signal transitions from an effective level to an ineffective level, ensuring that the potential at the first node is lower than the potential at the control terminal of the driving module. This eliminates the phenomenon in the prior art where the potential at the first node rises, causing a change in the potential at the control terminal of the driving module. Furthermore, the first diode is in a reverse cutoff state during the light-emitting phase, so the potential at the first node does not affect the potential at the control terminal of the driving module, thus improving the stability of the potential at the control terminal of the driving module and consequently improving display quality.

[0077] Optionally, the second diode TD2 and the fourth sub-transistor M04 are used to turn off during the light-emitting phase. Optionally, the first terminal of the second diode TD2 is connected to the first initialization signal line via the fourth sub-transistor M04, and the second terminal of the second diode TD2 is electrically connected to the control terminal of the drive module 110.

[0078] Figure 9 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 9 Optionally, based on the above technical solutions, the pixel circuit further includes a first initialization module 181. The first initialization module 181 is connected between the first initialization signal line and the control terminal G of the driving module 110. The first initialization module 181 is used to transmit the first initialization voltage Vref1 on the first initialization signal line to the control terminal G of the driving module 110.

[0079] In this embodiment, to reduce leakage current at the control terminal G of the drive module 110, the first initialization module 181 includes dual-gate transistors. For example, the first initialization module 181 includes a third sub-transistor M03 and a fourth sub-transistor M04 connected in series, which are connected to the second node N2. The first terminal of the third sub-transistor M03 and the second terminal of the fourth sub-transistor M04 are connected to the second node N2. The first terminal of the fourth sub-transistor M04 is connected to the first initialization signal line, and the second terminal of the third sub-transistor M03 is connected to the control terminal G of the drive module 110. Both the third sub-transistor M03 and the fourth sub-transistor M04 can be turned on in response to the third scan signal transmitted on the third scan line, so as to transmit the first initialization voltage Vref1 on the first initialization signal line to the control terminal G of the drive module 110 during the first initialization phase, thereby initializing the control terminal G of the drive module 110.

[0080] Figure 10 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 10 Based on the above technical solution, optionally, the gate and first electrode of the third sub-transistor M03 are shorted to form a second diode TD2. Optionally, the gate and first electrode of the third sub-transistor M03, which is connected to the control terminal G of the driving module 110, are shorted to form a second diode TD2.

[0081] Optionally, the pixel circuit further includes a second voltage control module 172, which is connected to the second node N2. The second voltage control module 172 is used to turn off during the first initialization phase and turn on during the light-emitting phase, so as to turn off the second diode TD2. Optionally, the second voltage control module 172 is used to continuously write a second voltage V2 to the second node N2 after the first initialization module 181 has been turned on for a preset time (e.g., a second preset time, which may be the same as or different from the first preset time), so as to control the potential of the second node N2.

[0082] Specifically, before the data writing stage, a first initialization stage is included. In the first initialization stage, the fourth sub-transistor M04 is turned on, transmitting the first initialization voltage Vref1 to the second node N2. Since the first initialization voltage Vref1 is less than the voltage at the control terminal G of the drive module 110, the first initialization voltage Vref1 at the second node N2 is transmitted to the control terminal G of the drive module 110 via the second diode TD2, initializing the control terminal G of the drive module 110. After a preset time following the turn-on of the fourth sub-transistor M04, the second voltage control module 172 is turned on in response to the fourth scan signal, transmitting the second voltage signal on the second voltage signal line to the second node N2 to control the potential of the second node N2 to be high. The second voltage V2 is greater than the data voltage Vdata.

[0083] After the second voltage control module 172 controls the potential of the second node N2, the potential at the second node N2 is higher than the potential of the control terminal G of the driving module 110. Therefore, the second diode TD2 is reverse-biased and the voltage at the second node N2 cannot be transmitted to the control terminal G of the driving module 110 through the second diode TD2. This prevents the potential of the second node N2 from affecting the potential of the control terminal G of the driving module 110 during the light-emitting stage, thus avoiding the problem of display brightness differences. In addition, since the potential at the second node N2 is higher than the potential of the control terminal G of the driving module 110, the voltage at the control terminal G of the driving module 110 will hardly leak current through the second diode TD2 (a very small leakage current) during the light-emitting stage, which can improve the stability of the potential of the control terminal G of the driving module 110.

[0084] This embodiment of the invention, by setting a first diode TD1 and a first voltage control module 171, ensures that the first sub-transistor M01 no longer couples out a high potential when it is turned off, thus eliminating the influence of the coupled high potential of the first node N1 on the control terminal G of the driving module 110. Furthermore, combined with the second diode TD2 and the second voltage control module 172, both the first diode TD1 and the second diode TD2 are under voltage stress during the light-emitting phase. This allows the different high and low potentials of the first node N1 and the second node N2 to flow into the control terminal G of the driving module 110 through the first diode TD1 and the second diode TD2, ensuring the stability of the potential at the control terminal G of the driving module 110, thereby improving the display effect.

[0085] Figure 11 This is a schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention, with reference to... Figure 10 and Figure 11 The effective level of the fourth scan signal S4 transmitted on the fourth scan line is located after the effective level of the third scan signal S3 transmitted on the third scan line (e.g., Figure 11 (as shown by the dashed line in the middle), or there is overlap with the effective level of the third scan signal S3 (such as...). Figure 11 (As shown by the solid line in the middle). The effective level of the fourth scan signal S4 here is after the effective level of the third scan signal S3, including the case where the third scan signal S3 and the fourth scan signal S4 change simultaneously. The third scan signal S3 is a pulse signal, and the fourth scan signal S4 is a voltage signal. In this embodiment, as long as the control terminal G of the drive module 110 is fully initialized, the second voltage V2 can be transmitted to the second node N2 without adversely affecting the normal operation of other stages. The effective level of the third scan signal S3 can turn on the fourth sub-transistor M04. The effective level of the fourth scan signal S4 can turn on the second voltage control module 172. Within the same display frame, the start time of the effective level of the fourth scan signal S4 can be before the end time of the effective level of the third scan signal S3.

[0086] As another optional implementation provided in this embodiment, the first voltage V1 can be the same as the second power supply voltage VSS transmitted on the second power supply line L2, and the second voltage V2 can be the same as the first power supply voltage VDD transmitted on the first power supply line L1. That is, the first power supply line L1 is multiplexed as the second voltage signal line, and the second power supply line L2 is multiplexed as the first voltage signal line, so as to save the number of signal lines and improve the PPI.

[0087] Figure 12 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 12 Based on the above technical solutions, optionally, the second voltage control module 172 includes a second transistor M2, the first terminal of the second transistor M2 is connected to the second voltage signal line, the second terminal of the second transistor M2 is connected to the second node N2, and the gate of the second transistor M2 is connected to the fourth scan line.

[0088] Optionally, the storage module 150 includes a storage capacitor C1, the first electrode of the storage capacitor C1 being the first terminal of the storage module, and the second electrode of the storage capacitor being the second terminal of the storage module.

[0089] Optionally, the pixel circuit further includes a first light-emitting control unit 161 and a second light-emitting control unit 162. The first light-emitting control unit 161 is connected between the first power line L1 and the first terminal S of the driving module 110. The second light-emitting control unit 162 is connected between the second terminal D of the driving module 110 and the first terminal of the light-emitting module 140. The second terminal of the light-emitting module 140 is connected to the second power line L2. The control terminals of both the first and second light-emitting control units 161 and 162 are connected to a light-emitting control signal line; the light-emitting control signal line is used to transmit a light-emitting control signal EM. The first light-emitting control unit 161 includes a fourth transistor M4, and the second light-emitting control unit 162 includes a fifth transistor M5.

[0090] Optionally, the pixel circuit further includes a second initialization module 182, which is connected between the second initialization signal line and the first terminal of the light-emitting module 140. The control terminal of the second initialization module 182 is connected to the fifth scan line. The second initialization module 182 includes a sixth transistor M6, the first terminal of which is connected to the second initialization voltage Vref2 on the second initialization signal line, the second terminal of which is connected to the first terminal of the light-emitting module 140, and the gate of which is connected to the fifth scan line. The second initialization module 182 is used to initialize the potential of the first terminal of the light-emitting module 140 during the second initialization phase.

[0091] Figure 13 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 12 The pixel circuit shown, combined with Figure 13 and Figure 12 Taking a pixel circuit where all transistors are P-type as an example, the operation of the pixel circuit includes an initialization stage T1, a data writing stage T2, and a light emission stage T3. Of course, in other embodiments, each transistor can also be an N-type transistor, or some transistors can be P-type transistors and the rest can be N-type transistors, and the circuit operation process remains the same.

[0092] In the first initialization phase T1, the first scan signal S1 is at an off level (e.g., high level), the second scan signal S2 is at an off level (e.g., high level), the third scan signal S3 is at an on level (e.g., low level), the fourth scan signal S4 is high level, the fifth scan signal S5 is at an off level (e.g., high level), and the light emission control signal EM is at an off level (e.g., high level). Therefore, the fourth sub-transistor M04 is turned on, and the first initialization voltage Vref1 is transmitted to the second node N2 via the fourth sub-transistor M04. Since the first initialization voltage Vref1 is less than the voltage at the control terminal G of the driver module 110, the first initialization voltage Vref1 at the second node N2 is transmitted to the control terminal G of the driver module 110 via the second sub-transistor TD2, thus initializing the control terminal G of the driver module 110.

[0093] After the first initialization phase T1 (or at a preset time before the third scan signal S3 transitions), the fourth scan signal S4 transitions to an on level, for example, a low level. The high-potential second voltage V2 is written to the second node N2 via the on-state second transistor M2, controlling the potential of the second node N2. At this time, the potential of the second node N2 is higher than the gate potential of the driving transistor DT, and the second diode TD2 is reverse-biased and cut off.

[0094] During the data writing and compensation phase T2, the first scan signal S1 is at an on level (e.g., low), the third scan signal S3 is at an off level (e.g., high), the fourth scan signal S4 is at an on level (e.g., low), the fifth scan signal S5 is at an off level (e.g., low), and the light emission control signal EM is at an off level (e.g., high). Therefore, the third transistor M3, the first sub-transistor M01, and the second transistor M2 are turned on, and the second voltage V2 is continuously written to the second node N2. The data voltage Vdata is written to the gate of the driving transistor DT via the third transistor M3, the driving transistor DT, the first sub-transistor M01, and the first diode TD1, thus realizing data writing and threshold compensation for the driving transistor DT. At the moment when the first scan signal S1 changes, the second scan signal S2 changes from high level to low level. The first transistor M1 turns on, and the first voltage V1 is transmitted to the first node N1, clamping the potential of the first node N1 at the low level of the first voltage V1, so as to control the potential of the first node N1 and keep the first node N1 at a low potential, so that the first diode TD1 is always in the reverse cutoff state.

[0095] During the data writing phase and compensation phase T2, the second initialization voltage Vref2 is written to the first terminal of the light-emitting diode D0 via the sixth transistor M6 to initialize the first terminal of the light-emitting diode D0. In other words, the second initialization phase occurs simultaneously with the data writing phase and compensation phase T2. Of course, in other embodiments, the second initialization phase can also be performed independently.

[0096] During the light-emitting phase T3, the first scan signal S1 is at a turn-off level (e.g., high level), the second scan signal S2 is at a turn-on level (e.g., low level), the third scan signal S3 is at a turn-off level (e.g., high level), the fourth scan signal S4 is at a turn-on level (e.g., low level), the fifth scan signal S5 is at a turn-off level (e.g., high level), and the light-emitting control signal EM is at a turn-on level (e.g., low level). Therefore, the first transistor M1, the second transistor M2, the fourth transistor M4, and the fifth transistor M5 are turned on, and the connection path between the first power line L1 and the second power line L2 is open, driving the transistor DT to generate a driving current, which drives the light-emitting diode D0 to emit light. During this period, the first diode TD1 and the second diode TD2 remain in a reverse cutoff state. The low-potential first voltage V1 at the first node N1 will not be written to the gate of the driving transistor DT, and the high-potential second voltage V2 at the second node N2 will not be written to the gate of the driving transistor DT, which helps maintain the stability of the gate potential of the driving transistor DT. Furthermore, the presence of the first diode TD1 and the second diode TD2 helps to reduce the gate leakage current problem of the driving transistor DT, further improves the stability of the gate voltage, and thus improves the flickering phenomenon of the display screen.

[0097] It should be noted that in the above embodiments, the electrode connected to the control terminal G of the first diode TD1 is the cathode, and the electrode connected to the control terminal G of the second diode TD2 is the anode. When both the first diode TD1 and the second diode TD2 are transistors forming a diode structure, the second sub-transistor M02 and the third sub-transistor M03 in the above embodiments are described using P-type transistors as an example. Of course, the second sub-transistor M02 and the third sub-transistor M03 can also be N-type transistors, in which case the short-circuit positions of the sub-transistors change. Figure 14 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 14 When the second sub-transistor M02 and the third sub-transistor M03 are N-type transistors, the terminal of the second sub-transistor M02 connected to the first node N1 is the first terminal, and the gate of the second sub-transistor M02 is shorted to the first terminal to form the anode of the first diode TD1. Similarly, the terminal of the third sub-transistor M03 connected to the control terminal G of the drive module 110 is the first terminal, and the gate of the third sub-transistor M03 is shorted to the first terminal to form the anode of the second diode TD1. The operation of this pixel circuit is similar to... Figure 10 The operation of the pixel circuit shown is the same, and will not be described again.

[0098] Optionally, the driving transistor DT is a P-type transistor, with the cathode of the first diode TD1 connected to the gate of the driving transistor DT; and the anode of the second diode TD1 connected to the gate of the driving transistor DT. Optionally, when the driving transistor DT is an N-type transistor, the anode of the first diode TD1 is connected to the gate of the driving transistor DT; and the cathode of the second diode TD1 is connected to the gate of the driving transistor DT.

[0099] Optionally, embodiments of the present invention also provide a pixel circuit driving method for driving the pixel circuit provided in any embodiment of the present invention. Therefore, this pixel circuit driving method possesses the beneficial effects described in any of the above embodiments. The pixel circuit driving method includes:

[0100] In the first initialization phase, the second diode TD2 and the fourth sub-transistor M04 are turned on to transmit the first initialization voltage on the first initialization signal line to the control terminal of the drive module; and / or, in the compensation phase, the first diode TD1 and the first sub-transistor M01 are turned on to perform threshold compensation on the drive module.

[0101] Furthermore, the driving method also includes: during the data writing phase, controlling the data writing module 120 to be turned on so as to transmit the data voltage to the driving module 110. The data writing phase occurs after the first initialization phase and before the compensation phase. Alternatively, the data writing phase occurs after the first initialization phase and coincides with the compensation phase, meaning the data writing phase and the compensation phase occur simultaneously.

[0102] Optionally, the driving method further includes: during the light-emitting phase, the driving module 110 drives the light-emitting module 140 to emit light. During the light-emitting phase, the second diode TD2 and the fourth sub-transistor M04 are turned off. During the light-emitting phase, the first diode TD1 and the first sub-transistor M01 are turned off.

[0103] Optionally, during the compensation phase, the first voltage control module 171 is turned off, and during the light emission phase, the first voltage control module 171 is turned on to turn off the first diode TD1.

[0104] Optionally, during the first initialization phase, the second voltage control module 181 is turned off, and during the light emission phase, the second voltage control module 181 is turned on to turn off the second diode TD2.

[0105] Optionally, the present invention also provides a display panel that includes the pixel circuit provided in any embodiment of the present invention, and thus the display panel also has the beneficial effects described in any of the above embodiments.

[0106] Figure 15 This is a schematic diagram of a display panel provided in an embodiment of the present invention. In this embodiment, the display panel can be applied to, for example... Figure 15 The mobile phone shown can also be used in any electronic product with display function, including but not limited to the following categories: television, laptop, desktop monitor, tablet, digital camera, smart bracelet, smart glasses, in-vehicle display, medical equipment, industrial control equipment, touch interactive terminal, etc. The embodiments of the present invention do not make any special limitations on this.

[0107] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0108] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A pixel circuit, characterized in that, The pixel circuit includes: a driving module, a data writing module, and a light-emitting module; The data writing module is connected between the data line and the driving module, and the data writing module is used to transmit the data voltage on the data line to the driving module; the driving module and the light-emitting module are connected between the first power line and the second power line, and the driving module is used to drive the light-emitting module to emit light during the light-emitting stage; The pixel circuit further includes: a compensation module; or, the pixel circuit further includes: a compensation module and a first initialization module; The compensation module includes a first diode and a first sub-transistor, which are connected in series between the second terminal and the control terminal of the driving module; the first diode and the first sub-transistor are used to conduct during the compensation phase to perform threshold compensation on the driving module. The first initialization module includes a second diode and a fourth sub-transistor; the second diode and the fourth sub-transistor are connected in series between the first initialization signal line and the control terminal of the drive module; the second diode and the fourth sub-transistor are used to be turned on during the first initialization phase to transmit the first initialization voltage on the first initialization signal line to the control terminal of the drive module; The pixel circuit further includes a first voltage control module. A first terminal of the first voltage control module is connected to a first voltage signal line, and a second terminal of the first voltage control module is connected to a first node where the first sub-transistor and the first diode are connected. The first voltage control module is used to turn off during the compensation phase and turn on during the light emission phase, so as to turn off the first diode. The control terminal of the data writing module and the gate of the first sub-transistor are both connected to the first scan line, and the control terminal of the first voltage control module is connected to the second scan line. The effective level of the second scan signal transmitted on the second scan line overlaps with the effective level of the first scan signal transmitted on the first scan line. Within the same display frame, the start time of the effective level of the second scan signal is before the end time of the effective level of the first scan signal.

2. The pixel circuit according to claim 1, characterized in that, The first diode and the first sub-transistor are used to turn off during the light-emitting phase; The first electrode of the first diode is electrically connected to the control terminal of the driving module, and the second electrode of the first diode is connected to the second terminal of the driving module via the first sub-transistor.

3. The pixel circuit according to claim 2, characterized in that, The compensation module includes a first sub-transistor and a second sub-transistor connected in series, wherein the gate and the first electrode of the second sub-transistor are shorted to form the first diode.

4. The pixel circuit according to claim 1, characterized in that, One of the electrodes of the first diode connected to the control terminal of the driving module is the cathode, and the first voltage on the first voltage signal line is less than the data voltage.

5. The pixel circuit according to claim 4, characterized in that, The first voltage on the first voltage signal line is the same as the voltage transmitted on the second power supply line.

6. The pixel circuit according to claim 1, characterized in that, The first voltage control module includes a first transistor, the first terminal of the first transistor is connected to a first voltage signal line, the second terminal of the first transistor is connected to the first node, and the gate of the first transistor is connected to the second scan line.

7. The pixel circuit according to claim 1, characterized in that, The second diode and the fourth sub-transistor are used to turn off during the light-emitting phase; The first terminal of the second diode is connected to the first initialization signal line via the fourth sub-transistor, and the second terminal of the second diode is electrically connected to the control terminal of the drive module.

8. The pixel circuit according to claim 7, characterized in that, The first initialization module includes a third sub-transistor and a fourth sub-transistor connected in series, wherein the gate and the first electrode of the third sub-transistor are shorted to form the second diode.

9. The pixel circuit according to claim 7, characterized in that, The pixel circuit further includes a second voltage control module. The first end of the second voltage control module is connected to a second voltage signal line, and the second end of the second voltage control module is connected to a second node where the second diode and the fourth sub-transistor are connected. The second voltage control module is used to turn off during the first initialization phase and turn on during the light emission phase to turn off the second diode.

10. The pixel circuit according to claim 9, characterized in that, The second electrode of the second diode is the anode, and the second voltage on the second voltage signal line is greater than the data voltage.

11. The pixel circuit according to claim 9, characterized in that, The second voltage on the second voltage signal line is the same as the voltage transmitted on the first power supply line.

12. The pixel circuit according to claim 9, characterized in that, The gate of the fourth sub-transistor is connected to the third scan line, and the control terminal of the second voltage control module is connected to the fourth scan line. The effective level of the fourth scan signal transmitted on the fourth scan line is located after the effective level of the third scan signal transmitted on the third scan line, or overlaps with the effective level of the third scan signal.

13. The pixel circuit according to claim 12, characterized in that, The second voltage control module includes a second transistor, the first terminal of the second transistor is connected to a second voltage signal line, the second terminal of the second transistor is connected to the second node, and the gate of the second transistor is connected to the fourth scan line.

14. The pixel circuit according to claim 1, characterized in that, The pixel circuit also includes a storage module, the first end of which is connected to the control terminal of the driving module, and the second end of which is connected to the first power line.

15. The pixel circuit according to claim 14, characterized in that, The storage module includes a storage capacitor, the first electrode of which is the first terminal of the storage module, and the second electrode of which is the second terminal of the storage module.

16. The pixel circuit according to claim 1, characterized in that, The pixel circuit further includes a first light-emitting control unit and a second light-emitting control unit. The first light-emitting control unit is connected between the first power line and the first end of the driving module. The second light-emitting control unit is connected between the second end of the driving module and the first end of the light-emitting module. The second end of the light-emitting module is connected to the second power line. The control terminals of the first light-emitting control unit and the second light-emitting control unit are both connected to the light-emitting control signal line.

17. The pixel circuit according to claim 1, characterized in that, The pixel circuit further includes a second initialization module, which is connected between the second initialization signal line and the first end of the light-emitting module, and the control end of the second initialization module is connected to the fifth scan line.

18. The pixel circuit according to claim 17, characterized in that, The second initialization module, the data writing module, and the compensation module are all turned on simultaneously.

19. A driving method for a pixel circuit, applicable to the pixel circuit as described in any one of claims 1-18, characterized in that, The pixel circuit includes a driving module, a data writing module, and a light-emitting module. The data writing module is connected between the data line and the driving module, and is used to transmit the data voltage on the data line to the driving module. The driving module and the light-emitting module are connected between the first power line and the second power line. The driving module is used to drive the light-emitting module to emit light during the light-emitting phase. The pixel circuit further includes: a compensation module; and / or, the pixel circuit further includes: a first initialization module; the compensation module includes a first diode and a first sub-transistor, the first diode and the first sub-transistor being connected in series between the second terminal and the control terminal of the driving module; the first initialization module includes a second diode and a fourth sub-transistor; the second diode and the fourth sub-transistor being connected in series between the first initialization signal line and the control terminal of the driving module; The driving method for the pixel circuit includes: In the first initialization phase, the second diode and the fourth sub-transistor are turned on to transmit the first initialization voltage on the first initialization signal line to the control terminal of the drive module; and / or, During the compensation phase, the first diode and the first sub-transistor are turned on to perform threshold compensation on the driving module.

20. A display panel, characterized in that, Includes the pixel circuit as described in any one of claims 1-18.

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