Method of manufacturing deep trench isolated photodiode

CN116344666BActive Publication Date: 2026-08-07HUA HONG SEMICON WUXI LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HUA HONG SEMICON WUXI LTD
Filing Date
2022-11-10
Publication Date
2026-08-07

AI Technical Summary

Technical Problem

[0004]请参阅图1,目前所采取的深沟槽和外延方案在进行完各向同性刻蚀后A处的缺陷严重,后续的清洗步骤很难完全清洗干净

Benefits of technology

[0024]本发明将N型外延层上刻蚀的区域由“X”型结构改成“口”型的“桥”结构,“桥”结构底部更易掏空,减少各向同性刻蚀的量,减小N型外延层的损耗;N型外延层上刻蚀的孔洞更多、更宽(N Epi损耗少,孔洞可以设计的更宽),刻蚀量减少,刻蚀中产生的副产物更易排出,有利于后续的湿法清洗,减少缺陷数量。

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Abstract

The application provides a manufacturing method of a deep trench isolation photodiode, which comprises the following steps: providing a substrate, forming an N-type epitaxial layer and an etching stop layer on the substrate; forming a photoresist layer on the etching stop layer, opening the photoresist layer by photolithography, and exposing the etching stop layer under the photoresist layer, wherein the opened area of the photoresist layer comprises a first area and a second area, and each four first areas are distributed along the circumference of the second area, and the distance between the second area and the surrounding second area is a first design value; etching the exposed etching stop layer and the N-type epitaxial layer under the etching stop layer to form a first recess, then forming a side wall protection layer on the first recess, etching the bottom of the first recess, and etching the N-type epitaxial layer to form a second recess; forming an intrinsic epitaxial layer on the second recess, and then forming a first P-type epitaxial layer to the bottom of the side wall protection layer. The application reduces the amount of isotropic etching and reduces the loss of the N-type epitaxial layer.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for manufacturing a deep trench isolated photodiode. Background Technology

[0002] Traditional photodiodes are formed using photolithography and IMP (ion implantation) processes. However, this process is limited by the aspect ratio of the photoresist and the depth and concentration of the IMP implantation, which prevents further improvement in the photosensitivity of the photodiode.

[0003] To extend the depth of P-type photodiodes, the current approach is to form deep photodiodes through epitaxy. This involves growing N-type epitaxy on a silicon substrate, followed by photolithography and etching to form a deep trench structure. Then, intrinsic and P-type epitaxy are grown sequentially to seal and fill the deep trenches. Finally, a CMOS image sensor is formed using conventional CMOS processes.

[0004] Please see Figure 1 The current deep trench and epitaxial methods result in severe defects at point A after isotropic etching, making it difficult to completely clean in subsequent cleaning steps. Furthermore, they deplete the N-type epitaxial layer volume, thereby reducing the full-well capacity of the photodiode.

[0005] To solve the above problems, a novel manufacturing method for deep trench isolated photodiodes is needed. Summary of the Invention

[0006] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method for manufacturing a deep trench isolated photodiode, which solves the problem that the deep trench and epitaxial schemes adopted in the prior art have serious defects after isotropic etching, and the subsequent cleaning steps are difficult to completely clean them, and will lose the volume of the N-type epitaxial layer, thereby reducing the full-well capacity of the photodiode.

[0007] To achieve the above and other related objectives, the present invention provides a method for manufacturing a deep trench isolated photodiode, comprising:

[0008] Step 1: Provide a substrate, and form an N-type epitaxial layer and an etch barrier layer on the N-type epitaxial layer;

[0009] Step 2: Form a photoresist layer on the etch barrier layer, and use photolithography to open the photoresist layer, exposing the etch barrier layer underneath. The opened area on the photoresist layer includes a first region and a second region. Every four first regions are distributed in a circle along the second region. The distance between the second region and the surrounding first regions is a first design value.

[0010] Step 3: Etch the exposed etching barrier layer and the N-type epitaxial layer below it to form a first groove, then form a sidewall protective layer on the first groove, and then etch the bottom of the first groove to form a second groove.

[0011] Step 4: An intrinsic epitaxial layer is formed on the second groove. Then, the bottom of the first groove is etched using anisotropic etching, and the N-type epitaxial layer is etched using isotropic etching to form the second groove.

[0012] Step 5: Remove the sidewall protective layer and the etching barrier layer, and form a second P-type epitaxial layer on the first P-type epitaxial layer that covers the N-type epitaxial layer. Then grind the second P-type epitaxial layer over the N-type epitaxial layer.

[0013] Preferably, the substrate in step one is a silicon substrate.

[0014] Preferably, the material of the etching barrier layer in step one is silicon nitride or silicon dioxide.

[0015] Preferably, in step two, both the first and second regions are rectangular in shape.

[0016] Preferably, in step two, the distance between each of the first regions and the second region is equal.

[0017] Preferably, in step two, the first design value is 50 to 100 nanometers.

[0018] Preferably, in step two, the lengths of the adjacent sides of the first and second regions are equal, and their lengths are both 0.2 to 0.4 micrometers.

[0019] Preferably, the distance between the two second regions in step two is 0.3 to 0.5 micrometers.

[0020] Preferably, in step three, the depth of the first groove on the N-type epitaxial layer is 0.3 to 0.8 micrometers.

[0021] Preferably, the material of the sidewall protective layer in step three is silicon nitride or silicon dioxide.

[0022] Preferably, in step three, the depth of the second groove on the N-type epitaxial layer is 2.7 to 3.3 micrometers.

[0023] As described above, the manufacturing method of the deep trench isolated photodiode of the present invention has the following beneficial effects:

[0024] This invention changes the etched area on the N-type epitaxial layer from an "X"-shaped structure to a "U"-shaped "bridge" structure. The bottom of the "bridge" structure is easier to hollow out, reducing the amount of isotropic etching and reducing the loss of the N-type epitaxial layer. The etched holes on the N-type epitaxial layer are more numerous and wider (N-Epit loss is low, and the holes can be designed to be wider), the amount of etching is reduced, and the by-products generated during etching are easier to remove, which is beneficial for subsequent wet cleaning and reduces the number of defects. Attached Figure Description

[0025] Figure 1 This diagram illustrates the defects of existing technology.

[0026] Figure 2 The diagram shows the substrate and the structure thereon of the present invention.

[0027] Figure 3 The diagram shown illustrates the opening of the etching barrier layer according to the present invention.

[0028] Figure 4 The diagram shown illustrates the formation of the first groove according to the present invention.

[0029] Figure 5 The diagram shown illustrates the formation of the sidewall protective layer according to the present invention.

[0030] Figure 6 The diagram shows the bottom of the first etched groove of the present invention.

[0031] Figure 7 The diagram shown illustrates the formation of the second groove according to the present invention.

[0032] Figure 8 The diagram shown illustrates the formation of the intrinsic epitaxial layer according to the present invention.

[0033] Figure 9 The diagram shown illustrates the formation of the first P-type epitaxial layer according to the present invention.

[0034] Figure 10 The diagram shows the removal of the sidewall protective layer and the etching barrier layer according to the present invention.

[0035] Figure 11 The diagram shown illustrates the formation of the second P-type epitaxial layer according to the present invention.

[0036] Figure 12 The diagram shown is a schematic diagram of the grinding of the second P-type epitaxial layer according to the present invention.

[0037] Figure 13 The diagram shown illustrates the formation of the "bridge" structure according to the present invention.

[0038] Figure 14 The diagram shown is a schematic representation of the process flow of this invention. Detailed Implementation

[0039] The following describes the implementation manners of the present invention through specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0040] Please refer to Figure 14 , the present invention provides a method for manufacturing a deep trench isolation photodiode, including:

[0041] Step 1: Provide a substrate 101, form an N-type epitaxial layer 102 on the substrate 101 and an etching stop layer 103 on the N-type epitaxial layer 102, to form a structure as Figure 2 shown;

[0042] In an embodiment of the present invention, the substrate 101 in Step 1 is a silicon substrate 101.

[0043] In an embodiment of the present invention, the material of the etching stop layer 103 in Step 1 is silicon nitride or silicon dioxide. Usually, silicon dioxide is formed by a high-temperature furnace tube or chemical vapor deposition method, and silicon nitride is formed by chemical vapor deposition method.

[0044] Step 2: Form a photoresist layer on the etching stop layer 103, open the photoresist layer by photolithography, so that the underlying etching stop layer 103 is exposed. The opened areas on the photoresist layer include the first and second areas. Every four first areas A1 are distributed in a circular pattern along the second area A2. Please refer to Figure 13 , the first and second areas are used to define the etching areas on the N-type epitaxial layer 102. That is, four first areas A1 form an "X" - shaped structure, and a "square" - shaped second area A2 is provided at the center of the "X" - shaped structure. After etching the N-type epitaxial layer 102, a sidewall protection layer 104 can be formed. The distance between the second area A2 and the surrounding first areas A1 is the first design value P1;

[0045] In an embodiment of the present invention, the shapes of the first and second areas in Step 2 are both rectangular. That is, the four first areas A1 are evenly divided on one side of the four sides of the second area A2, and the side of the first area A1 close to the second area A2 is usually parallel to each other.

[0046] In an embodiment of the present invention, the distance from each first area A1 to the second area A2 in Step 2 is equal.

[0047] In an embodiment of the present invention, the first design value P1 in Step 2 is 50 to 100 nanometers.

[0048] In an embodiment of the present invention, in step two, the lengths of the adjacent sides of the first and second regions are equal, and their lengths P2 are both 0.2 to 0.4 micrometers.

[0049] In an embodiment of the present invention, the distance P3 between the two second regions A2 in step two is 0.3 to 0.5 micrometers.

[0050] Step 3: Etching the exposed etch barrier layer 103 and the underlying N-type epitaxial layer 102 to form the first groove. Typically, dry etching can be used to etch the barrier layer 103 up to above the N-type epitaxial layer 102, exposing the N-type epitaxial layer 102 and forming a groove. Figure 3 The structure shown is then processed by removing the remaining photoresist and etching the exposed N-type epitaxial layer 102 to form the first groove, resulting in the structure shown. Figure 4 The structure shown is followed by the formation of a sidewall protective layer 104 on the first groove, forming a structure as shown. Figure 5 The structure shown is then etched using anisotropic etching to create the bottom of the first groove, forming a shape as shown. Figure 6 The structure shown is then etched using isotropic etching to form the N-type epitaxial layer 102, creating a second groove, as shown. Figure 7 and Figure 13 The sidewall protective layer 104 shown, and the N-type extension layer 102 between the second region A2 and the surrounding first region A1 are retained to form a bridge-like structure 105;

[0051] In an embodiment of the present invention, the depth D1 of the first groove on the N-type epitaxial layer 102 in step three is 0.3 to 0.8 micrometers.

[0052] In an embodiment of the present invention, the material of the sidewall protective layer 104 in step three is silicon nitride or silicon dioxide. Silicon dioxide is typically formed by high-temperature furnace tubes or chemical vapor deposition, while silicon nitride is formed by chemical vapor deposition.

[0053] In an embodiment of the present invention, the depth of the second groove on the N-type epitaxial layer 102 in step three is 2.7 to 3.3 micrometers D2.

[0054] Step four, an intrinsic epitaxial layer 108 is formed on the second groove, forming as shown in the figure. Figure 8 The structure shown is followed by the formation of a first P-type epitaxial layer 106 on the intrinsic epitaxial layer 108 up to the bottom of the sidewall protective layer 104, forming a structure as shown. Figure 9 The structure shown;

[0055] Step 5: Remove the sidewall protective layer 104 and the etching barrier layer 103 to form a structure as shown in the figure. Figure 10 The structure shown has a second P-type epitaxial layer 107 formed on the first P-type epitaxial layer 106, covering the N-type epitaxial layer 102, forming as shown in the diagram. Figure 11The structure shown is then milled over the second P-type epitaxial layer 107 to the N-type epitaxial layer 102 to form a structure as shown. Figure 12 The structure shown is typically ground using chemical mechanical planarization (CMP) grinding, which can then be used in subsequent processes to form a CMOS image sensor structure.

[0056] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0057] In summary, this invention changes the etched area on the N-type epitaxial layer from an "X"-shaped structure to a "U"-shaped "bridge" structure. The bottom of the "bridge" structure is easier to hollow out, reducing the amount of isotropic etching and decreasing the loss of the N-type epitaxial layer. The etched pores on the N-type epitaxial layer are more numerous and wider (N-Epitry loss is low, and the pores can be designed to be wider), reducing the amount of etching and facilitating the removal of byproducts generated during etching, which is beneficial for subsequent wet cleaning and reduces the number of defects. Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0058] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for manufacturing a deep trench isolated photodiode, characterized in that, At least including: Step 1: Provide a substrate, and form an N-type epitaxial layer and an etch barrier layer on the N-type epitaxial layer; Step 2: Form a photoresist layer on the etch barrier layer, and use photolithography to open the photoresist layer, exposing the etch barrier layer underneath. The opened area on the photoresist layer includes a first region and a second region. Every four first regions are distributed in a circle along the second region. The distance between the second region and the surrounding first regions is a first design value. The shape of the first and second regions is rectangular, and the distance between each first region and the second region is equal. Step 3: Etch the exposed etching barrier layer and the N-type epitaxial layer below it to form a first groove. Then, form a sidewall protective layer on the first groove. Then, etch the bottom of the first groove using anisotropic etching. Then, etch the N-type epitaxial layer using isotropic etching to form a second groove. Step 4: An intrinsic epitaxial layer is formed on the second groove, and then a first P-type epitaxial layer is formed on the intrinsic epitaxial layer up to the bottom of the sidewall protective layer; Step 5: Remove the sidewall protective layer and the etching barrier layer, and form a second P-type epitaxial layer on the first P-type epitaxial layer that covers the N-type epitaxial layer. Then grind the second P-type epitaxial layer over the N-type epitaxial layer.

2. The method for manufacturing a deep trench isolated photodiode according to claim 1, characterized in that: The substrate mentioned in step one is a silicon substrate.

3. The method for manufacturing a deep trench isolated photodiode according to claim 1, characterized in that: The material of the etching barrier layer in step one is silicon nitride or silicon dioxide.

4. The method for manufacturing a deep trench isolated photodiode according to claim 1, characterized in that: In step two, the first design value is 50 to 100 nanometers.

5. The method for manufacturing a deep trench isolated photodiode according to claim 1, characterized in that: In step two, the lengths of the adjacent sides of the first and second regions are equal, both ranging from 0.2 to 0.4 micrometers.

6. The method for manufacturing a deep trench isolated photodiode according to claim 1, characterized in that: In step two, the distance between the two second regions is 0.3 to 0.5 micrometers.

7. The method for manufacturing a deep trench isolated photodiode according to claim 1, characterized in that: In step three, the depth of the first groove on the N-type epitaxial layer is 0.3 to 0.8 micrometers.

8. The method for manufacturing a deep trench isolated photodiode according to claim 1, characterized in that: The sidewall protective layer described in step three is made of silicon nitride or silicon dioxide.

9. The method for manufacturing a deep trench isolated photodiode according to claim 1, characterized in that: The thickness of the sidewall protective layer mentioned in step three is 10 to 50 nanometers.

10. The method for manufacturing a deep trench isolated photodiode according to claim 1, characterized in that: In step three, the depth of the second groove on the N-type epitaxial layer is 2.7 to 3.3 micrometers.

Citation Information

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