An automatic gain control method and system

CN116347581BActive Publication Date: 2026-08-14CHENGDU NTS SOFTWARE CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-04-14
Publication Date
2026-08-14

AI Technical Summary

Technical Problem

[0004]现有的自动增益控制方法中,不考虑增益改变时刻与实际信号帧结构是否对齐,从而导致该符号的带内平坦度变差

Benefits of technology

[0017] The embodiments of this application complete high-power adjustment within the cyclic prefix and low-power adjustment at the end of each time slot, thereby ensuring the in-band flatness of the uplink signal, solving the problem of demodulation failure caused by in-band non-flatness during high-order modulation, and effectively improving uplink demodulation performance.

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Abstract

This application provides an automatic gain control method and system, relating to the field of wireless communication. The automatic gain control method is used for high-power adjustment of high-power signals above the target power and low-power adjustment of low-power signals below the target power in high-order modulation scenarios of 4th, 8th, and above. Specifically, high-power adjustment is achieved by performing average power detection and gain adjustment within the cyclic prefix of the uplink signal; low-power adjustment is achieved by detecting the average power of each symbol and performing gain adjustment at the end of the current time slot. The automatic gain control method of this application can improve the in-band flatness of the signal, solving the demodulation failure problem caused by in-band flatness in high-order modulation, and effectively improving uplink demodulation performance.
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Description

Technical Field

[0001] This application relates to the field of wireless communication, and in particular to an automatic gain control method and system. Background Technology

[0002] In the field of wireless communication, the power of the received signal is difficult to keep within a relatively constant range due to factors such as transmission power and transmission distance. Automatic gain control is generally used to keep the amplitude of the received signal stable or within a suitable range.

[0003] Automatic gain control is generally performed through peak detection or mean detection. The mechanism of peak detection is as follows: within a fixed detection period, when the number of times the peak power of the signal exceeds a predetermined high power threshold meets the predetermined number of times, the gain is reduced; within the same detection period, when the number of times the peak power of the signal exceeds a predetermined low power threshold does not meet the predetermined number of times, the gain is increased. Accordingly, the gain change can take effect immediately within the detection period as long as the condition is met, or it can take effect at the end of the fixed detection period after the condition is met.

[0004] Existing automatic gain control methods do not consider whether the gain change timing is aligned with the actual signal frame structure, resulting in poor in-band flatness of the symbol. In high-order modulation scenarios, i.e., modulation schemes of order 4 and above, especially 256QAM and 1024QAM modulation signals, the signal amplitude is extremely sensitive, and in-band flatness of the symbol will lead to demodulation failure. Therefore, existing methods are difficult to apply in modulation scenarios of order 8 and above. Summary of the Invention

[0005] The purpose of this application is to solve the technical problems mentioned in the background art and to provide an automatic gain control method and system.

[0006] In a first aspect, embodiments of this application provide an automatic gain control method, comprising: performing average power detection and gain adjustment within the cyclic prefix of an uplink signal; when the detected average power is higher than a high power threshold, reducing the RF front-end gain, otherwise not adjusting; performing average power detection of the uplink signal in units of one symbol length; when the maximum average power of all symbols within a time slot is lower than a low power threshold, increasing the RF front-end gain at the end of the current time slot, otherwise not adjusting.

[0007] Optionally, before performing average power detection and gain adjustment within the cyclic prefix of the uplink signal, the method further includes: generating first timing control information, which is used to determine the start time and detection length of each average power detection within each cyclic prefix.

[0008] Optionally, before performing average power detection on the uplink signal in units of one symbol length, the method further includes: generating second timing control information, the second timing control information being used to determine the start time of average power detection for each symbol, the detection length, and the gain adjustment start time.

[0009] Optionally, performing average power detection and gain adjustment within the cyclic prefix of the uplink signal includes: performing a first time-domain sampling within the cyclic prefix according to the first timing control information; calculating a first average power value based on the amplitude value of the first time-domain sampling; and comparing the first average power value with a high power threshold value to calculate a gain attenuation value.

[0010] Optionally, after comparing the first average power value with the high power threshold value and calculating the gain attenuation value, the method further includes: controlling the variable gain amplifier to reduce the corresponding gain based on the gain attenuation value.

[0011] Optionally, it also includes: performing second time-domain sampling on each symbol in the time slot according to the second timing control information; calculating the second average power value of each symbol based on the amplitude value of the second time-domain sampling; comparing the maximum value of the second average power value of each symbol with the low power threshold value, and calculating the gain increase value.

[0012] Optionally, after comparing the maximum value of the second average power value of each symbol with the low power threshold value to calculate the gain increase value, the method further includes: controlling the variable gain amplifier to increase the corresponding gain according to the gain increase value.

[0013] Secondly, this application provides an automatic gain control system, including: a high-power adjustment module configured to perform average power detection and gain adjustment within the cyclic prefix of the uplink signal, wherein when the detected average power is higher than a high-power threshold, the RF front-end gain is reduced, otherwise no adjustment is made; and a low-power adjustment module configured to perform average power detection of the uplink signal in units of one symbol length, wherein when the maximum average power of all symbols in a time slot is lower than a low-power threshold, the RF front-end gain is increased at the end of the current time slot, otherwise no adjustment is made.

[0014] Optionally, the high-power adjustment module includes: a first timing control module configured to generate first timing control information, the first timing control information being used to determine the start time and detection length of each average power detection within each cyclic prefix; a first average power calculation module configured to perform a first time-domain sampling within the cyclic prefix according to the first timing control information, and then calculate a first average power value based on the amplitude value of the first time-domain sampling; and a gain attenuation value calculation module configured to compare the first average power value with a high-power threshold value and calculate a gain attenuation value.

[0015] Optionally, the low-power adjustment module includes: a second timing control module configured to generate second timing control information, the second timing control information being used to determine the start time, detection length, and gain adjustment start time for the average power detection of each symbol; a second average power calculation module configured to perform second time-domain sampling on each symbol in the time slot according to the second timing control information, and then calculate the second average power value of each symbol based on the amplitude value of the second time-domain sampling; and a gain increase value calculation module configured to compare the maximum value of the second average power value of each symbol with a low-power threshold value, and calculate the gain increase value.

[0016] In summary, the beneficial effects of the embodiments of this application are as follows:

[0017] The embodiments of this application complete high-power adjustment within the cyclic prefix and low-power adjustment at the end of each time slot, thereby ensuring the in-band flatness of the uplink signal, solving the problem of demodulation failure caused by in-band non-flatness during high-order modulation, and effectively improving uplink demodulation performance.

[0018] In addition, the embodiments of this application also have the function of generating automatic gain control data, which is transmitted to the uplink interface to describe the uplink gain and reduce uplink error.

[0019] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly described below.

[0021] Figure 1 This is a schematic flowchart of an embodiment of the automatic gain control method of this application;

[0022] Figure 2 This is a schematic diagram illustrating high-power adjustment in one embodiment of this application;

[0023] Figure 3 This is a block diagram of an automatic gain control method in the overall signal processing link according to an embodiment of this application;

[0024] Figure 4 This is a schematic diagram of the internal structure of a high-power detection unit according to an embodiment of this application;

[0025] Figure 5 , Figure 6 A schematic diagram showing the power adjustment of a high-power original signal according to an embodiment of this application;

[0026] Figure 7 This is a schematic diagram illustrating low-power adjustment in one embodiment of this application;

[0027] Figure 8 A schematic diagram showing the power adjustment of a low-power original signal according to an embodiment of this application;

[0028] Figure 9 This is a schematic diagram of the internal structure of a low-power detection unit according to an embodiment of this application;

[0029] Figure 10 A schematic diagram showing the power adjustment of a high-power raw signal according to an embodiment of this application;

[0030] Figure 11 This is a system block diagram of an automatic gain control system according to an embodiment of this application. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0032] This application first provides an automatic gain control method, which can be used to automatically adjust the RF front-end gain in high-order modulation scenarios of 4th, 8th and above. The method includes high power adjustment and low power adjustment.

[0033] High-power adjustment is used to constrain high-power signals. When the average power of the signal exceeds the high-power threshold, high-power adjustment is performed to reduce the controllable gain in order to reduce the signal power. Correspondingly, low-power adjustment is used to constrain low-power signals. When the average power of the signal is lower than the low-power threshold, low-power adjustment is performed to increase the controllable gain in order to increase the signal power.

[0034] Please refer to Figure 1 The diagram below is a flowchart of an automatic gain control method according to an embodiment of this application. The method includes steps S110 to S120.

[0035] Step S110: Perform average power detection and gain adjustment within the cyclic prefix of the uplink signal. When the detected average power is higher than the high power threshold, reduce the RF front-end gain; otherwise, do not make any adjustment.

[0036] The uplink signal has multiple time slots, each containing multiple symbols, and each symbol is preceded by a cyclic prefix (CP).

[0037] In this step, average power detection is performed once or multiple times within each Cyclic Prefix (CP). When the average power detected exceeds the high power threshold each time, high power adjustment (i.e., reducing the RF front-end gain) is immediately performed. The high power adjustment and the effective time are all completed within the Cyclic Prefix (CP).

[0038] Figure 2 This diagram illustrates high-power adjustment in one embodiment of the present application. A time slot contains 14 symbols, where the first symbol has a long cyclic prefix (CP), and the remaining symbols have short cyclic prefixes (CP). In the diagram, CP_L represents a long CP, and CP_S represents a short CP.

[0039] Please refer to Figure 2 Average power detection is initiated at times t0, t3, t6, t10, and t13. Detection is performed three times during the long CP phase, with detection lengths of L0, L2, and L3 respectively; and twice during the short CP phase, with detection lengths of L0 and L2 respectively.

[0040] It is understood that this application may perform one or more high-power adjustments within the cyclic prefix of each symbol of the uplink signal. Figure 2 This is merely an example and is not intended to limit this application.

[0041] In one embodiment, prior to high-power adjustment, the method further includes generating first timing control information, which determines the start time and detection length of each average power detection within each cyclic prefix.

[0042] Please refer to Figure 3 This is a block diagram of an automatic gain control method in an overall signal processing link according to an embodiment of this application, including device 100, device 200, device 300, device 400, device 500, signal family nodes 1, 2, 3, 4, 5, 6, 7, signal flow direction, and the connection relationship between each device.

[0043] The device 100 is a timing control unit used to recover the frame structure based on the reference frame header and generate timing control information for high-power adjustment and low-power adjustment. Node 1 is the input node of the timing control unit, receiving the reference frame header of the radio frame, and node 3 is the output node of the timing control unit, outputting the timing control information.

[0044] The timing control unit restores the frame structure and generates first timing control information for high-power adjustment based on the time slot and symbol information of the frame structure. This first timing control information can be represented as follows: in, The start time of signal power detection characterizing the x-th adjustment of high power. The detection length of the x-th adjustment in high power is represented, where x∈{0,1,2} in long CP and x∈{0,1} in short CP. Determined by the following formula:

[0045]

[0046] In the formula, T is the starting time of the symbol. s T is the sampling period. Delay This refers to the response delay of the variable gain amplifier. Furthermore, and It should also satisfy: and For the duration of a short CP, The duration of a long CP.

[0047] In one embodiment, the average power detection and gain adjustment within the cyclic prefix of the uplink signal specifically includes: performing a first time-domain sampling within the cyclic prefix according to the first timing control information; calculating a first average power value based on the amplitude value of the first time-domain sampling; and comparing the first average power value with a high power threshold value to calculate a gain attenuation value.

[0048] Please refer to Figure 2 Taking the first high-power adjustment as an example, the average power of the uplink signal is detected at time t0, with a detection length of L0. The average power calculation is completed at time t1. If the first average power exceeds the high-power threshold, the gain is reduced to enable at time t1, and a gain attenuation value is generated at the same time.

[0049] The gain attenuation value is used to control the variable gain amplifier to reduce the corresponding gain. The response delay of the variable gain amplifier is L1. At time t2, the signal power is attenuated, and the first high-power adjustment is completed. Otherwise, no adjustment is made. In addition, the number of high-power adjustments can be multiple, but at least more than once, to monitor whether the signal power is within the predetermined range after adjustment.

[0050] Please refer to Figure 3 The following section provides a detailed explanation of the average power detection and gain adjustment, taking into account the various devices and their corresponding signals.

[0051] The first timing control information is input to device 300, along with the signal amplitude output by device 200. Device 200 is a signal amplitude calculation unit used to calculate and output the uplink signal amplitude. Device 300 is a high-power detection unit used to detect the average power on the current symbol based on the first timing control information output by device 100, and to provide the gain attenuation value Att.value .

[0052] The in-phase and quadrature components of the uplink signal after analog-to-digital conversion, i.e., the I / Q signals, are used as the input device 200 of the node 2 signal family. The signal amplitude calculation unit calculates the signal amplitude according to the formula: y(n) = sqrt(i 2 (n)+q 2 (n)) calculate the uplink signal amplitude y(n), and use the uplink signal amplitude y(n) as the input device 300 and device 400 of the node 4 signal family.

[0053] Please refer to Figure 4 This is a schematic diagram of the internal structure of a high-power detection unit according to an embodiment of this application, wherein the device 300 is composed of device 301 and device 302.

[0054] Device 301 is a signal first average power calculation unit, used to calculate the signal average power based on the first timing control information output by device 100. Starting from time t, the number of sampling points is calculated as follows: The first average power in the time domain. The specific calculation formula is:

[0055]

[0056] In the formula, y(n) is the amplitude of the uplink signal output by device 200. For ease of processing, the average value of this signal amplitude, E[y(n)], is directly used to characterize the average power of the signal.

[0057] Device 302 is a gain attenuation numerical calculation unit, used to calculate the first average power output by device 301 and the high power threshold value. By comparison, the gain attenuation value Att is obtained. value Specifically, the high-power threshold is determined by the following formula:

[0058]

[0059] In the formula, HPLx ∈ {1, 2, ..., HPLn} is a positive integer greater than or equal to 1, and RSSI target To receive the desired target power of the signal, Att step This is the decay step value. When Att value =HPLx*Att step When HPLx is at its maximum value, it satisfies...

[0060] Att value =HPLn*Att step .

[0061] Please refer to Figure 3 Device 300 outputs a gain attenuation value, which is input to device 500 as a node 5 signal family. Device 500 is a gain control unit. The gain control unit can generate a gain control signal based on the gain attenuation value. The gain control signal can be a pulse signal and is input to the variable gain amplifier as a node 7 signal family, controlling the variable gain amplifier to produce a gain change consistent with the gain attenuation value.

[0062] Figure 5 , Figure 6 This is a power diagram of the original signal after high-power adjustment according to an embodiment of this application.

[0063] Please refer to Figure 5 After high-power adjustment, the original high-power signal can be seen to have its gain reduced within the cyclic prefix of the first symbol, down to the target power range of -18 dBfs.

[0064] Please refer to Figure 6 After high-power adjustment, the average power of the original signal is approximately -18 dBfs, and it has good in-band flatness.

[0065] Step S120: Perform average power detection on the uplink signal in units of one symbol length. When the maximum average power of all symbols in a time slot is lower than the low power threshold, increase the RF front-end gain at the end of the current time slot; otherwise, do not make any adjustment.

[0066] In this step, the average power of each symbol in the uplink signal is detected. When the maximum value of the average power of all symbols in a time slot is lower than the low power threshold, low power adjustment is performed at the end of the current time slot.

[0067] Please refer to Figure 7 This diagram illustrates low-power adjustment in one embodiment of this application. A time slot contains fourteen symbols; the third to thirteenth symbols are not shown due to their length. At the beginning of each symbol, average power detection is initiated, with a detection length equal to the symbol length. Low-power adjustment is performed at time t4 in the diagram, which is the end of the current time slot.

[0068] Please refer to Figure 8 This diagram illustrates the power adjustment of a low-power original signal according to an embodiment of this application. Slot N represents the Nth time slot of the signal, and slot N+1 represents the (N+1)th time slot. At the boundary between two time slots, the signal power is increased to near the target power, and the power within each time slot remains essentially consistent. It can be seen that this embodiment effectively ensures the in-band flatness of the signal even when performing low-power adjustment.

[0069] In one embodiment, prior to performing low-power adjustment, the method further includes generating second timing control information, which determines the start time of average power detection for each symbol, the detection length, and the start time of gain adjustment.

[0070] Specifically, the timing control unit generates second timing control information for low-power adjustment based on the time slot and symbol information of the frame structure. This second timing control information can be represented as follows: Where Sx∈{S0, S1, ..., Sn}, The starting time for detecting the average signal power of each symbol is aligned with the starting time of the corresponding symbol. To adjust the start-up timing for low-power operation, align it with the end of each time slot. The detection length is the average power detection length for each symbol signal.

[0071] The following section provides a detailed explanation of the specifics of low-power adjustment, taking into account the aforementioned device and corresponding signals.

[0072] The low-power adjustment specifically includes: performing second time-domain sampling on each symbol in the time slot according to the second timing control information; calculating the second average power value of each symbol based on the amplitude value of the second time-domain sampling; comparing the maximum value of the second average power value of each symbol with the low-power threshold value, and calculating the gain increase value.

[0073] Please refer to Figure 3 The second timing control information output by device 100 is input to device 400, along with the signal amplitude output by device 200. Device 400 is a low-power detection unit used to detect whether the signal power in the current time slot is too low based on the second timing control information output by device 100, and to provide a gain increase value (Gain). value .

[0074] Please refer to Figure 9 This is a schematic diagram of the internal structure of a low-power detection unit according to an embodiment of this application. The device 400 consists of device 401, device 402, and device 403.

[0075] Device 401 is a second average power calculation unit, used to calculate the average power of each symbol according to the second timing control information. The specific calculation formula is as follows:

[0076]

[0077] In the formula, y(n) is the amplitude of the uplink signal output by device 200. For ease of processing, the average value E of the uplink signal amplitude is used directly. Sx[y(n)] is used to characterize the average power of the signal.

[0078] Device 402 is a maximum value calculation unit, used to calculate the maximum value within the interval based on the second timing control information. Find E inside Sx The maximum value in [y(n)]

[0079] Device 403 is a gain enhancement numerical calculation unit, used to calculate the maximum value output by device 402. With low power threshold By comparison, the gain increase value Gain is obtained. value Specifically, the low-power threshold is determined by the following formula:

[0080]

[0081] In the formula, LPLx∈{1, 2, ..., LPLn} are positive integers greater than or equal to 1, and Gain step To increase the step value. When At that time, Gain value =LPLx*Gain step When LPLx is at its minimum, it satisfies... Gain value =1*Gain step .

[0082] Please refer to Figure 3 The gain increase value output by device 400 is input to device 500 as a node 6 signal family. Device 500 generates a gain control signal based on the gain increase value. The gain control signal can be a pulse signal and is input to the variable gain amplifier as a node 7 signal family to control the variable gain amplifier to produce a gain change consistent with the gain increase value.

[0083] The device 500 also generates corresponding automatic gain control data based on the received gain attenuation and gain increase values. This automatic gain control data is used to describe the uplink gain and is transmitted to the uplink interface along with the I / Q signals.

[0084] Specifically, the minimum value of the automatic gain control (AGC) data is 0, and the maximum value is 14. For every increment of the AGC data, the gain decreases by 2 dBm; for every decrease of the AGC data, the gain increases by 2 dBm.

[0085] In automatic gain control, in addition to considering the low signal power, it is also necessary to consider the case of non-full scheduling, that is, there are unscheduled symbols in the time slot. The power of the symbol is bound to be very low, but if the gain is increased immediately after the symbol, the power of the next scheduled symbol may exceed the expected range or even overflow.

[0086] In this embodiment of the application, by performing average power detection on each symbol, when the average power of all symbols is lower than the low power threshold, the gain is increased at the end of the current time slot, thereby avoiding the aforementioned power outage situation.

[0087] Please refer to Figure 10 This is a power diagram of a high-power raw signal adjusted by an automatic gain control method. The first symbol was not scheduled, and the power adjustment was completed within the cyclic prefix of the second symbol, with the signal power decreasing to the range of -18 dBfs. The average power of the scheduled symbols was basically the same.

[0088] In summary, this application provides an automatic gain control method, which includes high-power adjustment for high-power signals above a target power and low-power adjustment for low-power signals below a target power. This application performs high-power adjustment within the cyclic prefix and low-power adjustment at the end of each time slot, thereby ensuring the in-band flatness of the uplink signal. This solves the demodulation failure problem caused by in-band flatness during high-order modulation and effectively improves uplink demodulation performance.

[0089] Based on the same inventive concept, embodiments of this application also provide an automatic gain control system.

[0090] Figure 11 A system block diagram of an automatic gain control system provided in one embodiment of this application is shown in Figure 11. The system may include the following modules:

[0091] The high-power adjustment module 610 is configured to perform average power detection and gain adjustment within the cyclic prefix of the uplink signal. When the detected average power is higher than the high-power threshold, the RF front-end gain is reduced; otherwise, no adjustment is made.

[0092] The low-power adjustment module 620 is configured to perform average power detection on the uplink signal in units of one symbol length. When the maximum average power of all symbols in a time slot is lower than the low power threshold, the RF front-end gain is increased at the end of the current time slot; otherwise, no adjustment is made.

[0093] In one embodiment, the high-power adjustment module includes:

[0094] The first timing control module is configured to generate first timing control information, which is used to determine the start time and detection length of each average power detection within each cyclic prefix.

[0095] The first average power calculation module is configured to perform a first time-domain sampling within the cyclic prefix according to the first timing control information, and then calculate the first average power value based on the amplitude value of the first time-domain sampling.

[0096] The gain attenuation calculation module is configured to compare the first average power value with the high power threshold value to calculate the gain attenuation value.

[0097] In one embodiment, the low-power adjustment module includes:

[0098] The second timing control module is configured to generate second timing control information, which is used to determine the start time, detection length and gain adjustment start time of the average power detection of each symbol.

[0099] The second average power calculation module is configured to perform second time-domain sampling on each symbol in the time slot according to the second timing control information, and then calculate the second average power value of each symbol according to the amplitude value of the second time-domain sampling.

[0100] The gain increase calculation module is configured to compare the maximum value of the second average power value of each symbol with the low power threshold value to calculate the gain increase value.

[0101] It is understood that an automatic gain control system corresponds to an automatic gain control method. Therefore, the functions and implementation processes of each module in the automatic gain control system are detailed in the corresponding implementation processes of each embodiment of the automatic gain control method, and will not be repeated here.

[0102] The apparatuses and methods disclosed in the several embodiments provided in this application can also be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatuses, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0103] In addition, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0104] It should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. An automatic gain control method, characterized in that, include: Average power detection and gain adjustment are performed within the cyclic prefix of the uplink signal. When the detected average power is higher than the high power threshold, the RF front-end gain is reduced; otherwise, no adjustment is made. The average power of the uplink signal is detected in units of one symbol length. When the maximum average power of all symbols in a time slot is lower than the low power threshold, the RF front-end gain is increased at the end of the current time slot; otherwise, no adjustment is made. The uplink signal has multiple time slots, each time slot contains multiple symbols, and each symbol has a cyclic prefix at the beginning; Before performing average power detection on the uplink signal in units of one symbol length, the method further includes: generating second timing control information, which is used to determine the start time, detection length, and gain adjustment start time for the average power detection of each symbol. According to the second timing control information, the second time domain sampling is performed on each symbol in the time slot; the second average power value of each symbol is calculated based on the amplitude value of the second time domain sampling; the maximum value of the second average power value of each symbol is compared with the low power threshold value to calculate the gain increase value. After comparing the maximum value of the second average power value of each symbol with the low power threshold value and calculating the gain increase value, the method further includes: controlling the variable gain amplifier to increase the corresponding gain according to the gain increase value.

2. The automatic gain control method according to claim 1, characterized in that, Before performing average power detection and gain adjustment within the cyclic prefix of the uplink signal, the method further includes: generating first timing control information, which is used to determine the start time and detection length of each average power detection within each cyclic prefix.

3. The automatic gain control method according to claim 2, characterized in that, The average power detection and gain adjustment within the cyclic prefix of the uplink signal includes: performing a first time-domain sampling within the cyclic prefix according to the first timing control information; calculating a first average power value based on the amplitude value of the first time-domain sampling; and comparing the first average power value with a high power threshold value to calculate a gain attenuation value.

4. The automatic gain control method according to claim 3, characterized in that, After comparing the first average power value with the high power threshold value and calculating the gain attenuation value, the method further includes: controlling the variable gain amplifier to reduce the corresponding gain based on the gain attenuation value.

5. An automatic gain control system, characterized in that, include: The high-power adjustment module is configured to perform average power detection and gain adjustment within the cyclic prefix of the uplink signal. When the detected average power is higher than the high-power threshold, the RF front-end gain is reduced; otherwise, no adjustment is made. The low-power adjustment module is configured to perform average power detection on the uplink signal in units of one symbol length. When the maximum average power of all symbols in a time slot is lower than the low-power threshold, the RF front-end gain is increased at the end of the current time slot; otherwise, no adjustment is made. The uplink signal has multiple time slots, each time slot contains multiple symbols, and each symbol has a cyclic prefix at the beginning; The low-power adjustment module includes: The second timing control module is configured to generate second timing control information, which is used to determine the start time, detection length and gain adjustment start time of the average power detection of each symbol. The second average power calculation module is configured to perform second time-domain sampling on each symbol in the time slot according to the second timing control information, and then calculate the second average power value of each symbol according to the amplitude value of the second time-domain sampling. The gain increase calculation module is configured to compare the maximum value of the second average power value of each symbol with the low power threshold value to calculate the gain increase value. The gain increase calculation module is also configured to control the variable gain amplifier to increase the corresponding gain based on the gain increase value.

6. The automatic gain control system according to claim 5, characterized in that, The high-power adjustment module includes: The first timing control module is configured to generate first timing control information, which is used to determine the start time and detection length of each average power detection within each cyclic prefix. The first average power calculation module is configured to perform a first time-domain sampling within the cyclic prefix according to the first timing control information, and then calculate the first average power value based on the amplitude value of the first time-domain sampling. The gain attenuation calculation module is configured to compare the first average power value with the high power threshold value to calculate the gain attenuation value.

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