Display device

Abstract

A display device is disclosed. According to an aspect of the present disclosure, a display device includes a display panel provided with a plurality of pixels, the plurality of pixels being driven in a driving period and not being driven in a blank period; a timing controller configured to output a video data signal and a variable refresh rate (VRR) signal determining a refresh rate of the plurality of pixels; and a data driver configured to supply a data voltage to the plurality of pixels through a plurality of data lines according to the VRR signal and the video data signal, wherein the plurality of pixels are driven at a first refresh rate or a second refresh rate lower than the first refresh rate according to the VRR signal, and an output luminance of each of the plurality of pixels decreases during the blank period when the plurality of pixels are driven at the second refresh rate and the video data signal is a low gray video data signal.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2021-0184212, filed on December 21, 2021, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to display devices, and more specifically, to display devices capable of changing drive speed. Background Technology

[0004] As display devices used for computer monitors, televisions, or mobile phones, there are organic light-emitting display devices (OLEDs) that are self-emissive and liquid crystal display devices (LCDs) that require a separate light source.

[0005] Among various display devices, organic light-emitting display devices include a display panel comprising a plurality of sub-pixels and a driver for driving the display panel. The driver includes a gate driver configured to supply gate signals to the display panel and a data driver configured to supply data voltages. When signals such as gate signals and data voltages are supplied to the sub-pixels of the organic light-emitting display device, selected sub-pixels emit light to display an image.

[0006] The display device can change its driving frequency according to the image to be displayed. For example, when displaying a still image that does not require a high driving frequency, the display device can be driven at a low driving frequency, and when displaying a fast-moving image that requires a high driving frequency, the display device can be driven at a high driving frequency.

[0007] When a display device achieves low grayscale images at a low frequency, the data voltage level is low, which reduces the charging rate of the data voltage and may lead to a decrease in brightness. Summary of the Invention

[0008] The purpose of this disclosure is to provide a display device that can normally achieve low grayscale levels during low-frequency driving.

[0009] Another objective of this disclosure is to provide a display device that achieves uniform low grayscale levels across all frequencies.

[0010] The purpose of this disclosure is not limited to the purposes mentioned above, and other purposes not mentioned above will be clearly understood by those skilled in the art through the following description.

[0011] To achieve the above objectives, according to an aspect of this disclosure, a display device includes: a display panel having a plurality of pixels that are driven during a driving period and not driven during a blank period; a timing controller configured to output a video data signal and a variable refresh rate signal that determines the refresh rate of the plurality of pixels; and a data driver configured to supply data voltages to the plurality of pixels via a plurality of data lines according to a VRR signal and a video data signal, wherein the plurality of pixels are driven at a first refresh rate or a second refresh rate lower than the first refresh rate according to the VRR signal, and when the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the output brightness of each of the plurality of pixels decreases during the blank period.

[0012] Further details of exemplary implementations are included in the detailed description and accompanying drawings.

[0013] According to this disclosure, even with changes in refresh rate, the phenomenon of brightness float in low grayscale images can be suppressed.

[0014] According to this disclosure, the drive current of the light-emitting diode can be compensated more quickly.

[0015] The configuration of data drives can be further simplified based on this disclosure.

[0016] The effects of this disclosure are not limited to those illustrated above, and this specification includes many more effects. Attached Figure Description

[0017] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0018] Figure 1 This is a schematic diagram of a display device according to an exemplary embodiment of the present disclosure;

[0019] Figure 2 This is a circuit diagram of a sub-pixel of a display device according to an exemplary embodiment of the present disclosure;

[0020] Figure 3 This is a waveform diagram illustrating the clock signal driven by the VRR of a display device according to an exemplary embodiment of the present disclosure;

[0021] Figure 4 This is a view used to illustrate a sensing method of a display device according to an exemplary embodiment of the present disclosure;

[0022] Figure 5A It is a waveform diagram of the drive current of the VRR drive in a display device based on existing technology;

[0023] Figure 5B It is a waveform diagram of the drive current of the VRR drive of a display device according to an exemplary embodiment of the present disclosure;

[0024] Figure 6 This is a circuit diagram of a sub-pixel of a display device according to another exemplary embodiment of the present disclosure;

[0025] Figure 7 This is a circuit diagram of a sub-pixel of a display device according to yet another exemplary embodiment (third exemplary embodiment) of the present disclosure;

[0026] Figure 8 This is a waveform diagram of the data voltage of a display device according to yet another exemplary embodiment (third exemplary embodiment) of the present disclosure;

[0027] Figure 9 It is a waveform diagram of the drive current of the VRR drive of a display device according to yet another exemplary embodiment (third exemplary embodiment) of this disclosure; and

[0028] Figure 10 This is a circuit diagram of a sub-pixel of a display device according to yet another exemplary embodiment (fourth exemplary embodiment) of the present disclosure. Detailed Implementation

[0029] Please refer to the following and appendix Figure 1 The advantages and features of this disclosure, as well as methods for achieving these advantages and features, will become clear from the detailed description of exemplary embodiments herein. However, this disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. Exemplary embodiments are provided by way of example only to enable those skilled in the art to fully understand the disclosure and scope of this disclosure. Therefore, this disclosure will be limited only by the scope of the appended claims.

[0030] The shapes, dimensions, ratios, angles, numbers, etc., shown in the accompanying drawings to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout the specification, similar reference numerals generally denote similar elements. Furthermore, in the following description of this disclosure, detailed descriptions of known prior art may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure. Terms such as “comprising,” “having,” and “consisting of” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” Unless otherwise expressly stated, any reference to the singular may include the plural.

[0031] Even without explicit explanation, components are interpreted as including the normal tolerance range.

[0032] When using terms such as “on top of,” “above,” “below,” and “immediately following” to describe the positional relationship between two parts, one or more parts may be located between the two parts unless these terms are used in conjunction with the terms “immediately following” or “directly.”

[0033] When a component or layer is set "on another component or layer", another layer or component can be directly inserted on or between the other component.

[0034] Although the terms "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from other components. Therefore, the first component referred to below may be the second component in the technical concept of this disclosure.

[0035] Throughout the specification, similar reference numerals typically denote similar elements.

[0036] The dimensions and thicknesses of each component shown in the accompanying drawings are for illustrative purposes only, and this disclosure is not limited to the dimensions and thicknesses of the components shown.

[0037] Features of various embodiments of this disclosure may be partially or wholly dependent on or combined with each other, and may be technically interlocked and operated in various ways, and the embodiments may be performed independently or in conjunction with each other.

[0038] The transistors used in the display device of this disclosure can be implemented using one or more of n-channel transistors (NMOS) and p-channel transistors (PMOS). The transistors can be implemented using oxide semiconductor transistors with oxide semiconductor as the active layer or LTPS transistors with low-temperature polycrystalline silicon (LTPS) as the active layer. The transistors can include at least a gate electrode, a source electrode, and a drain electrode. The transistors can be implemented as thin-film transistors on a display panel. In the transistor, charge carriers flow from the source electrode to the drain electrode. In the case of an n-channel transistor (NMOS), since the charge carriers are electrons, the source voltage can be lower than the drain voltage to allow electrons to flow from the source electrode to the drain electrode. Current in the n-channel transistor (NMOS) flows from the drain electrode to the source electrode, and the source electrode can be used as an output terminal. In the case of a p-channel transistor (PMOS), since the charge carriers are holes, the source voltage is higher than the drain voltage to allow holes to flow from the source electrode to the drain electrode. In a p-channel transistor (PMOS), holes flow from the source electrode to the drain electrode, causing current to flow from the source to the drain, and the drain electrode serves as the output terminal. Therefore, the source and drain can change depending on the applied voltage; it should be noted that the source and drain of a transistor are not fixed. In this specification, it is assumed that the transistor is an n-channel transistor (NMOS), but this is not a limitation, allowing the use of p-channel transistors and thus enabling variations in circuit configuration.

[0039] The gate signal of a transistor used as a switching element oscillates between a turn-on voltage and a turn-off voltage. The turn-on voltage is set higher than the transistor's threshold voltage Vth, and the turn-off voltage is set lower than the transistor's threshold voltage Vth. The transistor turns on in response to the turn-on voltage and turns off in response to the turn-off voltage. In the case of NMOS, the turn-on voltage is high and the turn-off voltage is low. In the case of PMOS, the turn-on voltage can be low and the turn-off voltage can be high.

[0040] In the following, various exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0041] Figure 1 This is a schematic diagram of a display device according to an exemplary embodiment of the present disclosure.

[0042] Reference Figure 1 The display device 100 includes a display panel 110, a data driver 120, a gate driver 130, and a timing controller 140.

[0043] Display panel 110 is a panel for displaying images. Display panel 110 may include various circuits, wiring, and light-emitting diodes disposed on a substrate. Display panel 110 is divided by multiple data lines DL and multiple gate lines GL that intersect each other, and includes multiple pixels PX connected to the multiple data lines DL and multiple gate lines GL. Display panel 110 includes a display area defined by the multiple pixels PX, and a non-display area in which various signal lines or pads are formed. Display panel 110 can be implemented by display panel 110 used in various display devices such as liquid crystal display devices, organic light-emitting display devices, or electrophoretic display devices. Hereinafter, display panel 110 is described as a panel used in an organic light-emitting display device, but is not limited thereto.

[0044] The timing controller 140 receives timing signals such as vertical synchronization signals, horizontal synchronization signals, data enable signals, or point clocks via a receiver circuit with an interface such as LVDS or TMDS connected to the host system. Based on the input timing signals, the timing controller 140 generates data control signals to control the data driver 120 and gate control signals to control the gate driver 130.

[0045] The timing controller 140 processes externally input image data RGB suitable for the size and resolution of the display panel 110 to convert the image data into video data signals RGB, and then supplies the converted video data signals to the data driver 120.

[0046] The timing controller 140 generates a variable refresh rate (VRR) signal VRR, which allows multiple pixels PX to be driven at various refresh rates. That is, the timing controller generates a VRR signal VRR associated with driving to drive multiple pixels PX at a variable refresh rate, or to switch between a first refresh rate and a second refresh rate. Specifically, the timing controller 140 generates clock signals with different frequencies, or generates synchronization signals to produce blanks with different duty cycles, to supply signals to the data driver 120. In other words, the timing controller 140 generates a VRR signal VRR that includes a clock signal with a different frequency and a synchronization signal that produces blanks with different duty cycles.

[0047] Data driver 120 supplies data voltage to multiple sub-pixels SP. Data driver 120 includes multiple source driver ICs (integrated circuits). Data control signals and video data signals RGB from timing controller 140 can be supplied to the multiple source driver ICs. Data driver 120 converts the video data signals RGB into gamma voltage in response to the source timing control signals to generate data voltage, and supplies the data voltage through the data lines DL of display panel 110. The multiple source driver ICs can be connected to the data lines DL of display panel 110 through chip-on-glass (COG) process or tape-on-board (TAB) process. Furthermore, the source driver ICs are formed on display panel 110 or on a separate PCB substrate for connection to display panel 110.

[0048] The data driver 120 controls the timing of the output data voltage according to the VRR signal VRR. For example, the data driver 120 outputs a data voltage corresponding to the level used for sensing or compensation during a blank period that varies according to the VRR signal VRR, and outputs a data voltage according to the video data signal RGB during drive periods other than the blank period.

[0049] Gate driver 130 supplies gate signals to multiple sub-pixels SP. Gate driver 130 may include a horizontal shifter and a shift register. The horizontal shifter shifts the level of a clock signal input from timing controller 140 at a transistor-transistor-logic (TTL) level, and then supplies the clock signal to the shift register. The shift register may be formed in a non-display area of ​​display panel 110 using a GIP configuration, but is not limited thereto. The shift register is constructed by multiple stages that shift gate signals in response to clock and drive signals to output gate signals. The multiple stages included in the shift register sequentially output gate signals through multiple output terminals.

[0050] The display panel 110 may include multiple subpixels SP. The multiple subpixels SP can be subpixels used to emit different colors of light. For example, the multiple subpixels SP can be red subpixels, green subpixels, blue subpixels, and white subpixels, but are not limited to these. The multiple subpixels SP can construct a pixel PX. That is, red subpixels, green subpixels, blue subpixels, and white subpixels construct a pixel PX, and the display panel 110 may include multiple pixels PX.

[0051] In the following text, we will refer to... Figure 2 The driving circuitry used to drive a sub-pixel SP is described in more detail.

[0052] Figure 2 This is a circuit diagram of a sub-pixel of a display device according to an exemplary embodiment of the present disclosure.

[0053] exist Figure 2 The diagram shows a circuit diagram of one of the multiple sub-pixels SP of the display device 100.

[0054] Reference Figure 2 The sub-pixel SP may include a switching transistor SWT, a sensing transistor SET, a driving transistor DT, a storage capacitor SC, a first compensation capacitor CC1, and a light-emitting diode 150.

[0055] The light-emitting diode 150 may include an anode, an organic layer, and a cathode. The organic layer may include various organic layers, such as a hole injection layer, a hole transport layer, an organic light-emitting layer, an electron transport layer, and an electron injection layer. The anode of the light-emitting diode 150 may be connected to the output terminal of the driving transistor DT, and a low-potential voltage VSS is applied to the cathode. Even in Figure 2 The description in the document indicates that the light-emitting diode 150 is an organic light-emitting diode 150, but this disclosure is not limited thereto, and therefore an inorganic light-emitting diode (i.e., an LED) may also be used as the light-emitting diode 150.

[0056] Reference Figure 2 The switching transistor SWT is a transistor that transmits the data voltage DATA to the first node N1 corresponding to the gate electrode of the driving transistor DT. The switching transistor SWT may include a drain electrode connected to the data line DL, a gate electrode connected to the gate line GL, and a source electrode connected to the gate electrode of the driving transistor DT. The switching transistor SWT is turned on by a scan signal SCAN applied from the gate line GL to transmit the data voltage DATA supplied from the data line DL to the first node N1 corresponding to the gate electrode of the driving transistor DT.

[0057] Reference Figure 2 The driving transistor DT is a transistor configured to supply driving current to the light-emitting diode 150 to drive the light-emitting diode 150. The driving transistor DT may include a gate electrode corresponding to the first node N1, a source electrode corresponding to the second node N2 and the output terminal, and a drain electrode corresponding to the third node N3 and the input terminal. The gate electrode of the driving transistor DT is connected to the switching transistor SWT, the drain electrode is supplied with a high potential voltage VDD via the high potential voltage line VDDL, and the source electrode is connected to the anode of the light-emitting diode 150.

[0058] Reference Figure 2 The storage capacitor SC is a capacitor that maintains the voltage corresponding to the data voltage DATA for one frame. One electrode of the storage capacitor SC is connected to the first node N1, and the other electrode is connected to the second node N2.

[0059] Meanwhile, in the case of display device 100, as the driving time of each sub-pixel SP increases, circuit elements such as the driving transistor DT may degrade. Therefore, the unique characteristic value of the circuit element such as the driving transistor DT can be changed. Here, the unique characteristic value of the circuit element may include the threshold voltage Vth of the driving transistor DT or the mobility α of the driving transistor DT. The change in the characteristic value of the circuit element may cause a change in the brightness of the corresponding sub-pixel SP. Therefore, the change in the characteristic value of the circuit element can be used as the same concept as the change in the brightness of the sub-pixel SP.

[0060] Furthermore, the degree of variation in characteristic values ​​between the circuit elements of each sub-pixel SP can vary depending on the degree of degradation of each circuit element. This difference in the degree of variation in characteristic values ​​between circuit elements can lead to brightness deviations between sub-pixel SPs. Therefore, the characteristic value deviation between circuit elements can be used as the same concept as the brightness deviation between sub-pixel SPs. Variations in the characteristic values ​​of circuit elements (i.e., brightness variations in sub-pixel SPs) and characteristic value deviations between circuit elements (i.e., brightness deviations between sub-pixel SPs) can cause problems such as decreased accuracy in the brightness representation of sub-pixel SPs or image anomalies.

[0061] Therefore, the sub-pixel SP of the display device 100 according to the exemplary embodiment of the present disclosure provides a sensing function for sensing the characteristic value of the sub-pixel SP and a compensation function for using the sensing result to compensate for the characteristic value of the sub-pixel SP.

[0062] Therefore, as Figure 2 As shown, in addition to the switching transistor SWT, driving transistor DT, storage capacitor SC, and light-emitting diode 150, the sub-pixel SP may also include a sensing transistor SET to effectively control the voltage state of the source electrode of the driving transistor DT.

[0063] Reference Figure 2 A sensing transistor SET is connected between the source electrode of the driving transistor DT and a reference voltage line RVL configured to supply a reference voltage Vref, and its gate electrode is connected to a gate line GL. Therefore, the sensing transistor SET is turned on by a sensing signal SENSE applied through the gate line GL to apply the reference voltage Vref supplied through the reference voltage line RVL to the source electrode of the driving transistor DT. Furthermore, the sensing transistor SET can be used as one of the voltage sensing paths for the source electrode of the driving transistor DT.

[0064] Reference Figure 2In a sub-pixel SP, the switching transistor SWT and the sensing transistor SET can share a single gate line GL. That is, the switching transistor SWT and the sensing transistor SET are connected to the same gate line GL to be applied with the same gate signal. However, for ease of description, the voltage applied to the gate electrode of the switching transistor SWT is called the scan signal SCAN, and the voltage applied to the gate electrode of the sensing transistor SET is called the sensing signal SENSE. However, the scan signal SCAN and the sensing signal SENSE applied to a sub-pixel SP are the same signal transmitted from the same gate line GL.

[0065] However, this disclosure is not limited to this, such that only the switching transistor SWT is connected to the gate line GL, and the sensing transistor SET can be connected to a separate sensing line. Therefore, the scan signal SCAN is applied to the switching transistor SWT via the gate line GL, and the sensing signal SENSE is applied to the sensing transistor SET via the sensing line.

[0066] Therefore, a reference voltage Vref is applied to the source electrode of the driving transistor DT via a sensing transistor SET. Furthermore, the threshold voltage Vth or the mobility α of the driving transistor DT is detected via the reference voltage line RVL. Additionally, the data driver 120 can compensate for changes in the threshold voltage Vth or the mobility α of the driving transistor DT.

[0067] Furthermore, in a display device according to an exemplary embodiment of the present disclosure, each of the plurality of sub-pixels SP further includes a first compensation capacitor CC1 for compensating the output brightness of the light-emitting diode 150.

[0068] The first compensation capacitor CC1 controls the voltage applied to the anode of the LED 150 to compensate for the output brightness of the LED 150. One electrode of the first compensation capacitor CC1 is connected to the second node N2, which serves as the anode of the LED 150, and the other electrode is connected to the data line DL. Therefore, the voltage at the anode of the LED 150 can vary according to the data voltage DATA applied to the data line DL.

[0069] In the following text, we will refer to... Figure 3 and Figure 4 Describes the driving mechanism of a display device according to an exemplary embodiment of this disclosure.

[0070] Figure 3 This is a waveform diagram illustrating the clock signal driven by the VRR of a display device according to an exemplary embodiment of the present disclosure.

[0071] exist Figure 3The diagram shows a clock signal when a display device according to an exemplary embodiment of the present disclosure is driven at a first refresh rate of 120Hz, and a clock signal when the display device is driven at a second refresh rate of 60Hz, which is lower than the first refresh rate.

[0072] When the display device is driven at 120Hz as the first refresh rate according to the VRR signal VRR, the clock signal is activated during the driving period (t0 to t1). Therefore, the data voltage DATA corresponding to the video data signal RGB is applied to multiple pixels PX during the driving period (t0 to t1), driving the multiple pixels PX. During the blank period (t1 to t2), the clock signal is deactivated. Therefore, during the blank period (t1 to t2), the data voltage DATA corresponding to the video data signal RGB is not applied to the multiple pixels PX, and the threshold voltage Vth of the driving transistor DT or the mobility α of the driving transistor DT is sensed by the sensing transistor SET. That is, when driving multiple pixels PX at 120Hz as the first refresh rate, the blank period (t1 to t2) may only include the sensing period. After the blank period (t1 to t2), the clock signal is activated again, causing the driving period to repeat.

[0073] When multiple pixels PX are driven at 60Hz as a second refresh rate according to the VRR signal VRR, the clock signal is activated during the driving period (t0 to t1). Therefore, the data voltage DATA corresponding to the video data signal RGB is applied to the multiple pixels PX during the driving period (t0 to t1), thereby driving the multiple pixels PX. Furthermore, the clock signal is deactivated during the idle period (t1 to t3), so that the data voltage DATA corresponding to the video data signal RGB is not applied to the multiple pixels PX.

[0074] When the video data signal RGB output during the aforementioned driving period (t0 to t1) is a low grayscale video data signal, during a portion of the blank period (t1 to t2) of the blank period (t1 to t3), the threshold voltage Vth of the driving transistor DT or the mobility α of the driving transistor DT is sensed by the sensing transistor SET. The portion of the aforementioned blank period (t1 to t2) can be a sensing period. During another subsequent period (t2 to t3) of the blank period (t1 to t3), the voltage applied to the anode of the light-emitting diode 150 is controlled by means of the first compensation capacitor CC1 to compensate for the output brightness of the light-emitting diode 150. The other period (t2 to t3) of the blank period (t1 to t3) can be a compensation period. That is, when multiple pixels PX achieve low grayscale at a second refresh rate, the blank period (t1 to t3) includes not only the sensing period (t1 to t2) but also the compensation period (t2 to t3).

[0075] When the video data signal RGB output during the aforementioned driving period (t0 to t1) is a high grayscale video data signal, during the blank period (t1 to t3), the threshold voltage Vth of the driving transistor DT or the mobility α of the driving transistor DT is sensed by the sensing transistor SET. That is, when multiple pixels achieve high grayscale at the second refresh rate, the blank period (t1 to t3) only includes the sensing period.

[0076] After the blank period (t1 to t3), the clock signal is reactivated, causing the driving period to be repeated.

[0077] In the following text, reference will be made to Figure 4 This describes the brightness compensation of the light-emitting diode 150 during the compensation period (t2 to t3) when multiple pixels PX achieve low grayscale at a second refresh rate.

[0078] Figure 4 This is a view used to illustrate a sensing method of a display device according to an exemplary embodiment of the present disclosure.

[0079] Reference Figure 4 When multiple pixels PX achieve low grayscale at a second refresh rate, the data voltage DATA during the compensation period (t2 to t3) can be lower than the data voltage DATA during the sensing period (t1 to t2).

[0080] In other words, during the sensing period (t1 to t2), a data voltage DATA is applied to achieve the lowest grayscale to sense the threshold voltage Vth of the driving transistor DT or the mobility α of the driving transistor DT. For example, a data voltage DATA of 2V can be applied to allow multiple pixels PX to achieve black.

[0081] During the compensation period (t2 to t3), the data voltage DATA can be reduced to compensate for the brightness of the light-emitting diode 150. For example, a data voltage of -5V DATA can be applied to reduce the brightness of multiple pixels PX.

[0082] In other words, the data voltage DATA decreases during the compensation period (t2 to t3), causing the voltage at the anode of the LED 150, which is coupled to the data line DL via the first compensation capacitor CC1, to also decrease. Therefore, the voltage level applied between the anode and cathode of the LED 150 decreases, resulting in a decrease in the drive current of the LED 150. Consequently, when multiple pixels PX are driven at the second refresh rate and the video data signal RGB is a low-grayscale video data signal, the drive current of the LED 150 decreases to compensate for the reduced output brightness of the LED 150.

[0083] Figure 5AIt is a waveform diagram of the drive current of the VRR drive in a display device based on existing technology.

[0084] Figure 5B It is a waveform diagram of the drive current of the VRR drive of a display device according to an exemplary embodiment of the present disclosure.

[0085] Figure 5A and Figure 5B The waveform diagram shows the drive current Ioled of the LED 150 at a first refresh rate of 120Hz and a second refresh rate of 60Hz when multiple pixels PX achieve low grayscale.

[0086] Referring to Figure 5, when a prior art display device is driven at a first refresh rate of 120Hz, the display device is refreshed at time t2, causing the data voltage DATA to be recharged at a low rate. Therefore, the average value of the drive current Ioled of the light-emitting diode 150 is reduced to approximately 327pA.

[0087] In contrast, when a prior art display device is driven at a second refresh rate of 60Hz, the display device is not refreshed at time t2, so that the charging data voltage remains unchanged. Therefore, the average value of the drive current Ioled of the light-emitting diode 150 does not decrease, remaining at approximately 376pA.

[0088] In other words, when existing display devices achieve low grayscale, the low recharge rate of the data voltage DATA at the first refresh rate results in a 15.1% difference in the drive current Ioled. Therefore, even when achieving the same low grayscale in existing display devices, the following problem exists: the output brightness is relatively brighter during the second refresh rate drive than during the first refresh rate drive.

[0089] Therefore, when the display device according to an exemplary embodiment of the present disclosure is driven at a second refresh rate, the output brightness of multiple pixels is reduced during the compensation period to compensate for the aforementioned output brightness difference.

[0090] Reference Figure 5B When the display device according to an exemplary embodiment of the present disclosure is driven at a first refresh rate of 120Hz, the display device is refreshed at time t2, causing the data voltage DATA to be recharged at a low rate. Therefore, the average value of the drive current Ioled of the light-emitting diode 150 decreases to approximately 327pA.

[0091] In contrast, when the display device according to an exemplary embodiment of this disclosure is driven at a second refresh rate of 60Hz, the data voltage DATA decreases at timing t2, causing the voltage at the anode of the coupled light-emitting diode 150 to also decrease. Therefore, the average value of the drive current Ioled of the light-emitting diode 150 also decreases to approximately 329pA.

[0092] In other words, when the display device according to the exemplary embodiment of this disclosure achieves low grayscale, the amount of reduction in output brightness at the second refresh rate is the same as the amount of reduction in output brightness at the first refresh rate. Therefore, when the display device according to the exemplary embodiment of this disclosure achieves the same low grayscale, the difference in drive current Ioled is only 0.6%.

[0093] Therefore, in the display device according to the exemplary embodiment of this disclosure, when achieving the same low grayscale, all output brightness levels remain similar whether driven at a first refresh rate or a second refresh rate. Thus, in the display device according to the exemplary embodiment of this disclosure, low grayscale images can be smoothly achieved even with refresh rate variations.

[0094] In existing display devices, in order to reduce the brightness difference during the aforementioned low grayscale implementation, different gamma voltages are set for the first refresh rate and the second refresh rate to output data voltages.

[0095] In this case, a memory for storing various gamma voltages is required, and a tact time for applying the changing gamma voltage is also required.

[0096] However, the display device according to the exemplary embodiments of this disclosure only changes the data voltage to compensate for the output brightness. Thus, the display device according to the exemplary embodiments of this disclosure does not require a memory for storing various gamma voltages, making it possible to implement a simpler data driver.

[0097] Furthermore, the display device according to the exemplary embodiments of this disclosure does not require a clock cycle time for applying the changed gamma voltage, which allows for faster compensation of output brightness differences.

[0098] In the following, a display device according to another exemplary embodiment of the present disclosure will be described.

[0099] The only difference between the display device according to another exemplary embodiment of this disclosure and the display device according to an exemplary embodiment of this disclosure is the first compensation transistor, which will be described primarily in this respect. Figure 3 The waveform diagram is applied in the same manner to another exemplary embodiment of this disclosure.

[0100] Figure 6 This is a circuit diagram of a sub-pixel of a display device according to another exemplary embodiment of the present disclosure.

[0101] Reference Figure 6 A sub-pixel SP of a display device according to another exemplary embodiment of the present disclosure may include a switching transistor SWT, a sensing transistor SET, a driving transistor DT, a storage capacitor SC, a first compensation capacitor CC1, and a light-emitting diode 150. The sub-pixel SP may also include a first compensation transistor CPT1.

[0102] The first compensation transistor CPT1 applies a first compensation voltage Vcp1 to the first compensation capacitor CC1 to compensate the brightness of the light-emitting diode 150 during the compensation period (t2 to t3).

[0103] The first compensation transistor CPT1 includes a gate electrode to which a first compensation signal CS1 is applied, a source electrode to which a first compensation voltage Vcp1 is applied, and a drain electrode connected to a plurality of first compensation capacitors CC1. In other words, the first compensation capacitors CC1 are connected to the data line DL, such that the first compensation transistor CPT1 is also connected to the data line DL.

[0104] When multiple pixels PX achieve low grayscale at the second refresh rate, the first compensation signal CS1 can be on only during the compensation period (t2 to t3). Therefore, when multiple pixels PX achieve low grayscale at the second refresh rate, the first compensation transistor CPT1 is turned on only during the compensation period (t2 to t3) to apply the first compensation voltage Vcp1 to the first compensation transistor CPT1.

[0105] The first compensation voltage Vcp1 is lower than the minimum level of the data voltage DATA.

[0106] Specifically, during the sensing period (t1 to t2), a data voltage DATA can be applied to achieve the lowest grayscale. For example, a data voltage DATA of 2V can be applied to allow multiple pixels PX to achieve black.

[0107] The first compensation voltage Vcp1 is lower than the data voltage DATA used to achieve the lowest grayscale. For example, to reduce the brightness of multiple pixels PX, the first compensation voltage Vcp1 can be -5V.

[0108] In other words, during the compensation period (t2 to t3), applying a first compensation voltage Vcp1 causes the voltage at the anode of the CC1 LED 150 to be reduced via the first compensation capacitor. Therefore, the voltage level applied between the anode and cathode of the LED 150 decreases, resulting in a reduction in the drive current of the LED 150. Consequently, when multiple pixels PX are driven at a second refresh rate and the video data signal RGB is a low-grayscale video data signal, the drive current of the LED 150 decreases to compensate for the reduced output brightness of the LED 150.

[0109] Therefore, in a display device according to another exemplary embodiment of the present disclosure, when achieving the same low grayscale, all output brightness remains at a similar level whether driven at a first refresh rate or a second refresh rate. Thus, in a display device according to another exemplary embodiment of the present disclosure, low grayscale images can be smoothly achieved even with refresh rate variations.

[0110] In the following, a display device according to yet another exemplary embodiment (the third exemplary embodiment) of the present disclosure will be described.

[0111] The only difference between the display device according to another exemplary embodiment (the third exemplary embodiment) of this disclosure and the display device according to the exemplary embodiment of this disclosure lies in the second compensation transistor, which will be described primarily in this respect. Figure 3 The waveform diagram is applied in the same manner to another exemplary embodiment of this disclosure.

[0112] Figure 7 This is a circuit diagram of a sub-pixel of a display device according to yet another exemplary embodiment (third exemplary embodiment) of the present disclosure.

[0113] exist Figure 7 The diagram shows a circuit diagram of one of the multiple sub-pixels SP of the display device 100.

[0114] Reference Figure 7 The sub-pixel SP may include a switching transistor SWT, a sensing transistor SET, a driving transistor DT, a storage capacitor SC, a second compensation capacitor CC2, and a light-emitting diode 150.

[0115] Furthermore, in a display device according to yet another exemplary embodiment (a third exemplary embodiment) of the present disclosure, each of the plurality of sub-pixels SP further includes a second compensation capacitor CC2 for compensating the output brightness of the light-emitting diode 150.

[0116] The second compensation capacitor CC2 controls the voltage applied to the anode of the LED 150 to compensate for the output brightness of the LED 150. One electrode of the second compensation capacitor CC2 is connected to the second node N2, which serves as the anode of the LED 150, and the other electrode is connected to the cathode of the LED 150. Therefore, the voltage at the anode of the LED 150 can vary according to the change in the low potential voltage VSS applied to the cathode of the LED 150. Consequently, the drive current of the LED 150 also varies.

[0117] In the following text, we will refer to... Figure 3 and Figure 8 The driver of a display device according to yet another exemplary embodiment (the third exemplary embodiment) of the present disclosure is described.

[0118] exist Figure 3 The diagram shows a clock signal when a display device according to another exemplary embodiment of the present disclosure is driven at 120Hz as a first refresh rate, and a clock signal when the display device is driven at 60Hz as a second refresh rate lower than the first refresh rate.

[0119] When the display device is driven at 120Hz as the first refresh rate according to the VRR signal VRR, the clock signal is activated during the driving period (t0 to t1). Therefore, the data voltage DATA corresponding to the video data signal RGB is applied to multiple pixels PX during the driving period (t0 to t1), driving the multiple pixels PX. During the blank period (t1 to t2), the clock signal is deactivated. Therefore, during the blank period (t1 to t2), the data voltage DATA corresponding to the video data signal RGB is not applied to the multiple pixels PX, and the threshold voltage Vth of the driving transistor DT or the mobility α of the driving transistor DT is sensed by the sensing transistor SET. That is, when driving multiple pixels PX at 120Hz as the first refresh rate, the blank period (t1 to t2) may only include the sensing period. After the blank period (t1 to t2), the clock signal is activated, causing the driving period to repeat.

[0120] When multiple pixels PX are driven at 60Hz as a second refresh rate according to the VRR signal VRR, the clock signal is activated during the driving period (t0 to t1). Therefore, the data voltage DATA corresponding to the video data signal RGB is applied to the multiple pixels PX during the driving period (t0 to t1), thereby driving the multiple pixels PX. Furthermore, the clock signal is deactivated during the idle period (t1 to t3), so that the data voltage DATA corresponding to the video data signal RGB is not applied to the multiple pixels PX.

[0121] When the video data signal RGB output during the aforementioned driving period (t0 to t1) is a low grayscale video data signal, during a portion of the blank period (t1 to t2) of the blank period (t1 to t3), the threshold voltage Vth of the driving transistor DT or the mobility α of the driving transistor DT is sensed by the sensing transistor SET. The aforementioned portion of the blank period (t1 to t2) of the blank period (t1 to t3) can be a sensing period. During another subsequent period t2 to t3 of the blank period (t1 to t3), the voltage applied to the anode of the light-emitting diode 150 is controlled by means of the second compensation capacitor CC2 to compensate for the output brightness of the light-emitting diode 150. The subsequent period (t2 to t3) of the blank period (t1 to t3) can be a compensation period. That is, when multiple pixels PX achieve low grayscale at the second refresh rate, the blank period (t1 to t3) includes not only the sensing period (t1 to t2) but also the compensation period (t2 to t3).

[0122] When the video data signal RGB output during the aforementioned driving period (t0 to t1) is a high grayscale video data signal, during the blank period (t1 to t3), the threshold voltage Vth of the driving transistor DT or the mobility α of the driving transistor DT is sensed by the sensing transistor SET. That is, when multiple pixels achieve high grayscale at a second refresh rate, the blank period (t1 to t3) only includes the sensing period.

[0123] After the blank period (t1 to t3), the clock signal is reactivated, causing the driving period to be repeated.

[0124] In the following text, reference will be made to Figure 8 This describes the brightness compensation of the light-emitting diode 150 during the compensation period (t2 to t3) when multiple pixels PX achieve low grayscale at a second refresh rate.

[0125] Figure 8 This is a waveform diagram of the data voltage of a display device according to yet another exemplary embodiment (third exemplary embodiment) of the present disclosure.

[0126] Reference Figure 8 When multiple pixels PX achieve low grayscale at a second refresh rate, the low potential voltage VSS during the compensation period (t2 to t3) can be higher than the low potential voltage VSS during the sensing period (t1 to t2).

[0127] For example, during the sensing period (t1 to t2), similar to the driving period (t0 to t1), a low potential voltage VSS of 0V can be applied.

[0128] During the compensation period (t2 to t3), a low potential voltage VSS can be applied during the drive period t2 to t3 to compensate for the brightness of the light-emitting diode 150. For example, a low potential voltage VSS of 0.3V can be applied to reduce the brightness of multiple pixels PX.

[0129] In other words, the low-potential voltage VSS increases during the compensation period (t2 to t3), which increases the voltage of the anode of LED 150, which is coupled to the cathode of LED 150 via the second compensation capacitor CC2. However, the increase in the anode voltage of LED 150 due to coupling is less than the increase in the low-potential voltage VSS, which is the voltage of the cathode of LED 150. Therefore, the voltage level applied between the anode and cathode of LED 150 decreases, resulting in a decrease in the drive current of LED 150. Thus, when multiple pixels PX are driven at the second refresh rate and the video data signal RGB is a low-grayscale video data signal, the drive current of LED 150 decreases to compensate for the reduced output brightness of LED 150.

[0130] Figure 9 It is a waveform diagram of the drive current of the VRR drive of a display device according to another exemplary embodiment (third exemplary embodiment) of the present disclosure.

[0131] Figure 9 The waveform diagram shows the drive current Ioled of the LED 150 at a first refresh rate of 120Hz and a second refresh rate of 60Hz when multiple pixels PX achieve low grayscale.

[0132] According to yet another exemplary embodiment of this disclosure (a third exemplary embodiment), the display device, while being driven at a second refresh rate, reduces the output brightness of multiple pixels during a compensation period to compensate for [the impact of the second refresh rate]. Figure 5A The output brightness difference described in the text.

[0133] Reference Figure 9 When the display device according to another exemplary embodiment (third exemplary embodiment) of the present disclosure is driven at a first refresh rate of 120Hz, the display device is refreshed at time t2, causing the data voltage DATA to be recharged at a low rate. Therefore, the average value of the drive current Ioled of the light-emitting diode 150 is reduced to approximately 327pA.

[0134] When the display device according to another exemplary embodiment (third exemplary embodiment) of this disclosure is driven at a second refresh rate of 60Hz, the low potential voltage VSS increases at timing t2, causing the voltage of the anode of the coupled light-emitting diode 150 to also increase. However, the increase in the anode voltage of the light-emitting diode 150 due to coupling is less than the increase in the low potential voltage VSS, where VSS is the voltage of the cathode of the light-emitting diode 150. Therefore, the average value of the drive current Ioled of the light-emitting diode 150 also decreases to approximately 328pA.

[0135] In other words, when the display device according to another exemplary embodiment (third exemplary embodiment) of this disclosure achieves low grayscale, the amount of reduction in output brightness at the second refresh rate is the same as the amount of reduction in output brightness at the first refresh rate. Therefore, when the display device according to another exemplary embodiment (third exemplary embodiment) of this disclosure achieves the same low grayscale, the difference in drive current Ioled is only 0.03%.

[0136] Therefore, in a display device according to another exemplary embodiment (third exemplary embodiment) of the present disclosure, when achieving the same low grayscale, all output brightness remains at a similar level whether driven at a first refresh rate or a second refresh rate. Therefore, in a display device according to another exemplary embodiment (third exemplary embodiment) of the present disclosure, low grayscale images can be smoothly achieved even with refresh rate changes.

[0137] Furthermore, the display device according to another exemplary embodiment of this disclosure does not require a clock cycle time for applying the changed gamma voltage, thus enabling faster compensation for output brightness differences.

[0138] In the following, a display device according to yet another exemplary embodiment (fourth exemplary embodiment) of the present disclosure will be described.

[0139] The only difference between the display device according to another exemplary embodiment (fourth exemplary embodiment) of this disclosure and the display device according to another exemplary embodiment (third exemplary embodiment) of this disclosure lies in the second compensation transistor, which will be described primarily in this respect. Figure 3 The waveform diagram is applied in the same manner to another exemplary embodiment of this disclosure (fourth exemplary embodiment).

[0140] Figure 10 This is a circuit diagram of a sub-pixel of a display device according to yet another exemplary embodiment (fourth exemplary embodiment) of the present disclosure.

[0141] Reference Figure 10 According to another exemplary embodiment (fourth exemplary embodiment) of the present disclosure, the sub-pixel SP of the display device may include a switching transistor SWT, a sensing transistor SET, a driving transistor DT, a storage capacitor SC, a second compensation capacitor CC2, and a light-emitting diode 150. The sub-pixel SP may also include a second compensation transistor CPT2.

[0142] The second compensation transistor CPT2 applies a second compensation voltage Vcp2 to the second compensation capacitor CC2 to compensate the brightness of the light-emitting diode 150 during the compensation period (t2 to t3).

[0143] The second compensation transistor CPT2 includes a gate electrode to which a second compensation signal CS2 is applied, a source electrode to which a second compensation voltage Vcp2 is applied, and a drain electrode connected to a plurality of second compensation capacitors CC2. In other words, the second compensation capacitors CC2 are connected to the cathode of the light-emitting diode 150, such that the second compensation transistor CPT2 is also connected to the cathode of the light-emitting diode 150.

[0144] When multiple pixels PX achieve low grayscale at the second refresh rate, the second compensation signal CS2 can be on only during the compensation period (t2 to t3). Therefore, when multiple pixels PX achieve low grayscale at the second refresh rate, the second compensation transistor CPT2 is turned on only during the compensation period (t2 to t3) to apply the second compensation voltage Vcp2 to the second compensation transistor CPT2.

[0145] The second compensation voltage Vcp2 can be higher than the low potential voltage VSS.

[0146] Specifically, refer to Figure 8 During the sensing period (t1 to t2), similar to the driving period (t0 to t1), a low potential voltage VSS of 0V can be applied.

[0147] The second compensation voltage Vcp2 can be higher than the low potential voltage VSS. For example, to reduce the brightness of multiple pixels PX, the second compensation voltage Vcp2 can be 0.3V.

[0148] In other words, during the compensation period (t2 to t3), the application of the second compensation voltage Vcp2 allows the voltage at the anode of the LED 150 to increase through the second compensation capacitor CC2. However, due to coupling, the increase in the anode voltage of the LED 150 is less than the increase in the cathode voltage. Therefore, the voltage level applied between the anode and cathode of the LED 150 decreases, resulting in a decrease in the drive current of the LED 150. Consequently, when multiple pixels PX are driven at the second refresh rate and the video data signal RGB is a low grayscale video data signal, the drive current of the LED 150 decreases to compensate for the reduced output brightness of the LED 150.

[0149] Therefore, in another exemplary embodiment (fourth exemplary embodiment) of the display device according to this disclosure, when the same low grayscale is achieved, all output brightness remains at a similar level whether driven at the first refresh rate or the second refresh rate. Thus, in another exemplary embodiment (fourth exemplary embodiment) of the display device according to this disclosure, a low grayscale image can be smoothly achieved even with changes in the refresh rate.

[0150] Exemplary embodiments of this disclosure can also be described as follows:

[0151] According to an aspect of this disclosure, a display device includes: a display panel having a plurality of pixels that are driven during a driving period and not driven during a blank period; a timing controller configured to output a video data signal and a variable refresh rate signal that determines the refresh rate of the plurality of pixels; and a data driver configured to supply data voltages to the plurality of pixels via a plurality of data lines based on a VRR signal and the video data signal, wherein the plurality of pixels are driven at a first refresh rate or a second refresh rate lower than the first refresh rate based on the VRR signal, and when the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the output brightness of each of the plurality of pixels decreases during the blank period.

[0152] Each of the multiple pixels may include multiple sub-pixels, and each of the multiple sub-pixels may include a switching transistor, a driving transistor, a storage capacitor, a sensing transistor, a compensation capacitor, and a light-emitting diode (LED). The sensing transistor is connected to the driving transistor to sense the threshold voltage and mobility of the driving transistor, and the compensation capacitor is connected to the LED to compensate for the output brightness of the LED.

[0153] When multiple pixels are driven at a second refresh rate and the video data signal is a low grayscale video data signal, the blank period includes a sensing period for the threshold voltage and mobility of the driving transistor and a compensation period for compensating the output brightness of the light-emitting diode.

[0154] The compensation capacitor may include a first compensation capacitor, and the first compensation capacitor may be connected to the anode of the light-emitting diode and each of the multiple data lines.

[0155] The data voltage during the compensation period can be lower than the data voltage during the sensing period.

[0156] Each of the plurality of pixels may further include a first compensation transistor connected to a first compensation capacitor, and when the plurality of pixels are driven at a second refresh rate and the video data signal is a low grayscale video data signal, the first compensation transistor applies a first compensation voltage to the first compensation capacitor.

[0157] The first compensation transistor may include a gate electrode to which a first compensation signal is applied, a source electrode to which a first compensation voltage is applied, and a drain electrode connected to a first compensation capacitor.

[0158] The first compensation voltage can be lower than the minimum level of the data voltage.

[0159] When multiple pixels are driven at a second refresh rate and the video data signal is a low grayscale video data signal, the first compensation signal can be on during the compensation period.

[0160] The compensation capacitor includes a second compensation capacitor connected to the anode and cathode of the light-emitting diode, and a low potential voltage is applied to the cathode of the light-emitting diode.

[0161] The low potential voltage during the compensation period can be higher than the low potential voltage during the sensing period.

[0162] Each of the plurality of pixels may further include a second compensation transistor connected to a second compensation capacitor, and when the plurality of pixels are driven at a second refresh rate and the video data signal is a low grayscale video data signal, the second compensation transistor applies a second compensation voltage to the second compensation capacitor.

[0163] The second compensation transistor may include a gate electrode to which a second compensation signal is applied, a source electrode to which a second compensation voltage is applied, and a drain electrode connected to a second compensation capacitor.

[0164] The second compensation voltage can be higher than the low potential voltage.

[0165] When multiple pixels are driven at a second refresh rate and the video data signal is a low grayscale video data signal, the second compensation signal can be on during the compensation period.

[0166] When multiple pixels are driven at a first refresh rate, or when multiple pixels are driven at a second refresh rate and the video data signal is a high grayscale video data signal, the blank period only includes the sensing period, during which the threshold voltage and mobility of the driving transistor can be sensed.

[0167] According to another aspect of this disclosure, a display device includes a plurality of pixels that are driven during a driving period and not driven during a blank period. Each of the plurality of pixels includes: a light-emitting diode configured to emit light; a driving transistor including a gate electrode corresponding to a first node, a source electrode connected to the light-emitting diode and corresponding to a second node, and a drain electrode to which a high potential voltage is applied; a switching transistor including a drain electrode connected to a data line, a gate electrode connected to a gate line, and a source electrode connected to the first node; a sensing transistor including a drain electrode connected to a reference voltage line, a gate electrode connected to a gate line, and a source electrode connected to the second node; a storage capacitor connected to the first node and the second node; and a first compensation capacitor connected to the data line and the second node.

[0168] During idle periods, the data voltage applied to the data line can decrease.

[0169] According to another aspect of this disclosure, a display device includes a plurality of pixels that are driven during a driving period and not driven during a blank period. Each of the plurality of pixels includes: a light-emitting diode (LED) that is applied with a low potential voltage to emit light; a driving transistor that includes a gate electrode corresponding to a first node, a source electrode connected to the anode of the LED and corresponding to a second node, and a drain electrode that is applied with a high potential voltage; a switching transistor that includes a drain electrode connected to a data line, a gate electrode connected to a gate line, and a source electrode connected to the first node; a sensing transistor that includes a drain electrode connected to a reference voltage line, a gate electrode connected to the gate line, and a source electrode connected to the second node; a storage capacitor connected to the first node and the second node; and a second capacitor connected to the second node and the cathode of the LED.

[0170] During the blank period, the low potential voltage can rise.

[0171] Although exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and can be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are exemplary in all respects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the appended claims, and all technical concepts within their equivalents should be understood to fall within the scope of the present disclosure.

Claims

1. A display device, comprising: The display panel has a plurality of pixels that are driven during a driving period and not driven during a blank period. Each of the plurality of pixels includes a plurality of sub-pixels, and each of the plurality of sub-pixels includes a switching transistor, a driving transistor, a storage capacitor, a sensing transistor, a compensation capacitor, and a light-emitting diode. A timing controller configured to output video data signals and a variable refresh rate (VRR) signal that determines the refresh rate of the plurality of pixels; and A data driver configured to supply data voltage to the plurality of pixels via multiple data lines based on the VRR signal and the video data signal. in, The plurality of pixels are driven at a first refresh rate or a second refresh rate lower than the first refresh rate according to the VRR signal. When the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the output brightness of each of the plurality of pixels decreases during the blank period, and When the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the blank period includes a sensing period and a compensation period. During the sensing period, the threshold voltage and mobility of the driving transistor are sensed, and during the compensation period, the output brightness of the light-emitting diode is compensated. The data voltage during the compensation period is lower than the data voltage during the sensing period, or the low potential voltage during the compensation period is higher than the low potential voltage during the sensing period.

2. The display device according to claim 1, wherein, The sensing transistor is connected to the driving transistor to sense the threshold voltage and mobility of the driving transistor, and the compensation capacitor is connected to the light-emitting diode to compensate for the output brightness of the light-emitting diode.

3. The display device according to claim 1, in, The compensation capacitor includes a first compensation capacitor, and the first compensation capacitor is connected to the anode of the light-emitting diode and each of the plurality of data lines.

4. The display device according to claim 3, in, Each of the plurality of pixels further includes a first compensation transistor connected to the first compensation capacitor, and Specifically, when the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the first compensation transistor applies a first compensation voltage to the first compensation capacitor.

5. The display device according to claim 4, in, The first compensation transistor includes: The gate electrode to which the first compensation signal is applied, The source electrode to which the first compensation voltage is applied; and Connected to the drain electrode of the first compensation capacitor.

6. The display device according to claim 5, in, The first compensation voltage is lower than the minimum level of the data voltage.

7. The display device according to claim 5, in, When the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the first compensation signal is on during the compensation period.

8. The display device according to claim 1, in, The compensation capacitor includes a second compensation capacitor connected to the anode and cathode of the light-emitting diode, and a low potential voltage is applied to the cathode of the light-emitting diode.

9. The display device according to claim 8, in, Each of the plurality of pixels further includes a second compensation transistor connected to the second compensation capacitor, and Specifically, when the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the second compensation transistor applies a second compensation voltage to the second compensation capacitor.

10. The display device according to claim 9, in, The second compensation transistor includes: The gate electrode to which the second compensation signal is applied, The source electrode to which the second compensation voltage is applied; and Connected to the drain electrode of the second compensation capacitor.

11. The display device according to claim 10, in, The second compensation voltage is higher than the low potential voltage.

12. The display device according to claim 10, in, When the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the second compensation signal is on during the compensation period.

13. The display device according to claim 2, in, When the plurality of pixels are driven at the first refresh rate, or when the plurality of pixels are driven at the second refresh rate and the video data signal is a high grayscale video data signal, the blank period only includes a sensing period in which the threshold voltage and mobility of the driving transistor are sensed.

14. A display device, comprising: Multiple pixels, which are driven during driving periods and not driven during idle periods. Each of the plurality of pixels includes: A light-emitting diode configured to emit light; A driving transistor, the driving transistor including a gate electrode corresponding to a first node, a source electrode connected to the light-emitting diode and corresponding to a second node, and a drain electrode to which a high potential voltage is applied; A switching transistor, the switching transistor including a drain electrode connected to a data line, a gate electrode connected to a gate line, and a source electrode connected to the first node; A sensing transistor, the sensing transistor including a drain electrode connected to a reference voltage line, a gate electrode connected to a gate line, and a source electrode connected to the second node; Storage capacitors connected to the first node and the second node; and A first compensation capacitor is connected to the data line and the second node. The plurality of pixels are driven at a first refresh rate or a second refresh rate lower than the first refresh rate. Specifically, when the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the output brightness of each of the plurality of pixels decreases during the blank period, and Wherein, when the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the blank period includes a sensing period and a compensation period, wherein the threshold voltage and mobility of the driving transistor are sensed during the sensing period, and the output brightness of the light-emitting diode is compensated during the compensation period, wherein the data voltage during the compensation period is lower than the data voltage during the sensing period, or the low potential voltage during the compensation period is higher than the low potential voltage during the sensing period.

15. A display device, comprising: Multiple pixels, which are driven during driving periods and not driven during idle periods. Each of the plurality of pixels includes: A light-emitting diode, wherein a low potential voltage is applied to the light-emitting diode to emit light; A driving transistor, the driving transistor including a gate electrode corresponding to a first node, a source electrode connected to the anode of the light-emitting diode and corresponding to a second node, and a drain electrode to which a high potential voltage is applied; A switching transistor, the switching transistor including a drain electrode connected to a data line, a gate electrode connected to a gate line, and a source electrode connected to the first node; A sensing transistor, the sensing transistor including a drain electrode connected to a reference voltage line, a gate electrode connected to a gate line, and a source electrode connected to the second node; Storage capacitors connected to the first node and the second node; and A second capacitor connected to the second node and the cathode of the light-emitting diode. The plurality of pixels are driven at a first refresh rate or a second refresh rate lower than the first refresh rate. Specifically, when the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the output brightness of each of the plurality of pixels decreases during the blank period, and Wherein, when the plurality of pixels are driven at the second refresh rate and the video data signal is a low grayscale video data signal, the blank period includes a sensing period and a compensation period, wherein the threshold voltage and mobility of the driving transistor are sensed during the sensing period, and the output brightness of the light-emitting diode is compensated during the compensation period, wherein the data voltage during the compensation period is lower than the data voltage during the sensing period, or the low potential voltage during the compensation period is higher than the low potential voltage during the sensing period.

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