Pixel unit and image sensor
Patent Information
- Application Number
- CN202111553669.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-17
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2041-12-17
AI Technical Summary
但现有技术中存在第二光电二极管的电荷向向第一光电二极管扩散的技术问题,从而使得第一光电二极管的信号受到影响,影响图像质量
[0007]所述像素单元的有益效果在于:第二传输单元用于将所述第二光电二极管饱和范围内的电荷传输到第一节点,将所述第二光电二极管饱和范围外的电荷传输到第二节点或固定电位,能够避免所述第二光电二极管的电荷向所述第一光电二极管扩散,从而能够避免了所述第二光电二极管对所述第一光电二极管的影响,提高了图像质量,并且能够实现高动态范围的同时实现LED闪烁抑制。
Smart Images

Figure CN116367006B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of image sensor technology, and more particularly to a pixel unit and an image sensor. Background Technology
[0002] With the continuous development of image sensor technology, CMOS image sensors, due to their advantages such as high integration and low power consumption, are increasingly widely used in electronics, monitoring, navigation, transportation, and other fields. However, as CMOS image sensor technology continues to develop, the performance requirements for CMOS image sensors are also becoming increasingly stringent.
[0003] With the increasing prevalence of intelligent driving applications, onboard CMOS image sensors, as the information acquisition source for intelligent driving, are required to capture the most realistic and complete image information possible under various driving environments and scenarios. To capture image signals in tunnels and at night, onboard CMOS image sensors require a sufficiently large dynamic range. Simultaneously, intelligent driving needs to adjust driving modes based on signals from electronic devices in the driving environment, such as traffic lights. These electronic devices are typically LED light signals, which are periodically modulated signals. To acquire complete electronic traffic signals, onboard CMOS image sensors must be able to suppress LED flicker. However, existing technologies suffer from a technical problem where the charge of the second photodiode diffuses towards the first photodiode, affecting the signal of the first photodiode and thus impacting image quality.
[0004] Therefore, it is necessary to provide a new type of pixel unit and image sensor to solve the above-mentioned problems existing in the prior art. Summary of the Invention
[0005] The purpose of this invention is to provide a pixel unit and an image sensor that avoids the influence of the second photodiode on the first photodiode, thereby improving image quality.
[0006] To achieve the above objectives, the pixel unit of the present invention is characterized by comprising: The sensitivity of the first photodiode is lower than the predetermined sensitivity. The second photodiode has a sensitivity higher than the predetermined sensitivity; The first transmission unit is used to transfer the charge of the first photodiode to the first node; The second transmission unit is used to transmit the charge within the saturation range of the second photodiode to the first node, and to transmit the charge outside the saturation range of the second photodiode to the second node or a fixed potential. A conversion gain regulating transistor is used to control the conversion gain of the second photodiode by opening or closing the path between the first node and the second node; A reset transistor, connected to the first transmission unit, is used to reset the pixel unit; and The output unit is used to amplify the voltage at the first node and output it.
[0007] The beneficial effect of the pixel unit is that the second transmission unit is used to transmit the charge within the saturation range of the second photodiode to the first node, and to transmit the charge outside the saturation range of the second photodiode to the second node or a fixed potential. This can prevent the charge of the second photodiode from spreading to the first photodiode, thereby avoiding the influence of the second photodiode on the first photodiode, improving image quality, and achieving high dynamic range while suppressing LED flicker.
[0008] Optionally, the first transmission unit includes a first transmission transistor, a first terminal of which is connected to the cathode of the first photodiode, the anode of the first photodiode is grounded, and a second terminal of the first transmission transistor is connected to the first terminal of the reset transistor, the second terminal of the reset transistor being connected to a power supply voltage. Its advantage is that it prevents the charge of the second photodiode from diffusing to the first photodiode, thereby avoiding the influence of large pixels on small pixels and improving image quality.
[0009] Optionally, the second transmission unit includes a second transmission transistor and a third transmission transistor. The first terminals of both the second and third transmission transistors are connected to the cathode of the second photodiode. The anode of the second photodiode is grounded. The second terminal of the second transmission transistor is connected to the output unit. The second terminal of the third transmission transistor is connected to the second node or to a fixed potential. The advantage is that it prevents the charge of the second photodiode from diffusing to the first photodiode, thereby avoiding the influence of large pixels on small pixels and improving image quality.
[0010] Optionally, the first terminal of the conversion gain adjustment transistor is the second node, the second terminal of the conversion gain adjustment transistor is the first node, the first terminal of the conversion gain adjustment transistor is connected to the second terminal of the first transmission transistor, and the second terminal of the conversion gain adjustment transistor is connected to the second terminal of the second transmission transistor.
[0011] Optionally, the first terminal of the conversion gain adjustment transistor is the second node, the second terminal of the conversion gain adjustment transistor is the first node, the second terminal of the conversion gain adjustment transistor is connected to the second terminal of the first transmission transistor and the second terminal of the second transmission transistor, and when the second terminal of the third transmission transistor unit is connected to a fixed potential, the first terminal of the conversion gain adjustment transistor is left floating.
[0012] Optionally, the first transmission unit further includes a fourth transmission transistor, the first terminal of which is connected to the cathode of the first photodiode, the anode of the first photodiode is grounded, and the second terminal of the fourth transmission transistor is connected to the first terminal of the first transmission transistor. The advantage is that it prevents the charge of the second photodiode from diffusing to the first photodiode, thereby avoiding the influence of large pixels on small pixels and improving image quality.
[0013] Optionally, the pixel unit further includes a first capacitor, one end of which is connected to the first terminal of the conversion gain adjustment transistor, and the other end of which is connected to a fixed potential or a timing signal. The advantage of this is that it can reduce the low conversion gain of the second photodiode and expand the dynamic range of the pixel unit.
[0014] Optionally, the pixel unit further includes a second capacitor, one end of which is connected to the second terminal of the fourth transmission transistor, and the other end of which is connected to a fixed potential or a timing signal. The advantage is that it can increase the full-well charge of the first photodiode, thereby expanding the dynamic range of the pixel unit.
[0015] Optionally, the pixel unit further includes a first capacitor and a second capacitor. One end of the first capacitor is connected to the first terminal of the conversion gain adjustment transistor, and the other end of the first capacitor is connected to a fixed potential or timing signal. One end of the second capacitor is connected to the second terminal of the fourth transmission transistor, and the other end of the second capacitor is connected to a fixed potential or timing signal. The capacitance of the first capacitor is smaller than that of the second capacitor. The advantages are: it can reduce the low conversion gain of the second photodiode, expand the dynamic range of the pixel unit, and expand the full-well charge of the first photodiode, thereby expanding the dynamic range of the pixel unit.
[0016] Optionally, the output unit includes an amplifying transistor and a selecting transistor. The first terminal of the amplifying transistor is connected to the power supply voltage. The gate of the amplifying transistor is connected to the second terminal of the second transmission transistor. The second terminal of the amplifying transistor is connected to the first terminal of the selecting transistor. The second terminal of the selecting transistor is used to output the voltage amplified by the amplifying transistor.
[0017] Optionally, the pixel unit further includes a driving circuit, which is connected to the gate of the first transmission transistor, the gate of the second transmission transistor, the gate of the third transmission transistor, the gate of the reset transistor, and the gate of the selection transistor to drive the first transmission transistor, the second transmission transistor, the third transmission transistor, the reset transistor, and the selection transistor.
[0018] Optionally, the driving circuit is also connected to the gate of the fourth transmission transistor to drive the fourth transmission transistor.
[0019] The present invention also provides an image sensor comprising a pixel array consisting of at least one of the pixel units.
[0020] The beneficial effects of the image sensor are as follows: it includes a pixel array composed of at least one pixel unit, the pixel unit including a second transmission unit, the second transmission unit being used to transfer the charge within the saturation range of the second photodiode to the first node, and to transfer the charge outside the saturation range of the second photodiode to the second node or a fixed potential, which can prevent the charge of the second photodiode from diffusing to the first photodiode, thereby avoiding the influence of the second photodiode on the first photodiode, improving image quality, and achieving high dynamic range while suppressing LED flicker. Attached Figure Description
[0021] Figure 1 This is a circuit diagram of a pixel unit in the first embodiment of the present invention; Figure 2 This is a circuit diagram of a pixel unit in a second embodiment of the present invention; Figure 3 This is a circuit diagram of a pixel unit in the third embodiment of the present invention; Figure 4 This is a circuit diagram of a pixel unit in the fourth embodiment of the present invention; Figure 5 This is a circuit diagram of a pixel unit in the fifth embodiment of the present invention; Figure 6 This is a circuit diagram of a pixel unit in the sixth embodiment of the present invention; Figure 7 This is a circuit diagram of a pixel unit in the seventh embodiment of the present invention; Figure 8 This is a circuit diagram of a pixel unit in the eighth embodiment of the present invention; Figure 9 This is a circuit diagram of a pixel unit in the ninth embodiment of the present invention; Figure 10 This is a circuit diagram of a pixel unit in the tenth embodiment of the present invention; Figure 11 This is a circuit diagram of a pixel unit in the eleventh embodiment of the present invention; Figure 12 This is a circuit diagram of a pixel unit in the twelfth embodiment of the present invention; Figure 13 This is a circuit diagram of a pixel unit in the thirteenth embodiment of the present invention; Figure 14 This is a circuit diagram of a pixel unit in the fourteenth embodiment of the present invention; Figure 15 This is a circuit diagram of a pixel unit in the fifteenth embodiment of the present invention; Figure 16 This is a circuit diagram of a pixel unit in the sixteenth embodiment of the present invention; Figure 17 This is a circuit diagram of a pixel unit in the seventeenth embodiment of the present invention; Figure 18 This is a circuit diagram of the pixel unit in the eighteenth embodiment of the present invention; Figure 19 This is a timing diagram of pixel units in some embodiments of the present invention; Figure 20 This is a schematic diagram of charge transfer in a circuit in the prior art; Figure 21 For the present invention Figure 1 , Figure 2 , Figure 5 , Figure 8 , Figure 10 , Figure 11 , Figure 14 as well as Figure 17 A schematic diagram of charge transfer in the circuit shown. Figure 22 For the present invention Figure 3 , Figure 4 , Figure 6 , Figure 7 , Figure 9 , Figure 12 , Figure 13 , Figure 15 , Figure 16 as well as Figure 18 The circuit shown is a schematic diagram of charge transfer. Detailed Implementation
[0022] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention. Unless otherwise defined, the technical or scientific terms used herein should have the ordinary meaning understood by those skilled in the art. The terms "comprising" and similar expressions used herein mean that the element or object preceding the word covers the element or object listed following the word and its equivalents, but do not exclude other elements or objects.
[0023] To address the problems existing in the prior art, embodiments of the present invention provide an image sensor comprising a pixel array consisting of at least one pixel unit.
[0024] In some embodiments, the pixel unit includes a first photodiode, a second photodiode, a first transmission unit, a second transmission unit, a conversion gain adjustment transistor, a reset transistor, and an output unit.
[0025] In some embodiments, the sensitivity of the first photodiode is lower than a predetermined sensitivity; the sensitivity of the second photodiode is higher than the predetermined sensitivity; the first transmission unit is used to transfer the charge of the first photodiode to a first node; the second transmission unit is used to transfer the charge within the saturation range of the second photodiode to the first node, and the charge outside the saturation range of the second photodiode to a second node or a fixed potential; the conversion gain adjustment transistor is used to control the conversion gain of the second photodiode by opening or closing the path between the first node and the second node; the reset transistor is connected to the first transmission unit and is used to reset the pixel unit; the output unit is used to amplify the voltage at the first node and output it.
[0026] In some embodiments, the fixed potential is greater than the ground potential and less than or equal to the power supply potential.
[0027] In some embodiments, the first transmission unit includes a first transmission transistor, a first terminal of which is connected to the cathode of the first photodiode, the anode of the first photodiode is grounded, a second terminal of the first transmission transistor is connected to the first terminal of the reset transistor, and the second terminal of the reset transistor is connected to a power supply voltage.
[0028] In some embodiments, the second transmission unit includes a second transmission transistor and a third transmission transistor. The first end of the second transmission transistor and the first end of the third transmission transistor are both connected to the cathode of the second photodiode. The anode of the second photodiode is grounded. The second end of the second transmission transistor is connected to the output unit. The second end of the third transmission transistor unit is connected to the second node or connected to a fixed potential.
[0029] In some embodiments, the first terminal of the conversion gain adjustment transistor is the second node, the second terminal of the conversion gain adjustment transistor is the first node, the first terminal of the conversion gain adjustment transistor is connected to the second terminal of the first transmission transistor, and the second terminal of the conversion gain adjustment transistor is connected to the second terminal of the second transmission transistor.
[0030] In some embodiments, the first terminal of the conversion gain adjustment transistor is the second node, the second terminal of the conversion gain adjustment transistor is the first node, the second terminal of the conversion gain adjustment transistor is connected to the second terminal of the first transmission transistor and the second terminal of the second transmission transistor, and when the second terminal of the third transmission transistor unit is connected to a fixed potential, the first terminal of the conversion gain adjustment transistor is left floating.
[0031] In some embodiments, the first transmission unit further includes a fourth transmission transistor, the first terminal of which is connected to the cathode of the first photodiode, the anode of the first photodiode is grounded, and the second terminal of the fourth transmission transistor is connected to the first terminal of the first transmission transistor.
[0032] In some embodiments, the output unit includes an amplifying transistor and a selecting transistor. The first terminal of the amplifying transistor is connected to a power supply voltage. The gate of the amplifying transistor is connected to the second terminal of the second transmission transistor. The second terminal of the amplifying transistor is connected to the first terminal of the selecting transistor. The second terminal of the selecting transistor is used to output the voltage amplified by the amplifying transistor.
[0033] In some embodiments, the pixel unit further includes a driving circuit connected to the gate of the first transmission transistor, the gate of the second transmission transistor, the gate of the third transmission transistor, the gate of the reset transistor, and the gate of the selection transistor to drive the first transmission transistor, the second transmission transistor, the third transmission transistor, the reset transistor, and the selection transistor.
[0034] In some alternative embodiments, the driving circuit is also connected to the gate of the fourth transmission transistor to drive the fourth transmission transistor.
[0035] In some embodiments, the pixel unit further includes a first capacitor, one end of which is connected to a first terminal of the conversion gain adjustment transistor, and the other end of which is connected to a fixed potential or timing signal.
[0036] In some alternative embodiments, the pixel unit further includes a second capacitor, one end of which is connected to the second end of the fourth transmission transistor, and the other end of which is connected to a fixed potential or timing signal.
[0037] In some alternative embodiments, the pixel unit further includes a first capacitor and a second capacitor. One end of the first capacitor is connected to the first end of the conversion gain adjustment transistor, and the other end of the first capacitor is connected to a fixed potential or timing signal. One end of the second capacitor is connected to the second end of the fourth transmission transistor, and the other end of the second capacitor is connected to a fixed potential or timing signal. The capacitance of the first capacitor is smaller than the capacitance of the second capacitor.
[0038] In this application, the first terminal of any transistor is the source or the drain, and the second terminal of any transistor is the source or the drain. Furthermore, the first terminal and the second terminal of the same transistor cannot both be the source or the drain.
[0039] In some embodiments, the first transmission transistor, the second transmission transistor, the third transmission transistor, the fourth transmission transistor, the conversion gain adjustment transistor, the reset transistor, the amplification transistor, and the selection transistor are NMOS transistors or PMOS transistors, as long as they can achieve the corresponding functions.
[0040] Figure 1 This is a circuit diagram of a pixel unit in a first embodiment of the present invention. (Refer to...) Figure 1 The pixel unit 100 includes a first photodiode 101, a second photodiode 102, a first transmission unit 103, a second transmission unit 104, a conversion gain adjustment transistor 105, an output unit 106, and a reset transistor 107. The first transmission unit 103 includes a first transmission transistor 1031, the second transmission unit 104 includes a second transmission transistor 1041 and a third transmission transistor 1042, and the output unit 106 includes an amplification transistor 1061 and a selection transistor 1062. The first transmission transistor 1031, the second transmission transistor 1041, the third transmission transistor 1042, the conversion gain adjustment transistor 105, the reset transistor 107, the amplification transistor 1061, and the selection transistor 1062 are all NMOS transistors.
[0041] Reference Figure 1The anodes of the first photodiode 101 and the second photodiode 102 are both grounded. The cathode of the first photodiode 101 is connected to the source of the first transmission transistor 1031. The drain of the first transmission transistor 1031 is connected to the second node 109. The gate of the first transmission transistor 1031 is used to receive the first transmission control signal TXS1.
[0042] Reference Figure 1 The cathode of the second photodiode 102 is connected to the source of the second transmission transistor 1041 and the source of the third transmission transistor 1042. The drain of the second transmission transistor 1041 is connected to the first node 108. The gate of the second transmission transistor 1041 is used to receive the second transmission control signal TXL1. The drain of the third transmission transistor 1042 is connected to the second node 109. The gate of the third transmission transistor 1042 is used to receive the third transmission control signal TXL2.
[0043] Reference Figure 1 The drain of the reset transistor 107 is connected to the power supply, the source of the reset transistor 107 is connected to the second node 109, and the gate of the reset transistor 107 is used to receive the reset control signal RX.
[0044] Reference Figure 1 The drain of the conversion gain adjustment transistor 105 is connected to the second node 109, the source of the conversion gain adjustment transistor 105 is connected to the first node 108, and the gate of the conversion gain adjustment transistor 105 is used to receive the conversion gain adjustment control signal LCG.
[0045] Reference Figure 1 The drain of the amplifying transistor 1061 is connected to the power supply, the source of the amplifying transistor 1061 is connected to the drain of the selecting transistor 1062, the gate of the amplifying transistor 1061 is connected to the first node 108, the source of the selecting transistor 1062 serves as the output terminal of the output unit 106, and the gate of the selecting transistor 1062 is used to receive the selection control signal SEL.
[0046] Figure 2 This is a circuit diagram of a pixel unit in a second embodiment of the present invention. Figure 2 and Figure 1 The difference is that the first transmission unit 103 further includes a fourth transmission transistor 1032, the cathode of the first photodiode 101 is connected to the source of the fourth transmission transistor 1032, and the drain of the fourth transmission transistor 1032 is connected to the source of the first transmission transistor 1031.
[0047] Figure 3 This is a circuit diagram of a pixel unit in a third embodiment of the present invention. Figure 3 and Figure 1 The difference is that the source of the third transmission transistor 1042 is connected to the operating voltage.
[0048] Figure 4 This is a circuit diagram of a pixel unit in the fourth embodiment of the present invention. Figure 4 and Figure 2 The difference is that the source of the third transmission transistor 1042 is connected to the operating voltage.
[0049] Figure 5 This is a circuit diagram of a pixel unit in the fifth embodiment of the present invention. Figure 5 and Figure 1 The difference is that the pixel unit 100 also includes a first capacitor 1091, one end of which is connected to the second node 109, and the other end of which is connected to a fixed potential or timing signal.
[0050] Figure 6 This is a circuit diagram of a pixel unit in the sixth embodiment of the present invention. Figure 6 and Figure 3 The difference is that the pixel unit 100 also includes a first capacitor 1091, one end of which is connected to the second node 109, and the other end of which is connected to a fixed potential or timing signal.
[0051] Figure 7 This is a circuit diagram of a pixel unit in the seventh embodiment of the present invention. Figure 7 and Figure 4 The difference is that the pixel unit 100 also includes a first capacitor 1091, one end of which is connected to the second node 109, and the other end of which is connected to a fixed potential or timing signal.
[0052] Figure 8 This is a circuit diagram of a pixel unit in the eighth embodiment of the present invention. Figure 8 and Figure 2 The difference is that the pixel unit 100 further includes a first capacitor 1091 and a second capacitor 10321. One end of the first capacitor 1091 is connected to the second node 109, and the other end of the first capacitor 1091 is connected to a fixed potential or timing signal. One end of the second capacitor 10321 is connected to the drain of the fourth transmission transistor 1032, and the other end of the second capacitor 10321 is connected to a fixed potential or timing signal.
[0053] Figure 9 This is a circuit diagram of a pixel unit in the ninth embodiment of the present invention. Figure 9 and Figure 4 The difference is that the pixel unit 100 further includes a first capacitor 1091 and a second capacitor 10321. One end of the first capacitor 1091 is connected to the second node 109, and the other end of the first capacitor 1091 is connected to a fixed potential or timing signal. One end of the second capacitor 10321 is connected to the drain of the fourth transmission transistor 1032, and the other end of the second capacitor 10321 is connected to a fixed potential or timing signal.
[0054] Figure 10 This is a circuit diagram of the pixel unit in the tenth embodiment of the present invention. (Refer to...) Figure 10 The pixel unit 100 includes a first photodiode 101, a second photodiode 102, a first transmission unit 103, a second transmission unit 104, a conversion gain adjustment transistor 105, an output unit 106, and a reset transistor 107. The first transmission unit 103 includes a first transmission transistor 1031, the second transmission unit 104 includes a second transmission transistor 1041 and a third transmission transistor 1042, and the output unit 106 includes an amplification transistor 1061 and a selection transistor 1062. The first transmission transistor 1031, the second transmission transistor 1041, the third transmission transistor 1042, the conversion gain adjustment transistor 105, the reset transistor 107, the amplification transistor 1061, and the selection transistor 1062 are all NMOS transistors.
[0055] Reference Figure 10 The anodes of the first photodiode 101 and the second photodiode 102 are both grounded. The cathode of the first photodiode 101 is connected to the source of the first transmission transistor 1031. The drain of the first transmission transistor 1031 is connected to the first node 108. The gate of the first transmission transistor 1031 is used to receive the first transmission control signal TXS1.
[0056] Reference Figure 10 The cathode of the second photodiode 102 is connected to the source of the second transmission transistor 1041 and the source of the third transmission transistor 1042. The drain of the second transmission transistor 1041 is connected to the first node 108. The gate of the second transmission transistor 1041 is used to receive the second transmission control signal TXL1. The drain of the third transmission transistor 1042 is connected to the second node 109. The gate of the third transmission transistor 1042 is used to receive the third transmission control signal TXL2.
[0057] Reference Figure 10The drain of the reset transistor 107 is connected to the power supply, the source of the reset transistor 107 is connected to the first node 108, and the gate of the reset transistor 107 is used to receive the reset control signal RX.
[0058] Reference Figure 10 The drain of the conversion gain adjustment transistor 105 is connected to the first node 108, the source of the conversion gain adjustment transistor 105 is connected to the second node 109, and the gate of the conversion gain adjustment transistor 105 is used to receive the conversion gain adjustment control signal LCG.
[0059] Reference Figure 10 The drain of the amplifying transistor 1061 is connected to the power supply, the source of the amplifying transistor 1061 is connected to the drain of the selection transistor 1062, the gate of the amplifying transistor 1061 is connected to the first node 108, the source of the selection transistor 1062 serves as the output terminal of the output unit 106, and the gate of the selection transistor 1062 is used to receive the selection control signal SEL.
[0060] Figure 11 This is a circuit diagram of a pixel unit in the eleventh embodiment of the present invention. Figure 11 and Figure 10 The difference is that the first transmission unit 103 further includes a fourth transmission transistor 1032, the cathode of the first photodiode 101 is connected to the source of the fourth transmission transistor 1032, and the drain of the fourth transmission transistor 1032 is connected to the source of the first transmission transistor 1031.
[0061] Figure 12 This is a circuit diagram of a pixel unit in the twelfth embodiment of the present invention. Figure 12 and Figure 10 The difference is that the source of the third transmission transistor 1042 is connected to the operating voltage, while the source of the conversion gain adjustment transistor 105 is left floating.
[0062] Figure 13 This is a circuit diagram of a pixel unit in the thirteenth embodiment of the present invention. Figure 13 and Figure 11 The difference is that the source of the third transmission transistor 1042 is connected to the operating voltage, while the source of the conversion gain adjustment transistor 105 is left floating.
[0063] Figure 14 This is a circuit diagram of a pixel unit in the fourteenth embodiment of the present invention. Figure 14 and Figure 10The difference is that the pixel unit 100 also includes a first capacitor 1091, one end of which is connected to the second node 109, and the other end of which is connected to a fixed potential or timing signal.
[0064] Figure 15 This is a circuit diagram of a pixel unit in the fifteenth embodiment of the present invention. Figure 15 and Figure 12 The difference is that the pixel unit 100 also includes a first capacitor 1091, one end of which is connected to the second node 109, and the other end of which is connected to a fixed potential or timing signal.
[0065] Figure 16 This is a circuit diagram of a pixel unit in the sixteenth embodiment of the present invention. Figure 16 and Figure 13 The difference is that the pixel unit 100 also includes a first capacitor 1091, one end of which is connected to the second node 109, and the other end of which is connected to a fixed potential or timing signal.
[0066] Figure 17 This is a circuit diagram of a pixel unit in the seventeenth embodiment of the present invention. Figure 17 and Figure 11 The difference is that the pixel unit 100 further includes a first capacitor 1091 and a second capacitor 10321. One end of the first capacitor 1091 is connected to the second node 109, and the other end of the first capacitor 1091 is connected to a fixed potential or timing signal. One end of the second capacitor 10321 is connected to the drain of the fourth transmission transistor 1032, and the other end of the second capacitor 10321 is connected to a fixed potential or timing signal.
[0067] Figure 18 This is a circuit diagram of a pixel unit in the eighteenth embodiment of the present invention. Figure 18 and Figure 13 The difference is that the pixel unit 100 further includes a first capacitor 1091 and a second capacitor 10321. One end of the first capacitor 1091 is connected to the second node 109, and the other end of the first capacitor 1091 is connected to a fixed potential or timing signal. One end of the second capacitor 10321 is connected to the drain of the fourth transmission transistor 1032, and the other end of the second capacitor 10321 is connected to a fixed potential or timing signal.
[0068] Figure 19 Timing diagrams of pixel units in some embodiments of the present invention. The driving method of the pixel unit includes the following steps: Step 1: Refer to Figure 2 and Figure 19The reset control signal RX, the first transmission control signal TXS1, the second transmission control signal TXL1, the third transmission control signal TXL2, the fourth transmission control signal TXS2, and the conversion gain adjustment control signal LCG all become high to reset the pixel unit signal 100.
[0069] Step Two: Refer to Figure 2 and Figure 19 When both the first transmission control signal TXS1 and the fourth transmission control signal TXS2 change from high potential to low potential, the first photodiode 101 begins exposure.
[0070] Step 3: Refer to Figure 2 and Figure 19 When the second transmission control signal TXL1 and the third transmission control signal TXL2 both change from high potential to low potential, the second transmission transistor 1041 and the third transmission transistor 1042 are both turned off, and the second photodiode 102 begins exposure.
[0071] Step Four: Refer to Figure 2 and Figure 19 The reset control signal RX changes from high to low, and the selection control signal SEL changes from low to high to output the low-gain reset signal Vrstl of the second photodiode 102. Then the selection control signal SEL changes from high to low.
[0072] Step 5: Refer to Figure 2 and Figure 19 The conversion gain adjustment control signal LCG changes from a high potential to a low potential, and the selection control signal SEL changes from a low potential to a high potential, so as to output the high-gain reset signal Vrst2 of the second photodiode 102, and then the selection control signal SEL changes from a high potential to a low potential.
[0073] Step Six: Refer to Figure 2 and Figure 19 The second transmission control signal TXL1 changes from a low potential to a high potential for a period of time, and then changes from a high potential to a low potential. Then the selection control signal SEL changes from a low potential to a high potential to output the high-gain pixel signal Vsig2 of the second photodiode 102. Then the selection control signal SEL changes from a high potential to a low potential.
[0074] Step Seven: Refer to Figure 2 and Figure 19The conversion gain adjustment control signal LCG changes from low potential to high potential, then the second transmission control signal TXL1 changes from low potential to high potential for a period of time and then changes from high potential to low potential, then the selection control signal SEL changes from low potential to high potential to output the low gain pixel signal Vsigl of the second photodiode 102, and then the selection control signal SEL changes from high potential to low potential.
[0075] Step 8: Refer to Figure 2 and Figure 19 The reset control signal RX changes from low to high, and the third transmission control signal TXL2 changes from low to high to reset the first node 108 and the second node 109. Then, the reset control signal RX changes from high to low, the third transmission control signal TXL2 changes from high to low, and the selection control signal SEL changes from low to high to output the reset signal Vrst3 of the first photodiode 101. Finally, the selection control signal SEL changes from high to low.
[0076] Step Nine: Refer to Figure 2 and Figure 19 The first transmission control signal TXS1 changes from a low potential to a high potential, while the fourth transmission control signal TXS2 changes from a low potential to a high potential and then back to a low potential. The selection control signal SEL changes from a low potential to a high potential to output the pixel signal Vsig3 of the first photodiode 101. Then the selection control signal SEL changes from a high potential to a low potential.
[0077] Step 10: Refer to Figure 2 and Figure 19 The reset control signal RX, the first transmission control signal TXS1, the second transmission control signal TXL1, the third transmission control signal TXL2, the fourth transmission control signal TXS2, and the conversion gain adjustment control signal LCG all change to a high potential, and the pixel unit 100 is reset in preparation for the next exposure.
[0078] Reference Figure 2 and Figure 19 The low-gain exposure signal of the second photodiode 102 is Vpix1 = Vrst1 - Vsig1; the high-gain exposure signal of the second photodiode 102 is Vpix2 = Vrst2 - Vsig2; and the exposure signal of the first photodiode 101 is Vpix3 = Vrst3 - Vsig3.
[0079] Figure 20 This is a schematic diagram of charge transfer in a circuit using existing technology. (Refer to...) Figure 20In the prior art, the charge 1021 outside the saturation range of the high-sensitivity photodiode LP will overflow into the low-sensitivity photodiode SP, thereby affecting the low-sensitivity photodiode SP.
[0080] Figure 21 For the present invention Figure 1 , Figure 2 , Figure 5 , Figure 8 , Figure 10 , Figure 11 , Figure 14 as well as Figure 17 A schematic diagram of charge transfer in the circuit shown. (Refer to...) Figure 21 The third transmission transistor 1042 can release the charge 1021 outside the saturation range of the second photodiode 102 to the second node 109, thereby preventing the charge outside the saturation range of the second photodiode 102 from overflowing into the first photodiode 101 and avoiding any impact on the first photodiode 101.
[0081] Figure 22 For the present invention Figure 3 , Figure 4 , Figure 6 , Figure 7 , Figure 9 , Figure 12 , Figure 13 , Figure 15 , Figure 16 as well as Figure 18 A schematic diagram of charge transfer in the circuit shown. (Refer to...) Figure 22 The third transmission transistor 1042 can release the charge 1021 outside the saturation range of the second photodiode 102 to the power supply VP, thereby preventing the charge 1021 outside the saturation range of the second photodiode 102 from overflowing into the first photodiode 101 and avoiding any impact on the first photodiode 101.
[0082] While embodiments of the present invention have been described in detail above, it will be apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations fall within the scope and spirit of the invention as set forth in the claims. Furthermore, the invention described herein may have other embodiments and can be implemented or carried out in various ways.
Claims
1. A pixel unit, characterized in that, include: The sensitivity of the first photodiode is lower than the predetermined sensitivity. The second photodiode has a sensitivity higher than the predetermined sensitivity; The first transmission unit is used to transfer the charge of the first photodiode to the first node or the second node; The second transmission unit is used to transfer charge within the saturation range of the second photodiode to the first node, and to transfer charge outside the saturation range of the second photodiode to the second node or a fixed potential. The second transmission unit includes a second transmission transistor and a third transmission transistor. The first terminals of the second and third transmission transistors are both connected to the cathode of the second photodiode, and the anode of the second photodiode is grounded. The second terminal of the second transmission transistor is connected to the output unit. The second terminal of the third transmission transistor is connected to the second node or to a fixed potential, wherein the fixed potential is greater than the ground potential and less than the power supply potential. A conversion gain regulating transistor is used to control the conversion gain of the second photodiode by opening or closing the path between the first node and the second node; A reset transistor, connected to the first transmission unit, is used to reset the pixel unit; and The output unit is used to amplify the voltage at the first node and output it.
2. The pixel unit according to claim 1, characterized in that, The first transmission unit includes a first transmission transistor, a first terminal of which is connected to the cathode of the first photodiode, the anode of the first photodiode is grounded, a second terminal of which is connected to the first terminal of the reset transistor, and the second terminal of the reset transistor is connected to a power supply voltage.
3. The pixel unit according to claim 2, characterized in that, The first terminal of the conversion gain adjustment transistor is the second node, the second terminal of the conversion gain adjustment transistor is the first node, the first terminal of the conversion gain adjustment transistor is connected to the second terminal of the first transmission transistor, and the second terminal of the conversion gain adjustment transistor is connected to the second terminal of the second transmission transistor.
4. The pixel unit according to claim 2, characterized in that, The first terminal of the conversion gain adjustment transistor is the second node, the second terminal of the conversion gain adjustment transistor is the first node, the second terminal of the conversion gain adjustment transistor is connected to the second terminal of the first transmission transistor and the second terminal of the second transmission transistor, and when the second terminal of the third transmission transistor unit is connected to a fixed potential, the first terminal of the conversion gain adjustment transistor is floating.
5. The pixel unit according to claim 3 or 4, characterized in that, It also includes a first capacitor, one end of which is connected to the first terminal of the switching gain adjustment transistor, and the other end of which is connected to a fixed potential or timing signal.
6. The pixel unit according to claim 1, 3, or 4, characterized in that, The output unit includes an amplifying transistor and a selecting transistor. The first terminal of the amplifying transistor is connected to the power supply voltage. The gate of the amplifying transistor is connected to the second terminal of the second transmission transistor. The second terminal of the amplifying transistor is connected to the first terminal of the selecting transistor. The second terminal of the selecting transistor is used to output the voltage amplified by the amplifying transistor.
7. The pixel unit according to claim 6, characterized in that, It also includes a driving circuit, which is connected to the gate of the first transmission transistor, the gate of the second transmission transistor, the gate of the third transmission transistor, the gate of the reset transistor, and the gate of the selection transistor to drive the first transmission transistor, the second transmission transistor, the third transmission transistor, the reset transistor, and the selection transistor.
8. The pixel unit according to claim 3 or 4, characterized in that, The first transmission unit further includes a fourth transmission transistor, the first end of which is connected to the cathode of the first photodiode, the anode of the first photodiode is grounded, and the second end of the fourth transmission transistor is connected to the first end of the first transmission transistor.
9. The pixel unit according to claim 8, characterized in that, It also includes a first capacitor, one end of which is connected to the first terminal of the switching gain adjustment transistor, and the other end of which is connected to a fixed potential or timing signal.
10. The pixel unit according to claim 8, characterized in that, It also includes a second capacitor, one end of which is connected to the second end of the fourth transmission transistor, and the other end of which is connected to a fixed potential or timing signal.
11. The pixel unit according to claim 8, characterized in that, It also includes a first capacitor and a second capacitor. One end of the first capacitor is connected to the first end of the conversion gain adjustment transistor, and the other end of the first capacitor is connected to a fixed potential or timing signal. One end of the second capacitor is connected to the second end of the fourth transmission transistor, and the other end of the second capacitor is connected to a fixed potential or timing signal. The capacitance of the first capacitor is smaller than the capacitance of the second capacitor.
12. The pixel unit according to claim 8, characterized in that, The output unit includes an amplifying transistor and a selecting transistor. The first terminal of the amplifying transistor is connected to the power supply voltage. The gate of the amplifying transistor is connected to the second terminal of the second transmission transistor. The second terminal of the amplifying transistor is connected to the first terminal of the selecting transistor. The second terminal of the selecting transistor is used to output the voltage amplified by the amplifying transistor.
13. The pixel unit according to claim 12, characterized in that, It also includes a driving circuit, which is connected to the gate of the first transmission transistor, the gate of the second transmission transistor, the gate of the third transmission transistor, the gate of the fourth transmission transistor, the gate of the reset transistor, and the gate of the selection transistor to drive the first transmission transistor, the second transmission transistor, the third transmission transistor, the fourth transmission transistor, the reset transistor, and the selection transistor.
14. An image sensor, characterized in that, It includes a pixel array consisting of at least one pixel unit as described in any one of claims 1 to 13.
Citation Information
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