A watchdog chip performance test method and device

Abstract

This invention discloses a watchdog chip performance testing method and apparatus. The method connects the watchdog chip under test to the watchdog chip performance testing apparatus. It performs an MR reset function test on the watchdog chip, determining whether the RST pin of the watchdog chip performance testing apparatus responds correctly. If it responds correctly, the test proceeds to the next step; otherwise, the test ends. It also performs a WDO pin test on the watchdog chip, determining whether the WDO pin responds correctly. If it responds correctly, the test proceeds to the next step; otherwise, the test ends. Finally, it performs a watchdog time threshold test to obtain the corresponding watchdog time, completing the test. Combined with the watchdog chip performance testing apparatus, this invention provides one-click testing for watchdog chip-level testing, high-precision verification of performance parameters, low cost, improved testing efficiency, and enhanced product quality.

Description

Technical Field

[0001] This invention relates to the field of power system automatic control technology, and in particular to a method and apparatus for testing the performance of a watchdog chip. Background Technology

[0002] Automatic control devices operating in power systems often experience complex electromagnetic environments, including strong magnetic fields, power surges, and electrical sparks. These disturbances can cause embedded platform CPU programs to "run away," leading to abnormal program execution. As equipment becomes more powerful, program structures more complex, and instruction codes longer, coupled with the influence of the on-site working environment, the probability of equipment malfunction, program "runaway," and various functional modules "crashing" increases significantly.

[0003] When a program malfunctions, measures are needed to ensure the system can automatically recover after a program crash. A common solution is to use a watchdog timer in the circuit design, which can detect CPU program errors and force a system reset.

[0004] A watchdog timer, also known as a watchdog timer, is essentially a timer circuit. It typically has one input and one output. The input is called the "feed" input, and the output is usually connected to the reset pin of another part, typically the embedded CPU. The watchdog's function is to periodically check the internal state of the chip and send a reset signal to the chip if an error occurs.

[0005] After the single board is manufactured, the watchdog circuit affects the normal operation of the program, and various abnormal operating conditions need to be simulated. The watchdog chip parameter performance test has the following problems: 1. The test is complicated, and in most cases, there is no effective means; 2. The cost is high, the error is large, and the test efficiency is low; 3. There is no data analysis function and no chip parameter consistency evaluation.

[0006] Therefore, a method and apparatus for testing the performance of watchdog chips are needed. Summary of the Invention

[0007] This invention provides a method and apparatus for testing the performance of a watchdog chip, thereby addressing at least the technical problems of high testing costs and low testing efficiency in related technologies.

[0008] According to one aspect of the present invention, a method for testing the performance of a watchdog chip is provided, comprising:

[0009] Connect the watchdog chip to be tested to the watchdog chip performance testing device;

[0010] The watchdog chip is subjected to an MR reset function test to determine whether the RST pin of the watchdog chip performance test device responds correctly. If it responds correctly, the test proceeds to the next test; otherwise, the test ends.

[0011] Perform a WDO pin test on the watchdog chip to determine if the WDO pin responds correctly. If it responds correctly, proceed to the next test; otherwise, the test ends.

[0012] The watchdog chip is subjected to a feeding time threshold test to obtain the corresponding feeding time, and the test is completed.

[0013] Optionally, when performing the MR reset function test on the watchdog chip, the watchdog chip performance testing device outputs a low level to the MR pin of the watchdog chip and samples whether the RST pin is low to determine the signal.

[0014] Optionally, it can be determined whether the WDO pin is responding correctly by sampling whether the WDO pin is at a low level.

[0015] Optionally, the dog feeding time threshold test includes: sequentially setting pulse signals with a toggle time interval of 1.6s*0.8 to 1.6s*1.2, with a step size of 0.1s, simulating the dog feeding signal of a normal device, monitoring the moment when the output of the WDO pin toggles from high to low, and obtaining the corresponding dog feeding time as the dog feeding time threshold value.

[0016] According to another aspect of the present invention, a watchdog chip performance testing apparatus is also provided, comprising:

[0017] The display module is used to display test-related data;

[0018] The button is used to send setting commands by pressing the button.

[0019] Watchdog chip socket, which is used to connect the watchdog chip.

[0020] The control module is electrically connected to the display module, the buttons, and the watchdog chip base, respectively. It is used to receive control from the buttons, test the watchdog chip according to the watchdog chip performance test method according to claims 1-7, and control the display module to display the corresponding data.

[0021] Optionally, the watchdog chip performance testing device can record 1024 sets of test data and calculate variance and standard deviation data based on the threshold test value.

[0022] According to another aspect of the present invention, a computer-readable storage medium is also provided, the computer-readable storage medium including a stored program, wherein, when the program is executed, it controls the device where the computer-readable storage medium is located to perform the watchdog chip performance testing method described in any one of the above embodiments.

[0023] According to another aspect of the present invention, a processor is also provided, the processor being configured to run a program, wherein the program, when running, executes the watchdog chip performance testing method described in any of the preceding embodiments.

[0024] Compared with existing technologies, the present invention has the following advantages:

[0025] In this embodiment of the invention, the watchdog chip performance testing method connects the watchdog chip under test to a watchdog chip performance testing device; performs an MR reset function test on the watchdog chip, determining whether the RST pin of the watchdog chip performance testing device responds correctly. If it responds correctly, the test proceeds to the next step; otherwise, the test ends. Performs a WDO pin test on the watchdog chip, determining whether the WDO pin responds correctly. If it responds correctly, the test proceeds to the next step; otherwise, the test ends. Performs a watchdog time threshold test on the watchdog chip to obtain the corresponding watchdog time, completing the test. Combined with the watchdog chip performance testing device, this invention provides one-click testing, high-precision verification of performance parameters, low cost, improved testing efficiency, and enhanced product quality for watchdog chip-level testing. Attached Figure Description

[0026] To more clearly illustrate the technical solution of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only one embodiment of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram of a watchdog chip performance testing device according to an embodiment of the present invention;

[0028] Figure 2 This is a schematic diagram of a watchdog chip performance testing device connected to a watchdog chip according to an embodiment of the present invention;

[0029] Figure 3 This is a flowchart of a watchdog chip performance testing method according to an embodiment of the present invention. Detailed Implementation

[0030] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0031] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0032] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0033] Example 1

[0034] According to an embodiment of the present invention, a watchdog chip performance testing device is provided. Figure 1 This is a schematic diagram of a watchdog chip performance testing device according to an embodiment of the present invention, as shown below. Figure 1 As shown, the device includes: a display module, buttons, a watchdog chip base, and a control module.

[0035] The watchdog chip base is used to connect the watchdog chip. The control module is electrically connected to the display module, the buttons, and the watchdog chip base. The control module is used to receive control from the buttons, test the watchdog chip according to the watchdog chip performance test method, and control the display module to display the corresponding data.

[0036] As an optional embodiment, the display module uses an LCD screen, which is used to provide basic information display functions, such as test status and test data.

[0037] The button is a one-click start test button. After pressing the button, the watchdog chip performance testing device will automatically start the one-click test.

[0038] The control module uses a low-cost microcontroller.

[0039] The watchdog chip base supports SOP8 packaging, allowing you to connect the watchdog chip pins to the controller pins.

[0040] As an optional embodiment, the watchdog chip performance testing device can record 1024 sets of test data and calculate variance and standard deviation data based on the threshold test value.

[0041] As an optional embodiment, the watchdog chip performance testing device is connected to the watchdog chip as follows: Figure 2 As shown, the watchdog pin description is as follows: Under normal operation, the CPU outputs the WDI watchdog signal. If the watchdog time exceeds the time requirement (refer to the chip parameters for details; 1.6s is commonly used in the power industry), the WDI pin outputs a low level, which is connected to the MR pin, outputting RST to reset the CPU, thus achieving the watchdog function.

[0042]

[0043] The GPIO (General-purpose input / output) pins of the watchdog chip performance testing device are connected to the MR, WDO, RST, and WDI pins of the watchdog chip, respectively. The output signals are sent to the MR and WDI pins, and the status of the WDO and RST pins is collected at the same time to realize closed-loop testing.

[0044] Example 2

[0045] According to another aspect of the present invention, an embodiment of a watchdog chip performance testing method is also provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0046] like Figure 3 This is a flowchart of a watchdog chip performance testing method according to an embodiment of the present invention, such as... Figure 3 As shown, this includes the following steps:

[0047] Step S1: Connect the watchdog chip to be tested to the watchdog chip performance testing device, ensuring a reliable connection. Press the one-button test button and follow the steps below to test the watchdog chip:

[0048] Step S2: Perform an MR reset function test on the watchdog chip to determine whether the RST pin of the watchdog chip performance testing device responds correctly. If it responds correctly, proceed to the next test; otherwise, the test ends.

[0049] Step S3: Perform a WDO pin test on the watchdog chip to determine whether the WDO pin responds correctly. If it responds correctly, proceed to the next test; otherwise, the test ends.

[0050] Step S4: Perform a watchdog time threshold test on the watchdog chip to obtain the corresponding watchdog time and complete the test.

[0051] As an optional embodiment, when performing MR reset function testing on the watchdog chip, the watchdog chip performance testing device outputs a low level to the MR pin of the watchdog chip and samples whether the RST pin is low to determine the level.

[0052] As an optional implementation, it can be determined whether the WDO pin is responding correctly by sampling whether the WDO pin is at a low level.

[0053] As an optional embodiment, the dog feeding time threshold test includes: sequentially setting pulse signals with a toggle time interval of 1.6s*0.8 to 1.6s*1.2, with a step size of 0.1s, simulating the dog feeding signal of a normal device, monitoring the moment when the WDO pin output toggles from high to low level, and obtaining the corresponding dog feeding time as the dog feeding time threshold value.

[0054] Example 3

[0055] According to another aspect of the present invention, a computer-readable storage medium is also provided, the computer-readable storage medium including a stored program, wherein, when the program is executed, it controls the device where the computer-readable storage medium is located to execute any of the above-described watchdog chip performance testing methods.

[0056] Optionally, in this embodiment, the computer-readable storage medium may be located in any computer terminal in a group of computer terminals in a computer network, or in any mobile terminal in a group of mobile terminals, and the computer-readable storage medium includes a stored program.

[0057] Optionally, during program execution, the device containing the computer-readable storage medium may perform the following functions: connect the watchdog chip under test to the watchdog chip performance testing device; perform an MR reset function test on the watchdog chip, determine whether the RST pin of the watchdog chip performance testing device responds correctly, and proceed to the next test if it responds correctly, otherwise the test ends; perform a WDO pin test on the watchdog chip, determine whether the WDO pin responds correctly, and proceed to the next test if it responds correctly, otherwise the test ends; perform a watchdog time threshold test on the watchdog chip, obtain the corresponding watchdog time, and complete the test.

[0058] Example 4

[0059] According to another aspect of the present invention, a processor is also provided for running a program, wherein the program executes a watchdog chip performance testing method according to any one of the above embodiments.

[0060] This invention provides a device including a processor, a memory, and a program stored in the memory and executable on the processor. When the processor executes the program, it implements the steps of a watchdog chip performance testing method.

[0061] The sequence numbers of the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0062] In the above embodiments of the present invention, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0063] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The system embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling, direct coupling, or communication connection may be through some interface, and the indirect coupling or communication connection of units or modules may be electrical or other forms.

[0064] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0065] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0066] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0067] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for testing the performance of a watchdog chip, characterized in that it includes: Connect the watchdog chip to be tested to the watchdog chip performance testing device; The watchdog chip is subjected to an MR reset function test to determine whether the RST pin of the watchdog chip performance test device responds correctly. If it responds correctly, the test proceeds to the next test; otherwise, the test ends. Perform a WDO pin test on the watchdog chip to determine if the WDO pin responds correctly. If it responds correctly, proceed to the next test; otherwise, the test ends. The watchdog chip is subjected to a feeding time threshold test to obtain the corresponding feeding time, and the test is completed. The dog feeding time threshold test includes: setting the flipping time interval to 1.6 seconds sequentially. 0.8~1.6s A pulse signal of 1.2, with a step size of 0.1s, simulates the normal device's watchdog feeding signal. The time when the WDO pin output changes from high to low is monitored, and the corresponding watchdog feeding time is the watchdog feeding time threshold value.

2. The watchdog chip performance testing method of claim 1, wherein, When performing the MR reset function test on the watchdog chip, the watchdog chip performance testing device outputs a low level to the MR pin of the watchdog chip and samples whether the RST pin is low to determine the level.

3. The watchdog chip performance testing method of claim 1, wherein, The correct response of the WDO pin is determined by sampling whether the WDO pin is at a low level.

4. A watchdog chip performance testing apparatus, characterized by, include: The display module is used to display test-related data; The button is used to send setting commands by pressing the button. Watchdog chip socket, which is used to connect the watchdog chip. The control module is electrically connected to the display module, the buttons, and the watchdog chip base, respectively. It is used to receive control from the buttons, test the watchdog chip according to any one of the watchdog chip performance testing methods according to claims 1-3, and simultaneously control the display module to display the corresponding data.

5. The watchdog chip performance testing apparatus of claim 4, wherein, The watchdog chip performance testing device can record 1024 sets of test data and calculate the variance and standard deviation data based on the threshold test value.

6. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored program, wherein, when the program is executed, it controls the device containing the computer-readable storage medium to perform the watchdog chip performance testing method according to any one of claims 1 to 3.

7. A processor, characterized in that, The processor is used to run a program, wherein the program executes the watchdog chip performance testing method according to any one of claims 1 to 3.

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