三维集成电路热应力计算方法、装置、存储介质及处理器

CN116384181BActive Publication Date: 2026-07-17ACAD OF MATHEMATICS & SYSTEMS SCIENCE - CHINESE ACAD OF SCI

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
ACAD OF MATHEMATICS & SYSTEMS SCIENCE - CHINESE ACAD OF SCI
Filing Date
2023-03-14
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

Existing technologies cannot quickly and efficiently calculate the thermal stress results of three-dimensional integrated circuits at the full chip scale, resulting in a large amount of computation and making it impossible to effectively analyze the reliability and performance of the chip.

Method used

By constructing the original problem model and transforming it into a background problem model and multiple auxiliary sub-problem models, the displacements of these models are solved using the finite element method, and the thermal stress value of the three-dimensional integrated circuit is calculated using the superposition method, thus simplifying the calculation process.

Benefits of technology

It enables rapid and efficient calculation of thermal stress in three-dimensional integrated circuits at the entire chip scale, improving computational efficiency and accuracy, and effectively analyzing chip reliability and performance.

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Abstract

本发明涉及微电子技术领域,公开了一种三维集成电路热应力计算方法、装置、存储介质及处理器,本发明通过获取三维集成电路的参数信息;根据参数信息,构建得到原问题模型,并将原问题模型转换为一个背景问题模型以及多个辅助子问题模型;基于有限元方法分别对背景问题模型以及多个辅助子问题模型进行求解,基于背景问题模型的位移和多个辅助子问题模型的位移,得到三维集成电路热应力值;原问题模型为弹性界面问题模型;背景问题模型为将原问题模型的互连线区域用衬底介质填充得到的问题模型;辅助子问题模型为原问题模型的部分互连线区域的问题模型。采用该计算方法可以快速地模拟三维集成电路全芯片尺度的热应力,具有较高的计算精度和效率。
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