A method and apparatus for controlling the temperature of an electrolytic capacitor of a power factor correction circuit

Abstract

The application provides a method and device for electrolytic capacitor temperature reduction control of a power factor correction circuit, the method comprising: obtaining circuit parameters of a target power factor correction circuit; determining control parameters of the target power factor correction circuit based on the circuit parameters; the target power factor correction circuit comprising an electrolytic capacitor, and the control parameters comprising a random carrier frequency; generating a pulse width modulation signal based on the random carrier frequency; and controlling a switch tube of the target power factor correction circuit based on the pulse width modulation signal. The method provided by the application can randomize the switching frequency of the switch tube, reduce the current harmonic amplitude of the carrier frequency and its multiple frequency, thereby suppressing ripple current, reducing the temperature rise of the electrolytic capacitor caused by the ripple current, delaying the aging degree of the electrolytic capacitor, and prolonging the service life.

Description

Technical Field

[0001] This application relates to the field of circuit technology, and in particular to a method and apparatus for controlling the cooling of electrolytic capacitors in a power factor correction circuit. Background Technology

[0002] Electrolytic capacitors are key components in switching circuits, primarily responsible for smoothing and filtering the DC output voltage of the rectifier circuit and suppressing DC voltage ripples during sudden load changes. However, compared to other electronic components, the lifespan of electrolytic capacitors is significantly affected by internal temperature, resulting in a shorter lifespan. Specifically, the positive electrode of an electrolytic capacitor is made of purified and oxidized aluminum foil, while the negative electrode consists of an electrolyte. Higher internal temperatures cause the electrolyte to evaporate more rapidly, leading to performance degradation in the equipment, and even internal overvoltage and excessively rapid temperature rise, ultimately causing the electrolyte to dry out and the capacitor to fail. Summary of the Invention

[0003] To address the problem of excessively high temperatures affecting the lifespan of electrolytic capacitors in existing power factor correction circuits, this application provides a method and apparatus for controlling the temperature of electrolytic capacitors in power factor correction circuits. This method and apparatus can prevent electrolytic capacitors from overheating during use and extend their lifespan.

[0004] On the one hand, a method for controlling the cooling of electrolytic capacitors in a power factor correction circuit is provided, the method comprising:

[0005] The circuit parameters of the target power factor correction circuit are obtained, and the control parameters of the target power factor correction circuit are determined based on the circuit parameters; the target power factor correction circuit includes an electrolytic capacitor, and the control parameters include a random carrier frequency;

[0006] A pulse width modulation signal is generated based on the random carrier frequency;

[0007] The switching transistors of the target power factor correction circuit are controlled based on the pulse width modulation signal.

[0008] In some embodiments, determining the control parameters of the target power factor correction circuit based on the circuit parameters includes:

[0009] Based on the pre-stored correspondence between circuit parameters and control parameters, the control parameters corresponding to the circuit parameters are determined; the control parameters include the base carrier frequency and the variable carrier frequency amplitude limit.

[0010] The variable carrier frequency range is determined based on the aforementioned base carrier frequency and variable carrier frequency amplitude limits;

[0011] The random carrier frequency is randomly generated within the range of the variable carrier frequency interval.

[0012] In some embodiments, the method further includes:

[0013] The correspondence between the circuit parameters and control parameters is established based on the experimental power factor correction circuit.

[0014] In some embodiments, the circuit parameters of the experimental power factor correction circuit are the same as those of the target power factor correction circuit;

[0015] The establishment of the correspondence between the circuit parameters and control parameters based on the experimental power factor correction circuit includes:

[0016] Multiple sets of control parameters were set to conduct experiments on the experimental power factor correction circuit.

[0017] The control parameter that minimizes the temperature of the electrolytic capacitor in the experimental power factor correction circuit is taken as the optimal control parameter.

[0018] The correspondence between the circuit parameters and the control parameters is established based on the optimal control parameters.

[0019] In some embodiments, the experimental power factor correction circuit may be of more than one type;

[0020] The establishment of the correspondence between the circuit parameters and control parameters based on the experimental power factor correction circuit includes:

[0021] For each type of experimental power factor correction circuit, multiple sets of control parameters are set to conduct experiments on the experimental power factor correction circuit;

[0022] The control parameter with the lowest electrolytic capacitor temperature in each type of experimental power factor correction circuit is taken as the corresponding optimal control parameter.

[0023] The correspondence between the circuit parameters and the control parameters is established based on the circuit parameters and optimal control parameters of each type of experimental power correction factor circuit.

[0024] In some embodiments, generating a pulse width modulation signal based on the random carrier frequency includes:

[0025] The pulse width modulation signal is generated based on the random carrier frequency and the pre-stored duty cycle;

[0026] The period of the pulse width modulation signal is 1 / fa, the high-level time within the period is D / fa, and the low-level time is (1-D) / fa, where fa is the random carrier frequency corresponding to the current period and D is the duty cycle.

[0027] On the other hand, a power factor correction circuit electrolytic capacitor cooling control device is provided, the device comprising:

[0028] A control parameter determination module is used to acquire the circuit parameters of the target power factor correction circuit and determine the control parameters of the target power factor correction circuit based on the circuit parameters; the target power factor correction circuit includes an electrolytic capacitor, and the control parameters include a random carrier frequency;

[0029] A modulation signal generation module is used to generate a pulse width modulation signal based on the random carrier frequency;

[0030] A switching transistor control module is used to control the switching transistors of the target power factor correction circuit based on the pulse width modulation signal.

[0031] In some embodiments, the control parameter determination module is specifically used for:

[0032] Based on the pre-stored correspondence between circuit parameters and control parameters, the control parameters corresponding to the circuit parameters are determined; the control parameters include the base carrier frequency and the variable carrier frequency amplitude limit.

[0033] The variable carrier frequency range is determined based on the aforementioned base carrier frequency and variable carrier frequency amplitude limits;

[0034] The random carrier frequency is randomly generated within the range of the variable carrier frequency interval.

[0035] In some embodiments, the apparatus further includes a correspondence establishment module, configured to:

[0036] The correspondence between the circuit parameters and control parameters is established based on the experimental power factor correction circuit.

[0037] In some embodiments, the circuit parameters of the experimental power factor correction circuit are the same as those of the target power factor correction circuit; the correspondence establishment module is specifically used for:

[0038] Multiple sets of control parameters were set to conduct experiments on the experimental power factor correction circuit.

[0039] The control parameter that minimizes the temperature of the electrolytic capacitor in the experimental power factor correction circuit is taken as the optimal control parameter.

[0040] The correspondence between the circuit parameters and the control parameters is established based on the optimal control parameters.

[0041] In some embodiments, the experimental power factor correction circuit is of more than one type; the correspondence establishment module is specifically used for:

[0042] The establishment of the correspondence between the circuit parameters and control parameters based on the experimental power factor correction circuit includes:

[0043] For each type of experimental power factor correction circuit, multiple sets of control parameters are set to conduct experiments on the experimental power factor correction circuit;

[0044] The control parameter with the lowest electrolytic capacitor temperature in each type of experimental power factor correction circuit is taken as the corresponding optimal control parameter.

[0045] The correspondence between the circuit parameters and the control parameters is established based on the circuit parameters and optimal control parameters of each type of experimental power correction factor circuit.

[0046] In some embodiments, the modulation signal generation module is specifically used for:

[0047] The generation of the pulse width modulation signal based on the random carrier frequency includes:

[0048] The pulse width modulation signal is generated based on the random carrier frequency and the pre-stored duty cycle;

[0049] The period of the pulse width modulation signal is 1 / fa, the high-level time within the period is D / fa, and the low-level time is (1-D) / fa, where fa is the random carrier frequency corresponding to the current period and D is the duty cycle.

[0050] On the other hand, a computer device is provided, which includes a processor and a memory. The memory stores at least one instruction, at least one program, code set, or instruction set. The processor can load and execute at least one instruction, at least one program, code set, or instruction set to implement the electrolytic capacitor cooling control method of the power factor correction circuit provided in the above-mentioned application embodiments.

[0051] On the other hand, a power factor correction circuit is provided, including the computer device described above.

[0052] On the other hand, a computer-readable storage medium is provided, which stores at least one instruction, at least one program, code set, or instruction set. A processor can load and execute at least one instruction, at least one program, code set, or instruction set to implement the electrolytic capacitor cooling control method of the power factor correction circuit provided in the embodiments of this application.

[0053] On the other hand, a computer program product or computer program is provided, which includes computer program instructions stored in a computer-readable storage medium. A processor reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the electrolytic capacitor cooling control method of the power factor correction circuit described in any of the above embodiments.

[0054] The beneficial effects of the technical solution provided in this application include at least the following: Embodiments of the present invention provide a method and apparatus for controlling the cooling of an electrolytic capacitor in a power factor correction circuit. The method includes acquiring circuit parameters of a target power factor correction circuit, determining control parameters of the target power factor correction circuit based on the circuit parameters, wherein the target power factor correction circuit includes an electrolytic capacitor, and the control parameters include a random carrier frequency; generating a pulse width modulation signal based on the random carrier frequency; and controlling the switching transistor of the target power factor correction circuit based on the pulse width modulation signal. The method provided by embodiments of the present invention can randomize the switching frequency of the switching transistor, reduce the current harmonic amplitude of the carrier frequency and its multiples, thereby suppressing ripple current, reducing the temperature rise effect of ripple current on the electrolytic capacitor, delaying the aging of the electrolytic capacitor, and extending its service life. Attached Figure Description

[0055] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0056] Figure 1 A schematic diagram of a rectifier circuit structure using an electrolytic capacitor is shown in an exemplary embodiment of this application.

[0057] Figure 2 This illustration shows a schematic diagram of a rectifier circuit structure using an electrolytic capacitor and a power factor correction circuit, provided in an exemplary embodiment of this application.

[0058] Figure 3 This illustration shows a schematic diagram of the implementation process of an electrolytic capacitor cooling method for a power factor correction circuit provided in an exemplary embodiment of this application;

[0059] Figure 4 This illustration shows a schematic diagram of the random carrier frequency in an electrolytic capacitor cooling method of a power factor correction circuit provided in an exemplary embodiment of this application;

[0060] Figure 5 This invention illustrates a schematic diagram of the control signals for a fixed-carrier-frequency switching transistor provided in an exemplary embodiment of this application.

[0061] Figure 6 This illustration shows a schematic diagram of the control signal of the random carrier frequency switching transistor in an electrolytic capacitor cooling method of a power factor correction circuit provided in an exemplary embodiment of this application;

[0062] Figure 7This illustration shows a schematic diagram of the power factor correction circuit provided in an exemplary embodiment of this application operating at a fixed frequency, representing the spectrum of an electrolytic capacitor circuit.

[0063] Figure 8 This illustration shows a schematic diagram of the current spectrum of the electrolytic capacitor in an electrolytic capacitor cooling method of a power factor correction circuit provided in an exemplary embodiment of this application, when the power factor correction circuit operates at a random frequency.

[0064] Figure 9 This invention provides a schematic diagram of the structure of an electrolytic capacitor cooling control device for a power factor correction circuit according to an exemplary embodiment of this application.

[0065] Figure 10 This illustration shows a schematic diagram of a computer device structure corresponding to an electrolytic capacitor cooling control method for a power factor correction circuit provided in an exemplary embodiment of this application. Detailed Implementation

[0066] Electrolytic capacitors, as energy storage components, ideally have no energy loss. However, in actual manufacturing processes, due to the resistance of the materials used to manufacture the capacitors, the insulating dielectric of the capacitor will experience losses.

[0067] Specifically, the formula for calculating the power loss of an electrolytic capacitor includes:

[0068] p=2πfCU 2 tanδ

[0069] tanδ=Resr / Xc=Resr 2 πfC

[0070] Where f is the frequency of the ripple voltage across the capacitor, C is the capacitance of the electrolytic capacitor, tanδ is the dielectric loss tangent, U is the ripple voltage across the capacitor, and Resr is the equivalent series impedance.

[0071] Based on the above power loss calculation formula, we can obtain:

[0072] P = [2πfcu] 2 Resr = I C 2 Resr

[0073] Where I C This is the ripple current on the capacitor.

[0074] It is evident that the losses of an electrolytic capacitor are positively correlated with the ripple current. Furthermore, the temperature rise of an electrolytic capacitor is primarily caused by the losses resulting from the ripple current and the equivalent series impedance. Therefore, the ripple current on an electrolytic capacitor is a crucial factor affecting its internal temperature rise. Excessive ripple current leads to excessively high capacitor temperatures, severely impacting the capacitor's lifespan.

[0075] Figure 1 A rectifier circuit for an electrolytic capacitor application provided by an embodiment of the present invention is shown.

[0076] Figure 2 The present invention illustrates a rectifier circuit with power factor correction circuit for an electrolytic capacitor application provided by an embodiment of the present invention.

[0077] See Figure 1 The input stage of switching circuits is often an uncontrolled capacitive rectifier circuit composed of diodes. The advantages of this circuit are its simple structure and low cost, but its disadvantage is high current harmonic content. Harmonics not only affect the normal operation of electrical equipment but also harm the public power grid.

[0078] See Figure 2 To reduce harmonics and improve the power factor, a power factor correction (PFC) circuit can be connected to the back end of the rectifier circuit to make the current waveform as close to a sine wave as possible and reduce the current harmonic content.

[0079] Traditional PFC switching circuits use fixed carrier frequency modulation. Fixed carrier frequency modulation will cause the current to contain harmonic energy concentrated at the switching frequency and its integer multiples. The concentrated harmonic energy will increase the amplitude of the ripple current, which is not conducive to the temperature control of the electrolytic capacitor.

[0080] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0081] The electrolytic capacitor cooling control method for the power factor correction circuit provided in this application can reduce the amplitude of ripple current, thereby effectively controlling the temperature of the electrolytic capacitor and extending its service life.

[0082] Example 1

[0083] Figure 3 The diagram illustrates the implementation flow of an electrolytic capacitor cooling control method for a power factor correction circuit according to an embodiment of the present invention.

[0084] See Figure 3 The electrolytic capacitor cooling control method of the power factor correction circuit provided in this embodiment of the invention may include steps 101 to 103.

[0085] Step 101: Obtain the circuit parameters of the target power factor correction circuit, and determine the control parameters of the target power factor correction circuit based on the circuit parameters; the target power factor correction circuit includes an electrolytic capacitor, and the control parameters include a random carrier frequency.

[0086] In some embodiments, step 101 includes:

[0087] Based on the pre-stored correspondence between circuit parameters and control parameters, the control parameters corresponding to the circuit parameters are determined; the control parameters include the base carrier frequency and the variable carrier frequency amplitude limit.

[0088] The variable carrier frequency range is determined based on the aforementioned base carrier frequency and variable carrier frequency amplitude limits;

[0089] The random carrier frequency is randomly generated within the range of the variable carrier frequency interval.

[0090] Specifically, the fundamental carrier frequency and variable carrier frequency amplitude limits of the target PFC circuit are obtained, and the random carrier frequency of the PFC circuit fluctuates around the fundamental carrier frequency according to the random variable carrier frequency amplitude. The value of the random variable carrier frequency amplitude is randomly selected within a preset range.

[0091] Figure 4 A schematic diagram of the random carrier frequency of the PFC circuit provided in an embodiment of the present invention is shown.

[0092] See Figure 4 In a specific example, the base carrier frequency of the PFC circuit is set to fb, the random carrier frequency is fa, the amplitude of the random carrier frequency is denoted as Δf, and the maximum amplitude limit of the random carrier frequency is Δfmax.

[0093] fa = fb + Δf, where the range of fb is [-Δfmax, Δfmax].

[0094] Based on Passevar's theorem, if the switching frequency of the harmonic energy distribution and the width of its integer multiples are expanded, the harmonic peak value in each frequency band will be reduced, thereby reducing the ripple current amplitude and controlling the temperature of the electrolytic capacitor.

[0095] Random frequency modulation can randomize the switching frequency of a switching transistor, randomly changing the switching frequency in each modulation cycle. This allows harmonic energy to no longer be focused at a specific switching frequency, but rather dispersed across the switching frequency and its integer multiples.

[0096] In some embodiments, the method provided by the present invention may further include:

[0097] The correspondence between the circuit parameters and control parameters is established based on the experimental power factor correction circuit.

[0098] In some embodiments, the circuit parameters of the experimental power factor correction circuit are the same as those of the target power factor correction circuit;

[0099] The establishment of the correspondence between the circuit parameters and control parameters based on the experimental power factor correction circuit includes:

[0100] Multiple sets of control parameters were set to conduct experiments on the experimental power factor correction circuit.

[0101] The control parameter that minimizes the temperature of the electrolytic capacitor in the experimental power factor correction circuit is taken as the optimal control parameter.

[0102] The correspondence between the circuit parameters and the control parameters is established based on the optimal control parameters.

[0103] In some embodiments, the experimental power factor correction circuit may be of more than one type;

[0104] The establishment of the correspondence between the circuit parameters and control parameters based on the experimental power factor correction circuit includes:

[0105] For each type of experimental power factor correction circuit, multiple sets of control parameters are set to conduct experiments on the experimental power factor correction circuit;

[0106] The control parameter with the lowest electrolytic capacitor temperature in each type of experimental power factor correction circuit is taken as the corresponding optimal control parameter.

[0107] The correspondence between the circuit parameters and the control parameters is established based on the circuit parameters and optimal control parameters of each type of experimental power correction factor circuit.

[0108] Step 102: Generate a pulse width modulation signal based on the random carrier frequency.

[0109] In some embodiments, high-speed semiconductors are used to improve the power factor of the PFC circuit.

[0110] Optional, highly advanced semiconductors include IGBT switching transistors.

[0111] Specifically, the switching state of the IGBT is controlled by a PWM signal output by a digital signal processor (DSP).

[0112] Figure 5 A schematic diagram of the control signals for a fixed carrier frequency switching transistor is shown.

[0113] See Figure 5 When controlling the IGBT switching transistor, the digital information processor (DSP) generates a pulse width modulation (PWM) signal based on the carrier frequency and the switching transistor. The period of the PWM signal is 1 / f, the high-level time is D / f, and the low-level time is (1-D) / f, where f is a fixed carrier frequency and D is the duty cycle of the switching transistor.

[0114] Figure 6 A schematic diagram of the control signals for the random carrier frequency switching transistor is shown.

[0115] See Figure 6 In a specific example, the digital signal processor (DSP) calculates the random carrier frequency fa of the PFC circuit using a random algorithm within each modulation cycle. The random carrier frequency fa is modulated with the duty cycle D of the switching transistor to generate a PWM signal with a period of 1 / fa, where the high-level time is D / fa and the low-level time is (1-D) / fa. With a fixed duty cycle, since the random carrier frequency fa is randomly selected and can vary, the PWM signal also exhibits a certain range of randomness.

[0116] The PWM control signal is input to the gate of the IGBT switch to control its on / off state. As the random carrier frequency fa changes, the IGBT's turn-on and turn-off frequencies also change accordingly. Therefore, the energy spikes generated during IGBT turn-on and turn-off are no longer concentrated at fixed frequencies and integer multiples, but are distributed across various switching frequencies and their integer multiples.

[0117] Step 103: Control the switching transistor of the target power factor correction circuit based on the pulse width modulation signal.

[0118] In a specific example, the method provided by the embodiments of the present invention is verified using Simulink circuit simulation software.

[0119] Figure 7 A schematic diagram of the current spectrum of the electrolytic capacitor is shown when the PFC circuit is running at a fixed carrier frequency.

[0120] Figure 8 A schematic diagram of the current spectrum of the electrolytic capacitor is shown when the PFC circuit is running at a random carrier frequency.

[0121] See Figure 7 and Figure 8 The method provided in this embodiment of the invention can disperse the current spectrum of the electrolytic capacitor, effectively disperse harmonic energy, reduce the current harmonic amplitude of the carrier frequency and its multiples, reduce the amplitude of higher harmonics and current ripple, thereby reducing the temperature of the electrolytic capacitor and extending its service life.

[0122] Example 2

[0123] Figure 9 A schematic diagram of the electrolytic capacitor cooling control device of the power factor correction circuit provided in an embodiment of the present invention is shown.

[0124] See Figure 9 The electrolytic capacitor cooling control device for the power factor correction circuit provided in this embodiment of the invention may include:

[0125] The control parameter determination module 201 is used to acquire the circuit parameters of the target power factor correction circuit and determine the control parameters of the target power factor correction circuit based on the circuit parameters; the target power factor correction circuit includes an electrolytic capacitor, and the control parameters include a random carrier frequency;

[0126] Modulation signal generation module 202 is used to generate a pulse width modulation signal based on the random carrier frequency;

[0127] The switching transistor control module 203 is used to control the switching transistors of the target power factor correction circuit based on the pulse width modulation signal.

[0128] In some embodiments, the control parameter determination module 201 is specifically used for:

[0129] Based on the pre-stored correspondence between circuit parameters and control parameters, the control parameters corresponding to the circuit parameters are determined; the control parameters include the base carrier frequency and the variable carrier frequency amplitude limit.

[0130] The variable carrier frequency range is determined based on the aforementioned base carrier frequency and variable carrier frequency amplitude limits;

[0131] The random carrier frequency is randomly generated within the range of the variable carrier frequency interval.

[0132] In some embodiments, the apparatus further includes a correspondence establishment module, configured to:

[0133] The correspondence between the circuit parameters and control parameters is established based on the experimental power factor correction circuit.

[0134] In some embodiments, the circuit parameters of the experimental power factor correction circuit are the same as those of the target power factor correction circuit; the correspondence establishment module is specifically used for:

[0135] Multiple sets of control parameters were set to conduct experiments on the experimental power factor correction circuit.

[0136] The control parameter that minimizes the temperature of the electrolytic capacitor in the experimental power factor correction circuit is taken as the optimal control parameter.

[0137] The correspondence between the circuit parameters and the control parameters is established based on the optimal control parameters.

[0138] In some embodiments, the experimental power factor correction circuit is of more than one type; the correspondence establishment module is specifically used for:

[0139] The establishment of the correspondence between the circuit parameters and control parameters based on the experimental power factor correction circuit includes:

[0140] For each type of experimental power factor correction circuit, multiple sets of control parameters are set to conduct experiments on the experimental power factor correction circuit;

[0141] The control parameter with the lowest electrolytic capacitor temperature in each type of experimental power factor correction circuit is taken as the corresponding optimal control parameter.

[0142] The correspondence between the circuit parameters and the control parameters is established based on the circuit parameters and optimal control parameters of each type of experimental power correction factor circuit.

[0143] In some embodiments, the modulation signal generation module 202 is specifically used for:

[0144] The generation of the pulse width modulation signal based on the random carrier frequency includes:

[0145] The pulse width modulation signal is generated based on the random carrier frequency and the pre-stored duty cycle;

[0146] The period of the pulse width modulation signal is 1 / fa, the high-level time within the period is D / fa, and the low-level time is (1-D) / fa, where fa is the random carrier frequency corresponding to the current period and D is the duty cycle.

[0147] In summary, the electrolytic capacitor cooling control device of the power factor correction circuit provided in this embodiment of the invention can randomize the switching frequency of the switching transistor, reduce the current harmonic amplitude of the carrier frequency and its multiples, thereby suppressing ripple current, reducing the temperature rise effect of ripple current on the electrolytic capacitor, delaying the aging of the electrolytic capacitor, and extending its service life.

[0148] Example 3

[0149] Figure 10 This application shows a schematic diagram of the structure of a computer device provided in an exemplary embodiment, the computer device comprising:

[0150] The processor 301 includes one or more processing cores. The processor 301 executes various functional applications and data processing by running software programs and modules.

[0151] The receiver 302 and transmitter 303 can be implemented as a communication component, which can be a communication chip. Optionally, this communication component can include signal transmission functionality. That is, the transmitter 303 can be used to transmit control signals to the image acquisition device and the scanning device, and the receiver 302 can be used to receive corresponding feedback commands.

[0152] The memory 304 is connected to the processor 301 via the bus 305.

[0153] The memory 304 can be used to store at least one instruction, and the processor 301 is used to execute the at least one instruction to implement steps 101 to 102 in the embodiment of the electrolytic capacitor cooling control method for the power factor correction circuit described above.

[0154] Those skilled in the art will understand that Figure 10 This is merely an example of a computer device and does not constitute a limitation on the computer device. It may include more or fewer components than shown, or combine certain components, or different components. For example, the computer device may also include network access devices, etc.

[0155] The processor 301 may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0156] The memory 304 can be an internal storage unit of the computer device, such as a hard drive or RAM. The memory 304 can also be an external storage device of the computer device, such as a plug-in hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card. Furthermore, the memory 304 can include both internal and external storage units. The memory 304 is used to store the computer program and other programs and data required by the terminal device. The memory 304 can also be used to temporarily store data that has been output or will be output.

[0157] Example 4

[0158] This application also provides a power factor correction circuit, including the computer device described above.

[0159] Example 5

[0160] This application also provides a computer-readable storage medium storing at least one instruction, at least one program, code set, or instruction set, which can be loaded and executed by a processor to implement the electrolytic capacitor cooling control method of the power factor correction circuit described above.

[0161] Optionally, the computer-readable storage medium may include: read-only memory (ROM), random access memory (RAM), solid-state drives (SSDs), or optical discs, etc. The random access memory may include resistive random access memory (ReRAM) and dynamic random access memory (DRAM).

[0162] Example 6

[0163] This application also provides a computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the electrolytic capacitor cooling control method of the power factor correction circuit described in any of the above embodiments.

[0164] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the implementation.

[0165] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware, or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0166] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0167] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0168] The computer program includes computer program code, which can be in the form of source code, object code, executable file, or some intermediate form. The computer-readable medium can include any entity or device capable of carrying the computer program code, recording media, USB flash drive, portable hard drive, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in the computer-readable medium can be appropriately added or removed according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.

[0169] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A method for controlling the cooling of an electrolytic capacitor in a power factor correction circuit, characterized in that, The method includes: The circuit parameters of the target power factor correction circuit are obtained, and the control parameters of the target power factor correction circuit are determined based on the circuit parameters; the target power factor correction circuit includes an electrolytic capacitor, and the control parameters include a random carrier frequency; A pulse width modulation signal is generated based on the random carrier frequency; The switching transistors of the target power factor correction circuit are controlled based on the pulse width modulation signal; The method further includes: establishing a correspondence between the circuit parameters and control parameters based on the experimental power factor correction circuit; The circuit parameters of the experimental power factor correction circuit are the same as those of the target power factor correction circuit. The method for establishing the correspondence between circuit parameters and control parameters based on the experimental power factor correction circuit includes: setting multiple sets of control parameters to conduct experiments on the experimental power factor correction circuit; using the control parameter with the lowest electrolytic capacitor temperature in the experimental power factor correction circuit as the optimal control parameter; and establishing the correspondence between circuit parameters and control parameters based on the optimal control parameter.

2. The method according to claim 1, characterized in that, The process of determining the control parameters of the target power factor correction circuit based on the circuit parameters includes: Based on the pre-stored correspondence between circuit parameters and control parameters, the control parameters corresponding to the circuit parameters are determined; the control parameters include the base carrier frequency and the variable carrier frequency amplitude limit. The variable carrier frequency range is determined based on the aforementioned base carrier frequency and variable carrier frequency amplitude limits; The random carrier frequency is randomly generated within the range of the variable carrier frequency interval.

3. The method according to claim 1, characterized in that, The experimental power factor correction circuit has more than one type; The establishment of the correspondence between the circuit parameters and control parameters based on the experimental power factor correction circuit includes: For each type of experimental power factor correction circuit, multiple sets of control parameters are set to conduct experiments on the experimental power factor correction circuit; The control parameter with the lowest electrolytic capacitor temperature in each type of experimental power factor correction circuit is taken as the corresponding optimal control parameter. The correspondence between the circuit parameters and the control parameters is established based on the circuit parameters and optimal control parameters of each type of experimental power correction factor circuit.

4. The method according to claim 1, characterized in that, The generation of the pulse width modulation signal based on the random carrier frequency includes: The pulse width modulation signal is generated based on the random carrier frequency and the pre-stored duty cycle; The period of the pulse width modulation signal is 1 / fa, the high-level time within the period is D / fa, and the low-level time is (1-D) / fa, where fa is the random carrier frequency corresponding to the current period and D is the duty cycle.

5. A cooling control device for an electrolytic capacitor in a power factor correction circuit, characterized in that, The device includes: A control parameter determination module is used to acquire the circuit parameters of the target power factor correction circuit and determine the control parameters of the target power factor correction circuit based on the circuit parameters; the target power factor correction circuit includes an electrolytic capacitor, and the control parameters include a random carrier frequency; A modulation signal generation module is used to generate a pulse width modulation signal based on the random carrier frequency; A switching transistor control module is used to control the switching transistors of the target power factor correction circuit based on the pulse width modulation signal; The correspondence establishment module is used to establish the correspondence between the circuit parameters and control parameters based on the experimental power factor correction circuit; The circuit parameters of the experimental power factor correction circuit are the same as those of the target power factor correction circuit; the correspondence establishment module is specifically used for: Multiple sets of control parameters were set to conduct experiments on the experimental power factor correction circuit. The control parameter that minimizes the temperature of the electrolytic capacitor in the experimental power factor correction circuit is taken as the optimal control parameter. The correspondence between the circuit parameters and the control parameters is established based on the optimal control parameters.

6. A computer device, characterized in that, The computer device includes a processor and a memory, wherein the memory stores at least one instruction, at least one program, code set, or instruction set, and the at least one instruction, at least one program, code set, or instruction set is loaded and executed by the processor to implement the electrolytic capacitor cooling control method of the power factor correction circuit as described in any one of claims 1 to 4.

7. A power factor correction circuit, characterized in that, Includes the computer device as described in claim 6.

8. A computer-readable storage medium, characterized in that, The readable storage medium stores at least one instruction, at least one program, code set, or instruction set, wherein the at least one instruction, at least one program, code set, or instruction set is loaded and executed by a processor to implement the electrolytic capacitor cooling control method of the power factor correction circuit as described in any one of claims 1 to 4.

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