SST topology and control method with dc short circuit fault ride-through capability based on MMC
Patent Information
- Application Number
- CN202310477806.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-04-28
- Publication Date
- 2026-10-30
- Estimated Expiration
- 2043-04-28
AI Technical Summary
然而,由于在每个子模块的直流侧都需要连接DAB,在中压配电网使用时,需要大量的开关器件,导致SST的功率密度较低,严重制约了DAB型MMC-SST的应用,且在发生直流短路故障的情况下,固态变压器需要停止运行
[0015]有益效果:与现有技术相比,本发明具有如下显著优点:相比传统的DAB型MMC-SST(HBSM型、FBSM型、桥臂混合型)拓扑相比,使用到的开关器件数量分别减少了2/5、1/2以及5/11,使用到的高频变压器的数量也仅为这些拓扑的1/2;进一步的,可以在直流短路故障下实现SST的不间断运行,极大地提高了系统地稳定性和可靠性。
Smart Images

Figure CN116388579B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power electronics technology, and in particular to an SST topology and control method based on MMC that has DC short-circuit fault ride-through capability. Background Technology
[0002] AC / DC hybrid distribution networks have ports with multiple voltage levels and voltage configurations, allowing for the transmission and conversion of electrical energy between AC / DC and high / low voltage ports. They are suitable for integrating new energy sources and DC loads, and represent one of the important directions for future distribution network development. Solid-state transformers (SSTs), due to their flexible controllability and multi-port access capabilities, have become core equipment in AC / DC hybrid distribution networks.
[0003] The MMC-SST (modular-multilevel-converter, MMC) features an MVDC (medium-voltage DC) port, making it suitable for medium- and high-voltage power transmission and distribution applications. It enables grid connection and local consumption of distributed energy resources, thus holding broad application prospects in AC / DC hybrid distribution networks. The Dual Active Bridge (DAB) type MMC-SST topology offers advantages such as flexible control and ease of redundancy and fault tolerance. However, because a DAB connection is required on the DC side of each submodule, a large number of switching devices are needed in medium-voltage distribution networks, resulting in low power density for the SST. This severely restricts the application of the DAB type MMC-SST, and the solid-state transformer needs to be shut down in the event of a DC short-circuit fault. Therefore, improvements to the module are essential. Summary of the Invention
[0004] Objective of the Invention: This invention provides an SST topology and control method based on MMC with DC short-circuit fault ride-through capability. In the sub-module, two full-bridge modules in the front-end circuit are connected in series and share a single back-end circuit. Compared with the traditional DAB-type MMC-SST (HBSM, FBSM, and bridge arm hybrid) topologies, the number of switching devices used is reduced by 2 / 5, 1 / 2, and 5 / 11, respectively, and the number of high-frequency transformers used is only half that of these topologies. Furthermore, uninterrupted operation of the SST can be achieved under DC short-circuit faults, greatly improving the stability and reliability of the system.
[0005] Technical Solution: This invention provides an SST topology based on MMC with DC short-circuit fault ride-through capability, comprising: a medium-voltage AC terminal, a medium-voltage DC terminal, a low-voltage AC terminal, a low-voltage DC terminal, and a three-phase circuit topology, wherein: the three-phase circuit topology comprises three identical single-phase lines, each single-phase line comprising multiple sub-modules; each sub-module comprises a front-end circuit, a back-end circuit, and a transformer, the front-end circuit and the back-end circuit being connected through the transformer; the front-end circuit comprises a first full-bridge module and a second full-bridge module, the first full-bridge module comprising a first bridge arm and a second bridge arm connected in parallel. The bridge arm, the first bridge arm and the second bridge arm each include two switches connected in series. The second full-bridge module includes a third bridge arm and a multiplexed bridge arm connected in parallel, each including two switches connected in series. The endpoint of the second side of the second bridge arm is connected to the midpoint of the multiplexed bridge arm. The midpoint of the second bridge arm and the endpoint of the first side of the multiplexed bridge arm are respectively connected to the primary side of the transformer. The midpoint of the first bridge arm and the midpoint of the third bridge arm serve as interfaces for interconnection between sub-modules. The subsequent circuit includes a fourth bridge arm and a fifth bridge arm connected in parallel, each including two switches connected in series. The midpoints of the first and fifth bridge arms are connected to the secondary side of the transformer, respectively. The two endpoints of the fifth bridge arm serve as interfaces for connection between submodules. The endpoints refer to the parallel connection points between two bridge arms; the midpoint refers to the connection point between two switching transistors. The medium-voltage AC terminal includes three ports, each led out from the connection line between the midpoint of the first bridge arm of one submodule and the midpoint of the third bridge arm of another adjacent submodule on a single-phase line. The medium-voltage DC terminal includes two ports, connected according to the submodule's position on the single-phase lines, with the midpoint of the first bridge arm of the first submodule on each of the three single-phase lines connected. One port is formed by connecting the midpoint of the third bridge arm of the last sub-module on the three single-phase lines; another port is formed by connecting the midpoint of the third bridge arm of the last sub-module on the three single-phase lines; the low-voltage AC terminal includes a converter, the two interfaces of which are respectively connected to the first low-voltage interface and the second low-voltage interface; the first low-voltage interface is formed by connecting the first end points of the fifth bridge arm of each sub-module on the three single-phase lines to each other, and the second low-voltage interface is formed by connecting the second end points of the fifth bridge arm of each sub-module on the three single-phase lines to each other; the low-voltage DC terminal includes two ports, namely the first low-voltage interface and the second low-voltage interface.
[0006] Specifically, the connection lines between submodules on a single-phase line include the connection between the midpoint of the first bridge arm of the submodule and the midpoint of the third bridge arm of the adjacent submodule.
[0007] Specifically, the connection lines between sub-modules on a single-phase line include the endpoint connection lines formed by connecting the first side endpoints of the fifth bridge arm and the endpoint connection lines formed by connecting the second side endpoints of the fifth bridge arm.
[0008] Specifically, in the submodule, capacitors and resistors are installed on the connection lines between the primary side of the transformer and the preceding circuit.
[0009] Specifically, in the front-end circuit of the submodule, the first bridge arm is connected in parallel with the capacitor, and the third bridge arm is connected in parallel with the capacitor; in the back-end circuit of the submodule, the fifth bridge arm is connected in parallel with the capacitor.
[0010] Specifically, two inductors are installed on the connection line between the midpoint of the first bridge arm of the submodule and the midpoint of the third bridge arm of another adjacent submodule, and a medium-voltage AC terminal is led out between the two inductors.
[0011] Specifically, inductors and resistors are installed on the port lines of the medium-voltage AC terminal.
[0012] Specifically, the converter includes four low-voltage bridge arms connected in parallel, each low-voltage bridge arm includes two switching transistors connected in series, the two ends of the low-voltage bridge arm are respectively connected to a first low-voltage interface and a second low-voltage interface, and four ports are led out from the midpoint of each low-voltage bridge arm.
[0013] This invention also provides a control method for an SST topology with DC short-circuit fault ride-through capability based on MMC. For the SST topology with DC short-circuit fault ride-through capability based on MMC provided by this invention, the method includes: In the normal operation state of the SST topology: among the two switches of the first bridge arm of the submodule, the switch on the first side of the first bridge arm is in the on state, and the switch on the second side of the first bridge arm is in the off state; In the DC short-circuit fault state of the SST topology: among the two switches of the third bridge arm of the submodule, the switch on the first side of the third bridge arm is in the on state, and the switch on the second side of the third bridge arm is in the off state; the modulation signals of the second bridge arm and the multiplexed bridge arm of the submodule are consistent with those in the normal operation state; in the mixing modulation signals of the first bridge arm and the multiplexed bridge arm of the submodule, the low-frequency AC signal and the DC signal are common-mode components, and the high-frequency AC signal is a differential-mode component.
[0014] Specifically, in the mixing modulation signals of the second bridge arm and the multiplexed bridge arm of the submodule, the low-frequency AC signal is the differential-mode component, and the high-frequency AC signal and DC signal are the common-mode components; in the mixing modulation signals of the third bridge arm and the multiplexed bridge arm of the submodule, the high-frequency AC signal and DC signal are the common-mode components, and the low-frequency AC signal is the differential-mode component.
[0015] Beneficial effects: Compared with the prior art, the present invention has the following significant advantages: Compared with the traditional DAB type MMC-SST (HBSM type, FBSM type, bridge arm hybrid type) topology, the number of switching devices used is reduced by 2 / 5, 1 / 2 and 5 / 11 respectively, and the number of high-frequency transformers used is only 1 / 2 of these topologies; furthermore, uninterrupted operation of SST can be achieved under DC short circuit faults, which greatly improves the stability and reliability of the system. Attached Figure Description
[0016] Figure 1 This is a schematic diagram of the solid-state transformer topology provided by the present invention;
[0017] Figure 2 This is a schematic diagram of the submodule structure provided by the present invention;
[0018] Figure 3 A schematic diagram of the submodule mixing modulation under normal operating conditions provided by the present invention;
[0019] Figure 4 A schematic diagram of the fault-crossing control of the lower arm of a three-phase line in a solid-state transformer topology under DC short-circuit fault conditions provided by the present invention.
[0020] Figure 5 (a) to Figure 5 (h) is a simulation diagram of the solid-state transformer topology provided by the present invention under normal operating conditions. Figure 5 (a) is the low-frequency AC port output voltage u of the submodule. o waveform, Figure 5 (b) is the output voltage u of the high-frequency AC port of the submodule. h waveform, Figure 5 (c) to Figure 5 (h) are the output voltage waveform of the upper bridge arm of phase a, the three-phase current waveform of the MVAC port, the voltage waveform of the MVDC port, the voltage waveform of the LVDC port, the capacitor voltage waveform of phase a, and the input current waveform of the high-frequency transformer, respectively.
[0021] Figure 6 (a) to Figure 6 (h) is a simulation diagram of the uninterrupted operation of the solid-state transformer topology provided by the present invention under DC short-circuit fault. Figure 6 (a) and Figure 6 (c) The output voltage waveforms of the low-frequency AC port of the first submodule of the upper arm of phase a and the output voltage waveform of the upper arm of phase a, respectively, are used when the fault ride-through control method is applied. Figure 6 (b) is the output voltage waveform of the high-frequency AC port of the submodule. Figure 6 (e) and Figure 6 (f) shows the waveforms of the MVDC port voltage and MVDC port current, respectively. Figure 6(d) Figure 6 (g) and Figure 6 (h) shows the waveforms of the three-phase current at the MVAC port, the voltage of phase a capacitor, and the voltage at the LVDC port, respectively. Detailed Implementation
[0022] The technical solution of the present invention will be further described below with reference to the accompanying drawings.
[0023] See Figure 1 This is a schematic diagram of the solid-state transformer topology provided by the present invention; see reference. Figure 2 This is a schematic diagram of the submodule structure provided by the present invention.
[0024] This invention provides an SST topology based on MMC with DC short-circuit fault ride-through capability, comprising: a medium-voltage AC terminal (MVAC), a medium-voltage DC terminal (MVDC), a low-voltage AC terminal (LVAC), a low-voltage DC terminal (LVDC), and a three-phase circuit topology, wherein: the three-phase circuit topology includes three identical single-phase lines, each single-phase line comprising multiple sub-modules; each sub-module includes a front-end circuit, a back-end circuit, and a transformer, the front-end circuit and the back-end circuit being connected through the transformer; the front-end circuit includes a first full-bridge module and a second full-bridge module, the first full-bridge... The module includes a first bridge arm and a second bridge arm connected in parallel, each including two series-connected switching transistors. The second full-bridge module includes a third bridge arm and a multiplexed bridge arm connected in parallel, each including two series-connected switching transistors. The second end point of the second bridge arm is connected to the midpoint of the multiplexed bridge arm. The midpoint of the second bridge arm and the first end point of the multiplexed bridge arm are respectively connected to the primary side of the transformer. The midpoints of the first and third bridge arms serve as interfaces for interconnection between sub-modules. The subsequent circuit includes a fourth and a fifth bridge arm connected in parallel, each including two series-connected switching transistors. The two switching transistors; the midpoints of the fourth and fifth bridge arms are respectively connected to the secondary side of the transformer, and the two endpoints of the fifth bridge arm serve as interfaces for connection between submodules; the endpoints refer to the parallel connection points between the two bridge arms; the midpoint refers to the connection point between the two switching transistors; the medium-voltage AC terminal includes three ports, each port being led out from the connection line between the midpoint of the first bridge arm of one submodule and the midpoint of the third bridge arm of another adjacent submodule on a single-phase line; the medium-voltage DC terminal includes two ports, according to the position sequence of the submodules on the single-phase lines, the first bridge arm of the first submodule on the three single-phase lines. A port is formed by connecting the midpoints of the three single-phase lines and leading out the third bridge arm of the last sub-module. Another port is formed by connecting the midpoints of the third bridge arm of the last sub-module on the three single-phase lines. The low-voltage AC terminal includes a converter, the two interfaces of which are respectively connected to the first low-voltage interface and the second low-voltage interface. The first low-voltage interface is formed by connecting the first end points of the fifth bridge arm of each sub-module on the three single-phase lines to each other, and the second low-voltage interface is formed by connecting the second end points of the fifth bridge arm of each sub-module on the three single-phase lines to each other. The low-voltage DC terminal includes two ports, namely the first low-voltage interface and the second low-voltage interface.
[0025] In this embodiment of the invention, in the front-end circuit of the submodule, the first bridge arm is connected in parallel with the capacitor, and the third bridge arm is connected in parallel with the capacitor; in the back-end circuit of the submodule, the fifth bridge arm is connected in parallel with the capacitor.
[0026] In practical implementation, the transformer in the submodule can be a high-frequency transformer.
[0027] In practice, 1kV and below are considered low voltage, 1kV and above and 20kV and below are considered medium voltage, and above 20kV are considered high voltage.
[0028] In practice, the low frequency is below 50Hz and the high frequency is above 10kHz.
[0029] In practical implementation, within the AIDCSM submodule, based on the characteristics of the circuit structure, the entire submodule is divided into a pre-stage, a post-stage, and a high-frequency transformer. The pre-stage and post-stage are connected via the high-frequency transformer. The post-stage circuit of the AIDCSM module is an H-bridge rectifier circuit composed of switching devices Q1 to Q4. Q1 and Q2 are connected in series to form the fourth bridge arm, and Q3 and Q4 are connected in series to form the fifth bridge arm. Its output is connected in parallel with capacitor C. o The front-end circuit of the AIDCSM module can be considered to consist of two full-bridge modules. The switching devices S1 to S4 and the capacitor C1 constitute the first full-bridge module (full-bridge module 1), and the switching devices S5 to S8 and the capacitor C2 constitute the second full-bridge module (full-bridge module 2). S1 and S2 are connected in series to form the first bridge arm (bridge arm 1), S3 and S4 are connected in series to form the second bridge arm (bridge arm 2), S5 and S6 are connected in series to form the third bridge arm (bridge arm 3), and S7 and S8 are connected in series to form a multiplexed bridge arm.
[0030] In this embodiment of the invention, the connection line between sub-modules on a single-phase line includes a connection between the midpoint of the first bridge arm of the sub-module and the midpoint of the third bridge arm of the adjacent sub-module.
[0031] In this embodiment of the invention, the connection lines between sub-modules on a single-phase line include an endpoint connection line formed by connecting the first side endpoints of the fifth bridge arm and an endpoint connection line formed by connecting the second side endpoints of the fifth bridge arm.
[0032] In this embodiment of the invention, in the submodule, capacitors and resistors are provided on the connection lines between the primary side of the transformer and the preceding circuit.
[0033] In this embodiment of the invention, two inductors are provided on the connection line between the midpoint of the first bridge arm of the submodule and the midpoint of the third bridge arm of another adjacent submodule, and a medium-voltage AC terminal is led out between the two inductors.
[0034] In this embodiment of the invention, an inductor and a resistor are provided on the port line of the medium-voltage AC terminal.
[0035] In this embodiment of the invention, the converter includes four low-voltage bridge arms connected in parallel. Each low-voltage bridge arm includes two switching transistors connected in series. The two ends of the low-voltage bridge arm are respectively connected to a first low-voltage interface and a second low-voltage interface. Four ports are led out from the midpoint of each low-voltage bridge arm to form a low-voltage AC terminal.
[0036] In specific implementation, the first side of the bridge arm usually refers to the upper side in the diagram, and the second side of the bridge arm usually refers to the lower side in the diagram. For example, in the first bridge arm, the switch S1 is on the upper side of the diagram relative to S2, that is, the switch S1 is on the first side of the first bridge arm. The endpoint of the first side of the first bridge arm refers to the parallel connection point adjacent to the switch S1, while the switch S2 is on the second side of the first bridge arm. The endpoint of the second side of the first bridge arm refers to the parallel connection point adjacent to the switch S2.
[0037] In practical implementation, connecting lines are led out from the midpoint of the first bridge arm composed of switching devices S1 and S2, and the midpoint of the third bridge arm composed of switching devices S5 and S6, respectively, to form a low-frequency AC port. The output voltage is represented by u. o This indicates that it is used to connect with the other AIDCSM modules. Specifically, the connection method is that the midpoint of the first bridge arm of a submodule is connected to the midpoint of the third bridge arm of the adjacent submodule, thereby realizing the cascading of the SST input stage.
[0038] In practical implementation, in a hybrid AC / DC distribution network, the MVAC port is used to connect to the three-phase AC distribution network for the interaction of active and reactive power; the MVDC port can be directly connected to the DC distribution network or connected to the MVDC ports of other SSTs, thereby realizing flexible interconnection between regional power grids, enabling flexible power allocation between regions and the consumption of new energy at the distribution network level; the LVDC port and LVAC port can connect to low-voltage AC / DC loads and also enable the access of low-voltage distributed energy in different forms.
[0039] In specific implementation, the fifth bridge arm of the submodule's subsequent circuit has two endpoints. In each single-phase line, the endpoints on the same side (e.g., the first side) of the fifth bridge arm of each submodule are connected to a connecting line A, and the endpoints on the other side (e.g., the second side) of the fifth bridge arm of each submodule are connected to a connecting line B. The three single-phase lines form three connecting lines A and three connecting lines B. One end of the three connecting lines A is connected to each other to form an interface, which is the first low-voltage interface. One end of the three connecting lines B is connected to each other to form an interface, which is the second low-voltage interface.
[0040] In practical implementation, switching devices S3 and S4 form the second bridge arm, and switching devices S7 and S8 form the multiplexed bridge arm. The endpoint of the second side of the second bridge arm is connected to the midpoint of the multiplexed bridge arm. The midpoint of the second bridge arm and the first endpoint of the multiplexed bridge arm are connected by a lead-out line to form a high-frequency AC port. The high-frequency AC port can be considered to be constructed by two full-bridge modules in reverse series in the front-end circuit of the AIDCSM module. It is used to connect to the primary side of the high-frequency transformer, and the output voltage is expressed as u. h Indicated. In the front-end circuit of the AIDCSM module, L r and R rThese represent the leakage inductance and equivalent impedance of the high-frequency transformer, respectively. An additional line from L... p The inductor is connected in parallel.
[0041] In practical implementation, the topology provided by this invention belongs to the DAB type MMC-SST, and has medium and low voltage, AC and DC ports, enabling flexible interconnection of various types of distribution networks. Unlike the traditional DAB type MMC-SST where the DAB is directly connected in parallel after the submodule capacitor, this topology makes full use of the structural characteristics of the DAB type MMC-SST, constructing an AIDCSM module by reusing bridge arms and reverse series connection of submodules.
[0042] See Figure 3 This is a schematic diagram of the submodule mixing modulation under normal operating conditions provided by the present invention.
[0043] This invention also provides a control method for an SST topology with DC short-circuit fault ride-through capability based on MMC, applied to the SST topology with DC short-circuit fault ride-through capability based on MMC provided by this invention, including: In the normal operation state of the SST topology: among the two switches of the first bridge arm of the submodule, the switch on the first side of the first bridge arm is in the on state, and the switch on the second side of the first bridge arm is in the off state; In the DC short-circuit fault state of the SST topology: among the two switches of the third bridge arm of the submodule, the switch on the first side of the third bridge arm is in the on state, and the switch on the second side of the third bridge arm is in the off state; the modulation signals of the second bridge arm and the multiplexed bridge arm of the submodule are consistent with those in the normal operation state, and in the mixing modulation signals of the first bridge arm and the multiplexed bridge arm of the submodule, the low-frequency AC signal and the DC signal are common-mode components, and the high-frequency AC signal is a differential-mode component.
[0044] In this embodiment of the invention, in the mixing modulation signals of the second bridge arm and the multiplexed bridge arm of the submodule, the low-frequency AC signal is the differential-mode component, and the high-frequency AC signal and the DC signal are the common-mode components; in the mixing modulation signals of the third bridge arm and the multiplexed bridge arm of the submodule, the high-frequency AC signal and the DC signal are the common-mode components, and the low-frequency AC signal is the differential-mode component.
[0045] In practical implementation, under normal operating conditions, switching device S1 in the AIDCSM module is in a constantly on state, and S2 is in a constantly off state. The low-frequency AC port output voltage and the high-frequency AC port output voltage of the AIDCSM module are determined by switching devices S3 to S8. The switching state of the multiplexed bridge arm will affect both the low-frequency AC port and the high-frequency AC port simultaneously. Therefore, to ensure the normal operation of the SST, the modulation signal of the multiplexed bridge arm must contain both low-frequency AC components and high-frequency AC components.
[0046] In practical implementation, the high-frequency AC port output voltage u hIt is determined by both the second bridge arm and the reused bridge arm. Because u h It is a series output voltage. According to the differential mode decoupling principle, the low-frequency AC components in the mixing modulation signals of the second bridge arm and the multiplexed bridge arm are opposite, which can eliminate the low-frequency voltage components. Since the high-frequency AC port is composed of the second bridge arm and the multiplexed bridge arm connected in reverse series, when the capacitors C1 and C2 in the AIDCSM module are stable at their rated values, the DC component can be eliminated.
[0047] In practical implementation, for the low-frequency AC port of the AIDCSM module, the output voltage u o This is determined by the third bridge arm and the multiplexed bridge arm. According to the common-mode decoupling principle, the DC component and the high-frequency AC component are common-mode components, while the low-frequency AC component is a differential-mode component. Therefore, in the AIDCSM module, the low-frequency AC port of the second full-bridge module can eliminate the DC component and the high-frequency component. Furthermore, because the switching device S1 is always on, a value of U is introduced into the low-frequency AC port of the AIDCSM module. c DC bias allows a low-frequency AC voltage u with DC bias to be obtained at the low-frequency AC port. o .
[0048] In practical implementation, during a DC short-circuit fault, the modulation signals of the second bridge arm and the multiplexed bridge arm remain consistent with those under normal operating conditions. Switching device S5 is always on, and S6 is always off. In the mixing modulation signals of the first bridge arm and the multiplexed bridge arm, the low-frequency AC signal and DC signal are common-mode components, and the high-frequency AC signal is a differential-mode component. The upper and lower bridge arms of the SST are controlled independently. The upper and lower bridge arms of the SST are divided by the port position where the medium-voltage AC terminal is led out from the single-phase line. The part of the single-phase line above this port is the upper bridge arm, and the part below is the lower bridge arm. The control method is explained using the three-phase lower bridge arm of the SST as an example.
[0049] At the moment of a DC short-circuit fault, the voltage at the MVDC port drops to 0. According to Kirchhoff's laws, the voltage equation for the lower arm of the SST can be written as shown in equation (1). Where i xl and u xl (x = a, b, c) (a represents a single-phase circuit of phase a, b represents a single-phase circuit of phase b, and c represents a single-phase circuit of phase c) represent the lower bridge arm current and lower bridge arm output voltage of SST, respectively. xo This represents three-phase AC voltage.
[0050]
[0051] Performing a Park transformation on equation (1) yields the voltage-current expression along the dq axis, as shown in equation (2). Where i lk u lk and e lk(k=d,q) are the dq-axis components of the bridge arm current, bridge arm voltage, and AC voltage, respectively. In the synchronous rotating coordinate system, all variables in equation (2) are DC components, so a PI controller can be used for control.
[0052]
[0053] See Figure 4 This is a schematic diagram of the bridge arm fault crossing control of a three-phase line under a solid-state transformer topology in the DC short-circuit fault state provided by the present invention.
[0054] Figure 4 Middle U xl_ave (x = a, b, c) represents the average voltage of the bridge arm capacitors, which is balanced using a PI controller. * xl This represents the baseband modulation signal of the lower bridge arm. The control strategy of the upper bridge arm of the SST is consistent with that of the lower bridge arm.
[0055] See Figure 5 (a) to Figure 5 (h) is a simulation diagram of the solid-state transformer topology provided by the present invention under normal operating conditions.
[0056] In specific implementation, such as Figure 5 The diagram shows the verification of the SST topology provided by this invention under normal operating conditions, demonstrating that the AIDCSM type MMC-SST has good dynamic performance. At 0.8s, a load change occurs on the LVDC side, and the absorbed power changes from 375kW to 562.5kW.
[0057] Figure 5 (a) is the low-frequency AC port output voltage u of the submodule. o waveform, Figure 5 (b) is the output voltage u of the high-frequency AC port of the submodule. h The waveform, as can be seen from the simulation results, u o It is a three-level voltage waveform, with a DC voltage bias of U. c The voltage frequency is consistent with the MVAC port frequency, u h This is a high-frequency pulse voltage waveform, with both positive and negative amplitudes being U. c The voltage frequency is the same as the high-frequency modulation signal frequency, which indicates that the proposed AIDCSM module adopts a frequency mixing modulation scheme, which can decouple the high-frequency modulation signal from the low-frequency modulation signal without the need for a filtering circuit. Figure 5 (c) to Figure 5(h) shows the output voltage waveform of the upper bridge arm of phase a, the three-phase current waveform of the MVAC port, the voltage waveform of the MVDC port, the voltage waveform of the LVDC port, the voltage waveform of the phase a capacitor, and the input current waveform of the high-frequency transformer, respectively. From the simulation results of the three ports of the SST, it can be seen that the AIDCSM type MMC-SST provided by this invention can maintain normal operation before and after the power change on the LVDC side, and each port of the SST can maintain good stability throughout the dynamic change process.
[0058] See Figure 6 (a) to Figure 6 (h) is a simulation diagram of the uninterrupted operation of the solid-state transformer topology under DC short-circuit fault provided by the present invention.
[0059] Figure 6 (a) and Figure 6 (c) The output voltage waveforms of the low-frequency AC port of the first submodule of the upper arm of phase a and the output voltage waveform of the upper arm of phase a are respectively displayed using the fault ride-through control method. After the fault occurs, both the low-frequency AC port output voltage and the SST arm output voltage are multi-level AC waveforms with the same frequency as the MVAC port frequency. Figure 6 (b) shows the output voltage waveform of the high-frequency AC port of the AIDCSM module at this time. From the figure, it can be seen that at the time of the fault, u h It should remain consistent with normal operating conditions. Figure 6 (e) and Figure 6 (f) shows the waveforms of the MVDC port voltage and MVDC port current, respectively. When a DC short-circuit fault is detected, the short-circuit voltage and fault current decay to 0 in a short time. Figure 6 (d) Figure 6 (g) and Figure 6 (h) shows the waveforms of the three-phase current at the MVAC port, the voltage of the a-phase capacitor, and the voltage at the LVDC port, respectively. As can be seen from the figure, after the fault occurs, the current at the MVAC port and the voltage of the submodule capacitor can be restored to stability in a short time. The LVDC port of SST is almost unaffected by the short circuit fault.
[0060] In practical implementation, simulation results show that the AIDCSM type MMC-SST topology and corresponding fault ride-through control method provided by this invention can achieve uninterrupted operation under DC short-circuit faults.
Claims
1. An SST topology based on MMC with DC short-circuit fault ride-through capability, characterized in that, include: Medium-voltage AC terminal, medium-voltage DC terminal, low-voltage AC terminal, low-voltage DC terminal, and three-phase circuit topology, wherein: The three-phase circuit topology includes three identical single-phase lines, and each single-phase line includes multiple sub-modules; The submodule includes a front-end circuit, a back-end circuit, and a transformer, and the front-end circuit and the back-end circuit are connected through the transformer. The front-end circuit includes a first full-bridge module and a second full-bridge module. The first full-bridge module includes a first bridge arm and a second bridge arm connected in parallel, each including two switches connected in series. The second full-bridge module includes a third bridge arm and a multiplexed bridge arm connected in parallel, each including two switches connected in series. The endpoint of the second side of the second bridge arm is connected to the midpoint of the multiplexed bridge arm. The midpoint of the second bridge arm and the endpoint of the first side of the multiplexed bridge arm are respectively connected to the primary side of the transformer. The midpoints of the first and third bridge arms serve as interfaces for interconnection between sub-modules. The back-end circuit includes a fourth and a fifth bridge arm connected in parallel, each including two switches connected in series. The midpoints of the fourth and fifth bridge arms are respectively connected to the secondary side of the transformer. The two endpoints of the fifth bridge arm serve as interfaces for interconnection between sub-modules. The endpoints refer to the parallel connection points between two bridge arms; the midpoints refer to the connection points between two switches. The medium-voltage AC terminal includes three ports, each port being led out from the connection line between the midpoint of the first bridge arm of one submodule and the midpoint of the third bridge arm of another adjacent submodule on a single-phase line. The medium-voltage DC terminal includes two ports. According to the position sequence of the sub-modules on the single-phase lines, the midpoint of the first bridge arm of the first sub-module on the three single-phase lines is connected to form one port, and the midpoint of the third bridge arm of the last sub-module on the three single-phase lines is connected to form another port. The low-voltage AC terminal includes a converter, the two interfaces of which are respectively connected to a first low-voltage interface and a second low-voltage interface; the first end point connection lines of the fifth arm of each sub-module on the three single-phase lines are interconnected and lead out to the first low-voltage interface; the second end point connection lines of the fifth arm of each sub-module on the three single-phase lines are interconnected and lead out to the second low-voltage interface. The low-voltage DC terminal includes two ports, namely a first low-voltage interface and a second low-voltage interface.
2. The SST topology with DC short-circuit fault ride-through capability based on MMC according to claim 1, characterized in that, The connection lines between submodules on a single-phase line include the connection between the midpoint of the first bridge arm of the submodule and the midpoint of the third bridge arm of the adjacent submodule.
3. The SST topology with DC short-circuit fault ride-through capability based on MMC according to claim 2, characterized in that, The connection lines between submodules on a single-phase line include the endpoint connection lines formed by connecting the first side endpoints of the fifth bridge arm and the endpoint connection lines formed by connecting the second side endpoints of the fifth bridge arm.
4. The SST topology with DC short-circuit fault ride-through capability based on MMC according to claim 3, characterized in that, In the submodule, capacitors and resistors are installed on the connection lines between the primary side of the transformer and the preceding circuit.
5. The SST topology with DC short-circuit fault ride-through capability based on MMC according to claim 4, characterized in that, In the front-end circuit of the submodule, the first bridge arm is connected in parallel with the capacitor, and the third bridge arm is connected in parallel with the capacitor; in the back-end circuit of the submodule, the fifth bridge arm is connected in parallel with the capacitor.
6. The SST topology with DC short-circuit fault ride-through capability based on MMC according to claim 5, characterized in that, Two inductors are installed on the connection line between the midpoint of the first bridge arm of the submodule and the midpoint of the third bridge arm of another adjacent submodule, and a medium-voltage AC terminal is led out between the two inductors.
7. The SST topology with DC short-circuit fault ride-through capability based on MMC according to claim 6, characterized in that, Inductors and resistors are installed on the port lines of the medium-voltage AC terminal.
8. The SST topology with DC short-circuit fault ride-through capability based on MMC according to claim 7, characterized in that, The converter includes four low-voltage bridge arms connected in parallel. Each low-voltage bridge arm includes two switching transistors connected in series. The two ends of the low-voltage bridge arm are connected to a first low-voltage interface and a second low-voltage interface, respectively. Four ports are led out from the midpoint of each low-voltage bridge arm.
9. A control method for an SST topology with DC short-circuit fault ride-through capability based on MMC, characterized in that, The SST topology based on MMC with DC short-circuit fault ride-through capability according to any one of claims 1 to 8 includes: In the normal operation of the SST topology: among the two switches of the first bridge arm of the submodule, the switch on the first side of the first bridge arm is in the on state, and the switch on the second side of the first bridge arm is in the off state. In the SST topology DC short-circuit fault state: among the two switches of the third bridge arm of the submodule, the switch on the first side of the third bridge arm is in the on state, and the switch on the second side of the third bridge arm is in the off state; the modulation signals of the second bridge arm and the multiplexed bridge arm of the submodule are consistent with the normal operation state; in the mixing modulation signals of the first bridge arm and the multiplexed bridge arm of the submodule, the low-frequency AC signal and the DC signal are common-mode components, and the high-frequency AC signal is a differential-mode component.
10. The control method for an SST topology with DC short-circuit fault ride-through capability based on MMC according to claim 9, characterized in that, In the mixing modulation signals of the second bridge arm and the multiplexed bridge arm of the submodule, the low-frequency AC signal is the differential-mode component, and the high-frequency AC signal and DC signal are the common-mode components; in the mixing modulation signals of the third bridge arm and the multiplexed bridge arm of the submodule, the high-frequency AC signal and DC signal are the common-mode components, and the low-frequency AC signal is the differential-mode component.
Citation Information
Patent Citations
Direct-current fault ride-through control method of hybrid MMC type multi-port solid-state transformer
CN111224534A
Solid-state transformer topology based on MMC sub-module bridge arm multiplexing and modulation method
CN115632562A
