A low phase shift wideband digitally controlled active attenuator
By introducing a phase shift compensation unit and a low-Q load network into the active attenuator, the problem of insufficient broadband phase shift performance under CMOS technology is solved, realizing the design of an active attenuator with low phase shift and high gain resolution, and improving the calibration accuracy of the phased array system.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SOUTHEAST UNIV
- Filing Date
- 2023-04-24
- Publication Date
- 2026-07-24
AI Technical Summary
Existing CMOS-based numerically controlled active attenuators have insufficient phase shift performance over a wide bandwidth, especially with relatively large phase shifts in different gain modes, which affects the calibration difficulty of phased array systems.
Two phase shift compensation units are employed: Phase shift compensation unit 1 compensates for the phase delay caused by parasitic capacitance by introducing an inductor LC in the minimum gain state, and phase shift compensation unit 2 reduces the equivalent parasitic capacitance by using an inverter of a specific size. Combined with a low-Q load network and a gain control unit, digitally controlled gain adjustment is achieved.
It effectively reduces the relative phase shift of the active attenuator in different gain modes over a wide bandwidth, improves the accuracy and stability of gain control, and the gain error and phase shift are less than 0.2dB and 2.5°, respectively, in the range of 6 to 18 GHz.
Smart Images
Figure CN116388727B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of radio frequency integrated circuits, and specifically relates to a low phase shift broadband digitally controlled active attenuator. Background Technology
[0002] With the increasing demand for modern high-data-rate applications, high-performance electronic devices and systems have attracted widespread attention from academia and industry. Phased arrays, as an important component of radar and wireless communication systems, have become a key research focus in recent years.
[0003] Active attenuators, as gain control modules, are an integral part of active phased array transceivers. Gain control is a key performance indicator for active attenuators, primarily reflected in the gain control range and gain resolution. Furthermore, the relative phase shift of the active attenuator at different gain modes and frequencies must be considered, as this directly affects the calibration difficulty of the phased array system; the lower the relative phase shift, the easier the calibration of the entire phased array system. However, due to the unavoidable presence of parasitic capacitances in the circuit that affect RF performance, designing active attenuators with a large gain control range, high gain resolution, wide bandwidth, and low phase shift is extremely challenging.
[0004] Existing numerically controlled active attenuators based on current-steering technology typically neglect the gate-drain capacitance C of the gain control unit transistor when applied to CMOS processes. gd The effect will cause the C corresponding to the transistor in the on and off states to be affected. gd_on and C gd_off The effect of treating it as the same capacitance value and ignoring it is no longer valid under advanced CMOS process conditions. As a result, the designed gain control module is insufficient in terms of phase shift performance over a wide bandwidth, and its relative bandwidth is usually within 50%.
[0005] The limitations of traditional active attenuator designs are becoming increasingly apparent, making research on low-phase-shift active attenuators with broadband capabilities based on CMOS technology of great significance. Summary of the Invention
[0006] The purpose of this invention is to provide a design scheme for a low phase shift broadband digitally controlled active attenuator based on CMOS technology, which solves the problem of large relative phase shift of the active attenuator in different gain states within the broadband by using two phase shift compensation units.
[0007] To solve the above-mentioned technical problems, the specific technical solution of the present invention is as follows:
[0008] A low-phase-shift broadband digitally controlled active attenuator based on CMOS technology comprises nine parts: an input matching network, a common-source amplifier, a phase-shift compensation unit 1, a common-gate amplifier, an output matching network, a low-Q load network, a gain control unit, a phase-shift compensation unit 2, and an inverter unit.
[0009] Furthermore, the input matching network is used for input impedance matching and DC isolation, including capacitor C. I Inductor L I Resistance R I Resistance R g and capacitor C B The radio frequency signal input port is connected to capacitor C. I The first terminal, capacitor C I The second terminal is connected to inductor L I The first terminal, inductor L I The second terminal is connected to the common-source amplifier M. S The gate. Resistor R I The first terminal is connected to the common-source amplifier M. S The gate of the device is connected to the resistor R. g The first terminal and capacitor C B The first terminal, resistor R g The second terminal is connected to the power supply, capacitor C B The second terminal is grounded.
[0010] The common-source amplifier transistor M S Used to amplify radio frequency signals, M S The gate is connected to the inductor L I The second end, M S The source is grounded, M S The drain is connected to the input of the gain control unit and the inductor L. C The first end.
[0011] The phase shift compensation unit 1 includes an inductor L C Inductor L C The first end is connected to M S The drain of the inductor L C The second end is connected to the source of M0.
[0012] The common-gate amplifier includes a transistor M0, the gate of which is connected to a power supply, and the source of which is connected to an inductor L. C The drain of M0 is connected to node X2 at the second end.
[0013] The output matching network is used for output impedance matching and DC isolation, and includes capacitor C. O and inductor L O Among them, inductance L OThe first end is connected to node X2, and the inductor L O The second terminal is connected to capacitor C O The first terminal, capacitor C O The second end is connected to the RF output port.
[0014] The low-Q load network is used to extend bandwidth performance and reduce the gain variation within the operating bandwidth, including inductor L. P and resistance R Q Among them, inductance L P The first end is connected to node X2, and the inductor L P The second terminal is connected to resistor R Q The first terminal, resistor R Q The second end is connected to the power supply.
[0015] The gain control unit is used for digital control of gain adjustment and includes N sets of transistors and resistors R. QR Each group of transistors consists of a common-gate transistor M. N and its replica transistor M NR (such as M1 and M) 1R It consists of ) components. Among them, the common-gate transistor M N and M NR The source is connected to M S The drain of the common gate transistor M N The gate is connected to the inverter INV of phase shift compensation unit 2. N1 The output terminal of the common-gate transistor M N The drain is connected to node X2, replicating the common gate transistor M. NR The gate is connected to the INV of the inverter unit. N2 The output terminal replicates the common grid transistor M. NR The drain is connected to resistor R QR The first terminal; resistor R QR The second end is connected to the power supply.
[0016] The phase shift compensation unit 2 is used for bit-by-bit phase shift compensation to reduce the common gate transistor M under each control bit. N The equivalent parasitic capacitance from the drain output node to ground, including N inverters of a specific size, INV. N1 Each inverter INV N1 The input terminal is connected to the inverter unit INV. N2 The output of each inverter INV N1 The output terminal is connected to the M of the gain control unit. N The gate.
[0017] The inverter unit is used for signal switching control and includes N inverters INV. N2 Each inverter INV N2The input terminal is connected to the corresponding control signal V. CN Each inverter INV N2 The output terminal is connected to INV. N1 The input terminal.
[0018] Compared with the prior art, the beneficial effects achieved by the present invention are as follows:
[0019] Compared to existing gain control module circuits based on current-steering structures, this invention addresses the common-gate transistor M during gain adjustment. N The parasitic capacitance C corresponding to the on and off states. gd_on and C gd_off To address the phase shift caused by differences in phase characteristics, a phase compensation method is proposed. This method comprises two phase shift compensation units: Phase shift compensation unit 2 contains N inverters of specific sizes, utilizing their output capacitance to reduce the phase shift of the common gate transistor M in each RF signal path. N The equivalent capacitance to ground at output node X2; the phase shift compensation unit 1, i.e., the inductor L that introduces additional phase delay, is inserted between the source of the common-gate transistor M0 corresponding to the minimum gain and node X1. C It is mainly used to compensate for the common gate transistor M N (M1~M7) C corresponding to the on and off states gd_on and C gd_off The resulting phase difference. These two phase shift compensation units can effectively reduce the relative phase shift of the active attenuator across the broadband in different gain modes. Attached Figure Description
[0020] Figure 1 This is the circuit diagram of the active attenuator proposed in this invention.
[0021] Figure 2 is a schematic diagram of the phase shift compensation technology proposed in this invention, where (a) is the high gain state and (b) is the low gain state.
[0022] Figure 3 The relative phase shift of the maximum and minimum gain modes varies with L. C Changes in inductance value.
[0023] Figure 4 shows the gain characteristics of the proposed active attenuator, where (a) is the S21 characteristic curve under a gain control range of 15.5dB and a resolution of 0.5dB, and (b) is the RMS characteristic curve of gain error and phase shift.
[0024] The markings in the diagram are as follows: 1. Input matching network; 2. Common source amplifier; 3. Phase shift compensation unit 1; 4. Common grid amplifier; 5. Output matching network; 6. Low Q load network; 7. Gain control unit; 8. Phase shift compensation unit 2; 9. Inverter unit. Detailed Implementation
[0025] To better understand the purpose, structure, and function of this invention, a low-phase-shift broadband digitally controlled active attenuator proposed in this invention will be described in further detail below with reference to the accompanying drawings.
[0026] like Figure 1 As shown, the active attenuator variable gain amplifier proposed in this invention comprises nine parts: 1. Input matching network; 2. Common source amplifier; 3. Phase shift compensation unit 1; 4. Common grid amplifier; 5. Output matching network; 6. Low Q load network; 7. Gain control unit; 8. Phase shift compensation unit 2; 9. Inverter unit.
[0027] In the input matching network, resistor R I The first terminal is connected to the common-source amplifier M. S The gate of the device is connected to the resistor R. g The first terminal and capacitor C B The first terminal, resistor R g The second terminal is connected to the power supply, capacitor C B The second terminal is grounded. Through resistor R... I and capacitor C shorted to ground B It can reduce the M of the common source transistor S The apparent gate impedance makes matching to 50Ω across the bandwidth easier. Large resistance R g The second terminal is connected to the gate power supply, providing M with... S The gate is supplied with a voltage, which is 0.7V in this example. Capacitor C I The first end is connected to the RF signal input port, and capacitor C I The second terminal is connected to inductor L I The first terminal, inductor L I The second terminal is connected to the common-source amplifier M. S The gate, capacitor C I and inductor L I Together complete M S The gate-side apparent impedance is matched to 50Ω, where the capacitance C I It also has the function of blocking direct current.
[0028] The common-source amplifier transistor M S Used to amplify radio frequency signals, M S The gate is connected to the inductor L I The second end, M S The source is grounded, M S The drain is connected to the input of the gain control unit and the inductor L. C The first end. Due to the common gate transistor M N and the replica transistor M NROnly one path is enabled under different control signals, meaning it is injected into M under different gain modes. S The current is almost constant.
[0029] The phase shift compensation unit 1 includes an inductor L C Inductor L C The first end is connected to M S The drain of the inductor L C The second terminal is connected to the source of M0. Phase shift compensation unit 1 is used to compensate for the phase shift caused by changes in parasitic capacitance at node X2 under different gain modes; its working principle can be illustrated using Figure 2. During gain control, under different control signals, the 7 sets of transistors M... N and M NR The on and off states are different, and the C corresponding to on and off states is different. gd( That is, C gd_on and C gd_off The difference between the two is not negligible. The largest C gd The difference arises between the maximum gain state and the minimum gain state, with a capacitance difference of (127C). gd_on -127C gd_off At this point, the relative phase shift is also at its maximum. As shown in Figures 2(a) and 2(b), the main RF signal paths corresponding to the maximum and minimum gain states are different. By adding an inductor L to the main path corresponding to the minimum gain state... C This can introduce additional phase delay, thereby reducing the effect caused by C gd The relative phase shift caused by capacitance difference. Its compensation effect is... Figure 3 This is reflected in the example, where the inductor L... C When the value is 300pH, the absolute value of the relative phase shift between the maximum and minimum gain states in the 6–18 GHz range is reduced to 6.2°, when the inductor L C The relative phase shift will increase when the value is increased or decreased.
[0030] The common-gate amplifier includes a transistor M0, the gate of which is connected to a power supply, and the source of which is connected to an inductor L. C At the second end, the drain of M0 is connected to node X2. Since only M0 is turned on in the main path of the RF signal in minimum gain mode, the gate width of M0 also determines the minimum gain of the entire variable gain amplifier.
[0031] The low-Q load network includes an inductor L P and resistance R Q Among them, inductance L P The first end is connected to node X2, and the inductor L P The second terminal is connected to resistor R Q The first terminal, resistor RQ The second terminal is connected to the power supply. Inductor L P Using a peaked inductor can improve the circuit's bandwidth by 3dB, while the resistor R Q To further reduce the Q value, thereby reducing the gain variation within the operating bandwidth, according to electromagnetic field simulation results, the S21 fluctuation within 6–18 GHz can be less than 1.2 dB.
[0032] The output matching network includes capacitor C. O and inductor L O Among them, inductance L O The first end is connected to node X2, and the inductor L O The second terminal is connected to capacitor C O The first terminal, capacitor C O The second end is connected to the RF output port. The output matching network is used to achieve impedance matching from node X2 to 50Ω, while capacitor C... O It can block direct current.
[0033] The gain control unit is used for digital gain adjustment. In this example, it needs to achieve a gain control range of 0–15.5 dB and a gain resolution of 0.5 dB. Since the gain change is not linearly related to the gate width of the common-gate transistor, a 7-bit control signal is required, resulting in 128 gain states. From these, 32 desired gain states are selected to cover the 15.5 dB gain control range and 0.5 dB resolution; the remaining states are used as redundancy. The gain control unit includes 7 sets of transistors, 7 sets of inverters, and resistor R. QR Each group of transistors consists of a common-gate transistor M. N and its replica transistor M NR (such as M1 and M) 1R The transistors are composed of groups N and N, and the size of the Nth group is twice the size of the (N-1)th group. Among them, the common-gate transistor M... N and M NR The source is connected to M S The drain of the common gate transistor M N The gate is connected to INV N1 The output terminal of the common-gate transistor M N The drain is connected to node X2, replicating the common gate transistor M. NR The gate is connected to INV N2 The output terminal replicates the common grid transistor M. NR The drain is connected to resistor R QR The first terminal; resistor R QR The second end is connected to the power supply.
[0034] The phase shift compensation unit 2 is used for bit-by-bit phase shift compensation to reduce the common gate transistor M under each control bit. NThe equivalent parasitic capacitance from the drain output node to ground. Inverter INV N1 In the common gate transistor M N Gate-to-ground capacitance C INV And when the inverter outputs a high or low level, it corresponds to C respectively. INV_H and C INV_L First, by optimizing the inverter INV N1 The size ratio of PMOS to NMOS transistors makes C INV_H =C INV_L Then, according to the corresponding common gate transistor M N Gate drain capacitance C gd_on Select INV N1 The specific dimensions of the NMOS transistor in the C INV_H =C gd_on The phase shift compensation unit 2 includes N inverters INV of a specific size. N1 Each inverter INV N1 The input terminal is connected to the inverter unit INV. N2 The output of each inverter INV N1 The output terminal is connected to the M of the gain control unit. N The gate.
[0035] The inverter unit is used for signal switching control and includes N inverters INV. N2 Each inverter INV N2 The input terminal is connected to the corresponding control signal V. CN Each inverter INV N2 The output terminal is connected to INV. N1 The input terminal.
[0036] The active attenuator designed in this invention uses a 1.2V power supply voltage. Figures 4(a) and 4(b) show the gain control curve at 15.5dB and the corresponding gain error and phase shift RMS characteristic curves, respectively. As can be seen from Figure 4, with a gain control range of 15.5dB and a resolution of 0.5dB, the gain error RMS value within the 6–18GHz bandwidth is less than 0.2dB and the phase shift RMS value is less than 2.5°.
[0037] It is understood that the present invention has been described through some embodiments, and those skilled in the art will recognize that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of the invention. Furthermore, under the teachings of the present invention, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of the invention. Therefore, the present invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the protection scope of the present invention.
Claims
1. A low-phase-shift broadband digitally controlled active attenuator, comprising an input matching network, a common-source amplifier, a common-gate amplifier, an output matching network, a gain control unit, and an inverter unit; characterized in that, It also includes a phase shift compensation unit 1 and a phase shift compensation unit 2; the phase shift compensation unit 1 includes an inductor L C Inductor L C The first terminal is connected to the common-source amplifier transistor M. S The drain of the inductor L C The second terminal is connected to the source of the common-gate amplifier transistor M0; The phase shift compensation unit 2 includes N inverters INV of a specific size. N1 Each inverter INV N1 The input terminal is connected to the inverter unit INV. N2 The output of each inverter INV N1 The output terminal is connected to the M of the gain control unit. N The gate; The gain control unit is used for digital control of gain adjustment and includes N sets of transistors and resistors R. QR Each group of transistors consists of a common-gate transistor M. N and its replica transistor M NR Composition; common gate transistor M N and M NR The source is connected to M S The drain of the common gate transistor M N The gate is connected to the inverter INV of phase shift compensation unit 2. N1 The output terminal of the common-gate transistor M N The drain of M0 is connected to the drain of M0, replicating the common-gate transistor M. NR The gate is connected to the INV of the inverter unit. N2 The output terminal replicates the common grid transistor M. NR The drain is connected to resistor R QR The first terminal; resistor R QR The second end is connected to the power supply.
2. The low-phase-shift broadband digitally controlled active attenuator according to claim 1, characterized in that, The input matching network is used for input impedance matching and DC isolation, and includes capacitor C. I Inductor L I Resistance R I Resistance R g and capacitor C B The RF signal input port is connected to capacitor C. I The first terminal, capacitor C I The second terminal is connected to inductor L I The first terminal, inductor L I The second terminal is connected to the common-source amplifier M. S The gate; resistor R I The first terminal is connected to the common-source amplifier M. S The gate of the device is connected to the resistor R. g The first terminal and capacitor C B The first terminal, resistor R g The second terminal is connected to the gate power supply, and capacitor C B The second terminal is grounded.
3. A low-phase-shift broadband digitally controlled active attenuator according to claim 2, characterized in that, The common-source amplifier transistor M S Used to amplify radio frequency signals, M S The gate is connected to the inductor L I The second end, M S The source is grounded, M S The drain is connected to the input of the gain control unit and the inductor L. C The first end.
4. A low-phase-shift broadband digitally controlled active attenuator according to claim 1, characterized in that, The common-gate amplifier includes a transistor M0, the gate of which is connected to a power supply, and the source of which is connected to an inductor L. C The second end.
5. A low-phase-shift broadband digitally controlled active attenuator according to claim 1, characterized in that, The output matching network is used for output impedance matching and DC isolation, and includes capacitor C. O and inductor L O Inductor L O The first terminal is connected to the drain of M0, and the inductor L O The second terminal is connected to capacitor C O The first terminal, capacitor C O The second end is connected to the RF output port.
6. A low-phase-shift broadband digitally controlled active attenuator according to claim 1, characterized in that, It also includes low-Q load networks to extend bandwidth performance and reduce gain variation within the operating bandwidth, including inductors L. P and resistance R Q Inductor L P The first terminal is connected to the drain of M0, and the inductor L P The second terminal is connected to resistor R Q The first terminal, resistor R Q The second end is connected to the power supply.