High-resolution low-cross-talk phased-array scanning chip based on sparse matrix structure

Abstract

The application provides a high-resolution silicon light phased array scanning chip based on a sparse matrix antenna, which comprises a silicon-based substrate, a silicon dioxide buffer layer, a silicon dioxide cladding layer and a core layer based on a silicon waveguide; the core layer comprises an optical beam splitting unit, a thermo-optic phase shifter and an exit grating waveguide array; the optical beam splitting unit and the exit grating waveguide array are located in the silicon dioxide cladding layer and on the silicon dioxide buffer layer; the thermo-optic phase shifter is arranged on the silicon dioxide cladding layer; the optical beam splitting unit comprises a plurality of beam splitters based on the silicon waveguide; and the working bandwidth of the beam splitters is 1450-1750nm. By introducing a self-correlation factor to design a sparse grating structure, the application makes the phase of light between different waveguides mismatch, and modulates the array factor to suppress the grating lobe into the free space, so as to change the length of the waveguide grating, i.e. the sparsity, thereby providing a silicon light phased array scanning chip which is compact in structure, high in resolution and low in crosstalk.

Description

Technical Field

[0001] This invention relates to the field of chip technology, and in particular to a high-resolution, low-crosstalk phased array scanning chip based on a sparse matrix structure. Background Technology

[0002] Phased array systems are widely used in radar, remote sensing, and communications due to their fast beam scanning modes, flexible waveform synthesis, and higher transmit power. The phased array matrix is ​​a key subsystem that determines the performance of the entire phased array system, and its quality directly affects the system's resolution, operating range, size, and cost.

[0003] Optical phased array (OPA) technology offers a promising non-mechanical beam control at the chip level. Recent advances in silicon photonics offered by numerous foundry manufacturing services enable the large-scale, low-cost, high-volume production of integrated OPAs. Silicon photonics platforms provide robust optical confinement due to their high refractive index contrast and mature complementary metal-oxide-semiconductor (CMOS) compatible manufacturing processes, allowing for smaller element spacing while maintaining controllable optical losses.

[0004] Silicon optical waveguides possess advantages such as a large core-cladding refractive index difference, small device size, high integration density, and high performance stability. Compared to current silicon-on-insulator (SOI) technology, their fabrication cost is lower and the fabrication process is simpler. Due to the excellent properties of silicon materials, optical devices using silicon waveguides have been extensively studied both domestically and internationally, such as micro-ring resonators and grating couplers. [Prior technology: P. Ginel-Moreno et al., "Highly efficient optical antenna with small beamdivergence in silicon waveguides," Opt. Lett. 45, 5668-5671 (2020).]. Although sparse matrix high-resolution silicon optical phased array scanning chips have low transmission loss, simple structure, good optical performance, and are easy to integrate into photonic integrated circuits, there are currently no reports on sparse matrix high-resolution silicon optical phased array scanning chips. Therefore, how to use sparse matrix silicon beam deflection chips to achieve beam scanning has become a problem that needs to be solved in the existing technology.

[0005] Furthermore, to achieve high resolution (small divergence angle) in traditional phased array chips, a large antenna area is required, while large field-of-view scanning requires a small spacing between waveguide antenna arrays. This means that a large waveguide array is required to achieve a large antenna area, which in turn leads to high power consumption of the chip's phase shifter, making it difficult to achieve integrated design using CMOS control circuits. Summary of the Invention

[0006] The purpose of this invention is to propose a high-resolution, low-crosstalk phased array scanning chip that utilizes a relatively small waveguide array to achieve high-resolution, wide-field-of-view beam scanning deflection control.

[0007] To achieve the above objectives, this invention proposes a high-resolution, low-crosstalk phased array scanning chip based on a sparse matrix structure, comprising a substrate, a silicon dioxide buffer layer, a silicon dioxide cladding, and a core layer based on a silicon waveguide; the silicon dioxide buffer layer is disposed on the substrate, and the core layer is disposed on the silicon dioxide buffer layer and enclosed within the silicon dioxide cladding.

[0008] The core layer includes multiple optical beam splitting units, thermo-optical phase shifters, and outgoing waveguide arrays with the same structural parameters; the visible light beam passes sequentially through the optical beam splitting units, the thermo-optical phase shifters, and the outgoing waveguide array to achieve uniform beam splitting, phase modulation, and beam deflection.

[0009] Furthermore, the optical beam splitter and the outgoing waveguide array are located within the silicon dioxide cladding and on the silicon dioxide buffer layer; the thermo-optical phase shifter is placed on the silicon dioxide cladding.

[0010] The optical beam splitter unit includes multiple silicon waveguide-based beam splitters; the operating bandwidth of the beam splitter is 1450-1750nm; within the operating bandwidth, the non-uniformity between the output ports is less than 0.5dB.

[0011] Furthermore, both the input beam splitter and the output beam splitter are equipped with one input port and four output ports.

[0012] The beam splitter includes an input segment, a multimode interference coupling segment, and an output segment connected in sequence.

[0013] The input segment includes an input straight waveguide segment and an input tapered waveguide segment connected to the input straight waveguide segment; the large end of the input tapered waveguide segment is connected to the multimode interference coupling segment;

[0014] The output section includes four output tapered waveguide sections and output straight waveguide sections connected to the output tapered waveguide sections respectively; the large end of each output tapered waveguide section is connected to the multimode interference coupling section.

[0015] Furthermore, the width of the multimode interference coupling segment is 12µm; the length of the multimode interference coupling segment is 60µm; and the length of the multimode interference coupling segment has a tolerance range of -4% to +4%.

[0016] Furthermore, when the operating wavelength of the beam splitter is the center wavelength of 1550nm, within the manufacturing tolerance range, the total output power of the beam splitter is greater than 90%.

[0017] Furthermore, the length of the input tapered waveguide segment is 2 μm, the width of the large end of the input tapered waveguide segment is 2.2 μm, the width of the small end of the input tapered waveguide segment is 0.5 μm, the width of the input straight waveguide segment and the output straight waveguide segment are both 0.5 μm, and the length of both is 8 μm; the spacing between the output straight waveguide segments is 1.5 μm.

[0018] The large end width of the output tapered waveguide segment is 2.2 μm; the small end width of the output tapered waveguide segment is 0.5 μm; and the length of the output tapered waveguide segment is 2 μm.

[0019] Furthermore, the thermo-optical phase shifter is a metal heater; the thermo-optical phase shifter is placed on the output channel of the beam splitter unit.

[0020] Furthermore, the thickness of the silicon dioxide cladding is 1 μm.

[0021] Furthermore, the emitted wave array includes multiple waveguide gratings of different lengths arranged adjacent to each other. Each waveguide grating is composed of etched straight waveguides 400 μm long and 0.5 μm wide to maintain single-mode conditions. The gap between adjacent waveguide gratings is 1.5 μm.

[0022] Furthermore, the waveguide grating is a silicon periodic grating, and the period of two adjacent silicon periodic gratings is 0.3-0.4 μm, the duty cycle is 0.5 to 0.8, the width is 0.12 μm, and the number of gratings is 1500 to 2000; the spacing between the silicon periodic gratings is 0.5 μm; and the arrangement of two adjacent silicon periodic gratings satisfies the Costas matrix.

[0023] Compared with the prior art, the advantages of the present invention are:

[0024] 1) This invention is based on silicon, a novel semiconductor material. It is small in size, compact in structure, simple to process, has a large manufacturing tolerance, and a high product yield.

[0025] 2) The waveguide array of the present invention can reduce crosstalk between waveguides in the 1550nm optical band, achieve high transmittance and low insertion loss, and has important practical value in the field of optical phased arrays; and the present invention still maintains low insertion loss and crosstalk in the wavelength range of 1550nm, with a bandwidth of 80nm.

[0026] 3) The sparse waveguide array structure of this invention enables large-angle scanning in beam scanning, with a sparse distribution rate of less than 0.5 and a gain roughly equivalent to a full array. Its key innovation lies in using a sparse grating structure in the middle to modulate the phase mismatch of light between different waveguides, thereby suppressing grating lobes from entering free space and increasing the unit spacing, i.e., achieving sparseness. This results in a compact, high-resolution, and low-crosstalk silicon photonic phased array scanning chip with significant application prospects in high-density integrated waveguide components, optical phased arrays, and solid-state lidar with large beam scanning angles. The manufacturing equipment of this invention is compatible with commercial CMOS manufacturing equipment, enabling mass production at low cost. Attached Figure Description

[0027] Figure 1 This is a structural diagram of a high-resolution silicon photonic phased array scanning chip with a sparse matrix according to an embodiment of the present invention;

[0028] Figure 2 for Figure 1 Structural diagram of the beam splitter;

[0029] Figure 3 for Figure 2 Cross-sectional view of a high-resolution silicon photonic phased array scanning chip with a sparse matrix at the beam splitter;

[0030] Figure 4 This is a field distribution diagram of light transmission in a beam splitter when light with a center wavelength of 1550nm is incident, simulated by the finite-difference time-domain method according to the present invention.

[0031] Figure 5 This invention uses the finite-difference time-domain method and the simulation software Lumerical FDTD Solutions to simulate the normalized energy output diagram of each output port when light with a center wavelength of 1450-1750nm is incident.

[0032] Figure 6 This invention uses the finite-difference time-domain method and the simulation software Lumerical FDTD Solutions to simulate the far-field scanning angle of a high-resolution silicon photonic phased array scanning chip with a sparse matrix when light with a center wavelength of 1450-1750nm is incident.

[0033] Figure 7 This is a flowchart illustrating the fabrication process of a high-resolution silicon photonic phased array scanning chip with a sparse matrix, according to an embodiment of the present invention. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions of the present invention will be further described below.

[0035] like Figure 1, 3 As shown, a high-resolution silicon optical phased array scanning chip based on a sparse matrix antenna includes a silicon substrate 5, a silicon dioxide buffer layer 6, a silicon dioxide cladding layer 8, and a silicon waveguide core layer 7. The silicon dioxide buffer layer 6 is disposed on the silicon substrate 5. The silicon dioxide cladding layer 8 is attached to the silicon dioxide buffer layer 6. The core layer 7 includes an optical beam splitter unit, a thermo-optical phase shifter 3, and an outgoing waveguide array 4. A visible light beam passes sequentially through the optical beam splitter unit, the thermo-optical phase shifter 3, and the outgoing waveguide array 4 to achieve uniform beam splitting, phase modulation, and beam deflection. The optical beam splitter unit and the outgoing waveguide array 4 are located within the silicon dioxide cladding layer 8 and on the silicon dioxide buffer layer 7. The thermo-optical phase shifter 3 is placed on the silicon dioxide cladding layer 8. The optical beam splitter unit includes multiple beam splitters based on silicon nitride waveguides. The operating bandwidth of the beam splitter is 1450-1750 nm.

[0036] In this embodiment, the input beam splitter and the output beam splitter are connected in series; each input beam splitter has one input port and four output ports. This ensures that each beam travels along the same propagation path when it reaches the output waveguide array 4, thus ensuring that they are in phase.

[0037] like Figure 2 As shown, the beam splitter includes an input segment, a multimode interference coupling segment, and an output segment connected in sequence. The input segment includes an input straight waveguide segment and an input tapered waveguide segment connected to the input straight waveguide segment. The large end of the input tapered waveguide segment is connected to the multimode interference coupling segment. The output segment includes four output tapered waveguide segments and output straight waveguide segments connected to the output tapered waveguide segments respectively. The large end of the output tapered waveguide segments is connected to the multimode interference coupling segment. Specifically, the width e of the multimode interference coupling segment is 12µm; the length d of the multimode interference coupling segment is 60µm; the manufacturing tolerance range of the length d of the multimode interference coupling segment is -4% to +4%; the length b of the input tapered waveguide segment is 2µm; the width c of the large end of the input tapered waveguide segment is 2.2µm; the width of the small end of the input tapered waveguide segment is 0.5µm; the width a of the input straight waveguide segment and the width of the output straight waveguide segment are both 0.5µm, and the length is 8µm; the spacing between the output straight waveguide segments is 1.5µm; the width f of the large end of the output tapered waveguide segment is 2.2µm; the width f of the small end of the output tapered waveguide segment is 0.5µm; and the length g of the output tapered waveguide segment is 8µm.

[0038] When the beam splitter's operating wavelength is set to a center wavelength of 1550 nm, and based on the optimal length of the multimode interference coupling section of 60 μm, within the length manufacturing tolerance range (i.e., changing the length d of the multimode interference coupling section), the total output power of the beam splitter is consistently greater than 90% for different lengths. When the optimal coupling width of the coupling section is 12 μm, without changing this specification of the beam splitter, by setting the beam splitter's operating bandwidth (i.e., inputting visible light of different wavelengths), the non-uniformity between the output ports is less than 0.5 dB for different operating wavelengths. The total output power of the beam splitter is the ratio of the total output energy of the four output ports to the input energy of one input port.

[0039] In this embodiment, the input beamsplitter 1 and the output beamsplitter 2 have identical structures. During the design process, the optimal coupling length for waveguides of different widths and the optimized structure of the output waveguide were calculated under 1550nm wavelength incident light. Specifically, the parameter design process for the input beamsplitter 1 and the output beamsplitter 2 is as follows: To optimize the optical coupling between the input and output beams, improve the efficiency of the beamsplitter, and enhance the performance of the multi-stage beamsplitter unit (i.e., one input beamsplitter 1 and four output beamsplitters 2) in the working wavelength band, a waveguide model based on a tapered structure was introduced in the design of the multi-stage beamsplitter unit, overcoming the low-loss design problem encountered in commonly used methods. The specific steps are as follows:

[0040] First, the length of the coupling region is calculated from the selected incident wavelength λ and the waveguide width of the coupling region, and then from the effective width, to obtain the preliminary device parameters for uniform beam splitting in the visible light band. Then, the design parameters of the silicon optical beam splitter in the 1450-1750nm band are optimized by calculating the finite-difference time-domain method of electromagnetics, so that it can meet the requirement of uniformly splitting TE polarized light with a center wavelength of 1550nm into 4 outputs with consistent phase and intensity.

[0041] After the above design optimization, the input beam splitter 1 and output beam splitter 2 will have a transmission loss of less than 0.1dB at the working center wavelength of 1550nm, and the non-uniformity between each output port will be less than 0.1dB, which can achieve a uniform output ratio of 0.1dB for TE polarized light.

[0042] In this embodiment, the thermo-optical phase shifter 3 is a heater; it is attached to the silicon dioxide cladding 8 and positioned at the output end of the beam splitter unit. The phase shifter, employing a thermo-optical modulator structure, achieves efficient and low-loss phase control. The thermo-optical phase shifter 3 heats the core layer 7, and the refractive index of the silicon nitride waveguide-based core layer 7 is temperature-dependent, thereby controlling the phase of the light passing through the waveguide. If the thermo-optical phase shifter 3 is closer to the output beam splitter 2, the modulation efficiency is higher, but the thermo-optical phase shifter 3 absorbs the light transmitted in the waveguide, resulting in greater light transmission loss; however, if the thermo-optical phase shifter 3 is farther from the output beam splitter 2, the light transmission loss is smaller, but the modulation efficiency is also lower. Ultimately, after weighing the effects of different electrode positions and morphologies on modulation efficiency and light transmission loss, a silicon dioxide cladding 8 thickness of 1 μm was selected. To achieve efficient and low-loss phase control, the heater part uses a high-resistivity Ti / Pt metal material, with a heater thickness of 100 nm and a heater area of ​​250 × 5 μm. 2 The electrode part connecting the heater to the external current source is made of Ti / Au metal material with low resistivity, which makes the heater more efficient and less lossy.

[0043] For the design of sparse periodic gratings, waveguide coupling is suppressed by etching grating structures with the same period and duty cycle on sparse straight waveguides. A periodic grating structure is selected with a period of 0.3-0.4 μm, a duty cycle of 0.5 to 0.8, a width of 0.12 μm, and a number of gratings of 1500 to 2000. The gap between adjacent waveguide grating structures is 0.5 μm.

[0044] For the comparison of performance parameters, ηincident is the transmittance of light incident from the incident port, ηcoupling is the transmittance of the output waveguide coupled to the input waveguide, and ηthrough is the transmittance of the output waveguide port through which the input waveguide passes. In the optimized structure, ηthrough can reach 86.7%, and ηcoupling is as low as 0.8%. Relevant indicators are: insertion loss (IL) of 10lg((ηthrough + ηcoupling) / ηincident), and peak crosstalk of 10lg(ηthrough / ηcoupling).

[0045] For the design of grating arrangements, according to the Huygens-Fresnel principle, each point on the wavefront of a propagating wave can be considered a point source, and the wavefront at any subsequent point can be found by adding the contributions from each individual point source. An ideal diffraction grating can be considered as a set of infinitely long and infinitely narrow slits spaced equally, with a spacing of d, called the grating constant. When a plane wave of wavelength λ is incident perpendicularly on the grating, each point on the slit acts as a secondary wave source; light rays emitted from these secondary sources propagate in all directions (i.e., spherical waves). Since the slits are infinitely long, we can consider only the case on the plane perpendicular to the slits, simplifying the slits to a row of points on that plane. The light field along a specific direction on that plane is then a coherent superposition of the light rays emitted from each slit. During interference, since the phases of the light rays emitted from each slit are different at the interference points, they will partially or completely cancel each other out. First, we need to understand the theories of single-slit diffraction and multi-slit coherent constructive interference in gratings. When the optical path difference between light rays emitted from two adjacent slits reaching the interference point is an integer multiple of the wavelength of the light, the two light rays are in phase, resulting in enhanced interference. Then, based on this theory, we can derive the general relationship between the far-field (FFP) intensity distribution and the near-field (NFP) intensity distribution of an N-channel antenna OPA. Since the far-field intensity distribution of the antenna is obtained from the near-field through Fourier transform, and the far-field light intensity is the square of the complex amplitude distribution of the far-field, we can obtain the relationship between the near-field intensity distribution and the light intensity by substituting the values ​​into the transform formula. Finally, we can obtain the influence of the displacement vector on the light intensity by applying the transformed light intensity formula.

[0046] The near-field distribution of the antenna is as follows:

[0047]

[0048] The far-field complex amplitude distribution of the antenna is as follows:

[0049] F(ξ)=∫∫E(r)exp[ik0(r.ξ)]d 2 r

[0050] The light intensity distribution in the far field is then:

[0051] I(ξ)=|F(ξ)| 2 =∫∫∫E(r)E*(r)exp[ik0(rr′)·ξ]d 2 rd 2 r′=∫∫R EE (Δ)exp[ik0(Δ·ξ)]d 2 Δ

[0052] R EE (Δ) represents the autocorrelation function of the near-field distribution in the spatial domain. It can be expressed as:

[0053] R EE(Δ)=R uu (Δ)*R AA (Δ)

[0054] Introducing the autocorrelation coefficient of the antenna arrangement:

[0055]

[0056] Where Δ = rr′, Δ = r n -r m δ is the dirac delta function, which represents the autocorrelation function derived from the electric field distribution of each antenna and the array layout, respectively. Since the far-field light intensity distribution can be obtained by convolving the autocorrelation function of each antenna array layout and the electric field distribution through a Fourier transform, the arrangement of the antenna matrix directly affects the far-field light intensity distribution. By adjusting the arrangement of the Costas matrix, a finer sampling resolution can be achieved while maintaining coherent and constructive far-field light.

[0057] The final designed high-resolution silicon photonic phased array scanning chip with sparse matrix can realize the input of TE polarized light in the 1450-1750nm band. The waveguide coupling phenomenon is significantly improved, the insertion loss is low, the crosstalk is reduced, and large-angle scanning can be achieved in terms of beam deflection. It can be applied in optical phased arrays and scanning.

[0058] (II) Component Fabrication

[0059] First, a silicon dioxide film is deposited on a silicon-on-insulator (SOI) substrate as a mask for etching the waveguide. Then, waveguides are fabricated using electron beam lithography and plasma etching, with real-time monitoring of the etching depth to obtain a silicon waveguide with a flat surface. Next, the sample undergoes silicon dioxide etching, with ammonium fluoride added to the HF etching solution as a buffer to form buffered hydrogen fluoride fluoride (BHF), which is used to remove silicon dioxide from the silicon waveguide surface. After wet chemical cleaning (RCA) to remove impurities from the silicon surface, a silicon dioxide cladding layer is deposited on the silicon waveguide using plasma-enhanced chemical vapor deposition (PECVD), and finally, the sample is diced.

[0060] The above description is merely a preferred embodiment of the present invention and does not limit the scope of the invention in any way. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in this invention without departing from the scope of the invention are considered to have remained within the protection scope of the invention. This invention proposes a nanowire-assisted arrayed waveguide grating that achieves high uniformity with low insertion loss. Furthermore, the overall size of the waveguide grating remains unchanged when the nanowires are introduced.

[0061] The high-resolution silicon photonic phased array scanning chip for sparse matrix antennas proposed in this invention is simple to design and easy to manufacture, has no additional insertion loss, and can be mass-produced at low cost. It is expected to be widely used in highly integrated radar systems.

[0062] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.

Claims

1. A high-resolution, low-crosstalk phased array scanning chip based on a sparse matrix structure, comprising a substrate, a silicon dioxide buffer layer, a silicon dioxide cladding, and a core layer based on a silicon waveguide; wherein the silicon dioxide buffer layer is disposed on the substrate, and the core layer is disposed on the silicon dioxide buffer layer and enclosed within the silicon dioxide cladding; Its features are, The core layer includes multiple optical beam splitting units, thermo-optical phase shifters, and outgoing waveguide arrays with the same structural parameters; visible light beams pass sequentially through the optical beam splitting units, the thermo-optical phase shifters, and the outgoing waveguide arrays to achieve uniform beam splitting, phase modulation, and beam deflection. The optical beam splitter and the outgoing waveguide array are located within the silicon dioxide cladding and on the silicon dioxide buffer layer; the thermo-optical phase shifter is placed on the silicon dioxide cladding. The optical beam splitter unit includes multiple silicon waveguide-based beam splitters; the operating bandwidth of the beam splitter is 1450-1750nm; the beam splitter includes an input beam splitter and an output beam splitter with identical structures, and both the input beam splitter and the output beam splitter are provided with one input port and four output ports; within the operating bandwidth, the non-uniformity between the output ports under different operating wavelengths is less than 0.5 dB. The outgoing waveguide array includes multiple waveguide gratings of different lengths arranged adjacent to each other. Each waveguide grating is composed of etched straight waveguides 400 μm long and 0.5 μm wide to maintain single-mode conditions. The gap between adjacent waveguide gratings is 1.5 μm. The waveguide grating is a silicon periodic grating. The period of two adjacent silicon periodic gratings is 0.3-0.4 μm, the duty cycle is 0.5 to 0.8, the width is 0.12 μm, and the number of gratings is 1500 to 2000. The spacing between the silicon periodic gratings is 0.5 μm.

2. The high-resolution, low-crosstalk phased array scanning chip based on a sparse matrix structure according to claim 1, characterized in that, Both the input beam splitter and the output beam splitter include an input segment, a multimode interference coupling segment, and an output segment connected in sequence. The input segment includes an input straight waveguide segment and an input tapered waveguide segment connected to the input straight waveguide segment; the large end of the input tapered waveguide segment is connected to the multimode interference coupling segment; The output section includes four output tapered waveguide sections and output straight waveguide sections connected to the output tapered waveguide sections respectively; the large end of each output tapered waveguide section is connected to the multimode interference coupling section.

3. The high-resolution, low-crosstalk phased array scanning chip based on a sparse matrix structure according to claim 2, characterized in that, The width of the multimode interference coupling segment is 12 μm; the length of the multimode interference coupling segment is 60 μm; the length of the multimode interference coupling segment has a tolerance range of -4% to +4%.

4. The high-resolution, low-crosstalk phased array scanning chip based on a sparse matrix structure according to claim 3, characterized in that, When the operating wavelength of the beam splitter is the center wavelength of 1550 nm, the total output power of the beam splitter is greater than 90% within the manufacturing tolerance range.

5. The high-resolution, low-crosstalk phased array scanning chip based on a sparse matrix structure according to claim 2, characterized in that, The length of the input tapered waveguide segment is 2 μm, and the width of the large end of the input tapered waveguide segment is 2.2 μm; the width of the small end of the input tapered waveguide segment is 0.5 μm; the width of both the input straight waveguide segment and the output straight waveguide segment is 0.5 μm, and the length of both is 8 μm; the spacing between the output straight waveguide segments is 1.5 μm. The output tapered waveguide segment has a large end width of 2.2 μm, a small end width of 0.5 μm, and a length of 2 μm.

6. The high-resolution, low-crosstalk phased array scanning chip based on a sparse matrix structure according to claim 1, characterized in that, The thermo-optical phase shifter is a metal heater; the thermo-optical phase shifter is placed on the output channel of the beam splitter unit.

7. The high-resolution, low-crosstalk phased array scanning chip based on a sparse matrix structure according to claim 6, characterized in that, The thickness of the silica cladding is 1 μm.

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