Semiconductor processing apparatus

Abstract

The application discloses a semiconductor processing equipment, which comprises at least two semiconductor processing modules arranged adjacently, an equipment front end assembly arranged close to a first side of the semiconductor processing modules, a fluid carrying module arranged below the semiconductor processing modules and used for carrying various unused fluids and / or used fluids, and at least two valve modules arranged close to a second side of the semiconductor processing modules opposite to the first side, with one valve module corresponding to each semiconductor processing module. The semiconductor processing equipment in the application is composed of several modules, has the characteristics of simple structure, convenient and flexible assembly, compact structure and the like, and can improve the processing efficiency of wafers.

Description

[Technical Field]

[0001] This invention relates to the field of semiconductor processing, and more particularly to a semiconductor processing apparatus for processing semiconductor wafers. [Background Technology]

[0002] In the semiconductor manufacturing process, semiconductor wafers undergo numerous steps to meet the industry's high standards. In advanced semiconductor wafer manufacturing processes, the wafer edges must be uniform, flat, undamaged, and smooth. The stringent requirements for uniform and precise etching of the wafer edge surfaces present a significant challenge to semiconductor wafer fabrication processes.

[0003] Figure 1a This is a top view of the structure of a semiconductor wafer 100. The semiconductor wafer 100 includes a substrate layer 101 and a thin film layer 102 deposited on the substrate layer 101. Figure 1b for Figure 1a A cross-sectional view of AA. Measurement points 1-8 are the locations for measuring relevant data of the semiconductor wafer during operation. For example... Figure 1b As shown, the etching width is the difference between the radii of the substrate layer 101 and the thin film layer 102. The etching width should be substantially the same at each measurement point 1-8. The smaller the difference between the maximum and minimum etching widths, the higher the uniformity. For example, when the edge width is designed to be 0.7mm, many high-end process technologies require that the difference between the maximum and minimum etching widths not exceed 0.1mm; otherwise, it will cause uneven etching widths. If the difference between the maximum and minimum etching widths exceeds 0.1mm, it will directly affect the effect of subsequent processing operations, ultimately leading to poor integrated circuit chip performance and affecting chip manufacturing yield.

[0004] Wet etching processes for semiconductor wafers offer advantages such as simple principles, flexible processes, and low cost. Several traditional wet etching methods exist for semiconductor wafer edges. One method involves polishing the wafer edge, rotating the wafer, and using a combination of physical friction and chemical etching to remove a thin film layer from the substrate. However, polishing is primarily used in semiconductor wafer manufacturing where precision requirements are lower, as it can easily damage both the retained film layer and the substrate. Edge damage can lead to misalignment and slippage of the wafer edge during thermal processing, ultimately resulting in wafer scrap. Another commonly used method is vacuum adsorption of the semiconductor wafer. Vacuum adsorption uses a vacuum suction head to hold the wafer, protecting the portion of the film to be retained within the head while exposing the portion to be removed. The vacuum suction head and wafer are then immersed together in a chemical etching solution to etch away the exposed film. However, vacuum adsorption results in uneven film removal and inconsistent etching width. Another common method is the film coating method, which uses a pure, corrosion-resistant plastic film such as PTFE or PE to protect the portion of the wafer that needs to be preserved. The entire wafer is then exposed to a chemical etching gas environment or immersed in a chemical etching solution to etch the exposed portion. The film coating method often suffers from uneven etching width because the center of the pre-cut film may not align with the center of the wafer substrate. Furthermore, the process involves many steps and requires multiple pieces of equipment, including equipment for film coating, wet etching, cleaning, and film removal. A newer method is the spray etching method, which uses a specially designed nozzle to precisely spray the etching fluid onto the rotating wafer edge, achieving precise, uniform, flat, and non-destructive etching. While the spray etching method achieves high etching efficiency, it demands extremely high precision in equipment design and component manufacturing, resulting in high equipment costs and stringent process conditions. Therefore, it is necessary to develop a new type of semiconductor wafer edge processing device that can solve the above problems.

[0005] Furthermore, Chinese patent application number 201610446274.2, filed on June 21, 2016, discloses a modular semiconductor processing device. However, this semiconductor processing device can only process one wafer at a time, resulting in low processing capacity and efficiency. For applications requiring the processing of a large number of wafers, the processing efficiency of this modular semiconductor processing device is clearly insufficient.

[0006] Therefore, it is necessary to propose a solution to address the above problems. [Summary of the Invention]

[0007] The technical problem to be solved by the present invention is to provide a semiconductor processing device, which has the characteristics of simple structure, convenient and flexible assembly, and compact structure, and can also improve the processing efficiency of wafers.

[0008] To address the aforementioned problems, according to one aspect of the present invention, a semiconductor processing apparatus is provided, comprising: at least two semiconductor processing modules arranged adjacent to each other, each semiconductor processing module having a semiconductor processing device disposed therein, the semiconductor processing device comprising: a first chamber portion, a second chamber portion, and a drive portion for driving the second chamber portion to move relative to the first chamber portion between an open position and a closed position, wherein when the second chamber portion is in the closed position relative to the first chamber portion, a microchamber is formed between the first chamber portion and the second chamber portion, a semiconductor wafer can be accommodated in the microchamber, and when the second chamber portion is in the open position relative to the first chamber portion, the semiconductor wafer can be removed or inserted, one or more through holes communicating with the microchamber are provided on the first chamber portion and / or the second chamber portion, the through holes being used to introduce or extract fluid into the microchamber; a first chamber portion adjacent to the semiconductor processing module is provided with a second chamber portion for moving relative to the first chamber portion between an open position and a third ... A front-end assembly of the device, located on one side, includes a wafer carrier and a wafer transporter. The wafer transporter uses a robotic arm to place a semiconductor wafer from the wafer carrier between the first and second chambers of the semiconductor processing device, removes the semiconductor wafer from between the first and second chambers, and transports it to the wafer carrier. A fluid carrier module, located below the semiconductor processing module, is used to carry various unused and / or used fluids. At least two valve modules are located on a second side adjacent to the semiconductor processing module and opposite to the first side. Each valve module includes multiple controlled valves. Fluid supplied by the fluid carrier module is controlled to be transferred through pipelines and through-holes to the micro-chamber via the controlled valves. Fluid within the micro-chamber is also controlled to be transferred through pipelines and through-holes to the fluid carrier module via the controlled valves.

[0009] Compared with the prior art, the semiconductor processing equipment in this invention consists of several modules, which are easy and flexible to assemble, have a compact structure, and can improve the processing efficiency of wafers.

[0010] Other objects, features, and advantages of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. [Attached Image Description]

[0011] The invention will be more readily understood in conjunction with the accompanying drawings and the following detailed description, wherein the same reference numerals correspond to the same structural components, wherein:

[0012] Figure 1a This is a schematic diagram of the structure of a semiconductor wafer;

[0013] Figure 1b for Figure 1a AA section view;

[0014] Figure 2 This is a perspective view of the semiconductor processing device in the first embodiment of the present invention.

[0015] Figure 3 for Figure 2 A schematic diagram of the principle of semiconductor processing equipment in China;

[0016] Figure 4 This is a three-dimensional structural diagram of the fan filter module in this invention;

[0017] Figure 5 This is a three-dimensional structural diagram of the semiconductor processing module in this invention;

[0018] Figure 6 This is a three-dimensional structural diagram of the fluid-carrying module in this invention;

[0019] Figure 7 This is a three-dimensional structural diagram of a combined module comprising multiple modules in this invention;

[0020] Figure 8 This is a three-dimensional structural diagram of the two control modules in this invention;

[0021] Figure 9 This is a three-dimensional structural diagram of the factory affairs docking module in this invention;

[0022] Figure 10 This is a three-dimensional structural diagram of another control module in this invention;

[0023] Figure 11 This is a perspective view of the semiconductor processing device in the second embodiment of the present invention;

[0024] Figure 12 This is a cross-sectional schematic diagram of the semiconductor processing apparatus in one embodiment of the present invention;

[0025] Figure 13 for Figure 12 An enlarged diagram of circle A in the diagram;

[0026] Figure 14 for Figure 12 A bottom view of the first chamber portion of the semiconductor processing device;

[0027] Figure 15 for Figure 12 A top view of the second chamber portion of the semiconductor processing device;

[0028] Figure 16 This is a cross-sectional schematic diagram of another embodiment of the semiconductor processing apparatus of the present invention;

[0029] Figure 17 for Figure 16An enlarged diagram of circle B in the diagram;

[0030] Figure 18 for Figure 16 A bottom view of the first chamber portion of the semiconductor processing device;

[0031] Figure 19 for Figure 16 A top view of the second chamber of the semiconductor processing device.

Detailed Implementation Methods

[0032] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0033] The term "an embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic associated with that embodiment that is included in at least one implementation of the invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it necessarily a single or alternative embodiment that is mutually exclusive with other embodiments. "A plurality of" or "several" in this invention means two or more. "And / or" in this invention means "and" or "or".

[0034] First embodiment of semiconductor processing device

[0035] Figure 2 This is a three-dimensional structural diagram of the semiconductor processing device in the first embodiment of the present invention. Figure 3 This is a schematic block diagram of the semiconductor processing device in this invention.

[0036] like Figure 2 As shown, the semiconductor processing device includes: a plurality of semiconductor processing modules 40 placed adjacent to each other, a device front-end assembly 10 disposed on a first side adjacent to the semiconductor processing module 40, a fluid carrying module 70 located below the semiconductor processing module 40, a plurality of valve modules 80 disposed on a second side adjacent to the semiconductor processing module 40 opposite to the first side, a control module 90 disposed above the valve modules 80, and a fan filter module 30 disposed above the semiconductor processing module 40.

[0037] Figure 5 This is a three-dimensional structural diagram of the semiconductor processing module 40 in this invention. Figure 5The diagram shows two semiconductor processing modules 40 arranged horizontally side-by-side. Each module includes a support frame and a semiconductor processing device 41 disposed within the support frame. The outer sides of the support frame can be shielded by baffles for a more aesthetically pleasing appearance and to isolate it from the external environment. The support frames of the two horizontally adjacent semiconductor processing modules 40 are connected as a single unit. Figure 2 As shown, there are four semiconductor processing modules 40 in total, with two horizontally adjacent semiconductor processing modules stacked vertically on top of two other horizontally adjacent semiconductor processing modules. In other embodiments, more semiconductor processing modules 40 can be provided, such as six or eight, so that the number of horizontally arranged semiconductor processing modules 40 can become three or four, etc.

[0038] Each semiconductor processing device 41 includes a first chamber portion, a second chamber portion, and a drive unit that moves the second chamber portion relative to the first chamber portion between an open position and a closed position. When the second chamber portion is in the closed position relative to the first chamber portion, a microchamber is formed between the first and second chamber portions, and a semiconductor wafer can be accommodated within the microchamber. When the second chamber portion is in the open position relative to the first chamber portion, the semiconductor wafer can be removed or inserted. One or more through-holes communicating with the microchamber are provided on the first and / or second chamber portions, and the through-holes are used to introduce or extract fluid into the microchamber. The drive unit can be an air bladder, and the opening and closing of the upper and lower chamber portions is achieved by inflating and deflating the air bladder. The detailed structure of each semiconductor processing device will be described in detail below and will not be detailed here.

[0039] like Figure 2 As shown, the front-end assembly 10 includes a wafer carrier and a wafer transporter. The wafer transporter uses a robotic arm to place semiconductor wafers from the wafer carrier between the first and second chambers of the semiconductor processing unit, removes the semiconductor wafers from between the first and second chambers, and transports them back to the wafer carrier. The front-end assembly 10 can simultaneously transfer semiconductor wafers to four semiconductor processing units 41, which greatly improves the processing efficiency and wafer throughput of the semiconductor processing equipment. The front-end assembly 10 includes a closed housing, within which the wafer carrier and the wafer transporter are housed, providing a relatively enclosed space.

[0040] The fluid carrying module 70 is used to carry various unused fluids and / or used fluids. Figure 6This is a three-dimensional structural diagram of the fluid carrier module 70 of the present invention. The fluid carrier module 70 includes a support frame and a plurality of containers 71 placed within the support frame. The containers 71 contain various unused fluids required for processing the semiconductor wafer and / or various used fluids that have been used to process the semiconductor wafer. The fluid carrier module 70 also includes a panel (not shown) mounted on the support frame. Figure 6 The diagram illustrates two interconnected fluid-carrying modules 70. The container 71 can be a storage bottle, which can store unused solutions, ultrapure water, chemical liquids, etc., as well as recycled waste liquids, and various gases. The storage bottle can include chemical liquid bottles, air bottles, vacuum bottles, and waste liquid bottles. A vacuum pump 72 can also be housed within the fluid-carrying module 70, providing driving power.

[0041] Figure 7 This is a three-dimensional structural diagram of a combined module comprising multiple modules in this invention. Figure 7 Two combined modules are shown, each including two vertically stacked valve modules 80 located on top. Each semiconductor processing module 40 corresponds to one valve module 80, and each valve module 80 includes multiple controlled valves 81, including rotary valves and pneumatic valves. Fluid supplied by the fluid carrying module 70 is controlled and transferred through pipelines 82 and through-holes to the microchamber via the controlled valves 81. Fluid within the microchamber is also controlled and transferred through pipelines 82 and through-holes to the container 71 of the fluid carrying module 70 via the controlled valves 81. Figure 7 As shown, each combined module also includes a fluid-carrying module 70 located in the lower layer.

[0042] Figure 4 This is a three-dimensional structural diagram of the fan filter module in this invention. Figure 4 As shown, the fan filter module 30 includes a support frame and a fan filter module assembly 31 placed in the support frame, the fan filter module assembly 31 providing clean air to the semiconductor processing module 40. Figure 4 Only one fan filter module assembly 31 is shown schematically; another fan filter module assembly 31 is not shown.

[0043] like Figure 2 As shown, in this embodiment, there are three control modules 90. Figure 8 This is a three-dimensional structural diagram of the two control modules 90a and 90b in this invention; Figure 10 This is a three-dimensional structural diagram of another control module 90c in this invention. Each control module includes a support frame and a control unit 91, such as... Figure 3As shown, the control unit 91 is electrically connected to the semiconductor processing device 41 and the controlled valve 81 via cable 92. The control unit 91 controls the opening and closing of the semiconductor processing device 41 by controlling the drive unit, and controls the controlled valve 81 in the valve module 80. The control unit 91 is also electrically connected to the vacuum pump via cable 92. The control unit 91 controls the vacuum pump 72 in the fluid carrying module 70. The vacuum pump 72 provides negative pressure to drive the fluid in the container 71 of the fluid carrying module into the microchamber, and / or drives the fluid in the microchamber to flow out and into the container 71 of the fluid carrying module 70. In other embodiments, the control module 90 can be one or two, and the number of control modules used can be determined according to the required volume of the control unit 91. The control units 91 can be electrically connected to each other or operate independently.

[0044] Alternatively, the container can be pressurized to drive the fluid in the container to flow out, through controlled valves and pipelines, and into the semiconductor processing device 41. The fluid flowing out of the semiconductor processing device 41 can also be driven out by pressurized gas, such as nitrogen, and into the container.

[0045] like Figure 2 As shown, the semiconductor processing equipment also includes a human-machine interface console 20 mounted on the front-end component 10. The human-machine interface console 20 can be connected to the control unit 91, or to the wafer carrier and wafer transport device in the front-end component 10, thereby enabling the configuration and control of the wafer carrier, the wafer transport device, and the control unit 91. Human-machine interaction with the semiconductor processing equipment can be achieved through the human-machine interface console 20.

[0046] like Figure 2 As shown, the semiconductor processing equipment also includes a plant docking module 95 disposed on the second side of the semiconductor processing module 40. Figure 9 This is a three-dimensional structural diagram of the plant connection module in this invention. The plant connection module 95 is placed between vertically stacked valve modules 80 arranged horizontally at intervals. Various valves, filters, and other components related to plant connection can be installed in the plant connection module 95. Gas-related components are typically placed in the upper two layers of the plant connection module 95, while liquid-related components are typically placed in the bottom layer. Various chemical materials supplied by the plant will be connected to the equipment through this module.

[0047] like Figure 2As shown, the semiconductor processing apparatus further includes a ventilation assembly 60 located between the valve module 80 and the semiconductor processing module 40. The ventilation assembly includes one or more ventilation ducts 61. Figure 7 As shown, each modular assembly includes one ventilation duct 61. Two additional ventilation ducts 61 are positioned between the plant docking module 95 and the semiconductor processing module 40. Gas enters from the bottom and sides of the ventilation duct 61 and exits from the top of the ventilation duct 62. Of course, more or fewer ventilation ducts 61 can be provided as needed. The fan filter module 30 and the ventilation assembly 60 work together to maintain clean air inside the semiconductor processing equipment, ensuring that various volatile chemical liquid gases are promptly removed.

[0048] The working principle of semiconductor processing equipment will be explained below.

[0049] In use, the front-end component 10 of the device can simultaneously supply semiconductor wafers to four semiconductor processing modules, or remove wafers from the four semiconductor processing modules. This allows the four semiconductor processing modules to process the semiconductor wafers synchronously, improving processing efficiency. Each semiconductor processing device has its own corresponding controlled valve 81, control unit 91, cable 92, pipeline 82, and container 71. The control unit 91 controls the controlled valve 81 to deliver fluid from the container 71 into the microchamber of the semiconductor processing device, using the fluid to perform surface treatment on the semiconductor wafer. The control unit 91 also controls the controlled valve 81 to draw fluid from the microchamber of the semiconductor processing device back into the container 71 for fluid recovery.

[0050] Specifically, the semiconductor processing apparatus described in this invention can perform edge etching on semiconductor wafers, and the detailed etching process will be described in detail below.

[0051] Second embodiment of semiconductor processing device

[0052] Figure 11 This is a perspective view of the semiconductor processing device in the second embodiment of the present invention. In the second embodiment, the semiconductor processing device of the first embodiment is further expanded. That is, in addition to the relevant modules included in the first embodiment, the semiconductor processing device also includes an expansion component 97. The expansion component 97 includes an expansion valve module 80', an expansion control module 90', and an expansion fluid carrying module 70'. The expansion fluid carrying module 70' is equipped with an ozone generator and a pneumatic valve, etc.

[0053] An embodiment of a semiconductor processing device

[0054] Please refer to Figures 12 to 15It shows a schematic diagram of the structure of a semiconductor processing apparatus 100 provided in one embodiment of the present invention, wherein: Figure 12 This is a cross-sectional schematic diagram of the semiconductor processing apparatus in one embodiment of the present invention; Figure 13 for Figure 12 An enlarged diagram of circle A in the diagram; Figure 14 for Figure 12 A bottom view of the first chamber portion of the semiconductor processing device; Figure 15 for Figure 12 The semiconductor processing apparatus 100 here can be used as the semiconductor processing apparatus 41 mentioned above.

[0055] Please refer to Figures 12 to 15 The semiconductor processing device 100 includes a first chamber portion 110, a second chamber portion 120, and a drive unit for moving the second chamber portion 120 relative to the first chamber portion 110 between an open position and a closed position. The first chamber portion 110 includes a first chamber plate 119 and a flange 118 extending from the periphery of the first chamber plate 119. The second chamber portion 120 includes a second chamber plate 129 and a flange 128 extending from the periphery of the second chamber plate 129. The drive unit is not shown here; in one embodiment, the drive unit may be an airbag.

[0056] The first chamber portion 110 is movable relative to the second chamber portion 120 between an open position and a closed position. It should be noted that the movement of the first chamber portion 110 and the second chamber portion 120 is relative. The first chamber portion 110 can be fixed while the second chamber portion 120 moves relative to it; the second chamber portion 120 can be fixed while the first chamber portion 110 moves relative to it; or both the first chamber portion 110 and the second chamber portion 120 can move simultaneously, as long as they can move relative to each other. When the first chamber portion 110 is in the closed position relative to the second chamber portion 120, the flange 118 and the flange 128 cooperate to form a micro-cavity 140 between the first chamber plate 118 and the second chamber plate 128. The semiconductor wafer 400 to be processed can be accommodated within the micro-cavity 140, awaiting subsequent processing. When the first chamber portion 110 is in the open position relative to the second chamber portion 120, the flange 118 separates from the flange 128, and the semiconductor wafer 400 to be processed can be removed or placed into the microchamber 140.

[0057] An annular first channel 116 is formed on the side of the first chamber portion 110 facing the microchamber 140, and a second channel 126 is formed on the side of the second chamber portion 120 facing the microchamber 140. When the second chamber portion 120 is in the closed position relative to the first chamber portion 110 and the semiconductor wafer 400 is housed in the microchamber, the first channel 116 and the second channel 126 together form an edge microprocessing space 130, and the outer edge of the semiconductor wafer 400 housed in the microchamber extends into the edge microprocessing space 130.

[0058] like Figures 12 to 15 As shown, in this embodiment, the first channel 116 and the second channel 126 are annular channels. When the second chamber portion 120 is in the closed position relative to the first chamber portion 110 and the semiconductor wafer 400 is accommodated in the micro-cavity, the wall surface 117 of the first chamber portion 110 located inside the first channel 116 abuts against the first edge surface of the semiconductor wafer 400 to be processed, and the wall surface 127 of the second chamber portion 120 located inside the second channel 126 abuts against the second edge surface of the semiconductor wafer 400 to be processed. The first channel 116 and the second channel 126 together form a closed, annular outer edge microprocessing space 130, and the outer edge portion of the semiconductor wafer 400 to be processed is accommodated within the edge microprocessing space 130.

[0059] Therefore, in this embodiment, the edge microprocessing space 130 can selectively process the entire outer edge of the semiconductor wafer 400 to be processed.

[0060] Of course, the first channel 116 and the second channel 126 can also be configured as arc-shaped channels with an arc degree less than 360 degrees. In this case, a closed, arc-shaped outer edge microprocessing space 130 with an arc degree less than 360 degrees is formed between the first channel 116 and the second channel 126. Correspondingly, a portion of the arc segment of the outer edge of the semiconductor wafer 400 to be processed is accommodated within the edge microprocessing space 130. Therefore, the edge microprocessing space 130 at this time only performs selective processing on a portion of the arc segment of the outer edge of the semiconductor wafer 400 to be processed.

[0061] The first chamber portion 110 has at least two edge processing through holes 112 extending from the outside to communicate with the edge microprocessing space 130, wherein at least one edge processing through hole serves as a fluid inlet and at least one edge processing through hole serves as a fluid outlet. In this embodiment, four edge processing through holes are provided. Of course, the second chamber portion 120 may also be provided with edge processing through holes communicating with the edge microprocessing space 130.

[0062] In application, the processing fluid can enter the edge microprocessor space 130 from the container of the fluid carrying module 70 through a controlled valve, pipeline, and an edge processing through-hole 112. The fluid entering the edge microprocessor space 130 can flow within it, allowing it to contact and process the outer edge portion of the semiconductor wafer 400 contained within the edge microprocessor space 130. The processed fluid can then flow out through another edge processing through-hole 112, or through an edge processing through-hole on the second chamber portion 120 that communicates with the edge microprocessor space 130. The outflowing fluid flows through pipelines and a controlled valve back into the container of the fluid carrying module 70. During processing, the processing fluid can be continuously or periodically introduced into the edge microprocessor space 130 through an edge processing through-hole 112. The fluid within the edge microprocessor space 130 can flow during processing, thus accelerating the processing speed.

[0063] Of course, the processing can be an etching process on the outer edge of the semiconductor wafer 400 to remove the thin film layer on the outer edge portion of the semiconductor wafer 400, or it can be selective cleaning of only the outer edge of the semiconductor wafer 400, etc.

[0064] Taking the etching and removal of the thin film layer on the outer edge of the semiconductor wafer 400 to be processed as an example. (Refer to reference...) Figures 1a to 1b and Figures 12 to 15 As shown, when it is necessary to etch away the thin film layer on the first and second sides of the outer edge of the semiconductor wafer 400 to be processed, it is only necessary to introduce a corresponding processing fluid with a corrosive effect on the thin film layer from the container of the fluid carrying module 70 through a pipeline, a controlled valve, and an edge processing through-hole 112 into the edge microprocessing space 130. The processing fluid flows within the edge microprocessing space 130 and directly contacts the outer edge portion of the semiconductor wafer 400 to be processed. The processing fluid flows along the edge of the semiconductor wafer 400 to be processed and undergoes a chemical or physical reaction with the wafer surface contained within the edge microprocessing space, thereby continuously etching away the thin film layer on the first edge surface, the second edge surface, and the bevel of the outer edge of the semiconductor wafer 400. After processing, the thin film layer of the portion of the outer edge of the semiconductor wafer 400 contained within the edge microprocessing space 130 is etched away, exposing the first edge surface, the second edge surface, and the outer bevel of the substrate layer of the outer edge of the semiconductor wafer 400. The fluid that has been processed through the semiconductor wafer 400 flows out through other edge processing vias, and the outflowing fluid flows through pipelines and controlled valves into the container of the fluid carrying module 70.

[0065] As can be seen, based on the edge microprocessing space 130, the semiconductor processing device 100 in this embodiment only requires a small amount of processing fluid to achieve selective etching of the outer edge of a semiconductor wafer 400 to be processed, which greatly reduces processing costs and production waste volume. Furthermore, compared with dry processing devices in the prior art, the semiconductor processing device 100 in this embodiment has significant advantages such as simple structure, ease of use, and low skill requirements for operators.

[0066] As can be seen, the semiconductor processing apparatus 100 provided in this embodiment can selectively process the outer edge of the semiconductor wafer 400 to be processed. Furthermore, by controlling the flow rate of the processing fluid within the semiconductor wafer 400 to be processed, the amount of processing fluid can be saved while ensuring processing effectiveness. Continuing to refer to... Figures 12 to 13 As shown, in this embodiment, the first chamber portion 110 further has a first recess 115 formed on the inner wall surface of the first chamber portion 110 facing the microchamber, the first recess being located inside the first channel 116. The second chamber portion 120 further has a second recess 125 formed on the inner wall surface of the second chamber portion 120 facing the microchamber, the second recess being located inside the second channel 126. The first recess 115 and the second recess 125 are also annular. When the second chamber portion 120 is in the closed position relative to the first chamber portion 110 and the semiconductor wafer 400 to be processed is housed in the micro-cavity, a portion of the second edge surface of the semiconductor wafer 400 to be processed covers the top of the second recess 125 to form a second inner microspace, and a portion of the first edge surface of the semiconductor wafer 400 to be processed covers the top of the first recess 115 to form a first inner microspace. The first inner microspace and the second inner microspace are located inside the edge microprocessing space 130.

[0067] Correspondingly, the first chamber portion 110 has a first inner processing through-hole communicating with the first recess portion 115, and the second chamber portion 120 has a second inner processing through-hole communicating with the second recess portion 125. When etching the edge of the semiconductor wafer 400 using the edge microprocessing space 130, liquid or gas, such as water or nitrogen, can be introduced into the first recess portion 115 and the second recess portion 125, that is, liquid or gas can be introduced into the first inner microspace and the second inner microspace to prevent liquid in the edge microprocessing space 130 from penetrating inward.

[0068] Similarly, the first recess 115 and the second recess 125 can also be arc-shaped.

[0069] Continue to refer to, for example Figures 12 to 13As shown, in this embodiment, when the second chamber portion 120 and the first chamber portion 110 are in the closed position, a micro-chamber 140 is also formed in the middle of them. The second chamber portion 120 has a central processing through hole 123 communicating with the micro-chamber 140, and the first chamber portion 110 has a central processing through hole 113 communicating with the micro-chamber 140.

[0070] For reference Figure 13 As shown, the first chamber portion 110 has a sealing engagement portion 210 located outside the first channel 116, and the second chamber portion 120 has an engagement groove 122 corresponding to the sealing engagement portion 210. The sealing engagement portion 210 includes a guide surface 211 at its end and an inner surface 212 at its inner side. When the second chamber portion 120 is in the closed position relative to the first chamber portion 110, the end of the sealing engagement portion 210 extends into the engagement groove 122, and the end portion of its inner surface 212 seals against the groove wall of the engagement groove 122. The upper end portion of its inner surface 212 forms the outer surface of the outer edge microprocessing space 130. Furthermore, the sealing surface of the inner surface 212 of the sealing joint 210 and the groove wall of the joint groove 122 is located below the outer edge microprocessing space 130, and the sealing surface is perpendicular to the extension direction of the semiconductor wafer 400. This arrangement allows the wall surface 117 of the first chamber 110 located inside the first channel 116 to abut more closely with the first edge surface of the semiconductor wafer 400 to be processed, and the wall surface 127 of the second chamber 120 located inside the second channel 126 to abut more closely with the second edge surface of the semiconductor wafer 400 to be processed, thus preventing the etchant from penetrating inward.

[0071] exist Figure 13 In this embodiment, during the closing of the second chamber portion 120 relative to the first chamber portion 110, the inner surface 212 of the sealing joint portion 210 can achieve center positioning of the semiconductor wafer 400. That is, if the center of the semiconductor wafer 400 deviates from the desired center during placement, the inner edge surface 212 of the sealing joint portion 210 can also be pressed against the semiconductor wafer 140 to correct its center to the desired center. In one example, during edge processing, the center deviation of the semiconductor wafer 400 needs to be no more than 0.2 mm. Using the method of the present invention, the center deviation can be adjusted to within 0.1 mm. The guide surface 211 can guide the sealing joint portion 210 into the engagement groove 122 when the first chamber portion 110 and the second chamber portion 120 are closed. The sealing joint portion 210 can be locked within the engagement groove 122.

[0072] For reference Figure 12As shown, the first chamber 110 includes a positioning groove 114, and the second chamber 120 includes a positioning post 124, which allows the first chamber 110 and the second chamber 120 to be correctly positioned when closed. During the closing process of the first chamber 110 and the second chamber 120, the positioning post 124 first engages with the positioning groove 114 to achieve initial positioning, and then the end of the sealing joint 210 extends into the engagement groove 122.

[0073] In one embodiment, the semiconductor processing apparatus 100 of the present invention is used to perform a silicon oxide wafer edge etching process. The specific method may include closing the cavity, HF acid etching, DIW (deionized water) rinsing, IPA (isopropanol) rinsing, nitrogen drying, and opening the cavity. The specific processes of HF acid etching, DIW (deionized water) rinsing, and IPA (isopropanol) rinsing can all be performed according to the procedures described above. Specifically, during the HF acid etching process, liquid or gas, such as water or nitrogen, can be introduced into the first recess 115 and the second recess 125 to prevent liquid from seeping into the edge microprocessing space 130.

[0074] Another embodiment of a semiconductor processing device

[0075] Please refer to Figures 16 to 19 It shows a schematic diagram of the structure of a semiconductor processing apparatus 200 provided in another embodiment of the present invention, wherein: Figure 16 This is a cross-sectional schematic diagram of another embodiment of the semiconductor processing apparatus of the present invention; Figure 17 for Figure 16 An enlarged diagram of circle B in the diagram; Figure 19 for Figure 16 A bottom view of the first chamber portion of the semiconductor processing device; Figure 19 for Figure 16 The semiconductor processing apparatus 200 is a top view of the second chamber portion of the semiconductor processing device. The semiconductor processing device 200 described here can be used as the semiconductor processing device 41 mentioned above.

[0076] The semiconductor processing device 200 and the semiconductor processing device 100 have the same structure, so the same parts are marked in the same way. The main difference between them is that the sealing joint 310 of the semiconductor processing device 200 and the sealing joint 210 of the semiconductor processing device 100 have some differences in structure.

[0077] like Figure 16 As shown, the first chamber portion 110 has the sealing joint portion 310 located outside the first channel 116, and the second chamber portion 120 has a joint groove 122 corresponding to the sealing joint portion 210.

[0078] The sealing joint 310 includes a guide surface 311 at its end, an inner surface 312 at its upper inner end, and a protrusion 313 at its inner end. When the second chamber 120 is in the closed position relative to the first chamber 110, the end of the sealing joint 310 extends into the engagement groove 122, and its protrusion 313 seals against the groove wall of the engagement groove 122. Its inner surface 312 forms the outer surface of the outer edge microprocessing space 130. The inner surface 312 is still spaced from the outer edge of the semiconductor wafer 400.

[0079] The sealing surface formed by the protrusion 313 of the sealing joint 310 and the groove wall of the joint groove 122 is located below the outer edge microprocessing space 130, and the sealing surface is perpendicular to the extension direction of the semiconductor wafer 400. This arrangement allows the wall surface 117 of the first chamber portion 110 located inside the first channel 116 to abut more closely with the first side surface of the semiconductor wafer 400 to be processed, and the wall surface 127 of the second chamber portion 120 located inside the second channel 126 to abut more closely with the second side surface of the semiconductor wafer 400 to be processed, thus preventing the etchant from penetrating inward.

[0080] exist Figure 16 In one embodiment, during the closing process of the second chamber portion 120 relative to the first chamber portion 110, the bumps 313 of the sealing joint portion 310 can achieve center positioning of the semiconductor wafer 140. That is, if the center of the semiconductor wafer 140 deviates from the desired center when it is placed, the bumps 313 of the sealing joint portion 310 can also correct its center to the desired center by squeezing the semiconductor wafer 140.

[0081] Because there is still a distance between the inner surface 312 and the outer edge of the semiconductor wafer 400, the semiconductor wafer 400 is less likely to be clamped by the sealing joint 310 when the second chamber portion 120 disengages from the first chamber portion 110.

[0082] In another embodiment, the semiconductor wafer 400 may not be centered using the bump 313, meaning the bump 313 will not contact the edge of the semiconductor wafer 400. Instead, the centering of the semiconductor wafer 400 can be achieved using the edge of the wall of the first channel 116.

[0083] The foregoing description has fully disclosed the specific embodiments of the present invention. It should be noted that any modifications made to the specific embodiments of the present invention by those skilled in the art do not depart from the scope of the claims. Accordingly, the scope of the claims is not limited to the foregoing specific embodiments.

Claims

1. A semiconductor processing apparatus, characterized in that, It includes: At least two adjacent semiconductor processing modules are provided, each semiconductor processing module having a semiconductor processing device. The semiconductor processing device includes: a first chamber portion, a second chamber portion, and a drive portion for moving the second chamber portion relative to the first chamber portion between an open position and a closed position. When the second chamber portion is in the closed position relative to the first chamber portion, a micro-chamber is formed between the first chamber portion and the second chamber portion, and a semiconductor wafer can be accommodated in the micro-chamber. When the second chamber portion is in the open position relative to the first chamber portion, the semiconductor wafer can be removed or placed in. The device front-end assembly disposed adjacent to the first side of the semiconductor processing module includes a wafer carrier and a wafer transport device. The wafer transport device uses a robotic arm to place the semiconductor wafer in the wafer carrier between the first chamber and the second chamber of the semiconductor processing device, and removes the semiconductor wafer from between the first chamber and the second chamber of the semiconductor processing device and transports it to the wafer carrier. The fluid carrying module, located below the semiconductor processing module, is used to carry various unused fluids and / or used fluids; and At least two valve modules are disposed on a second side adjacent to the semiconductor processing module and opposite to the first side. Each valve module includes multiple controlled valves. In each semiconductor processing device, a first chamber portion has a first channel, and a second chamber portion has a second channel. When the second chamber portion is in the closed position relative to the first chamber portion and a semiconductor wafer is contained within the microcavity, the first channel and the second channel communicate with each other and together with the edge of the semiconductor wafer to form an edge microprocessing space. The outer edge of the semiconductor wafer contained within the microcavity extends into the edge microprocessing space, which communicates with the outside through an edge processing via. Fluid from a container of a fluid carrying module enters the edge microprocessing space through a controlled valve, pipeline, and the edge processing via. Fluid within the edge microprocessing space is led out to the container of the fluid carrying module through the edge processing via, pipeline, and controlled valve. The first chamber portion has a sealing joint located outside the first channel, and the second chamber portion has a corresponding engagement groove. The sealing joint includes an inner edge surface located on the inner side. When the second chamber is in the closed position relative to the first chamber, the end of the sealing joint extends into the engagement groove, and the end portion of its inner edge surface seals against the groove wall of the engagement groove. The upper portion of its inner edge surface forms the outer surface of the edge microprocessing space. The end portion of the inner edge surface of the sealing joint and the sealing surface of the groove wall of the joint groove are located below the edge microprocessing space, and the sealing surface is perpendicular to the extension direction of the semiconductor wafer.

2. The semiconductor processing apparatus according to claim 1, characterized in that, The fluid carrying module is also located below the valve module. The fluid carrying module includes a support frame and multiple containers placed within the support frame. These containers hold various unused fluids required for processing the semiconductor wafer and / or various used fluids that have been used to process the semiconductor wafer. Each semiconductor processing module corresponds to one valve module. The controlled valves include rotary valves and pneumatic valves.

3. The semiconductor processing apparatus according to claim 2, characterized in that, The semiconductor processing module has two vertically stacked components, and the valve module has two vertically stacked components. The semiconductor processing device further includes: A fan filter module is disposed above the semiconductor processing module. The fan filter module includes a fan filter module assembly, which provides clean air toward the semiconductor processing module. A control module is disposed above the valve module. The control module includes a support frame and a control unit. The control unit is electrically connected to the semiconductor processing device and the controlled valve via a cable. The control unit controls the opening and closing of the semiconductor processing device and controls the controlled valve in the valve module.

4. The semiconductor processing apparatus according to claim 3, characterized in that, It also includes: A ventilation assembly located between the valve module and the semiconductor processing module, the ventilation assembly including one or more ventilation ducts, through which gas enters from the bottom and sides and exits from the top.

5. The semiconductor processing apparatus according to claim 3, characterized in that, It also includes: Human-computer interaction control console, installed on the front-end components of the device; The front-end component of the device includes a closed housing, and the wafer carrier and the wafer handling device are disposed within the closed housing.

6. The semiconductor processing apparatus according to claim 3, characterized in that, It also includes a plant access module located on the second side of the semiconductor processing module. The semiconductor processing module comprises four modules, with two horizontally adjacent modules stacked vertically on top of two other horizontally adjacent modules. Each pair of horizontally adjacent semiconductor processing modules shares a common support structure. The valve module consists of four parts: two vertically stacked valve modules are arranged horizontally at intervals with the other two vertically stacked valve modules. The plant control module is placed between vertically stacked valve modules arranged at horizontal intervals. There are four fluid-carrying modules, two of which are placed below two horizontally adjacent semiconductor processing modules, and two of which are placed below two spaced-apart valve modules. There are two fan filter modules, which are respectively positioned above two horizontally adjacent semiconductor processing modules. There are three control modules, which are arranged horizontally above the plant docking module and the valve module.

7. The semiconductor processing apparatus according to claim 3, characterized in that, It also includes: An expansion component includes an expansion valve module, an expansion control module, and an expansion fluid carrying module, wherein at least one of the expansion fluid carrying modules is equipped with an ozone generator.

8. The semiconductor processing apparatus according to claim 3, characterized in that, The first chamber and / or second chamber are provided with one or more through holes communicating with the microchamber. These through holes are used to introduce or extract fluid into the microchamber. Fluid supplied by the fluid-carrying module is transferred to the microchamber in a controlled manner through pipelines and the through holes via a controlled valve. Similarly, fluid within the microchamber is transferred to the fluid-carrying module in a controlled manner through pipelines and the through holes via the controlled valve. At least one fluid-carrying module contains a vacuum pump, and the control unit is electrically connected to the vacuum pump via a cable to control the vacuum pump. The vacuum pump is used to provide negative pressure to drive fluid in the container of the fluid-carrying module into the microchamber, and / or drive fluid in the microchamber to flow out and into the container of the fluid-carrying module.

9. The semiconductor processing apparatus according to claim 1, characterized in that, In each semiconductor processing device, a first edge surface, a second edge surface, and an outer bevel surface of the outer edge of the semiconductor wafer are exposed to the edge microprocessing space, and one or more of the edge processing vias serve as fluid inlets and fluid outlets. The edge microprocessing space is annular or arc-shaped, and the outer edge of the semiconductor wafer extends into the edge microprocessing space. The edge microprocessing space is a closed space and communicates with the outside through edge processing vias. The top surface of the inner wall portion of the first channel abuts against the first edge surface of the semiconductor wafer near the first chamber portion, and the top surface of the inner wall portion of the second channel abuts against the second edge surface of the semiconductor wafer near the second chamber portion. The first chamber portion further has a first recessed portion formed on the inner wall surface of the first chamber portion facing the microcavity, the first recessed portion being located inside the first channel. The second chamber portion further has a second recessed portion formed on the inner wall surface of the second chamber portion facing the microcavity, the second recessed portion being located inside the second channel. When the second chamber portion is in the closed position relative to the first chamber portion and the semiconductor wafer is accommodated in the microcavity, a portion of the second edge surface of the semiconductor wafer covers the top of the second recessed portion to form a second inner microspace. A portion of the first edge surface of the semiconductor wafer covers the top of the first recessed portion to form a first inner microspace. The first inner microspace and the second inner microprocessing space are located inside the edge microprocessing space. The first chamber portion has a first inner surface processing through-hole communicating with the first recessed portion, and the second chamber portion has a second inner surface processing through-hole communicating with the second recessed portion.

10. The semiconductor processing apparatus according to claim 9, characterized in that, In each semiconductor processing device, the first recess and the second recess are annular or arc-shaped. When the edge of the semiconductor wafer is etched using the edge microprocessing space, liquid or gas is introduced into the first recess and the second recess to prevent liquid in the edge microprocessing space from penetrating inward.

11. The semiconductor processing apparatus according to claim 10, characterized in that, During the closing process of the second chamber relative to the first chamber, the inner edge surface of the sealing joint achieves center positioning of the semiconductor wafer. If the center of the semiconductor wafer deviates from the desired center during placement, the inner edge surface of the sealing joint corrects its center to the desired center by pressing against the semiconductor wafer.

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