Diffusion method of p-type silicon wafer and perc solar cell prepared by diffusion method

Abstract

The application relates to a diffusion method of a P-type silicon wafer and a PERC solar cell wafer prepared by the diffusion method, and comprises the following diffusion steps: S1: pretreatment; a P-type silicon wafer after texturing is placed in a tubular diffusion furnace, heating is performed to 760-780 DEG C to perform vacuumizing treatment; S2: oxidizing the P-type silicon wafer; a low-pressure pressure of 50-80 mbar is set, nitrogen and oxygen are introduced to perform pre-oxidation treatment on the surface of the P-type silicon wafer to form a silicon dioxide oxidation layer; S3: source deposition; S4: high-temperature promotion; the furnace tube temperature is increased to 850-870 DEG C to perform source-free promotion; and S5: constant-temperature limited source promotion. The application has the advantages that the degradation ratio of product cell wafer PL "flower basket print" is greatly reduced, better process effect is obtained, and the product qualification rate is higher.

Description

Technical Field

[0001] This invention relates to the field of solar photovoltaic cell manufacturing technology, and in particular to a diffusion method for P-type silicon wafers and the PERC solar cells prepared therefrom. Background Technology

[0002] The manufacturing process of PERC cells includes texturing, diffusion, SE (Search Engine Electrode), etching, annealing, back-side passivation layer deposition, front and back-side silicon nitride layer deposition, back-side grooving, screen printing, sintering, and testing and sorting. Silicon wafers undergo these processes to form finished solar cells. Only those cells that pass AOI (Audiometric Inspection), PL (Plastic Processing) inspection, and efficiency testing are considered qualified products.

[0003] The texturing process is the first step in PERC cell manufacturing. Its purpose is to create a uniform pyramid structure on the silicon wafer surface, allowing light to be reflected multiple times to form a good light-absorbing structure. This pyramid structure formation requires large amounts of acids, alkalis, and additives for etching or to inhibit reactions. These chemicals remain on the wafer surface and are difficult to clean completely. Even after two water washes at the end of the process, noticeable traces of chemical contamination remain. Furthermore, the texturing process uses a basket weighing system, and the chemicals at the contact points between the wafer and the basket's teeth are further hindered from being cleaned. These residues migrate into the wafer during subsequent high-temperature diffusion processes, forming impurity sources and introducing recombination centers that reduce conversion efficiency at those locations. Under PL (Polymer Probe) testing, this appears as blackening or darkening at those locations, commonly referred to as "basket marks," leading to cell degradation and a lower overall production yield.

[0004] Phosphorus diffusion is the second process in conventional PERC cell manufacturing. Using liquid phosphorus oxychloride as the diffusion source, it first reacts with oxygen under high temperature in a sealed quartz tube to generate phosphorus pentoxide. This phosphorus then reacts with the P-type silicon wafer to generate elemental phosphorus and silicon dioxide. Under high temperature, the phosphorus diffuses into the silicon wafer to form an N-type semiconductor, forming a PN junction with the P-type silicon substrate. However, existing phosphorus diffusion processes do not address the issue of residual phosphorus solution on the silicon wafer surface after texturing. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a diffusion method for P-type silicon wafers and the PERC solar cells prepared therefrom. By improving the diffusion process, the influence of residual chemicals on the silicon wafer is reduced or minimized, the "basket mark" degradation during PL testing of finished solar cells is reduced, and better process results and higher product qualification rate are obtained.

[0006] This invention is achieved through the following technical solution: On one hand, it provides a diffusion method for a P-type silicon wafer, comprising the following diffusion steps:

[0007] S1: Preprocessing;

[0008] The texturized P-type silicon wafer is placed in a tube diffusion furnace and heated to 760-780℃ for vacuum treatment.

[0009] S2: Oxidize the P-type silicon wafer;

[0010] The furnace tube pressure is set to a low pressure of 50-80 mbar, and nitrogen and oxygen are introduced to perform pre-oxidation treatment on the surface of the P-type silicon wafer to form a silicon dioxide oxide layer.

[0011] S3: Through-source sedimentation;

[0012] Maintain the furnace tube pressure at 50-80 mbar and control the source bottle pressure at 400-600 mbar; introduce nitrogen, oxygen, and phosphorus source for deposition for 5-10 minutes to achieve phosphorus doping on the surface of the P-type silicon wafer;

[0013] S4: High-temperature propulsion;

[0014] Raise the furnace tube temperature to 850-870℃ to enable limited-source propulsion;

[0015] S5: Isothermal finite-source diffusion;

[0016] Maintaining the furnace tube pressure at 50-80 mbar and the furnace tube temperature at 850-870°C, the phosphorus atoms of the P-type silicon wafer are diffused into the interior of the silicon wafer for a continuous diffusion time of 5-10 minutes to obtain the diffused P-type silicon wafer.

[0017] Steps S4-S5 are performed in a nitrogen-filled environment.

[0018] Through the above technical solution, this invention addresses the impact of diffusion furnace tube pressure on cell quality. Based on extensive experimental data, it has been determined that when the furnace tube pressure is controlled at 50-80 mbar, basket mark defects in the prepared cells can be reduced by 90%. Existing diffusion technologies use furnace tube pressures of 100-150 mbar, which only maintains a relatively low pressure. Furthermore, by adding a pressure control device for the phosphorus source bottle in the diffusion process, installed on the pipe between the source bottle's outlet and the furnace tube, and connected to a PLC via its communication line, the pressure of this device can be adjusted independently. This means the phosphorus source flow rate can be set in the process parameters, and the gas flow rate is adjusted secondary based on the set pressure as it passes through the device. Only the pressure-controlled gas actually enters the furnace tube to participate in the reaction, effectively reducing basket mark defects in the cells during PL testing by 90%, significantly improving the yield of finished cells, reducing production costs, and increasing cell conversion efficiency.

[0019] Furthermore, in step S1, the texturized P-type silicon wafer has a pyramidal textured surface structure, and the pyramidal taper is 45-60°.

[0020] Further, in step S2, the flow rate of nitrogen is 500-1000 sccm, the flow rate of oxygen is 1000-2000 sccm, and the thickness of the silicon dioxide oxide layer is 2-5 nm.

[0021] The above technical solution describes a pre-oxidation step in the diffusion process. This step utilizes oxygen and nitrogen, and after a certain reaction time, forms a relatively uniform but loosely structured silicon dioxide layer on the silicon wafer surface. The Si-O bond length is greater than the Si-Si bond length, resulting in a looser structure for SiO2. Furthermore, this step prepares for subsequent phosphorus source deposition and phosphorus atom diffusion. When phosphorus atoms diffuse through the loosely structured SiO2 layer, their diffusion rate is faster, and their distribution on the silicon wafer surface is more uniform. This is because the SiO2 layer formed in this pre-oxidation step primarily aims to improve the uniformity of diffusion.

[0022] Further, in step S3, the flow rate of nitrogen is 200-500 sccm, the flow rate of oxygen is 500-900 sccm, and the flow rate of phosphorus source is 1000-1500 sccm; wherein the phosphorus doping concentration on the surface of the diffused P-type silicon wafer is 3.0-3.5E+20cm⁻². -3

[0023] Through the above technical solution, this step is the process of phosphorus atoms forming and diffusing in all directions on the silicon wafer surface; the diffusion reaction equation is:

[0024] Phosphorus source POCl3 decomposes into P2O5 and PCL5 at temperatures above 600℃. Under sufficient oxygen conditions, the intermediate product PCL5 reacts with oxygen to generate P2O5 and the final product chlorine (Cl2). P2O5 reacts with Si to generate phosphorus atoms (P) and SiO2. Under the influence of concentration differences and temperature, phosphorus atoms diffuse in all directions on the silicon wafer surface, eventually becoming uniformly distributed on the silicon wafer surface.

[0025] Furthermore, in step S4, the phosphorus atom concentration follows a Gaussian distribution; the heating time is 6-10 min.

[0026] Through the above technical solution, phosphorus atoms gradually diffuse into the silicon wafer under high temperature, reaching a certain depth within a certain time. Under finite-source diffusion, the surface concentration of phosphorus atoms is inversely proportional to the doping depth; the deeper the diffusion, the lower the surface concentration. Depending on the process requirements, the diffusion depth of phosphorus atoms in the silicon wafer is approximately 0.1-0.2 μm. To obtain the required diffusion depth, the high-temperature propagation temperature needs to be increased to 850-870℃ and maintained at this temperature for a certain period of time.

[0027] Furthermore, in steps S4 and S5, the flow rate of the nitrogen gas is 1000-3000 sccm.

[0028] Through the above technical solution, phosphorus atoms gradually diffuse into the silicon wafer under high temperature. Within a certain time, they diffuse to a certain depth. Under finite-source diffusion, the surface concentration of phosphorus atoms is inversely proportional to the doping depth; the deeper the diffusion, the lower the surface concentration. Depending on the process requirements, the diffusion depth of phosphorus atoms in the silicon wafer is approximately 0.1-0.2 μm. To achieve the required diffusion depth, the high-temperature propagation temperature needs to be raised to 850-870℃ and maintained at this temperature for a certain period. This step needs to be carried out in a nitrogen atmosphere, mainly utilizing the continuously introduced nitrogen to maintain the temperature field balance throughout the furnace tube from the furnace opening to the furnace tail, and to keep the temperature within this range to prevent temperature overshoot or dry burning.

[0029] Furthermore, after step S5, step S6 is added to cool down to atmospheric pressure, wherein the cooling temperature is 750-770℃, the atmospheric pressure is 100-200mbar, and the nitrogen flow rate is 3000-5000sccm.

[0030] After completing the diffusion and propagation processes using the above technical solution, the furnace tube temperature needs to be reduced to a certain range. This range cannot be too high; otherwise, opening the furnace door directly will cause thermal shock to the silicon wafers, resulting in mass microcracks. Simultaneously, excessively high furnace door opening temperatures will accelerate the aging of the furnace door seals, which is detrimental to the long-term stable operation of the equipment. However, the cooling temperature setting cannot be too low either; otherwise, it will increase the overall process time and fail to meet production capacity requirements. Considering the actual situation and process requirements, the cooling temperature is set at 750-770℃, and a certain amount of nitrogen is introduced to remove heat and appropriately increase the cooling rate.

[0031] Furthermore, in step S5, the sheet resistance of the diffused P-type silicon wafer is 180-220Ω.

[0032] The sheet resistance range described above is a parameter that characterizes the diffusion effect after the entire diffusion process is completed. The sheet resistance level indicates the uniformity of phosphorus atom diffusion on the silicon wafer surface. Extensive experimental data has demonstrated that a sheet resistance of 180-220Ω results in optimal conversion efficiency.

[0033] Additionally, a PERC solar cell is provided, comprising a P-type silicon wafer manufactured by the diffusion method described above for a P-type silicon wafer.

[0034] Furthermore, the PERC solar cell is subjected to PL testing using an ASIC PL tester.

[0035] The beneficial effects of the present invention are as follows: ① By improving the diffusion process and controlling the furnace tube pressure and the saturated vapor pressure of the source bottle, the present invention changes the doping concentration of phosphorus atoms on the silicon wafer surface. By utilizing the gettering effect of the high concentration of phosphorus atoms on the silicon wafer surface, the impurities remaining on the silicon wafer surface after texturing are cleaned, and the recombination centers are reduced. This further reduces or completely eliminates the influence of the texturing basket teeth position on the silicon wafer and improves the PL yield.

[0036] ② This invention controls the temperature of the phosphorus source bottle, utilizing temperature changes to regulate the change in the saturated vapor pressure of the source bottle, maintaining its temperature at 20-22℃. For a sealed phosphorus source bottle, the higher the ambient temperature, the higher the saturated vapor pressure inside the source bottle. When the pressure and flow rate remain constant, the amount of source gas introduced into the reaction tube per unit time will increase; this avoids increasing the source volume by increasing the process time (extended process time affects production capacity) or by carrying more nitrogen gas (increased process gas volume increases production costs).

[0037] The basket mark that appears under PL (Polymerization Processing) is a contamination center formed by the gradual diffusion of residual chemical solutions from the silicon wafer surface after texturing into the interior of the wafer under the action of high diffusion temperature. This center is precisely where the "bamboo basket teeth" (residual chemical residue) contact the silicon wafer, and is collectively referred to as a "bamboo basket mark" defect. This problem was overcome by reducing the diffusion reaction pressure and increasing the surface doping concentration of the phosphorus source.

[0038] During the phosphorus diffusion process to prepare a PN junction, a phosphosilicate glass layer is formed. This layer contains numerous defects that attract the precipitation of various impurities, especially metallic impurities. This is primarily because the solid solubility of impurities, especially metallic impurities, in the phosphosilicate glass layer is much greater than their solid solubility in crystalline silicon. Therefore, the thicker the phosphosilicate glass layer, the more impurities can be deposited and attracted. Simultaneously, when phosphorus atoms diffuse within the silicon wafer to form the PN junction, a high-concentration phosphorus layer forms on the wafer surface. Since phosphorus atoms occupy the positions of silicon atoms in the crystalline silicon lattice, replacing silicon atoms, a large number of silicon atoms are "kicked out" of the lattice, forming interstitial atoms. These interstitial atoms create high-density dislocations and other defects, becoming deposition sites for impurities, especially metallic impurities, thus acting as gettering sites. This further reduces or completely eliminates the influence of the texturing basket teeth position on the silicon wafer.

[0039] ③ This invention requires no additional equipment investment or extra processes, and does not require increased water usage or washing time in the flocking process;

[0040] ④ The photoelectric conversion efficiency of the battery cells prepared using the process of this invention can be improved by more than 0.02%, and the PL test pass rate can reach 99%. Detailed Implementation

[0041] A diffusion method for a P-type silicon wafer includes the following diffusion steps:

[0042] S1: Preprocessing;

[0043] The texturized P-type silicon wafers are placed in a tube diffusion furnace and heated to 760-780℃ for vacuum treatment. This process mainly involves heating, and the furnace tubes go through the process of opening the furnace door, introducing the wafer, and closing the furnace door. During this process, heat loss occurs, and the temperature drops, especially at the furnace opening, where the temperature deviates significantly from the process temperature. Therefore, this step, a temperature recovery process, is necessary to prepare for the diffusion process temperature.

[0044] S2: Oxidize the P-type silicon wafer;

[0045] The furnace tube pressure is set to a low pressure of 50-80 mbar, and nitrogen and oxygen are introduced to perform pre-oxidation treatment on the surface of the P-type silicon wafer to form a silicon dioxide oxide layer. This silicon dioxide layer helps to improve the uniformity of phosphorus atom diffusion on the silicon wafer surface.

[0046] S3: Through-source sedimentation;

[0047] Maintain the furnace tube pressure at 50-80 mbar and control the source bottle pressure at 400-600 mbar; the source bottle temperature is 20-22℃. Introduce nitrogen, oxygen, and phosphorus source for deposition for 5-10 minutes to achieve phosphorus doping on the surface of the P-type silicon wafer; control the reaction conditions, and through chemical reaction, a large number of phosphorus atoms are deposited on the silicon wafer surface and evenly distributed across the entire surface.

[0048] S4: High-temperature propulsion;

[0049] Raise the furnace tube temperature to 850-870℃ for limited-source propulsion; raise the temperature to the required level for phosphorus atoms to diffuse into the silicon wafer.

[0050] S5: Isothermal finite-source diffusion;

[0051] Maintaining the furnace tube pressure at 50-80 mbar and the furnace tube temperature at 850-870°C, the phosphorus atoms of the P-type silicon wafer are diffused into the interior of the silicon wafer for a continuous diffusion time of 5-10 minutes to obtain the diffused P-type silicon wafer.

[0052] By maintaining a high temperature for a certain period of time, phosphorus atoms diffuse to the depth required for the process, i.e., the junction depth to form a PN junction.

[0053] Steps S4-S5 are performed in a nitrogen-filled environment. This restores the furnace tube from low pressure to atmospheric pressure, as the furnace door cannot be opened when the internal and external pressures are unbalanced. Simultaneously, it lowers the furnace tube temperature to a suitable level, mitigating the impact of hot and cold environments on the silicon wafers and preventing microcracks caused by stress changes within the wafers. Lowering the temperature also protects the furnace door seal, slowing its aging and maintaining stable machine performance.

[0054] Based on the above scheme, a tailpipe is located at the end of the reactor tube, connected to a diaphragm pump. The pump controls the pressure within the reactor tube and simultaneously extracts the reactants and products from the tube to the external power processing system. Meanwhile, during the high-temperature propulsion process, residual reagent molecules on the silicon wafer surface diffuse into the wafer under high temperatures, forming deeper defect centers, contaminating the wafer, reducing cell conversion efficiency, or causing black spots during PL testing.

[0055] A PERC solar cell includes a P-type silicon wafer manufactured by the diffusion method described above.

[0056] The above-mentioned PERC solar cells were subjected to PL testing using an ASIC series PL tester. The specific testing process and results are as follows:

[0057] The solar cells to be tested are placed into the hopper of the ASIC series PL tester. The suction cup picks up the silicon wafer and places it on the transport track. The silicon wafer is then transported to the test position by the transport device. The solar cells are illuminated by a laser, and the camera captures fluorescence to form an image. The entire brightness distribution of the solar cells can be seen through the image.

[0058] PL Detection Principle: A PL meter, or photoluminescence analyzer, works by detecting the fluorescence emitted when a semiconductor material (such as a crystalline silicon solar cell) is excited by light. Electrons transition from lower to higher energy levels, creating electron-hole pairs and forming non-equilibrium charge carriers. After moving within the semiconductor (crystalline silicon solar cell) for a period of time, these excited electrons return to a lower energy state and recombine with the electron-hole pairs. This recombination emits fluorescence, which is captured and imaged by a camera.

[0059] Our ASIC series photoluminescence detector utilizes a specific wavelength laser as the excitation source, providing photons of a certain energy. Ground-state electrons in the silicon wafer absorb these photons and enter an excited state, releasing near-infrared light with a peak wavelength around 1150nm. A high-sensitivity, high-resolution camera then captures this light and creates an image. The intensity of the image is directly proportional to the concentration of non-equilibrium minority carriers at the corresponding location. That is, the higher the concentration of non-equilibrium minority carriers, the brighter the image; the lower the concentration, the darker the image. Since defects reduce the minority carrier concentration in a region, weakening its fluorescence effect, the image appears as dark dots, lines, or areas. Therefore, photoluminescence can be used to determine whether finished or semi-finished products contain defects, impurities, and other factors that ultimately affect battery efficiency.

[0060] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0061] Example 1

[0062] S1: Pretreatment; The texturized P-type silicon wafer is placed in a tube diffusion furnace and heated to 760℃ for vacuum treatment.

[0063] S2: Silicon oxide wafer; furnace tube pressure 50 mbar, nitrogen flow rate 700 sccm, oxygen flow rate 1100 sccm, time 5 min.

[0064] S3: Source deposition; furnace tube pressure is 50 mbar, source bottle pressure is 450 mbar; source bottle temperature is 21℃, nitrogen flow rate is 500 sccm, oxygen flow rate is 900 sccm, phosphorus source flow rate is 1500 sccm; deposition time is 10 min.

[0065] S4: High-temperature propulsion; raise the furnace tube temperature to 850℃, heating time 8min;

[0066] S5: Isothermal limited-source diffusion; maintaining furnace tube pressure at 50 mbar and furnace tube temperature at 850 °C for 10 min.

[0067] S6: Cool down and return to normal pressure;

[0068] Example 2

[0069] S1: Pretreatment; The texturized P-type silicon wafer is placed in a tube diffusion furnace and heated to 770℃ for vacuum treatment.

[0070] S2: Silicon oxide wafer; furnace tube pressure 80 mbar, nitrogen flow rate 1000 sccm, oxygen flow rate 800 sccm, time 4 min.

[0071] S3: Source deposition; furnace tube pressure 80 mbar, source bottle pressure 600 mbar; source bottle temperature 20℃, nitrogen flow rate 700 sccm, oxygen flow rate 700 sccm, phosphorus source flow rate 1300 sccm; deposition 9 min;

[0072] S4: High-temperature propulsion; raise the furnace tube temperature to 860℃, heating time 9min;

[0073] S5: Isothermal finite-source diffusion; maintaining furnace tube pressure at 80 mbar and furnace tube temperature at 860 °C for 9 min.

[0074] S6: Cool down and return to normal pressure;

[0075] Example 3

[0076] S1: Pretreatment; The texturized P-type silicon wafer is placed in a tube diffusion furnace and heated to 780℃ for vacuum treatment.

[0077] S2: Silicon oxide wafer; furnace tube pressure: 60 mbar; nitrogen flow rate: 1000 sccm; oxygen flow rate: 1100 sccm; time: 5 min;

[0078] S3: Source deposition; furnace tube pressure is 60 mbar, source bottle pressure is 450 mbar; source bottle temperature is 22℃, nitrogen flow rate is 500 sccm, oxygen flow rate is 700 sccm, phosphorus source flow rate is 1200 sccm; deposition time is 10 min.

[0079] S4: High-temperature propulsion; raise the furnace tube temperature to 870℃, heating time 10min;

[0080] S5: Isothermal limited-source diffusion; maintaining furnace tube pressure at 60 mbar and furnace tube temperature at 870°C for 8 minutes.

[0081] S6: Cool down and return to normal pressure;

[0082] Comparative Example 1

[0083] S1: Pretreatment; The texturized P-type silicon wafer is placed in a tube diffusion furnace and heated to 760℃ for vacuum treatment.

[0084] S2: Silicon oxide wafer; furnace tube pressure 100 mbar, nitrogen flow rate 700 sccm, oxygen flow rate 1100 sccm, time 5 min.

[0085] S3: Source deposition; furnace tube pressure is 100 mbar, source bottle pressure is 350 mbar; source bottle temperature is 21℃, nitrogen flow rate is 500 sccm, oxygen flow rate is 900 sccm, phosphorus source flow rate is 1500 sccm; deposition time is 10 min.

[0086] S4: High-temperature propulsion; raise the furnace tube temperature to 850℃, heating time 8min;

[0087] S5: Isothermal limited-source diffusion; maintaining furnace tube pressure at 100 mbar and furnace tube temperature at 850 °C for 10 min.

[0088] S6: Cool down and return to normal pressure;

[0089] Comparative Example 2

[0090] S1: Pretreatment; The texturized P-type silicon wafer is placed in a tube diffusion furnace and heated to 770℃ for vacuum treatment.

[0091] S2: Silicon oxide wafer; furnace tube pressure 120 mbar, nitrogen flow rate 1000 sccm, oxygen flow rate 800 sccm, time 4 min.

[0092] S3: Source deposition; furnace tube pressure is 120 mbar, source bottle pressure is 650 mbar; source bottle temperature is 20℃, nitrogen flow rate is 700 sccm, oxygen flow rate is 700 sccm, phosphorus source flow rate is 1300 sccm; deposition time is 9 min.

[0093] S4: High-temperature propulsion; raise the furnace tube temperature to 860℃, heating time 9min;

[0094] S5: Isothermal limited-source diffusion; maintaining furnace tube pressure at 120 mbar and furnace tube temperature at 860 °C for 9 minutes.

[0095] S6: Cool down and return to normal pressure;

[0096] Comparative Example 3

[0097] S1: Pretreatment; The texturized P-type silicon wafer is placed in a tube diffusion furnace and heated to 760℃ for vacuum treatment.

[0098] S2: Silicon oxide wafer; furnace tube pressure 150 mbar, nitrogen flow rate 700 sccm, oxygen flow rate 1100 sccm, time 5 min.

[0099] S3: Source deposition; furnace tube pressure is 150 mbar, source bottle pressure is 450 mbar; source bottle temperature is 21℃, nitrogen flow rate is 500 sccm, oxygen flow rate is 900 sccm, phosphorus source flow rate is 1500 sccm; deposition time is 10 min.

[0100] S4: High-temperature propulsion; raise the furnace tube temperature to 850℃, heating time 8min;

[0101] S5: Isothermal limited-source diffusion; maintaining furnace tube pressure at 150 mbar and furnace tube temperature at 850 °C for 10 min.

[0102] S6: Cool down and return to normal pressure;

[0103] The diffusion method for P-type silicon wafers provided in Examples 1-3 and Comparative Examples 1-3, and the effect on the PERC solar cells prepared thereon were examined. Texturized silicon wafers were uniformly divided into 7 groups. Silicon wafers in experimental groups 1-3 were diffused using the methods provided in Examples 1-3, while silicon wafers in control groups 4-6 were diffused using the methods provided in Comparative Examples 1-3. The phosphorus atom doping concentration on the surface of the 6 groups of experimentally diffused silicon wafers was measured using an electrochemical capacitance-voltage method (CV21 series) tester. Group 7 served as a blank control group. All 7 groups of silicon wafers were simultaneously transferred to the same machine for subsequent processes to prepare the finished solar cells. Finally, PL testing was performed using an ASIC series PL tester. The conversion efficiency of the solar cells and the percentage of "basket mark" under PL testing were statistically analyzed for the 7 groups of experiments. The relative values ​​of surface phosphorus atom doping concentration, PL basket mark percentage, and solar cell conversion efficiency after diffusion for each group are shown in Table 1 below.

[0104] Table 1.

[0105]

[0106] According to the data in Table 1 above, the diffusion method for P-type silicon wafers provided in Examples 1-3 and the PERC solar cells prepared therefrom can reduce the PL basket pattern ratio of the solar cells from 10% to less than 0.10%, significantly improving the basket pattern. Furthermore, it increases the conversion efficiency of the PERC solar cells by more than 0.02%. It can also be concluded that the surface phosphorus atom doping concentration after diffusion in Examples 1-3 is increased to 3.0E+20cm⁻¹. -3 In summary, a higher doping concentration on the silicon wafer surface means a thicker phosphosilicate glass layer, resulting in a better gettering effect on the silicon wafer surface and interior, and a more significant improvement in the basket pattern effect under PL.

[0107] In summary, this invention, based on the principles of molecular kinetic theory, demonstrates that lower pressure leads to greater molecular kinetic energy and an increased free path, thereby increasing the diffusion distance of phosphorus atoms on the silicon wafer surface, improving the uniformity of the PN junction, enhancing its quality, and ultimately increasing the conversion efficiency of the solar cell. Simultaneously, lower pressure results in a faster rate of gas extraction from the furnace tube per unit time, reducing the residence time of byproducts on the silicon wafer surface and contributing to surface cleanliness. Controlling the source bottle pressure at 400-600 mbar and increasing its temperature can raise its saturated vapor pressure. In a sealed quartz phosphorus source bottle, increasing the controlled temperature of the phosphorus source leads to a higher saturated vapor pressure of the vaporized phosphorus, thus increasing the phosphorus doping concentration on the silicon wafer surface. Increased phosphorus doping concentration on the silicon wafer surface, meaning more surface doping impurities, improves the silicon wafer surface's tolerance to other impurities, especially metallic impurities, reducing their impact on the silicon wafer surface. This invention mitigates the impact of chemicals remaining on the silicon wafer surface from the texturing process, especially at the contact point between the basket print and the silicon wafer, by increasing the phosphorus doping concentration on the silicon wafer surface. This reduces basket print defects under PL testing, thereby improving the cell conversion efficiency and cell quality.

[0108] Finally, it should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A diffusion method for a P-type silicon wafer, characterized in that, The diffusion process includes the following steps: S1: Preprocessing; The texturized P-type silicon wafer is placed in a tube diffusion furnace and heated to 760-780℃ for vacuum treatment. S2: Oxidize the P-type silicon wafer; The furnace tube pressure is set to a low pressure of 50-80 mbar, and nitrogen and oxygen are introduced to perform pre-oxidation treatment on the surface of the P-type silicon wafer to form a silicon dioxide oxide layer. S3: Through-source sedimentation; Maintain the furnace tube pressure at 50-80 mbar and control the source bottle pressure at 400-600 mbar; control the source bottle temperature at 20-25℃, and introduce nitrogen, oxygen, and phosphorus sources for deposition for 5-10 minutes to achieve phosphorus doping on the surface of the P-type silicon wafer. S4: High-temperature propulsion; Increase the furnace tube temperature to 850-870℃ for passive propulsion; S5: Isothermal diffusion; Maintaining the furnace tube pressure at 50-80 mbar and the furnace tube temperature at 850-870°C, the phosphorus atoms of the P-type silicon wafer are diffused into the interior of the silicon wafer for a continuous diffusion time of 5-10 minutes to obtain the diffused P-type silicon wafer. Steps S4-S5 are performed in a nitrogen-filled environment; In step S1, the texturized P-type silicon wafer has a pyramidal textured surface structure, and the pyramidal taper is 45-60°. In step S2, the flow rate of nitrogen is 500-1000 sccm, the flow rate of oxygen is 1000-2000 sccm, and the thickness of the silicon dioxide oxide layer is 2-5 nm. In step S3, the flow rate of nitrogen is 200-500 sccm, the flow rate of oxygen is 500-900 sccm, and the flow rate of the phosphorus source is 1000-1500 sccm; wherein the phosphorus doping concentration on the surface of the diffused P-type silicon wafer is 3.0-3.5E+20cm. -3 ; In step S4, the phosphorus atom concentration follows a Gaussian distribution; the heating time is 6-10 min. In steps S4 and S5, the flow rate of nitrogen is 1000-3000 sccm; In step S5, the sheet resistance of the diffused P-type silicon wafer is 180-220Ω.

2. A PERC solar cell, characterized in that, This includes P-type silicon wafers manufactured using the diffusion method described in claim 1.

3. The PERC solar cell according to claim 2, characterized in that, The PERC solar cell is subjected to PL testing using an ASIC PL tester.

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