Liquid crystal display device

Abstract

According to an aspect of the present disclosure, a liquid crystal display device includes a lower substrate on which a black matrix and a color filter are disposed; an upper substrate disposed opposite the lower substrate; a thin film transistor disposed under the upper substrate to oppose the color filter and including a gate electrode, an active layer, a source electrode, and a drain electrode; at least one insulating layer disposed under the thin film transistor; a pixel electrode disposed under the insulating layer and electrically connected to the drain electrode; and a common electrode spaced apart from the pixel electrode, and the gate electrode includes a first gate conductive layer including a transparent conductive material, a second gate conductive layer including a first transition metal oxide and a second transition metal oxide, and a third gate conductive layer formed of an opaque conductive layer.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2021-0194594, filed with the Korean Intellectual Property Office on December 31, 2021, the disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to liquid crystal display devices, and more particularly to liquid crystal display devices having improved reflective brightness. Background Technology

[0004] Recently, with the advent of the information age, the field of displays that visually express electrical information signals has developed rapidly, and in response, various display devices with excellent performance (e.g., thinness, light weight, and low power consumption) have been developed. Examples of such display devices include liquid crystal displays (LCDs) and organic light-emitting diode (OLEDs).

[0005] The liquid crystal display device comprises two substrates having electrodes for generating an electric field, arranged opposite each other, and liquid crystal material injected between the two substrates to form a liquid crystal panel. The liquid crystal display device displays images by controlling the optical anisotropy and birefringence of the liquid crystal molecules by an electric field generated by applying a voltage to the two electrodes of the liquid crystal panel.

[0006] Most liquid crystal display devices have the following structure: after a thin-film transistor substrate in which thin-film transistors are arranged in a matrix and a color filter substrate in which color filters are formed are bonded, a liquid crystal layer is inserted therebetween. Pixel regions formed on the thin-film transistor substrate and pixel regions formed on the color filter substrate are bonded to completely overlap. To reduce errors generated during the bonding process, a color filter layer can be formed on the thin-film transistor substrate.

[0007] Recently, there has been active development of flip-type liquid crystal devices that use thin-film transistor (TFT) substrates as viewing surfaces. However, when TFT substrates are used as viewing surfaces, reflective brightness is generated at the periphery of the panel due to the multiple metal wiring lines and metal electrodes. Summary of the Invention

[0008] The purpose of this disclosure is to provide a frameless liquid crystal display device in which the width of the bezel area is minimized.

[0009] Another objective achieved by this disclosure is to address user identification of the metal layer and the degradation of reflected brightness due to the high reflectivity of the gate electrode in a flip-type liquid crystal display where the thin-film transistor substrate is used as the viewing surface.

[0010] The purpose of this disclosure is not limited to the purposes mentioned above, and other purposes not mentioned above will be clearly understood by those skilled in the art from the following description.

[0011] According to an aspect of this disclosure, a liquid crystal display device includes: a lower substrate having a black matrix and a color filter disposed thereon; an upper substrate disposed opposite to the lower substrate; a thin-film transistor disposed under the upper substrate opposite to the color filter, and including a gate electrode, an active layer, a source electrode, and a drain electrode; at least one insulating layer disposed under the thin-film transistor; a pixel electrode disposed under the insulating layer and electrically connected to the drain electrode; and a common electrode spaced apart from the pixel electrode, wherein the gate electrode includes: a first gate conductive layer comprising a transparent conductive material; a second gate conductive layer comprising a first transition metal oxide and a second transition metal oxide; and a third gate conductive layer formed of an opaque conductive layer.

[0012] Further details of the exemplary implementation are included in the detailed implementation and the accompanying drawings.

[0013] According to this disclosure, the border area can be minimized to improve appearance quality.

[0014] According to this disclosure, a flip-type liquid crystal display device can be provided that improves reflective brightness by reducing the reflectivity of the gate electrode.

[0015] According to this disclosure, a liquid crystal display panel that reduces the number of processes while lowering reflectivity can be provided.

[0016] The effects of this disclosure are not limited to the examples above, and many more different effects are included in this specification. Attached Figure Description

[0017] The above and other aspects, features and other advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0018] Figure 1 This is a schematic plan view of a liquid crystal display device according to an exemplary embodiment of the present disclosure;

[0019] Figure 2 This is a schematic cross-sectional view of a liquid crystal display device according to an exemplary embodiment of the present disclosure;

[0020] Figure 3 This is a schematic cross-sectional view illustrating a portion of the liquid crystal display panel of a liquid crystal display device according to an exemplary embodiment of the present disclosure;

[0021] Figure 4This is a schematic cross-sectional view illustrating a portion of the liquid crystal display panel of a liquid crystal display device according to another exemplary embodiment of the present disclosure;

[0022] Figure 5A and Figure 5B It is a graph measuring the reflectivity of the gate electrodes manufactured according to Examples 1 and 2 and Comparative Example 1;

[0023] Figure 6 It is a graph measuring the reflectivity of the gate electrodes manufactured according to Example 1 and Comparative Examples 1 to 3; and

[0024] Figure 7 It is a graph measuring the reflectivity of the gate electrode formed by changing the thickness of the second gate conductive layer. Detailed Implementation

[0025] The advantages and features of this disclosure, as well as methods for achieving these advantages and features, will become clear from the exemplary embodiments described in detail below with reference to the accompanying drawings. However, this disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. The exemplary embodiments are provided by way of example only, so that those skilled in the art can fully understand the disclosure and scope of this disclosure. Therefore, this disclosure will be limited only by the scope of the appended claims.

[0026] The shapes, dimensions, ratios, angles, numbers, etc., shown in the accompanying drawings to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout the specification, the same reference numerals generally denote the same elements. Furthermore, in the following description of this disclosure, detailed descriptions of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure. Terms such as “comprising,” “having,” and “consisting of” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” Any reference to the singular may include the plural unless explicitly stated otherwise.

[0027] Even without explicit explanation, components are interpreted as including the normal tolerance range.

[0028] When using terms such as “on top of,” “above,” “below,” “below,” and “beside” to describe the positional relationship between two parts, one or more parts may be located between the two parts unless these terms are used with the terms “immediately adjacent” or “directly.”

[0029] When an element or layer is placed "on" another element or layer, the other layer or element can be directly inserted on or between the other elements.

[0030] Although the terms "first," "second," etc., are used to describe individual components, these components are not limited by these terms. These terms are only used to distinguish one component from other components. Therefore, the first component mentioned below can be a second component in the technical concept of this disclosure.

[0031] Throughout the specification, the same reference numerals generally denote the same elements.

[0032] For ease of description, the dimensions and thickness of each component shown in the accompanying drawings are illustrated, but this disclosure is not limited to the dimensions and thickness of the components shown.

[0033] Features of various embodiments of this disclosure may be partially or completely dependent on or combined with each other and may be interlocked and operated in technically different ways, and the embodiments may be performed independently of each other or in relation to each other.

[0034] In the following, an exemplary embodiment of a liquid crystal display device according to the present disclosure will be described in detail with reference to the accompanying drawings.

[0035] Figures 1 to 3 This is a view used to illustrate an exemplary embodiment of a liquid crystal display device according to the present disclosure.

[0036] Figure 1 This is a schematic plan view of a liquid crystal display device according to an exemplary embodiment of the present disclosure. Figure 1 For ease of description, only the upper substrate 110 and a plurality of sub-pixels SP are shown among the various components of the liquid crystal display device 100.

[0037] The upper substrate 110 is a component used to support various components included in the liquid crystal display device 100 and to protect the components from external impacts or the influence of the external environment, and the upper substrate 110 can be formed of an insulating material. For example, the upper substrate 110 can be formed of a glass substrate or a plastic substrate (e.g., polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyimide).

[0038] Reference Figure 1 The upper substrate 110 supports various components of the liquid crystal display device 100. (Refer to...) Figure 1 The upper substrate 110 includes a display area DA and a border area BZ. The display area DA is the area in which multiple sub-pixels SP are disposed and the image is actually displayed. The border area BZ is the outer perimeter area surrounding the display area DA in which no image is displayed. Wiring lines and driving circuits for driving the screen are disposed in the border area BZ.

[0039] Multiple subpixels SP can be defined on the upper substrate 110. Each subpixel is the smallest unit constituting the display area DA, and each subpixel is an area displaying a single color. For example, the multiple subpixels can be composed of red subpixels, green subpixels, and blue subpixels. The multiple subpixels SP can be arranged as follows: Figure 1 The matrix form shown is used to define it.

[0040] Figure 2 This is a schematic cross-sectional view of a liquid crystal display device according to an exemplary embodiment of the present disclosure. Figure 2 The liquid crystal display device 100 shown is a cross-sectional view showing a portion of the structure of a frameless liquid crystal display device 100.

[0041] Reference Figure 2 The liquid crystal display device according to this disclosure includes a liquid crystal display panel PNL, a backlight unit BLU, and a cover plate CB. The liquid crystal display panel PNL includes an upper substrate 110 and a lower substrate 150.

[0042] The liquid crystal display panel (PNL) outputs images by arranging pixels in a matrix. The PNL is composed of an upper substrate 110 and a lower substrate 150. A liquid crystal layer (LC) is bonded between the upper substrate 110 and the lower substrate 150 to control the light transmittance.

[0043] The liquid crystal display device 100 according to an exemplary embodiment of this disclosure is a borderless liquid crystal display device 100, and the upper substrate 110 is composed of an array substrate, and the lower substrate 150 is composed of a color filter substrate. That is, unlike the prior art, in the borderless liquid crystal display device 100 according to the exemplary embodiment of this disclosure, the liquid crystal display panel PNL is flipped so that the array substrate with a relatively large area is located above the color filter substrate. Therefore, the pad units formed on the upper array substrate are arranged facing the rear surface of the liquid crystal display panel PNL, so that means such as an outer cover (or top shell) for covering the pad units can be removed, and a four-sided borderless type can be achieved. At this time, as described above, the structure in which the array substrate is located above the part to be used as the viewing surface can be called a flip type.

[0044] The following will refer to Figure 3 Describe the specific structure of the PNL (Polymer Liquid Crystal Display) panel.

[0045] The backlight unit (BLU) is positioned below the liquid crystal display panel (PNL). The BLU may include a light source, a reflective film, a light guide plate, a guiding panel, and an optical film. In this case, the BLU uses any one of the following as its light source: a cold cathode fluorescent lamp (CCFL), a hot cathode fluorescent lamp (HCFL), an external electrode fluorescent lamp (EEFL), and a light-emitting diode (LED), but is not limited to these.

[0046] The cover plate CB is a housing member that houses and protects the components of the liquid crystal display device 100. The cover plate CB surrounds the side surfaces of the liquid crystal display panel PNL and the backlight unit BLU, and may be disposed on the rear surface of the backlight unit BLU. Specifically, the cover plate CB may be formed as a rectangular frame having vertically curved edges. For example, the cover plate CB may include a horizontal portion positioned opposite the rear surface of the backlight unit BLU and a vertical portion extending from the horizontal portion to surround the side surfaces of the liquid crystal display panel PNL and the backlight unit BLU.

[0047] The cover plate (CB) can include materials with high thermal conductivity and high rigidity to effectively dissipate heat from the drive circuitry and backlight unit (BLU) to the outside. For example, the cover plate (CB) can be made of metal sheets such as aluminum, aluminum nitride (AlN), electrolytic zinc-plated iron (EGI), stainless steel (SUS), aluminized zinc (SGLC), aluminized steel sheet (also known as ALCOSTA), and tin-plated steel sheet (SPTE), but is not limited to these.

[0048] In the following text, reference will be made to Figure 3 The liquid crystal display panel PNL of a liquid crystal display device 100 according to an exemplary embodiment of the present disclosure is described. Figure 3 This is a schematic cross-sectional view illustrating a portion of the liquid crystal display panel of a liquid crystal display device 100 according to an exemplary embodiment of the present disclosure.

[0049] Figure 3 A portion of an edge field switching (FFS) liquid crystal panel is schematically shown, wherein an edge field formed between pixel electrode 142 and common electrode 141 passes through a slit to drive liquid crystal molecules located in the pixel region and on common electrode 141 to realize an image. However, this disclosure is not limited to this and can also be applied to in-plane switching (IPS) liquid crystal display device 100 using a lateral electric field and FFS type.

[0050] Reference Figure 3 A liquid crystal display panel (PNL) includes a lower substrate 150 and an upper substrate 110. Thin-film transistors 120, various wiring lines, and electrodes are formed on the upper substrate 110 to define multiple sub-pixels. Color filters for displaying the three primary colors (red, green, and blue) and a black matrix BM dividing each sub-pixel can be formed on the lower substrate 150. Figure 2 As shown, an array substrate including a thin-film transistor 120 with a relatively large area is located above a color filter substrate to realize a borderless liquid crystal display device 100.

[0051] On the upper substrate 110, a plurality of gate lines and a plurality of data lines arranged horizontally and vertically to define a plurality of pixel regions, a thin film transistor 120 formed in the intersection region of the gate lines and the data lines, and a pixel electrode 142 disposed in the pixel region can be formed.

[0052] A thin-film transistor 120 is disposed under the upper substrate 110. The thin-film transistor 120 can be used as a driving element of a liquid crystal display device 100. The thin-film transistor 120 includes a gate electrode 121, an active layer 122, a source electrode 123, and a drain electrode 124. In an exemplary embodiment of the liquid crystal display device 100 according to this disclosure, the thin-film transistor 120 has the following structure: the active layer 122 is disposed under the gate electrode 121, and the source electrode 123 and drain electrode 124 are disposed under the active layer 122. Therefore, the thin-film transistor 120 has a bottom-gate structure in which the gate electrode 121 is disposed between the upper substrate 110 and the active layer 22, but is not limited thereto. Alternatively, the transistor can be a top-gate type thin-film transistor 120 in which the gate electrode 121 is disposed further away from the upper substrate 110 than the active layer 122.

[0053] A buffer layer can be disposed between the upper substrate 110 and the thin-film transistor 120. The buffer layer can be formed under the upper substrate 110 to protect various components of the liquid crystal display device 100 from the penetration of moisture (H2O) and hydrogen (H2) from outside the upper substrate 110. The buffer layer can be made of an insulating material, and for example, of silicon nitride (SiN). x ), silicon oxide (SiO) x ) and silicon nitride oxide (SiO) N It is composed of a single or double inorganic layer. However, depending on the structure or features of the liquid crystal display device 100, the buffer layer may be omitted.

[0054] The gate electrode 121 of the thin-film transistor 120 extends from the gate line. The gate electrode 121 can be formed of multiple layers, and for example, it can be formed of three layers. Specifically, the gate electrode 121 may include a first gate conductive layer 121a, a second gate conductive layer 121b, and a third gate conductive layer 121c. The first gate conductive layer 121a, the second gate conductive layer 121b, and the third gate conductive layer 121c can be sequentially laminated under the upper substrate 110.

[0055] The first gate conductive layer 121a may be formed of a transparent conductive material. For example, the transparent conductive material may be formed of tin oxide (TO), indium tin oxide (ITO), indium zinc oxide (IZO) or indium zinc tin oxide (ITZO), but is not limited thereto.

[0056] The third gate conductive layer 121c can be formed of an opaque conductive material. For example, the opaque conductive material can be formed of copper (Cu), molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), or alloys thereof, but is not limited thereto.

[0057] The second gate conductive layer 121b is disposed between the first gate conductive layer 121a and the third gate conductive layer 121c to reduce the reflectivity of the gate electrode 121. The second gate conductive layer 121b has low reflectivity. The second gate conductive layer 121b can be formed of a low-reflectivity conductive material.

[0058] As a first exemplary embodiment, the second gate conductive layer 121b includes a first transition metal oxide and a second transition metal oxide.

[0059] The first transition metal oxide may be an oxide selected from one or more of the group consisting of copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), and nickel (Ni). For example, when the transition metal oxide constituting the second gate conductive layer 121b is molybdenum, the first transition metal oxide may be MoO2, MoO3, or a combination thereof.

[0060] The second transition metal oxide is an oxide selected from at least one of the following: molybdenum (Mo), scandium (Sc), titanium (Ti), vanadium (V), chromium (Cr), manganese (Mn), iron (Fe), cobalt (Co), nickel (Ni), copper (Cu), zinc (Zn), zirconium (Zr), niobium (Nb), technetium (Tc), ruthenium (Ru), rhodium (Rh), cadmium (Cd), tantalum (Ta), tungsten (W), rhenium (Re), platinum (Pt), iridium (Ir), hafnium (Hf), and palladium (Pd). Ideally, the second transition metal oxide may be an oxide of niobium (Nb), tungsten (W), titanium (Ti), zirconium (Zr), or hafnium (Hf). For example, the second transition metal oxide may include, but is not limited to, one or more of the following: MoO2, MoO3, TiO2, V2O5, Cr2O3, CrO3, CrO, CrO2, MnO, FeO, Fe2O3, Fe3O4, CoO, Co3O4, NiO, CuO, Cu2O, ZnO, ZrO2, Nb2O5, CeO2, Au2O, Ag2O, PtO, PdO, and WO3.

[0061] In this case, the second transition metal oxide can be formed of a material different from the material of the first transition metal oxide described above. For example, when the first transition metal oxide constituting the second gate conductive layer 121b is a molybdenum oxide (MoO2 or MoO3), the second transition metal oxide can be an oxide formed of a different transition metal material other than MoO2 or MoO3. For example, the second transition metal oxide can be Nb2O5, but it is not limited to this.

[0062] Meanwhile, based on all the materials used to configure the second gate conductive layer 121b, namely the sum of the first transition metal oxide and the second transition metal oxide, 70% to 80% by weight of the first transition metal oxide may be included. Furthermore, based on all the materials used to configure the second gate conductive layer 121b, 20% to 30% by weight of the second transition metal oxide may be included. When the content of the first and second transition metal oxides in the second gate conductive layer 121b meets the aforementioned ranges, the second gate conductive layer 121b serves as a low-reflection layer between the first gate conductive layer 121a and the third gate conductive layer 121c, and can reduce the overall reflectivity of the gate electrode 121. Therefore, the reflective brightness of the liquid crystal display panel (PNL) can be improved.

[0063] As a second exemplary embodiment, the second gate conductive layer 121b may include a transition metal material, a first transition metal oxide, and a second transition metal oxide.

[0064] At this point, the transition metal material can be formed from copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni) or their alloys, and ideally, it can be copper (Cu), molybdenum (Mo) or nickel (Ni).

[0065] The first transition metal oxide is the same as the first transition metal oxide used in the first exemplary embodiment. However, the first transition metal oxide includes oxides of materials selected from the transition metal materials mentioned above. That is, when the transition metal oxide configuring the second gate conductive layer 121b is molybdenum, the first transition metal oxide can be MoO2, MoO3, or a combination thereof.

[0066] The second transition metal oxide is the same as that used in the first exemplary embodiment. However, the second transition metal oxide includes oxides of transition metal materials different from those selected from the aforementioned transition metal materials. That is, when the transition metal oxide configuring the second gate conductive layer 121b is molybdenum, the second transition metal oxide can be an oxide of a different transition metal material other than MoO2 and MoO3. For example, the second transition metal oxide can be Nb2O5, but is not limited thereto.

[0067] In a second exemplary embodiment, based on all the materials used to configure the second gate conductive layer 121b, namely the sum of the first transition metal oxide and the second transition metal oxide, 3% to 9% by weight of transition metal material may be included. Furthermore, based on all the materials used to configure the second gate conductive layer 121b, 55% to 77% by weight of the first transition metal oxide may be included. Additionally, based on all the materials used to configure the second gate conductive layer 121b, 20% to 30% by weight of the second transition metal oxide may be included.

[0068] The gate electrode 121 adjusts its reflectivity and transmittance by regulating the thicknesses of the first gate conductive layer 121a, the second gate conductive layer 121b, and the third gate conductive layer 121c. For example, the thickness of the first gate conductive layer 121a can be 30 nm to 60 nm, and the thickness of the third gate conductive layer 121c can be 100 nm to 500 nm, but is not limited thereto. Furthermore, the thickness of the second gate conductive layer 121b can be 20 nm to 70 nm, or 40 nm to 60 nm. By considering the reflectivity of the material in each of the conductive layers, the thicknesses of the first gate conductive layer 121a, the second gate conductive layer 121b, and the third gate conductive layer 121c can be adjusted to achieve both low reflectivity and high transmittance.

[0069] The reflectivity of the gate electrode 121 may be 20% or lower, and ideally, it may be 10% or lower. Furthermore, when a polarizer is applied, the reflectivity of the entire liquid crystal display device 100 may be 10% or lower, and ideally, it may be 6% or lower.

[0070] A gate insulating layer 131 is disposed below the gate electrode 121. The gate insulating layer 131 is a layer used to insulate the gate electrode 121 from the active layer 122 and can be formed of an insulating material. For example, the gate insulating layer 131 can be composed of a single layer or a double layer of silicon oxide SiOx or silicon nitride SiNx, but is not limited thereto.

[0071] An active layer 122 is disposed beneath the gate insulating layer 131. The active layer 122 is configured to overlap with the gate electrode 121. For example, the active layer 122 may be formed of amorphous silicon, polycrystalline silicon, oxide semiconductor, or organic semiconductor, but is not limited thereto.

[0072] A data line, a source electrode 123, and a drain electrode 124 are disposed beneath the active layer 122. The source electrode 123 and the drain electrode 124 are disposed on the same layer and spaced apart from each other. The source electrode 123 and the drain electrode 124 can contact the active layer 122 to be electrically connected to the active layer 122. The source electrode 123 extends from the data line.

[0073] A passivation layer 132 is disposed beneath the source electrode 123 and the drain electrode 124. The passivation layer 132 is an insulating layer used to protect the components above it. The passivation layer 132 can be a single layer or a double layer of silicon oxide (SiO2). x Or silicon nitride SiN x Configurations, but not limited to these.

[0074] A planarization layer 133 is disposed beneath the passivation layer 132. The planarization layer 133 is an insulating layer that planarizes the lower portion of the upper substrate 110. The planarization layer 133 may be formed of an organic material, and may be, for example, composed of a single or double layer of polyimide or photopolymer, but is not limited thereto. The planarization layer 133 may include contact holes for electrically connecting the thin-film transistor 120 and the pixel electrode 142.

[0075] A common electrode 141 is formed under the planarization layer 133. The common electrode 141 is electrically connected to a common line. The common electrode 141 is configured as a large electrode and is commonly used for the sub-pixel SP. In some exemplary embodiments, the common electrode 141 may be composed of multiple common electrode blocks. In this case, the common electrode blocks can be used as touch electrodes of a capacitive touch electrode, and the liquid crystal display device 100 can be implemented as a display device with embedded touch elements.

[0076] The common electrode 141 may be formed of a transparent conductive material. For example, the transparent conductive material may be formed of tin oxide (TO), indium tin oxide (ITO), indium zinc oxide (IZO) or indium zinc tin oxide (ITZO), but is not limited thereto.

[0077] A protective layer 134 is provided beneath the common electrode 141. The protective layer 134 is a layer used to insulate the common electrode 141 from the pixel electrode 142 and can be formed of an inorganic or organic insulating material. For example, the protective layer 134 can be a single or double layer of silicon oxide (SiO2). x Or silicon nitride SiN x It constitutes, but is not limited to, this.

[0078] A pixel electrode 142 is disposed beneath the protective layer 134. The pixel electrode 142 is electrically connected to the drain electrode 124 via a contact hole that passes through the protective layer 134, the planarization layer 133, and the passivation layer 132 above the pixel electrode 142. Although in Figure 3 The image shows a pixel electrode 142 in contact with the drain electrode 124 of the thin-film transistor 120, but in some exemplary embodiments, the pixel electrode 142 may be in contact with the source electrode of the thin-film transistor 120.

[0079] The pixel electrode 142 can be formed with a structure having multiple slits. In this case, the pixel electrode 142 can have a straight shape or a zigzag pattern with one or more curved portions. Although in Figure 3 In the liquid crystal display device 100, a structure is shown in which the pixel electrode 142 has a plurality of slits and the common electrode 141 is formed by a single electrode block, but it is not limited thereto. Therefore, in some exemplary embodiments, the pixel electrode 142 is formed by a single electrode block and the common electrode 141 has a plurality of slits.

[0080] Pixel electrode 142 is spaced apart from common electrode 141, with a protective layer 134 between them. When a voltage is applied to pixel electrode 142 via thin-film transistor 120, an edge field is formed between the spaced-apart pixel electrode 142 and common electrode 141. In this case, the liquid crystal located on pixel electrode 142 and common electrode 141 is rotated due to dielectric anisotropy, and the transmittance of light transmitted through the display area varies according to the degree of rotation of the liquid crystal, making it possible to control the amount of light in sub-pixels SP.

[0081] The black matrix BM, the color filter layer 160, and the spacer 170 are disposed on the lower substrate 150 opposite to the upper substrate 110.

[0082] The lower substrate 150 is a component used to support various parts included in the liquid crystal display device 100, and may be formed of an insulating material. For example, the lower substrate 150 may be formed of a glass substrate or a plastic substrate, such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyimide.

[0083] A black matrix BM is disposed on the lower substrate 150 to overlap with the thin-film transistor 120, gate lines, and data lines of the upper substrate 110. The black matrix BM can be formed of an opaque organic material, and for example, may include black resin. The black matrix BM can have a straight shape or a zigzag pattern with one or more curved portions. The thin-film transistor 120, gate lines, and data lines can be covered by the black matrix BM, and the areas where the black matrix BM is not disposed are open areas and correspond to the areas through which light is transmitted through the sub-pixel SP.

[0084] A color filter layer 160 is disposed on a black matrix BM. The color filter layer 160 includes a plurality of color filters that transmit light with different wavelengths from each other. The color filters may be composed of red, green, and blue color filters comprising red, green, and blue pigments. Color filters are used to absorb or transmit light with specific wavelengths to represent red, green, and blue. The color filters are formed as a straight line shape or a zigzag pattern having at least one or more curved portions. In some exemplary embodiments, the positions of the black matrix BM and the color filter layer 160 may be interchanged.

[0085] A spacer 170 for maintaining the gap between the lower substrate 150 and the upper substrate 110 is disposed between the lower substrate 150 and the upper substrate 110.

[0086] A liquid crystal layer LC is disposed in the gap formed by the spacer 170 between the lower substrate 150 and the upper substrate 110. The liquid crystal layer LC is a layer containing liquid crystal to transmit or block light through an electric field. Specifically, the liquid crystal layer LC changes its transmittance to display an image by means of an electric field generated by the common electrode 141 and the pixel electrode 142.

[0087] A liquid crystal display device 100 according to an exemplary embodiment of this disclosure uses a gate electrode 121 composed of multiple layers, including a gate electrode 121 composed of two transition metal oxides (first exemplary embodiment) or a transition metal material (second exemplary embodiment) and two transition metal oxides. Specifically, the liquid crystal display device has a structure in which a first gate conductive layer 121a, a second gate conductive layer 121b, and a third gate conductive layer 121c are sequentially laminated. The first gate conductive layer 121a is disposed on the lower surface of the upper substrate 110 and is formed of a transparent conductive material. The second gate conductive layer 121b is disposed on the lower surface of the first gate conductive layer 121a and includes a first transition metal oxide and a second transition metal oxide. The third gate conductive layer 121c is disposed on the lower surface of the second gate conductive layer 121b and is formed of an opaque conductive material. This structure can significantly reduce the reflectivity of external light. Furthermore, a second gate conductive layer 121b, serving as a low-reflection layer, is disposed between the first gate conductive layer 121a, formed of a transparent conductive layer (e.g., ITO), and the third gate conductive layer 121c, formed of an opaque conductive layer (e.g., Cu). By doing so, in the flip-type liquid crystal display device 100, the degradation of black brightness caused by the inherent color of copper (Cu) can be suppressed.

[0088] Figure 4 This is a schematic cross-sectional view illustrating a portion of the liquid crystal display panel (PNL) of a liquid crystal display device according to another exemplary embodiment of the present disclosure. Apart from the configuration of the common electrode 241 and the pixel electrode 242, Figure 4 The liquid crystal display device 200 shown is Figure 3 The liquid crystal display device 100 shown is basically the same, so redundant descriptions will be omitted.

[0089] Reference Figure 4 The common electrode 241 is formed under the substrate and on the same layer as the gate electrode 121. The common electrode 241 is configured to correspond to the pixel region so as not to overlap with the thin-film transistor 120. In some exemplary embodiments, the common electrode 241 may be composed of multiple common electrode blocks.

[0090] The common electrode 241 can be formed of the same material as the first gate conductive layer 121a of the gate electrode 121. That is, the common electrode 241 can be formed of the same transparent conductive material as the first gate conductive layer 121a. For example, the transparent conductive material can be formed of tin oxide (TO), indium tin oxide (ITO), indium zinc oxide (IZO) or indium zinc tin oxide (ITZO), but is not limited thereto.

[0091] The common electrode 241 can be formed together with the first gate conductive layer 121a through the same process. In this case, the common electrode 141 is disposed under the planarization layer 133. Figure 3 Compared to the liquid crystal display device 100 shown, its advantage is that it eliminates the need for a separate process for forming the common electrode 241.

[0092] Pixel electrode 242 is formed under passivation layer 232. Pixel electrode 242 is electrically connected to drain electrode 124 through contact holes passing through passivation layer 232. Pixel electrode 242 is spaced apart from common electrode 241, with gate insulating layer 231 and passivation layer 232 present between them. When a voltage is applied to pixel electrode 242 through thin-film transistor 120, an edge field is formed between the spaced-apart pixel electrode 242 and common electrode 241. Therefore, by forming the edge field, the liquid crystal is rotated, and the amount of light in sub-pixels SP can be controlled.

[0093] exist Figure 3 In the liquid crystal display device 100 shown, a separate protective layer 134 is disposed between the pixel electrode 142 and the common electrode 141. However, in a liquid crystal display device 200 according to another exemplary embodiment of the present disclosure, the pixel electrode 242 is formed under the passivation layer 232, so that the separate process for forming the protective layer can be omitted.

[0094] In another exemplary embodiment of the liquid crystal display device according to this disclosure, a common electrode is disposed under the substrate, on the same layer as the first gate conductive layer on which the gate electrode is disposed, and formed by the same process. Furthermore, since the common electrode and the gate electrode are located on the same layer, the pixel electrode can be disposed under the passivation layer. According to the structural features, the common electrode is formed by the same process as the first gate conductive layer, making it possible to omit the step of forming a separate common electrode. Furthermore, the step of forming a protective layer, which is formed to insulate the common electrode from the pixel electrode, can also be omitted. By doing so, the total number of steps in forming the liquid crystal display device can be reduced.

[0095] The effects of this disclosure will be described in more detail below with reference to examples and comparative examples. However, the following examples are provided to illustrate this disclosure, and the scope of this disclosure is not limited thereto.

[0096] Example 1

[0097] A gate electrode is formed on a substrate, wherein a 50 nm first gate conductive layer formed of ITO, a 50 nm second gate conductive layer formed of 60% by weight of MoO2, 15% by weight of MoO3 and 25% by weight of Nb2O5, and a 300 nm third gate conductive layer formed of Cu are sequentially laminated.

[0098] Example 2

[0099] A gate electrode is formed on a substrate, wherein a 50 nm first gate conductive layer formed of ITO, a 50 nm second gate conductive layer formed of 5% by weight of molybdenum metal, 60% by weight of MoO2, 10% by weight of MoO3 and 25% by weight of Nb2O5, and a 300 nm third gate conductive layer formed of Cu are sequentially laminated.

[0100] Comparison Example 1

[0101] A gate electrode is formed on a glass substrate, wherein a 50 nm first metal layer formed of ITO, a 10 nm second metal layer formed of copper (Cu), a 30 nm third metal layer formed of molybdenum-titanium (MoTi) alloy, and a 300 nm fourth metal layer formed of copper (Cu) are sequentially laminated.

[0102] Experimental Example 1

[0103] The reflectivity of the gate electrodes fabricated in Examples 1 and 2, as well as Comparative Example 1, toward the substrate surface was measured using a CM2600d (Konica Minolta). The measurement results are shown in... Figure 5A As shown in the figure. Furthermore, after a polarizing film is deposited on the opposite surface of the glass substrate on which the gate electrode is formed, the reflectivity in the direction in which the polarizing film is deposited is measured. The measurement results are shown in... Figure 5B As shown in the image.

[0104] Reference Figure 5A It was confirmed that the reflectivity of the structures in Examples 1 and 2, in which a low-reflectivity layer formed of molybdenum, molybdenum oxide, and niobium oxide is disposed between ITO and Cu, is significantly lower than that of the ITO / Cu / MoTi / Cu four-layer structure used as a gate electrode in the prior art. Furthermore, referring to... Figure 5B It was confirmed that when a polarizing film is placed on the opposite surface of the surface on which the gate electrode is disposed to improve the number of reflections, the overall transmittance is significantly improved. Specifically, in Examples 1 and 2, it was confirmed that the reflectance in the wavelength band of 400 nm to 550 nm is 15% or less, and when the polarizing film is applied, the reflectance is 6% or less.

[0105] Comparison Example 2

[0106] A gate electrode is formed on a substrate, wherein a 50 nm first gate conductive layer formed of ITO, a 50 nm second gate conductive layer formed of molybdenum (Mo) metal, and a 300 nm third gate conductive layer formed of copper (Cu) are sequentially laminated.

[0107] Comparison Example 3

[0108] A gate electrode is formed on a substrate, wherein a 50 nm first gate conductive layer formed of 5% by weight of molybdenum metal, 60% by weight of MoO2, 10% by weight of MoO3 and 25% by weight of Nb2O5, a 50 nm second gate conductive layer formed of ITO and a 300 nm third gate conductive layer formed of copper (Cu) are sequentially laminated.

[0109] Experimental Example 2

[0110] The reflectivity of the gate electrodes fabricated in Example 2 and Comparative Examples 2 and 3 toward the substrate surface was measured using a CM2600d (Konica Minolta). The measurement results are shown in... Figure 6 As shown in the image.

[0111] Reference Figure 6 Unlike Example 2, where a low-reflection layer formed of molybdenum, molybdenum oxide, and niobium oxide is disposed between ITO and Cu, in Comparative Example 2, where the second metal layer is formed solely of molybdenum, the overall reflectivity is lower than that of Comparative Example 1. However, the reflectivity is higher than that of Example 2. Furthermore, unlike Example 2, where a low-reflection layer is disposed between ITO and Cu, in Comparative Example 3, where the low-reflection layer / ITO / Cu is laminated in this order, the reflectivity is significantly higher than that of Example 2.

[0112] Experimental Example 3

[0113] In Example 1 of the fabrication, reflectivity was measured by varying the thickness of the second gate conductive layer formed from molybdenum, molybdenum oxide, and niobium oxide. The measurement results were... Figure 7 As shown in the image.

[0114] Reference Figure 7 It was confirmed that when the thickness of the second gate conductive layer is 40nm to 55nm, the effect of reducing reflectivity is excellent.

[0115] Exemplary implementations of this disclosure can also be described as follows:

[0116] According to an aspect of this disclosure, a liquid crystal display device is provided. The liquid crystal display device includes: a lower substrate having a black matrix and a color filter disposed thereon; an upper substrate disposed opposite to the lower substrate; a thin-film transistor disposed under the upper substrate opposite to the color filter, and including a gate electrode, an active layer, a source electrode, and a drain electrode; at least one insulating layer disposed under the thin-film transistor; a pixel electrode disposed under the insulating layer and electrically connected to the drain electrode; and a common electrode spaced apart from the pixel electrode. The gate electrode includes: a first gate conductive layer comprising a transparent conductive material; a second gate conductive layer comprising a first transition metal oxide and a second transition metal oxide; and a third gate conductive layer formed of an opaque conductive layer.

[0117] The upper substrate may have a larger area than the lower substrate.

[0118] The second gate conductive layer may further include a transition metal material, and the transition metal material is formed of copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni) or alloys thereof.

[0119] The first transition metal oxide may be an oxide of the transition metal material, and the second transition metal oxide may be an oxide of a transition metal material different from the transition metal material.

[0120] The first transition metal oxide may be an oxide selected from one or more of the group consisting of copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), and nickel (Ni), and the second transition metal oxide may be an oxide selected from one or more of the group consisting of niobium (Nb), tungsten (W), titanium (Ti), zirconium (Zr), and hafnium (Hf).

[0121] The second gate conductive layer can be formed of molybdenum (Mo), MoO2, MoO3 and Nb2O5.

[0122] The first gate conductive layer may include one or more selected from the group consisting of tin oxide (TO), indium tin oxide (ITO), indium zinc oxide (IZO) and indium zinc tin oxide (ITZO), and the third gate conductive layer comprises copper.

[0123] The second gate conductive layer may include: 70% to 80% by weight of a first transition metal oxide; and 20% to 30% by weight of a second transition metal oxide.

[0124] The second gate conductive layer may include: 3% to 9% by weight of a transition metal material; 55% to 77% by weight of a first transition metal oxide; and 20% to 30% by weight of a second transition metal oxide.

[0125] The thickness of the first gate conductive layer can be 30nm to 60nm; the thickness of the second gate conductive layer can be 40nm to 60nm; and the thickness of the third gate conductive layer can be 100nm to 500nm.

[0126] The at least one insulating layer may include: a passivation layer disposed under the thin-film transistor; a planarization layer disposed under the passivation layer; and a protective layer disposed under the planarization layer; and the common electrode may be disposed under the planarization layer, and the pixel electrode may be disposed under the protective layer.

[0127] The common electrode and the gate electrode can be formed on the same layer and can be formed of the same material as the first gate conductive layer.

[0128] The at least one insulating layer may include: a passivation layer disposed under the thin-film transistor; and a planarization layer disposed under the passivation layer, and the pixel electrode may be disposed under the passivation layer.

[0129] Although exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and can be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all respects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the appended claims, and all technical concepts within their equivalents should be interpreted as falling within the scope of the present disclosure.

Claims

1. A liquid crystal display device, comprising: The lower substrate has a black matrix and a color filter disposed thereon; An upper substrate is configured to be opposite the lower substrate; A thin-film transistor is disposed under the upper substrate opposite to the color filter, and includes a gate electrode, an active layer, a source electrode, and a drain electrode. At least one insulating layer is disposed under the thin-film transistor; A pixel electrode is disposed under the insulating layer and electrically connected to the drain electrode; as well as A common electrode, which is spaced apart from the pixel electrode. The gate electrode comprises: a first gate conductive layer comprising a transparent conductive material; a second gate conductive layer comprising a first transition metal oxide and a second transition metal oxide; and a third gate conductive layer formed of an opaque conductive layer. The gate electrode is formed by three layers: the first gate conductive layer, the second gate conductive layer, and the third gate conductive layer, which are sequentially laminated on the lower surface of the upper substrate, such that the second gate conductive layer is located between the first gate conductive layer and the third gate conductive layer.

2. The liquid crystal display device according to claim 1, wherein, The upper substrate has a larger area than the lower substrate.

3. The liquid crystal display device according to claim 1, wherein, The second gate conductive layer further includes a transition metal material, and the transition metal material is formed of copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni) or alloys thereof.

4. The liquid crystal display device according to claim 3, wherein, The first transition metal oxide is an oxide of the transition metal material, and the second transition metal oxide is an oxide of a transition metal material different from the transition metal material.

5. The liquid crystal display device according to claim 4, wherein, The first transition metal oxide is an oxide selected from one or more of the group consisting of copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), and nickel (Ni), and the second transition metal oxide is an oxide selected from one or more of the group consisting of niobium (Nb), tungsten (W), titanium (Ti), zirconium (Zr), and hafnium (Hf).

6. The liquid crystal display device according to claim 5, wherein, The second gate conductive layer is formed of molybdenum (Mo), MoO2, MoO3 and Nb2O5.

7. The liquid crystal display device according to claim 1, wherein, The first gate conductive layer comprises one or more selected from the group consisting of tin oxide (TO), indium tin oxide (ITO), indium zinc oxide (IZO) and indium zinc tin oxide (ITZO), and the third gate conductive layer comprises one or more selected from the group consisting of copper (Cu), molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) or alloys thereof.

8. The liquid crystal display device according to claim 1, wherein, The second gate conductive layer includes: 70% to 80% by weight of the first transition metal oxide; and 20% to 30% by weight of the second transition metal oxide.

9. The liquid crystal display device according to claim 3, wherein, The second gate conductive layer includes: The transition metal material comprises 3% to 9% by weight; 55% to 77% by weight of the first transition metal oxide; and 20% to 30% by weight of the second transition metal oxide.

10. The liquid crystal display device according to claim 1, wherein, The thickness of the first gate conductive layer is 30 nm to 60 nm; the thickness of the second gate conductive layer is 40 nm to 60 nm; and the thickness of the third gate conductive layer is 100 nm to 500 nm.

11. The liquid crystal display device according to claim 1, wherein, The at least one insulating layer includes: a passivation layer disposed beneath the thin-film transistor; a planarization layer disposed beneath the passivation layer; and a protective layer disposed beneath the planarization layer; and The common electrode is disposed under the planarization layer, and the pixel electrode is disposed under the protective layer.

12. The liquid crystal display device according to claim 1, wherein, The common electrode and the gate electrode are formed on the same layer and are made of the same material as the first gate conductive layer.

13. The liquid crystal display device according to claim 12, wherein, The at least one insulating layer includes: a passivation layer disposed beneath the thin-film transistor; and a planarization layer disposed beneath the passivation layer; and The pixel electrode is disposed under the passivation layer.

14. The liquid crystal display device according to claim 7, wherein, The third gate conductive layer comprises copper (Cu).

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