Power supply timing control method and apparatus

Abstract

A power timing control method includes executing, by a controller, a delay time regulation procedure triggered by a delay time regulation instruction, wherein the delay time regulation procedure includes waiting for a delay time, and then determining whether a plurality of output voltage values of a plurality of voltage conversion elements respectively reach corresponding target levels, wherein the target levels respectively correspond to the output voltage values. If any of the output voltage values fails to reach the corresponding target level, the delay time is lengthened according to a first predetermined time interval, and the delay time is updated for execution of the delay time regulation procedure triggered by the delay time regulation instruction again. If the output voltage values have reached the target levels, a good power output signal is output to a central processing unit to enable the central processing unit to execute a booting procedure. The present disclosure also relates to a power timing control device.

Description

Technical Field

[0001] This invention relates to a power supply timing control method and apparatus. Background Technology

[0002] The computer boot sequence is an important mechanism in circuit design, which determines when the computer will boot up. However, the computer may fail to boot up due to an unstable power supply, and the user may need to try to boot up multiple times before it can be successfully booted up.

[0003] Furthermore, in existing technologies, the power status of voltage conversion components in a computer is typically monitored through a power supply voltage monitor (VCC monitor). When power is input to the voltage conversion component, the metal-oxide-semiconductor field-effect transistor (MOSFET) or other switching element in the VCC monitor turns on, and the VCC monitor sends a power good (PG) signal to the central processing unit to initiate the boot process. However, the VCC monitor sends the power good signal only when it detects that the voltage conversion component has power, at which point the voltage of the voltage conversion component may not be stable, causing the computer to fail to boot. Moreover, after a boot failure, the user can only speculate that the voltage conversion component is faulty and replace it before the computer can boot. Summary of the Invention

[0004] In view of the above, the present invention provides a power supply timing control method and apparatus to meet the above requirements.

[0005] A power timing control method according to an embodiment of the present invention includes, by means of a controller, executing a delay time control program triggered by a delay time control instruction, wherein the delay time control program includes: waiting for a delay time, determining whether multiple output voltage values ​​of multiple voltage conversion elements have reached multiple target values, wherein these target values ​​respectively correspond to the output voltage values; if any of the output voltage values ​​has not reached the corresponding target value, extending the delay time according to a first predetermined time interval and updating the delay time, and executing the delay time control program when triggered by the delay time control instruction again; and if the output voltage values ​​have reached the target values, outputting a power good signal to a central processing unit to cause the central processing unit to execute a power-on procedure.

[0006] A power timing control device according to an embodiment of the present invention includes: a central processing unit (CPU) electrically connected to a plurality of voltage conversion elements, the CPU executing a power-on procedure after receiving a power-good signal; and a controller electrically connected to the CPU and the voltage conversion elements; wherein the controller is triggered by a delay time adjustment command to execute a delay time adjustment procedure, wherein the delay time adjustment procedure includes: waiting for a delay time, determining whether a plurality of output voltage values ​​of the voltage conversion elements have reached a plurality of target values, wherein the target values ​​correspond to the output voltage values ​​respectively; if any of the output voltage values ​​has not reached the corresponding target value, the controller extends the delay time according to a first predetermined time interval and updates the delay time; when triggered by the delay time adjustment command again, the delay time adjustment procedure is executed; if the output voltage values ​​have reached the target values ​​respectively, the controller outputs a power-good signal.

[0007] In summary, according to the power timing control method and apparatus shown in one or more embodiments of the present invention, even if some components in the computer are aging and require a longer boot time, the computer can still boot and run normally by adjusting the delay time without replacing hardware components. Furthermore, the power timing control method and apparatus shown in one or more embodiments of the present invention can ensure that the output voltage value of each voltage conversion element reaches the target standard, and the boot process is only initiated when the output voltage value of each voltage conversion element reaches the target standard. Moreover, if a voltage conversion element malfunctions, the user can quickly identify which voltage conversion element is faulty and take appropriate action.

[0008] The foregoing description of the contents of this disclosure and the following description of the embodiments are intended to demonstrate and explain the spirit and principles of the present invention, and to provide a further explanation of the claims of the present invention. Attached Figure Description

[0009] Figure 1 This is a schematic diagram illustrating the connection relationship between a power timing control device and a voltage conversion element according to an embodiment of the present invention.

[0010] Figure 2 This is a flowchart illustrating a power supply timing control method according to an embodiment of the present invention.

[0011] Figure 3 This is a flowchart illustrating a power supply timing control method according to another embodiment of the present invention.

[0012] The reference numerals in the attached figures are explained as follows:

[0013] 10: Power supply timing control device

[0014] 101: Controller

[0015] 1011: Controller Core

[0016] 102: Central Processing Unit

[0017] PS: Power supply components

[0018] VCC1: First voltage conversion element

[0019] VCC2: Second voltage conversion element

[0020] VCC3: Third voltage conversion element

[0021] A: First element

[0022] B: Second Component

[0023] C: Third Component

[0024] ADC1: First Analog-to-Digital Converter

[0025] ADC2: Second Analog-to-Digital Converter

[0026] ADC3: Third Analog-to-Digital Converter

[0027] S11, S13, S15, S17, S19, S21, S23, S25, S27, S29: Steps

[0028] DP: Delay Time Adjustment Program Detailed Implementation

[0029] The following detailed description of the features and advantages of the present invention in the embodiments is sufficient to enable anyone skilled in the art to understand the technical content of the present invention and implement it accordingly. Based on the disclosure, claims, and drawings in this specification, anyone skilled in the art can easily understand the related objectives and advantages of the present invention. The following embodiments are further detailed in illustrating the points of view of the present invention, but are not intended to limit the scope of the present invention in any way.

[0030] Please refer to Figure 1 , Figure 1 This is a schematic diagram illustrating the connection relationship between a power timing control device and a voltage conversion element according to an embodiment of the present invention. Figure 1The present invention illustrates a power timing control device 10, which is electrically connected to a first voltage conversion element VCC1, a second voltage conversion element VCC2, and a third voltage conversion element VCC3. The first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 are further electrically connected to a power supply element PS, and are also electrically connected to a first element A, a second element B, and a third element C, respectively. The first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 receive power from the power supply element PS and are respectively used to output power to the first element A, the second element B, and the third element C. The first element A, the second element B, and the third element C can be electronic components on a computer motherboard, such as a memory, a network chip, a southbridge chip, a northbridge chip, etc. The present invention does not limit the types of the first element A, the second element B, and the third element C.

[0031] Furthermore, the control device 10 of the present invention may include a controller 101 and a central processing unit 102 connected to each other. The controller 101 and the central processing unit 102 may be connected to each other via a transmission interface such as I2C or a system management bus (SMBus), but the present invention does not limit the connection method between the controller 101 and the central processing unit 102. The controller 101 may be a microcontroller (MCU), and the controller 101 includes a controller core 1011 and a first analog-to-digital converter (ADC) ADC1, a second analog-to-digital converter ADC2, and a third analog-to-digital converter ADC3 electrically connected to the controller core 1011. The controller 101 has a pre-stored delay time, which is the time interval between the triggering of a delay time-controlled command (e.g., a power-on signal) and the output of a power-good (PG) signal.

[0032] The first analog-to-digital converter (ADC1), the second analog-to-digital converter (ADC2), and the third analog-to-digital converter (ADC3) are electrically connected to the first voltage conversion element (VCC1), the second voltage conversion element (VCC2), and the third voltage conversion element (VCC3), respectively. The first analog-to-digital converter (ADC1), the second analog-to-digital converter (ADC2), and the third analog-to-digital converter (ADC3) are selectively configured. The central processing unit (CPU) 102 and electronic components on the motherboard can be electrically connected to the first voltage conversion element (VCC1), the second voltage conversion element (VCC2), or the third voltage conversion element (VCC3) to receive standby voltage.

[0033] After the user presses the power button, the power supply element PS outputs standby voltage to the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3. The first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 then output power to the central processing unit 102 and the first element A, the second element B, and the third element C. The controller 101 can monitor the power status of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3, thereby driving the central processing unit 102 to execute the power-on program or the controller 101 to adjust its own pre-stored delay time. Details will be described later.

[0034] The first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 can be voltage conversion elements installed in an industrial computer (IPC) or a notebook computer. The power timing control device 10 of the present invention can be used to monitor the power status of voltage conversion elements VCC1 to VCC3 in the industrial computer or notebook computer, so as to perform the power-on procedure after confirming that the power supply is stable.

[0035] For a more detailed explanation of the power supply timing control method and the power supply timing control device 10 (hereinafter referred to as "control device 10") of the present invention, please refer to the following: Figure 1 and Figure 2 ,in Figure 2 This is a flowchart illustrating a power supply timing control method according to an embodiment of the present invention.

[0036] In step S11, the controller 101 of the control device 10 is triggered by a delay time adjustment command to execute a delay time adjustment program DP, wherein the delay time adjustment command may be a power-on signal.

[0037] The delay time control procedure DP includes steps S13 and S15. In steps S13 and S15, after the controller 101 of the control device 10 waits for a delay time after the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 have been activated, the first analog-to-digital converter ADC1, the second analog-to-digital converter ADC2, and the third analog-to-digital converter ADC3 of the controller 101 can convert the multiple analog voltages output by the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 into multiple digital voltages respectively. The controller core 1011 of the controller 101 obtains the output voltage values ​​after analog-to-digital conversion and determines whether these output voltage values ​​have reached multiple target values ​​respectively.

[0038] Specifically, the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 each have a corresponding rated voltage (target value). After the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 are started, the controller 101 of the control device 10 may need to wait for a period of time (delay time) to allow the output voltage values ​​of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 to reach their respective target values. Therefore, in step S13, the controller core 1011 can wait for a delay time. Then, in step S15, the first analog-to-digital converter ADC1, the second analog-to-digital converter ADC2, and the third analog-to-digital converter ADC3 of the control device 10 convert the analog voltages of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 into digital output voltage values. The controller core 1011 of the controller 101 can then determine whether the output voltage values ​​of each of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 have reached their respective target values ​​after the delay time.

[0039] If the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 all reach their corresponding target values ​​after the delay time, it indicates that the delay time is sufficient. Therefore, in step S17, the controller core 1011 can output a power good signal to the central processing unit 102 to enable the central processing unit 102 to execute the power-on procedure.

[0040] If any of the output voltage values ​​of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 fail to reach the corresponding target value after the delay time, it indicates that the delay time is too short. Therefore, if the controller 101 determines that the output voltage value of any of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 fails to reach the corresponding target value after the delay time, step S19 can be executed. In step S19, the controller 101 extends the delay time according to the first predetermined time interval and updates the delay time stored in the controller 101 with the extended delay time. In addition, the controller 101 can also record the delay time corresponding to any output voltage value failing to reach the corresponding target value, and extend the recorded delay time according to the first predetermined time interval. Afterwards, if the controller 101 is triggered again by a delay time adjustment command (e.g., a power-on signal), the controller 101 can execute the delay time adjustment program DP again. The first predetermined time interval is, for example, 20 milliseconds, and the present invention does not limit the actual value of the first predetermined time interval. For example, if the pre-stored delay time is 210 milliseconds, and the first voltage conversion element VCC1 does not reach the corresponding target level after the 210 millisecond delay time, then in step S19, the controller 101 can extend the delay time to 230 milliseconds according to the first predetermined time interval of 20 milliseconds to update the delay time stored in the controller 101.

[0041] Alternatively, the controller 101 can receive the delay time value input by the user through the Basic Input / Output System (BIOS) interface, adjust the delay time to the user's desired time, and store the user-adjusted delay time.

[0042] In one implementation, if the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 all reach their corresponding target values ​​after a delay time, it indicates that the delay time will not cause a power-on failure. Therefore, the controller 101 can maintain the original delay time without adjusting it.

[0043] In another embodiment, if the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 all reach their corresponding target values ​​after a delay time, the controller 101 can further execute a delay time optimization program to obtain a more accurate delay time. The delay time optimization program includes shortening the delay time according to a second predetermined time interval until any of these output voltage values ​​fails to reach the corresponding target value, and storing the previous delay time as an optimal delay time. It should be noted that the controller core 1011 can simulate the action of a user triggering the power button. Therefore, after the controller core 1011 shortens the delay time according to the second predetermined time interval and updates its stored delay time, the controller core 1011 simulates the action of a user triggering the power button until any of the output voltage values ​​of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 fails to reach its corresponding target value. At this point, the controller core 1011 can use the previous delay time as the optimal delay time to update the previously stored delay time. The second predetermined time interval is, for example, 20 milliseconds. The first predetermined time interval may be the same as or different from the second predetermined time interval. The present invention does not limit the actual values ​​of the first predetermined time interval and the second predetermined time interval.

[0044] For example, if the pre-stored delay time is 330 milliseconds, and the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 all reach their corresponding target values ​​after the 330 millisecond delay time, then the controller core 1011 can shorten the delay time from 330 milliseconds to 310 milliseconds according to a second predetermined time interval of 20 milliseconds, and simulate the action of the power button being triggered by the user to restart the computer. After the computer restarts, if the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 still reach their corresponding target values ​​after the 310 millisecond delay time, then the controller core 1011 can shorten the delay time again by the predetermined time interval. Assuming that the output voltage value of the first voltage conversion element VCC1 has not reached the target value until the delay time is shortened to 210 milliseconds, then the controller core 1011 can update the delay time according to the previous delay time, and the updated delay time (the previous delay time) is 230 milliseconds.

[0045] Please refer to the delay time adjustment procedure DP and step S19 together. Specifically, the control device 10 can repeatedly execute the time adjustment procedure DP and step S19 to gradually adjust the delay time. That is, after the controller 101 increases the delay time and updates the increased extension time in step S19, if the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 all reach the corresponding target position after the delay time at the next power-on, then the delay time increased in step S19 is the optimal delay time. Alternatively, after the controller 101 shortens the delay time and updates the extension time stored in the controller 101, if at the next power-on, one of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 does not reach the corresponding target position after the delay time, it indicates that the delay time before being shortened was the optimal delay time. In other words, among the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3, the one that takes the longest time to reach the target voltage value is the updated delay time stored in the controller core 1011 of the controller 101.

[0046] In short, the control device 10 can obtain the optimal delay time by increasing the delay time when the delay time is too short and shortening the delay time when the delay time is too long. The optimal delay time is, for example, the time from when the first voltage conversion element VCC1, the second voltage conversion element VCC2 and the third voltage conversion element VCC3 are activated until their output voltage values ​​just reach the target standard position.

[0047] After updating the pre-stored delay time, if the controller 101 is triggered again by a delay time adjustment command (e.g., a power-on signal), the controller core 1011 can wait for the delay time to elapse before outputting a power-good signal to the central processing unit 102. The central processing unit 102 then executes the power-on program. At this time, the output voltages of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 all reach their corresponding target values. Therefore, if any of the first voltage conversion element VCC1, the second voltage conversion element VCC2, or the third voltage conversion element VCC3 requires more time to reach the target value due to component aging or other reasons, the delay time can be adjusted to allow the computer to still power on and run without replacing the hardware components.

[0048] In another embodiment, the power timing control method, in addition to steps S13, S15, S17, and S19, further includes executing a monitoring program by the controller 101. Please refer to the following... Figure 1 and Figure 3 ,in Figure 3This is a flowchart of a monitoring procedure in a power supply timing control method according to another embodiment of the present invention. The monitoring procedure includes steps S21, S23, S25, S27 and S29. Figure 3 The embodiments also include Figure 2 Steps S13, S15, S17, and S19, wherein steps S13, S15, S17, and S19 can be executed in Figure 2 After step S21, and Figure 2 Step S13 can be combined with Figure 3 Step S23 is performed in parallel, while for Figure 2 Steps S15, S17 and S19 and Figure 3 The execution order of steps S25, S27 and S29 is not limited by this invention.

[0049] In step S21, the controller 101 is triggered by a delay time adjustment command (e.g., a power-on signal). In step S23, the controller core 1011 can record multiple current voltage change data of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3. The current voltage change data can indicate multiple current delay times for the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 to output power to the first element A, the second element B, and the third element C, respectively, to reach the corresponding target standard position. The controller core 1011 can record the change of the current output voltage value of each voltage conversion element over time in the form of a voltage change curve to record the current delay time required for the current output voltage value to reach the target standard position, or directly record the current delay time required for the current output voltage value of each voltage conversion element to reach the target standard position.

[0050] Next, in step S25, the controller core 1011 compares multiple current voltage change data of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 with multiple corresponding historical voltage change data to obtain multiple difference data between the multiple current voltage change data and the multiple historical voltage change data. Specifically, in step S25, the controller core 1011 can define the multiple voltage change data as multiple current delay times when the multiple current output voltage values ​​of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 reach multiple target values, and define the multiple historical voltage data as multiple historical delay times when the multiple historical output voltage values ​​of the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3 reach the corresponding target values, and use the difference between the multiple current delay times and the corresponding multiple historical delay times as multiple difference data.

[0051] Taking the first voltage conversion element VCC1 as an example, the controller core 1011 can record the difference between the time required for the current output voltage value of the first voltage conversion element VCC1 to reach the target standard and the time required for the historical output voltage value of the first voltage conversion element VCC1 to reach the target standard. This time difference can be used as the difference data of the first voltage conversion element VCC1 recorded by the controller core 1011.

[0052] After acquiring multiple difference data from the first voltage conversion element VCC1, the second voltage conversion element VCC2, and the third voltage conversion element VCC3, in step S27, the controller core 1011 determines whether any of the multiple difference data reaches a difference upper limit, where the difference upper limit is the maximum allowable time difference between the current delay time required for the current output voltage value to reach the target standard and the corresponding historical delay time. Therefore, if the controller core 1011 determines that none of the multiple difference data has reached the difference upper limit, the controller core 1011 can terminate the monitoring program; if the controller core 1011 determines that any of the multiple difference data has reached the difference upper limit, the controller core 1011 outputs a warning notification in step S29.

[0053] For example, suppose the upper limit of the difference is 50 milliseconds, and the current delay time of the first voltage conversion element VCC1 is 500 milliseconds, the historical delay time is 200 milliseconds, and the difference data is 300 milliseconds. At this time, the controller core 1011 determines that the difference data of 300 milliseconds is greater than the upper limit of 50 milliseconds. The controller core 1011 can output a warning notification associated with the first voltage conversion element VCC1 to a user interface (e.g., LED indicator, display, or buzzer) to notify the user that the first voltage conversion element VCC1 may have a problem.

[0054] This ensures that the output voltage of each voltage conversion element reaches the target level, and the power-on procedure is only initiated when the output voltage of each voltage conversion element reaches the target level. Furthermore, in the event of a voltage conversion element failure, the user can quickly identify which element is faulty and take appropriate action.

[0055] In summary, according to the power timing control method and apparatus shown in one or more embodiments of the present invention, even if some components in the computer are aging and require a longer boot time, the computer can still boot and run normally by adjusting the delay time without replacing hardware components. Furthermore, the power timing control method and apparatus shown in one or more embodiments of the present invention can ensure that the output voltage value of each voltage conversion element reaches the target standard, and the boot process is only initiated when the output voltage value of each voltage conversion element reaches the target standard. Moreover, if a voltage conversion element malfunctions, the user can quickly identify which voltage conversion element is faulty and take appropriate action.

[0056] While the present invention has been disclosed above with reference to the foregoing embodiments, it is not intended to limit the invention. Any modifications and refinements made without departing from the spirit and scope of the invention are within the scope of patent protection of the present invention. For a description of the scope of protection defined in the present invention, please refer to the appended claims.

Claims

1. A power supply timing control method, characterized in that, Includes execution via a controller: Triggered by a delay time adjustment instruction, a delay time adjustment procedure is executed, wherein the delay time adjustment procedure includes: After waiting for a delay time, it is determined whether the multiple output voltage values ​​of multiple voltage conversion elements have reached multiple target values, wherein the target values ​​correspond to the output voltage values ​​respectively. If any of the output voltage values ​​fails to reach the corresponding value in the target standard position, the delay time is increased according to a first predetermined time interval and the delay time is updated. The delay time adjustment procedure is executed when the delay time adjustment command is triggered again. as well as If the output voltage values ​​reach the target standard, a power good signal is output to a central processing unit to cause the central processing unit to execute a power-on program. The following is executed after being triggered by the delay time adjustment command: Record multiple current voltage change data of the voltage conversion element; The current voltage change data is compared with the corresponding historical voltage change data to obtain multiple difference data between the current voltage change data and the historical voltage change data. Determine whether any of the difference data reaches a difference limit; as well as When any of the difference data reaches the difference limit, a warning notification is output.

2. The power supply timing control method as described in claim 1, characterized in that, Determining whether the output voltage value of the voltage conversion element reaches the target value includes: The multiple analog voltages output by the voltage conversion element are converted into multiple digital voltages, and the voltage values ​​of the digital voltages are used as the output voltage values.

3. The power supply timing control method as described in claim 1, characterized in that, It also includes: If the output voltage values ​​reach the target standard, the delay time is shortened according to a second predetermined time interval until either of the output voltage values ​​fails to reach the corresponding target standard. The previous delay time is then stored as an optimal delay time.

4. The power supply timing control method as described in claim 1, characterized in that, The difference data obtained between the current voltage change data and the historical voltage change data includes: The current voltage change data is defined as the multiple current delay times at which the multiple current output voltage values ​​of the voltage conversion element reach the target standard position; The historical voltage change data is defined as indicating the multiple historical delay times by which multiple historical output voltage values ​​of the voltage conversion element reach the target standard; and The difference between the current delay time and the corresponding historical delay time is used as the difference data.

5. A power supply timing control device, characterized in that, Include: A central processing unit, electrically connected to multiple voltage conversion elements, executes a power-on procedure upon receiving a power-good signal; A controller is electrically connected to the central processing unit and the voltage conversion element; The controller is triggered by a delay time adjustment command to execute a delay time adjustment program, wherein the delay time adjustment program includes: After a delay period, it is determined whether the multiple output voltage values ​​of the voltage conversion element have reached multiple target values, wherein each target value corresponds to one of the output voltage values. If any of the output voltage values ​​fails to reach the corresponding target value, the controller extends the delay time according to a first predetermined time interval and updates the delay time. The delay time adjustment procedure is then executed again when triggered by the delay time adjustment command. If the output voltage values ​​reach the target standard position respectively, the controller outputs the power good signal; Specifically, after the controller is triggered by the delay time adjustment command, the controller further records multiple current voltage change data of the voltage conversion element, and compares the current voltage change data with the corresponding multiple historical voltage change data to obtain multiple difference data between the current voltage change data and the historical voltage change data. The controller further determines whether any of the difference data reaches a difference upper limit, and outputs a warning notification when it determines that any of the difference data reaches the difference upper limit.

6. The power supply timing control device as described in claim 5, characterized in that, If the output voltage values ​​reach the target values ​​respectively, the controller shortens the delay time according to a second predetermined time interval until either of the output voltage values ​​fails to reach the corresponding target value, and stores the previous delay time as an optimal delay time.

7. The power supply timing control device as described in claim 5, characterized in that, The controller includes at least one analog-to-digital converter connected to the voltage conversion element. The analog-to-digital converter receives multiple analog voltages output by the voltage conversion element, converts the analog voltages into multiple digital voltages respectively, and uses the voltage values ​​of the digital voltages as the output voltage values.

8. The power supply timing control device as described in claim 5, characterized in that, The current voltage change data indicates that multiple current output voltage values ​​of the voltage conversion element have reached multiple current delay times of the target standard position, and the historical voltage change data indicates that multiple historical output voltage values ​​of the voltage conversion element have reached multiple historical delay times of the target standard position, and the difference data is the difference between the current delay time and the corresponding historical delay time.

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