Data stream migration method and device, storage medium and electronic device

CN116414293BActive Publication Date: 2026-10-30NANJING CENTCO COMM CO LTD
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Patent Information

Application Number
CN202111663246.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-30
Publication Date
2026-10-30
Estimated Expiration
2041-12-30

AI Technical Summary

Technical Problem

[0005]本发明实施例提供了一种数据流的搬移方法、装置、存储介质和电子装置,以至少解决相关技术中存在的数据搬移效率较低的问题

Benefits of technology

[0016]通过本发明,通过获取在交换设备的片内缓存器内缓存的多个待搬移的数据流,其中,多个待搬移的数据流的数量大于交换设备所包括的搬移单元的数量;按照对多个待搬移的数据流中包括的每个目标数据流进行处理的处理效率由低到高,依次从交换设备所包括的搬移单元中为每个目标数据流分配目标搬移单元;使用目标搬移单元将所对应的目标数据流搬移到交换设备的片外缓存器中,即,当有数据流需要从片内缓存器搬移到片外缓存器进行缓存时,根据每个待搬移的数据流在片内的处理效率的从低到高的顺序,为每个目标数据流分配目标搬移单元,从而使得处理效率低的数据流优先搬移,并且使用对应的目标搬移单元搬移目标数据从而避免了同一个队列的数据可能在多个数据搬移接口中进行操作的数据乱序问题,因此,解决了相关技术中存在数据搬移效率较低的问题,达到了提高数据的搬移效率的效果。

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Abstract

Embodiments of the present application provide a data stream moving method and device, a storage medium and an electronic device, wherein the method comprises: obtaining a plurality of data streams to be moved which are cached in an on-chip buffer of a switching device, wherein the number of the plurality of data streams to be moved is greater than the number of moving units included in the switching device; allocating a target moving unit for each target data stream from the moving units included in the switching device in turn according to the processing efficiency from low to high of processing each target data stream included in the plurality of data streams to be moved; and moving the corresponding target data stream to an off-chip buffer of the switching device using the target moving unit. Through the present application, the problem of low data moving efficiency in the related art is solved, thereby achieving the effect of improving the data moving efficiency.
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Description

Technical Field

[0001] The present invention relates to the field of data processing, and more specifically, to a method, apparatus, storage medium, and electronic device for transferring data streams. Background Technology

[0002] In recent years, with the rapid development of information technology, network switching chips have been increasingly used for data processing. Traditional multi-channel data switching chips temporarily store the received data in the chip's cache module during data processing, and then output the processed data after processing. However, with the increasing demands of applications, the amount of data that switching chips need to process is growing, but the storage space of the chip's cache module is relatively small, far from meeting the requirements of network switching chips in the information age to absorb and buffer bursts of data. In this context, network switching chips can add external storage interfaces to expand the chip's cache capacity through external high-capacity memory chips, thereby increasing the ability to absorb bursts of data.

[0003] Figure 1 This is a diagram illustrating the use of related technologies for external caching, such as... Figure 1 As shown, when there is too much data in the on-chip chip cache, the on-chip data is moved to off-chip storage through the output queue module. During the move, the data is often moved according to the order of the received data queue. This means that the moved data may not be the data that caused the on-chip chip cache congestion, and it cannot effectively solve the problem of on-chip cache congestion. In addition, in order to meet the data operation requirements of such high-bandwidth off-chip memory, the on-chip chip needs at least two corresponding data move interfaces. Since there is physical latency in data move, data in the same queue may be operated on in multiple data move interfaces, which leads to the problem of out-of-order data writing to high-bandwidth off-chip memory.

[0004] There is currently no effective solution to the problem of low data migration efficiency in related technologies. Summary of the Invention

[0005] This invention provides a data transfer method, apparatus, storage medium, and electronic device to at least solve the problem of low data transfer efficiency in related technologies.

[0006] According to an embodiment of the present invention, a method for migrating data streams is provided, comprising: acquiring a plurality of data streams to be migrated cached in an on-chip buffer of a switching device, wherein the number of the plurality of data streams to be migrated is greater than the number of migration units included in the switching device; sequentially allocating a target migration unit from the migration units included in the switching device for each target data stream according to the processing efficiency of processing each target data stream included in the plurality of data streams to be migrated from low to high; and using the target migration unit to migrate the corresponding target data stream to an off-chip buffer of the switching device.

[0007] Optionally, the step of sequentially allocating a target transfer unit from the transfer units included in the switching device to each target data stream according to the processing efficiency of processing each target data stream included in the plurality of data streams to be transferred from low to high includes: obtaining the data stream with the lowest processing efficiency that has not been allocated a transfer unit from the plurality of data streams to be transferred as the target data stream; obtaining a transfer unit in an idle state from the transfer units included in the switching device; and allocating the target transfer unit to the target data stream from the transfer units in the idle state.

[0008] Optionally, the step of sequentially allocating target transfer units from the transfer units included in the switching device for each target data stream according to the processing efficiency of processing each target data stream included in the plurality of data streams to be transferred from low to high includes: obtaining transfer units in an idle state from the transfer units included in the switching device; and allocating the transfer units in an idle state to the target number of data streams among the plurality of data streams to be transferred that have not been allocated transfer units and have the lowest processing efficiency, wherein the target number is the number of transfer units in an idle state.

[0009] Optionally, the step of obtaining idle transfer units from the transfer units included in the switching device includes: detecting the first buffer amount occupied by the data stream currently being transferred by the transfer units included in the switching device in the on-chip buffer; releasing transfer units whose first buffer amount is lower than a first threshold and determining them as idle transfer units.

[0010] Optionally, the step of allocating a target migration unit to each target data stream from the migration units included in the switching device in order of increasing processing efficiency for processing each target data stream among the plurality of data streams to be migrated includes: dividing the plurality of data streams to be migrated into a first data stream set and a second data stream set according to the second cache size of the on-chip cache occupied by each target data stream among the plurality of data streams to be migrated, wherein the first data stream set includes first data streams among the plurality of data streams to be migrated whose second cache size is greater than or equal to a second threshold, and the second data stream set includes second data streams among the plurality of data streams to be migrated whose second cache size is less than the second threshold; allocating the target migration unit to each first data stream from the migration units included in the switching device in order of increasing processing efficiency for processing each first data stream; and allocating the target migration unit to each second data stream from the migration units included in the switching device in order of increasing processing efficiency for processing each second data stream.

[0011] Optionally, acquiring multiple data streams to be moved cached in the on-chip buffer of the switching device includes: detecting the third buffer amount occupied by each data stream among all data streams cached in the on-chip buffer of the switching device; identifying data streams with the third buffer amount greater than a third threshold as candidate data streams; and identifying the candidate data streams as the multiple data streams to be moved if the number of candidate data streams is greater than the number of moving units included in the switching device.

[0012] Optionally, the step of using the target transfer unit to transfer the corresponding target data stream to the off-chip buffer of the switching device includes: determining a first buffer location of the target data stream in the on-chip buffer; controlling the target transfer unit to acquire transfer data matching the capacity of the target transfer unit in the first buffer location according to the order of data in the target data stream; and controlling the transfer unit to transfer the transfer data to a second buffer location of the off-chip buffer.

[0013] According to another embodiment of the present invention, a data stream transfer device is also provided, comprising: an acquisition module, configured to acquire a plurality of data streams to be transferred cached in an on-chip buffer of a switching device, wherein the number of the plurality of data streams to be transferred is greater than the number of transfer units included in the switching device; an allocation module, configured to allocate a target transfer unit to each target data stream from the transfer units included in the switching device in order of increasing processing efficiency for processing each target data stream included in the plurality of data streams to be transferred; and a transfer module, configured to use the target transfer unit to transfer the corresponding target data stream to an off-chip buffer of the switching device.

[0014] According to yet another embodiment of the present invention, a computer-readable storage medium is also provided, wherein a computer program is stored therein, wherein the computer program is configured to perform the steps in any of the above method embodiments when executed.

[0015] According to yet another embodiment of the present invention, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0016] This invention addresses the issue of low data transfer efficiency by acquiring multiple data streams cached in the on-chip buffer of a switching device, where the number of data streams exceeds the number of transfer units included in the switching device. Target transfer units are allocated sequentially from the transfer units of the switching device to each target data stream, based on their processing efficiency from low to high. The target data streams are then transferred to the off-chip buffer of the switching device using these target transfer units. Specifically, when a data stream needs to be transferred from the on-chip buffer to the off-chip buffer, target transfer units are allocated to each target data stream according to its on-chip processing efficiency from low to high. This prioritizes the transfer of data streams with lower processing efficiency and avoids data out-of-order issues caused by data from the same queue being processed through multiple data transfer interfaces. Therefore, this invention solves the problem of low data transfer efficiency in related technologies and improves overall data transfer efficiency. Attached Figure Description

[0017] Figure 1 This is a schematic diagram illustrating the use of related technologies for external caching;

[0018] Figure 2 This is a block diagram of the mobile terminal hardware structure of the data stream transfer method according to an embodiment of the present invention;

[0019] Figure 3 This is a flowchart of a data stream transfer method according to an embodiment of the present invention;

[0020] Figure 4 This is a schematic diagram of an optional data transfer method according to an embodiment of the present invention;

[0021] Figure 5 This is a structural block diagram of a data stream transfer device according to an embodiment of the present invention. Detailed Implementation

[0022] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings and examples.

[0023] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0024] The methods and embodiments provided in this application can be executed on a mobile terminal, computer terminal, or similar computing device. Taking running on a mobile terminal as an example, Figure 2 This is a block diagram of the mobile terminal hardware structure of the data stream transfer method according to an embodiment of the present invention. Figure 2 As shown, a mobile terminal may include one or more ( Figure 2 Only one is shown in the diagram. A processor 202 (which may include, but is not limited to, a microprocessor MCU or a programmable logic device FPGA, etc.) and a memory 204 for storing data are also shown. The mobile terminal may further include a transmission device 206 for communication functions and an input / output device 208. Those skilled in the art will understand that... Figure 2 The structure shown is for illustrative purposes only and does not limit the structure of the mobile terminal described above. For example, the mobile terminal may also include components that are more... Figure 2 The more or fewer components shown, or having the same Figure 2 The different configurations shown.

[0025] The memory 204 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the data flow transfer method in this embodiment of the invention. The processor 202 executes various functional applications and data processing by running the computer program stored in the memory 204, thereby implementing the above-described method. The memory 204 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 204 may further include memory remotely located relative to the processor 202, and these remote memories can be connected to the mobile terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0026] The transmission device 206 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by the mobile terminal's communication provider. In one example, the transmission device 206 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 206 may be a Radio Frequency (RF) module, used for wireless communication with the Internet.

[0027] This embodiment provides a method for migrating a data stream. Figure 3 This is a flowchart of a data stream transfer method according to an embodiment of the present invention, such as... Figure 3 As shown, the process includes the following steps:

[0028] Step S302: Obtain multiple data streams to be moved that are cached in the on-chip buffer of the switching device, wherein the number of the multiple data streams to be moved is greater than the number of moving units included in the switching device;

[0029] Step S304: According to the processing efficiency of processing each target data stream included in the plurality of data streams to be moved from low to high, target moving units are sequentially allocated from the moving units included in the switching device to each target data stream;

[0030] Step S306: Use the target transfer unit to transfer the corresponding target data stream to the off-chip buffer of the switching device.

[0031] Through the above steps, when a data stream needs to be moved from the on-chip buffer to the off-chip buffer for caching, a target moving unit is allocated to each target data stream according to the order of its on-chip processing efficiency from low to high. This allows data streams with low processing efficiency to be moved first, and the target data is moved using the corresponding target moving unit. This avoids the problem of data out of order that may be operated on by multiple data moving interfaces in the same queue. Therefore, it solves the problem of low data moving efficiency in related technologies and achieves the effect of improving data moving efficiency.

[0032] In the technical solution provided in step S302 above, the data to be moved can be all the data cached by the on-chip cache, or it can be data that affects the caching function of the on-chip cache, such as data that causes congestion in the on-chip cache, data that occupies a high amount of storage space in the on-chip cache, etc. This solution does not limit this.

[0033] Optionally, in this embodiment, the number of transfer units in the switching equipment is not limited. Different numbers of transfer units can be set in the switching equipment according to the bandwidth of the data stream to be transferred, so as to meet the data transfer requirements of the switching equipment. This solution does not limit this.

[0034] In the technical solution provided in step S304 above, the processing efficiency can be determined based on the size of the storage space occupied by the data, or based on the chip's data processing capability, or based on both the size of the storage space occupied by the data and the chip's data processing capability. For example, the larger the storage space occupied by the data, the higher the congestion level caused to the chip, and the lower the processing efficiency. Or, the lower the chip's processing capability for a certain data, the higher the congestion level caused to the chip, and the lower the processing efficiency. Alternatively, it can be calculated based on the occupied storage space and processing capability, and the degree of congestion caused to the chip can be determined based on the calculation result. The higher the degree of congestion, the lower the processing efficiency.

[0035] Optionally, in this embodiment, the transfer capabilities of the transfer units can be the same, or the transfer capabilities of the transfer units within the chip can vary. When the transfer capabilities of the transfer units are the same, the transfer units can be assigned to data with lower processing efficiency based on the priority of processing efficiency. When the transfer capabilities of the transfer units are different, the transfer units with transfer capabilities matching the processing efficiency are assigned to data with lower processing efficiency in order of processing efficiency from low to high. This solution does not limit this.

[0036] In the technical solution provided in step S306 above, the target transfer unit can transfer all the data in the target data stream to an off-chip buffer for storage, or it can transfer a portion of the data in the target data stream to an off-chip buffer for storage. For example, if the target data stream occupies 100MB of storage space, when 95MB of data in the target data stream is transferred to an off-chip buffer for storage, and it is detected that the target data stream is no longer causing congestion in the on-chip buffer, the transfer of the target data stream can be stopped. This solution does not limit this.

[0037] As an optional embodiment, the step of sequentially allocating target transfer units from the transfer units included in the switching device for each target data stream according to the processing efficiency of processing each target data stream included in the plurality of data streams to be transferred, from low to high, includes:

[0038] The target data stream is selected from the plurality of data streams to be moved, which has no assigned moving units and the lowest processing efficiency.

[0039] Obtain an idle transfer unit from the transfer units included in the switching device;

[0040] The target transfer unit is allocated to the target data stream from the transfer units that are in an idle state.

[0041] Optionally, in this embodiment, after the target data is assigned to a corresponding target transfer unit, the target transfer unit will not transfer other data before the target data transfer is completed, and similarly, other transfer units will not transfer the target data.

[0042] As an optional embodiment, the step of sequentially allocating target transfer units from the transfer units included in the switching device for each target data stream according to the processing efficiency of processing each target data stream included in the plurality of data streams to be transferred, from low to high, includes:

[0043] Obtain an idle transfer unit from the transfer units included in the switching device;

[0044] The idle transfer units are assigned to the target number of data streams among the plurality of data streams to be transferred that have not been assigned transfer units and have the lowest processing efficiency, wherein the target number is the number of idle transfer units.

[0045] Optionally, in this embodiment, the status information of each transfer unit is updated in real time.

[0046] As an optional embodiment, obtaining an idle transfer unit from the transfer units included in the switching device includes:

[0047] The first buffer size occupied by the data stream currently being moved by the moving unit included in the switching device in the on-chip buffer is detected;

[0048] The transfer units whose first cache size is lower than the first threshold are released and identified as transfer units in an idle state.

[0049] Optionally, in this embodiment, the first threshold is used to indicate whether the target data stream causes congestion to the on-chip buffer. The first threshold can be set to 0B, 10KB, 1MB, etc., and this solution does not limit it.

[0050] Optionally, in this embodiment, the first threshold for different data can be the same or different. For example, the first threshold for both types of data can be set to 1MB, or different first thresholds can be set according to the processing capabilities of the two types of data. This solution does not limit this.

[0051] As an optional embodiment, the step of sequentially allocating target transfer units from the transfer units included in the switching device for each target data stream according to the processing efficiency of processing each target data stream included in the plurality of data streams to be transferred, from low to high, includes:

[0052] Based on the second cache size of the on-chip cache occupied by each target data stream in the plurality of data streams to be moved, the plurality of data streams to be moved are divided into a first data stream set and a second data stream set, wherein the first data stream set includes a first data stream in the plurality of data streams to be moved whose second cache size is greater than or equal to a second threshold, and the second data stream set includes a second data stream in the plurality of data streams to be moved whose second cache size is less than the second threshold;

[0053] According to the processing efficiency of processing each of the first data streams from low to high, the target transfer unit is allocated to each of the transfer units included in the switching device in sequence.

[0054] According to the processing efficiency of processing each second data stream from low to high, the target transfer unit is assigned to each second data stream sequentially from the transfer units included in the switching device.

[0055] Optionally, in this embodiment, the processing capabilities of the target transfer units allocated to the first data stream and the second data stream can be different. For example, if the first data stream occupies a large amount of buffer space, a transfer unit with a large transfer capacity is allocated to the first data stream, and if the second data stream occupies a small amount of buffer space, a transfer unit with a small transfer capacity is allocated to the second data stream.

[0056] As an optional embodiment, acquiring multiple data streams to be moved that are cached in the on-chip buffer of the switching device includes:

[0057] Detect the amount of third buffer space occupied by each data stream in the total data streams cached in the on-chip buffer of the switching device;

[0058] The data stream with a third buffer size greater than the third threshold is identified as a candidate data stream;

[0059] If the number of candidate data streams is greater than the number of transfer units included in the switching device, the candidate data streams are determined as the plurality of data streams to be transferred.

[0060] As an optional embodiment, the step of using the target transfer unit to transfer the corresponding target data stream to the off-chip buffer of the switching device includes:

[0061] Determine the first cache location of the target data stream in the on-chip buffer;

[0062] The target transfer unit is controlled to acquire transfer data matching the capacity of the target transfer unit in the first buffer location according to the order of data in the target data stream;

[0063] The control unit moves the data to the second cache location of the off-chip cache.

[0064] By following the steps above, the target migration unit is used to migrate and store data in the order of the target data stream during data migration, thereby avoiding the problem of data out of order during data migration.

[0065] Figure 4 This is an optional data transfer diagram according to an embodiment of the present invention, which can be applied, but is not limited to, to applications such as... Figure 1 In scenarios where data is moved from on-chip to off-chip storage, such as... Figure 4 As shown, it may include, but is not limited to, the following:

[0066] The data migration module may include, but is not limited to, one or more migration engines, and each migration engine may include, but is not limited to, one or more migration units. When the output queue inside the chip is determined to be congested, the cache resources occupied by that queue in the on-chip data cache unit need to be updated to the entry migration queue information of the data migration unit. The data migration module judges the amount of cache occupied by each data stream. If it exceeds the configured waterline A, the migration request of that data stream is allocated to the severely congested queue scheduling unit. Otherwise, the migration request of the queue is allocated to the general congestion queue scheduling unit. The data migration module will prioritize the data stream output by the severely congested queue scheduling unit. After the data output in the severely congested queue scheduling unit is completed, the data output by the general congestion queue scheduling unit will be used as the object for migration by the data migration unit.

[0067] When the data migration module performs queue migration operations, when the migration execution engine selects a new target data stream requesting migration from the parent module, it places the requesting target data stream into an idle target migration bay that is currently running. Simultaneously, it updates the information of the corresponding migration unit number, recording information about the target data stream being migrated in that bay, such as the amount of data being migrated and the migration queue number. Once the migration units of the data migration module are exhausted, the module will pause selecting new data to be migrated until a data stream finishes its current migration, releasing the migration unit. Once a migration unit carries a new target data stream, it retrieves the corresponding data from the on-chip cache unit according to the migration unit's pipeline. Each data read ends under two conditions, and either condition must be met: Condition 1: The amount of data retrieved from external storage in units of a single storage cell capacity (this amount can be defined according to the design specifications) can be continuously retrieved at one time. Condition 2: The data cached in the on-chip data cache unit for the target data stream has been emptied. The transfer module writes data to external memory and simultaneously returns information indicating the end of a single transfer cycle for the target data stream. The transfer engine compares the amount of data transferred from the target data stream at the end of the single transfer cycle with the amount of data remaining in the on-chip data buffer unit for that target data stream. If the amount of data transferred in a single transfer cycle is less than the amount of data remaining in the on-chip data buffer unit for that queue, then the target data stream continues to be carried in the target transfer unit to begin the next round of data transfer; otherwise, the target transfer unit is released.

[0068] This embodiment satisfies the data migration requirements of network switching chips with multiple queues, dynamically changing queue bandwidth, and uneven queue bandwidth. On the one hand, in the case of multiple queues, the queues with severe congestion are prioritized for data migration. On the other hand, it is easier to identify queues with high bandwidth and increase the number of migrations for them.

[0069] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0070] This embodiment also provides a data stream transfer device. Figure 5 This is a structural block diagram of a data stream transfer device according to an embodiment of the present invention, such as... Figure 5 As shown, the device includes:

[0071] The acquisition module 52 is used to acquire multiple data streams to be moved that are cached in the on-chip buffer of the switching device, wherein the number of the multiple data streams to be moved is greater than the number of moving units included in the switching device;

[0072] The allocation module 54 is used to allocate a target transfer unit from the transfer units included in the switching device to each target data stream in order of increasing processing efficiency for processing each target data stream included in the plurality of data streams to be transferred;

[0073] The transfer module 56 is used to transfer the corresponding target data stream to the off-chip buffer of the switching device using the target transfer unit.

[0074] Optionally, the allocation module includes: a first acquisition unit, configured to acquire, from the plurality of data streams to be moved, the data stream with the lowest processing efficiency and no allocated transfer unit as the target data stream; a second acquisition unit, configured to acquire, from the transfer units included in the switching device, transfer units in an idle state; and a first allocation unit, configured to allocate the target transfer unit to the target data stream from the transfer units in the idle state.

[0075] Optionally, the allocation module includes: a third acquisition unit, configured to acquire idle transfer units from the transfer units included in the switching device; and a second allocation unit, configured to allocate the idle transfer units to a target number of data streams among the plurality of data streams to be transferred that have not been allocated transfer units and have the lowest processing efficiency, wherein the target number is the number of idle transfer units.

[0076] Optionally, the acquisition unit is configured to: detect the first buffer amount occupied by the data stream currently being moved by the transfer unit included in the switching device in the on-chip buffer; release the transfer unit whose first buffer amount is lower than a first threshold and determine it as a transfer unit in an idle state.

[0077] Optionally, the allocation module includes: a processing unit, configured to divide the plurality of data streams to be moved into a first data stream set and a second data stream set according to the second cache size of the on-chip cache occupied by each target data stream in the plurality of data streams to be moved, wherein the first data stream set includes a first data stream in the plurality of data streams to be moved whose second cache size is greater than or equal to a second threshold, and the second data stream set includes a second data stream in the plurality of data streams to be moved whose second cache size is less than the second threshold; a third allocation unit, configured to allocate the target moving unit to each first data stream sequentially from the moving units included in the switching device according to the processing efficiency of processing each first data stream from low to high; and a fourth allocation unit, configured to allocate the target moving unit to each second data stream sequentially from the moving units included in the switching device according to the processing efficiency of processing each second data stream from low to high.

[0078] Optionally, the acquisition module includes: a detection unit, configured to detect the third buffer amount occupied by each data stream in all data streams cached in the on-chip buffer of the switching device; a first determination unit, configured to determine the data streams whose third buffer amount is greater than a third threshold as candidate data streams; and a second determination unit, configured to determine the candidate data streams as the plurality of data streams to be moved when the number of candidate data streams is greater than the number of moving units included in the switching device.

[0079] Optionally, the relocation module includes: a third determining unit, configured to determine a first cache location of the target data stream in the on-chip buffer; a fourth acquiring unit, configured to control the target relocation unit to acquire relocation data matching the capacity of the target relocation unit in the first cache location according to the order of data in the target data stream; and a control unit, configured to control the relocation unit to relocate the relocation data to a second cache location of the off-chip buffer.

[0080] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0081] Embodiments of the present invention also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to perform the steps in any of the above method embodiments when executed.

[0082] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0083] Embodiments of the present invention also provide an electronic device including a memory and a processor, the memory storing a computer program and the processor being configured to run the computer program to perform the steps in any of the above method embodiments.

[0084] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0085] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0086] It is obvious to those skilled in the art that the modules or steps of the present invention described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those described herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, the present invention is not limited to any particular combination of hardware and software.

[0087] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for migrating a data stream, characterized in that, include: Acquire multiple data streams to be moved that are cached in the on-chip buffer of the switching device, wherein the number of the multiple data streams to be moved is greater than the number of moving units included in the switching device; According to the processing efficiency of processing each target data stream included in the plurality of data streams to be moved, from low to high, a target moving unit is sequentially allocated from the moving units included in the switching device for each target data stream. The processing efficiency is determined based on the storage space occupied by the data, or the processing efficiency is determined based on the chip's data processing capability, or the processing efficiency is determined based on both the storage space occupied by the data and the chip's data processing capability. The target data stream is moved to the off-chip buffer of the switching device using the target transfer unit. The method of allocating target migration units to each target data stream from the migration units included in the switching device in order of increasing processing efficiency for processing each target data stream among the plurality of data streams to be migrated includes: dividing the plurality of data streams to be migrated into a first data stream set and a second data stream set according to the second cache size of the on-chip cache occupied by each target data stream among the plurality of data streams to be migrated, wherein the first data stream set includes first data streams among the plurality of data streams to be migrated whose second cache size is greater than or equal to a second threshold, and the second data stream set includes second data streams among the plurality of data streams to be migrated whose second cache size is less than the second threshold; allocating target migration units to each first data stream from the migration units included in the switching device in order of increasing processing efficiency for processing each first data stream; and allocating target migration units to each second data stream from the migration units included in the switching device in order of increasing processing efficiency for processing each second data stream, wherein the processing capabilities of the target migration units allocated to the first data stream and the second data stream are different.

2. The method according to claim 1, characterized in that, The process of assigning a target transfer unit to each target data stream from the transfer units included in the switching device, in ascending order of processing efficiency for processing each target data stream among the plurality of data streams to be transferred, includes: The target data stream is selected from the plurality of data streams to be moved, which has no assigned moving units and the lowest processing efficiency. Obtain an idle transfer unit from the transfer units included in the switching device; The target transfer unit is allocated to the target data stream from the transfer units that are in an idle state.

3. The method according to claim 1, characterized in that, The process of assigning a target transfer unit to each target data stream from the transfer units included in the switching device, in ascending order of processing efficiency for processing each target data stream among the plurality of data streams to be transferred, includes: Obtain an idle transfer unit from the transfer units included in the switching device; The idle transfer units are assigned to the target number of data streams among the plurality of data streams to be transferred that have not been assigned transfer units and have the lowest processing efficiency, wherein the target number is the number of idle transfer units.

4. The method according to claim 2 or 3, characterized in that, The step of obtaining an idle transfer unit from the transfer units included in the switching device includes: The first buffer size occupied by the data stream currently being moved by the moving unit included in the switching device in the on-chip buffer is detected; The transfer units whose first cache size is lower than the first threshold are released and identified as transfer units in an idle state.

5. The method according to claim 1, characterized in that, The acquisition of multiple data streams to be moved, cached in the on-chip buffer of the switching device, includes: Detect the amount of third buffer used by each data stream in the total data streams cached in the on-chip buffer of the switching device; The data stream with a third buffer size greater than the third threshold is identified as a candidate data stream; If the number of candidate data streams is greater than the number of transfer units included in the switching device, the candidate data streams are determined as the plurality of data streams to be transferred.

6. The method according to claim 1, characterized in that, The step of using the target transfer unit to transfer the corresponding target data stream to the off-chip buffer of the switching device includes: Determine the first cache location of the target data stream in the on-chip buffer; The target transfer unit is controlled to acquire transfer data matching the capacity of the target transfer unit in the first buffer location according to the order of data in the target data stream; The control unit moves the data to the second cache location of the off-chip cache.

7. A data stream transfer device, characterized in that, include: The acquisition module is used to acquire multiple data streams to be moved that are cached in the on-chip buffer of the switching device, wherein the number of the multiple data streams to be moved is greater than the number of moving units included in the switching device; The allocation module is configured to allocate a target transfer unit to each target data stream from the transfer units included in the switching device in order of increasing processing efficiency for processing each target data stream among the plurality of data streams to be transferred. The processing efficiency is determined based on the size of the storage space occupied by the data, or the processing efficiency is determined based on the chip's data processing capability, or the processing efficiency is determined based on both the size of the storage space occupied by the data and the chip's data processing capability. The transfer module is used to transfer the corresponding target data stream to the off-chip buffer of the switching device using the target transfer unit; The allocation module includes: a processing unit, configured to divide the plurality of data streams to be moved into a first data stream set and a second data stream set according to the second cache size of the on-chip cache occupied by each target data stream in the plurality of data streams to be moved, wherein the first data stream set includes first data streams in the plurality of data streams to be moved whose second cache size is greater than or equal to a second threshold, and the second data stream set includes second data streams in the plurality of data streams to be moved whose second cache size is less than the second threshold; a third allocation unit, configured to allocate the target moving unit to each first data stream sequentially from the moving units included in the switching device according to the processing efficiency of processing each first data stream from low to high; and a fourth allocation unit, configured to allocate the target moving unit to each second data stream sequentially from the moving units included in the switching device according to the processing efficiency of processing each second data stream from low to high, wherein the processing capabilities of the target moving units allocated to the first data stream and the second data stream are different.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method described in any one of claims 1 to 6.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method described in any one of claims 1 to 6.

Citation Information

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