An optimization method of linear interpolation algorithm based on simd instruction

Abstract

The application provides an optimization method of a linear interpolation algorithm based on a simd instruction, comprising the following steps: S1, based on the srlriw vrd, vrs, imm instruction of the simd instruction: right shifting and rounding vrs, updating the final result to vrd; right shifting each word in vrs by the number of bits specified by imm, inserting zero into the empty high-order bits, then adding the shifted result to the last bit of the word and updating the result to the corresponding word in vrd; S2, optimization of the linear interpolation algorithm: S2.1, 16 groups of values a for linear interpolation are stored in the low half halfword of each word in the simd register vr1 in the form of halfword; S2.2, 16 groups of y0 values of the linear interpolation algorithm are stored in the low half halfword of each word in the simd register vr2 in the form of halfword, and 16 groups of y1 values of the linear interpolation algorithm are stored in the low half halfword of each word in the simd register vr4 in the form of halfword; S2.3, the finally calculated results of 16 groups of the linear interpolation algorithm are saved in the low half halfword of each word in the simd register vr2 in the form of halfword; S2.4, linear interpolation operations of 16 groups of data are simultaneously performed.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to an optimization method for a linear interpolation algorithm based on SIMD instructions. Background Technology

[0002] With the development of the internet and artificial intelligence, a large number of mathematical algorithms have been invented, and these increasingly complex algorithms have placed a heavy computational burden on processors. To address this issue, hardware designers have developed SIMD extended instructions for processors, which allow a single instruction to perform multiple data stream operations. SIMD extended instructions have significantly improved the processor's execution speed when processing large amounts of data.

[0003] SIMD stands for Single Instruction Multiple Data (SIMD). It's a set of instructions that can copy multiple operands and pack them into a large register. Taking addition as an example, in a single-instruction, single-data CPU, after decoding the addition instruction, the execution unit first accesses memory to obtain the first operand; then it accesses memory again to obtain the second operand; only then can the summation operation be performed. However, in CPUs that support SIMD extensions, after instruction decoding, several execution units access memory simultaneously, obtaining all operands at once for computation. This characteristic makes SIMD particularly suitable for data-intensive computations such as those in multimedia applications.

[0004] SIMD technology: SIMD stands for Single Instruction Multiple Data. It's a technique that uses a single controller to control multiple processors, simultaneously performing the same operation on each element of a set of data (also known as a "data vector"), thus achieving spatial parallelism. In image processing, image data commonly uses formats like RGB565, RGBA8888, and YUV422. These formats represent a single component of a pixel using less than or equal to 8 bits. Using traditional processors, even with 32-bit or 64-bit registers, only the lower 8 bits are used for processing this data, resulting in very low efficiency. By splitting a 64-bit register into eight 8-bit registers, eight operations can be performed simultaneously, increasing computational efficiency by eight times. This is the core idea behind SIMD instructions.

[0005] Linear interpolation: Linear interpolation refers to an interpolation method where the interpolation function is a first-order polynomial, and the interpolation error at the interpolation nodes is zero. Compared with other interpolation methods, such as parabolic interpolation, linear interpolation is simple and convenient. The geometric meaning of linear interpolation is that the original function is approximated by a straight line passing through points A and B in the overview diagram.

[0006] likeFigure 1 As shown in the figure, assuming the coordinates A(x0,y0) and B(x1,y1) are known, we want to obtain the value of x at a certain position on the straight line within the interval [x0,x1]. Based on the figure, we obtain:

[0007] (y-y0) / (x-x0)=(y1-y0) / (x1-x0)

[0008] Since x is known, the value of y can be obtained from the formula:

[0009] y = y0 + (x - x0) * (y1 - y0) / (x1 - x0)

[0010] =y0+{(x-x0)*y1-(x-x0)*y0} / (x1-x0)

[0011] =y0*(x1-x) / (x1-x0)+y1*(x-x0) / (x1-x0)

[0012] Let x1 - x0 = 65536 * k (meaning dividing the interval between x0 and x1 into 65536 equal parts. This 65536 equal parts are used because 65536 occupies 16 bits in a computer, i.e., a half-word; this data format is convenient for organization and algorithm design in this algorithm), and x - x0 = a * k. Then x1 - x = (65536 - a) * k.

[0013] Simplifying the above equation, we get: y = {y0*(65536-a) + y1*a} / 65536

[0014] Where a is the weight of x in (x0, x1), the larger a is, the closer x is to x1, and the smaller a is, the closer x is to x0. y0 and y1 are two adjacent values.

[0015] With CPUs supporting SIMD instructions, an increasing number of algorithms require modifications to suit the CPU's architecture to significantly improve execution speed. Among various mathematical algorithms, there are numerous complex mathematical functions, such as the exp function. These functions are equivalently calculated using Taylor series formulas in computers.

[0016]

[0017] The characteristics of such formulas are their complexity, large computational load, and high instruction dependency, which makes it impossible to use SIMD instructions for optimization within these algorithms. Processors will spend tens or even hundreds of cycles calculating these functions, and in today's world where computational speed is extremely demanding, such time consumption is simply unsatisfactory.

[0018] To address these issues, in scenarios where algorithm accuracy requirements are not very high, algorithm developers have proposed using linear interpolation algorithms to replace the original complex algorithms.

[0019] However, the existing technology has the following drawbacks:

[0020] 1. Traditional linear interpolation algorithms are implemented using single instruction and single data instruction. This type of algorithm consumes a lot of cycles during execution and is slow.

[0021] 2. Although there are currently methods to improve linear interpolation algorithms using SIMD instructions, the linear interpolation algorithms that are generally implemented using ordinary SIMD instructions with a large number of logical operations, while improving the execution speed of linear interpolation algorithms, have a large additional overhead and yield very little benefit.

[0022] In addition, the terminology used in the prior art includes:

[0023] SIMD (Single Instruction Multiple Data) is an extended instruction set that enables efficient parallel processing.

[0024] The exp function: In advanced mathematics, an exponential function with the natural constant e as its base.

[0025] Instruction dependency: In program execution, the next instruction can only be executed after the previous instruction has been completed. In this case, the two instructions are dependent. Summary of the Invention

[0026] To address the aforementioned problems, the purpose of this application is to: based on research into traditional linear interpolation algorithms and leveraging the advantages of SIMD's Single Instruction Multiple Data (SIMD) instruction set, innovatively improve the linear interpolation algorithm, eliminating additional overhead during execution and enhancing its parallelism. Compared to traditional linear interpolation algorithms, the optimized algorithm significantly improves the processor's execution speed.

[0027] Specifically, this invention provides an optimization method for a linear interpolation algorithm based on SIMD instructions, the method comprising:

[0028] S1, 16 sets of values ​​a used for linear interpolation are stored in the lower half word of each word in the simd register vr1 in the form of half words;

[0029] S2, the y0 values ​​of the 16 linear interpolation algorithms are stored in halfword form in the lower halfword of each word in the SIMD register vr2, and the y1 values ​​of the 16 linear interpolation algorithms are stored in halfword form in the lower halfword of each word in the SIMD register vr4.

[0030] S3, the final results of the 16 sets of linear interpolation algorithms are stored in the lower half-word of each word in the simd register vr2 in half-word form;

[0031] S4 performs linear interpolation on 16 sets of data simultaneously:

[0032] The linear interpolation algorithm flow is as follows:

[0033] S4.1, Initialization;

[0034] S4.2, calculate the value of 65536-a using the value of a;

[0035] S4.3, get the values ​​of y0 and y1;

[0036] S4.4, calculate the final value according to the formula y={y0*(65536-a)+y1*a} / 65536;

[0037] In this context, assuming the coordinates A(x0,y0) and B(x1,y1) are known, the formula y represents the value of x at a certain position on the straight line within the interval [x0,x1]; a is the weight of x in the interval [x0,x1], the larger a is, the closer x is to x1, and the smaller a is, the closer x is to x0; y0 and y1 are two adjacent values.

[0038] The simd commands used in the method are as follows:

[0039] The `subh vrd vrs vrp` command: This command subtracts the signed element of each halfword in `vrs` from the signed element of each halfword in `vrp` and updates the corresponding halfword in `vrd` with the result.

[0040] The smulhe vrd vrs vrp instruction: This instruction multiplies the signed element of the even-numbered halfword in vrs by the signed element of the even-numbered halfword in vrp, and updates the word in vrd with the result.

[0041] The `addw vrd vrs vrp` command adds each word in `vrs` to each word in `vrp` and updates the corresponding word in `vrd` with the result.

[0042] The `srlriw vrd vrs imm` instruction: This instruction right-shifts and rounds `vrs`, updating `vrd` with the final result.

[0043] The specific design is as follows: Shift each word in vrs to the right by the number of bits specified by imm, insert zeros into empty higher-order bits, add the shift result to the last bit of the word, and update the corresponding word in vrd with the result;

[0044] In the above instructions,

[0045] vrp: the first source operand in the simd instruction;

[0046] vrs: The second source operand in the simd instruction;

[0047] vrd: The destination operand in the simd instruction;

[0048] imm: The immediate value in the simd instruction;

[0049] bit: the smallest unit of data storage;

[0050] word: a character, 32 bits in length;

[0051] halfword: a word or phrase with a length of 16 bits;

[0052] byte: A byte, with a length of 8 bits.

[0053] The method uses a 512-bit SIMD instruction width, which contains 32 registers, represented by vr0 to vr31;

[0054] vrx[](W): The x-th register in the 32 512-bit SIMD registers is divided into words, and each unit is operated on (x∈[0,31]);

[0055] vrx[](H): The x-th register in the 32 512-bit SIMD registers is divided into halfwords and each unit is operated on (x∈[0,31]);

[0056] vrx[2i](H): The x-th register in the 32 512-bit SIMD registers is divided into halfwords, and the even-numbered units in it are operated on (x∈[0,31])(i∈[0,15]).

[0057] Step S4 further includes:

[0058] S4.1: Initialize the simd register required for the algorithm;

[0059] Register vr12: Stores 65536 bytes per word;

[0060] That is, each word in vr12 is used to store 65536. Since 65536-a needs to be calculated in S4.2, which corresponds to the SIMD subtraction instruction subh vrd, vrs, vrp, and all operands of subh are registers, 65536 is loaded into the vr12 register.

[0061] S4.2: Calculate the value of 'a' set by the linear interpolation algorithm and the value of 65536-a;

[0062] Where vr1[2i](H) is the value of a;

[0063] vr5[](H)=vr12[](H)-vr1[](H) where vr5[2i](H) is the value of 65536-a;

[0064] Execute the subh vr5,vr12,vr3 command: Subtract the corresponding halfword from vr3 from each halfword in vr12, and update the result to vr5;

[0065] S4.3: Obtain the values ​​of y0 and y1 set by the linear interpolation algorithm;

[0066] Where vr2[2i](H) is the value of y0;

[0067] Where vr4[2i](H) is the value of y1;

[0068] S4.4: The value of y is calculated using the linear interpolation formula described above:

[0069] vr2[](W)=vr5[2i](H)*vr2[2i](H);

[0070] Execute the smulhe vr2,vr2,vr5 instruction: multiply each even-numbered signed halfword in vr2 by the corresponding halfword in vr5, and update the corresponding word in vr2 with the result;

[0071] vr4[](W)=vr3[2i](H)*vr4[2i](H);

[0072] Execute the smulhe vr4,vr4,vr3 instruction: multiply each even-numbered signed halfword in vr4 by the corresponding halfword in vr3, and update the corresponding word in vr4 with the result;

[0073] vr2[](W)=vr2[](W)+vr4[](W);

[0074] The `addw vr2,vr2,vr4` command adds each word in `vr2` to the corresponding word in `vr4` and updates the corresponding word in `vr2` with the result.

[0075] vr2[](W)=vr2[](W)>>16;

[0076] The instruction `srlriw vr2,vr2,16` shifts each word in `vr2` 16 bits to the right, inserts zeros into empty higher-order bits, adds the shift result to the last bit of the shifted element, and then updates the corresponding word in `vr2` with the final rounded result.

[0077] In step S4.3, the values ​​of y0 and y1 can be directly given as input parameters of this algorithm, or they can be found by looking up a table.

[0078] In step S4.4,

[0079] vr2[](W)=vr5[2i](H)*vr2[2i](H) corresponds to the linear interpolation formula:

[0080] vr2 = (65536 - a) * y0;

[0081] vr4[](W)=vr3[2i](H)*vr4[2i](H) corresponds to the linear interpolation formula:

[0082] vr4 = a*y1;

[0083] The formula for linear interpolation is: vr2[](W)=vr2[](W)+vr4[](W).

[0084] vr2 = y0*(65536-a) + y1*a;

[0085] vr2[](W)=vr2[](W)>>16 corresponds to the linear interpolation formula:

[0086] y={y0*(65536-a)+y1*a} / 65536.

[0087] The application scenario defined by the method is:

[0088] 1. The data length of y0 and y1 in the linear interpolation algorithm is no more than 16 bits;

[0089] 2. The value a in the linear interpolation algorithm is ∈ [0, 65535].

[0090] 3. It can perform linear interpolation operations on up to 16 sets of data simultaneously.

[0091] The method can simultaneously perform the operation of querying 16 bits of data.

[0092] Therefore, the advantage of this application is that, based on the characteristics of the linear interpolation algorithm, the linear interpolation algorithm is improved by using the simd instruction, which greatly improves the execution speed of the algorithm and enables the simultaneous operation of multiple sets of linear interpolation algorithms. Attached Figure Description

[0093] The accompanying drawings, which are provided to further illustrate the invention and form part of this application, are not intended to limit the scope of the invention.

[0094] Figure 1 This is a schematic diagram of the linear interpolation algorithm of this application.

[0095] Figure 2 This is a flowchart illustrating the linear interpolation algorithm used in the method described in this application.

[0096] Figure 3 This is a schematic diagram of the method involved in this application. Detailed Implementation

[0097] To better understand the technical content and advantages of the present invention, the present invention will now be described in further detail with reference to the accompanying drawings.

[0098] Traditional linear interpolation algorithms, based on the linear interpolation formula, employ single-instruction, single-data instructions to write suitable instruction sequences. This invention, leveraging the characteristics of linear interpolation algorithms and utilizing the advantages of SIMD instructions' single-instruction, multiple-data approach, innovatively improves the linear interpolation algorithm, significantly enhancing its parallelism and execution efficiency.

[0099] The codes, instructions, and terms used in this application are as follows:

[0100] vrp: the first source operand in the simd instruction;

[0101] vrs: The second source operand in the simd instruction;

[0102] vrd: The destination operand in the simd instruction;

[0103] imm: The immediate value in the simd instruction;

[0104] bit: the smallest unit of data storage;

[0105] word: a character, 32 bits in length;

[0106] halfword: a word or phrase with a length of 16 bits;

[0107] byte: A byte, with a length of 8 bits.

[0108] This application uses a 512-bit SIMD instruction set, which contains 32 registers, represented by vr0 to vr31.

[0109] vrx[](W): The x-th register in the 32 512-bit SIMD registers is divided into words, and each unit is operated on (x∈[0,31]);

[0110] vrx[](H): The x-th register in the 32 512-bit SIMD registers is divided into halfwords and each unit is operated on (x∈[0,31]);

[0111] vrx[2i](H): The x-th register in the 32 512-bit SIMD registers is divided into halfwords, and the even-numbered units in it are operated on (x∈[0,31])(i∈[0,15]).

[0112] This application relates to an optimization method for a linear interpolation algorithm based on SimD instructions:

[0113] (1) Introduction to the instructions used in the linear interpolation algorithm:

[0114] The instruction `subh vrd vrs vrp` subtracts each halfword (signed element) from each halfword (signed element) in `vrs` and updates the corresponding halfword in `vrd` with the result.

[0115] The `smulhe vrd vrs vrp` instruction multiplies the even-numbered halfwords (signed elements) of `vrs` by the even-numbered halfwords (signed elements) of `vrp`, and updates the word in `vrd` with the result. The `addw vrd vrs vrp` instruction adds each word in `vrs` to each word in `vrp`, and updates the corresponding word in `vrd` with the result.

[0116] The instruction `srlriw vrd,vrs,imm` shifts `vrs` to the right and rounds it, updating the final result to `vrd`.

[0117] The specific design is as follows: Shift each word in vrs to the right by the number of bits specified by imm, insert zeros into empty higher-order bits, then add the shift result to the last bit of the word and update the corresponding word in vrd with the result.

[0118] (2) Flowchart of linear interpolation algorithm: as follows Figure 2 As shown.

[0119] (3) Applicable scenarios for linear interpolation:

[0120] 1. The data length of y0 and y1 in the linear interpolation algorithm is no more than 16 bits in the computer;

[0121] 2. In the linear interpolation algorithm, a ∈ [0, 65535];

[0122] 3. Can perform linear interpolation operations on up to 16 sets of data simultaneously;

[0123] (4) Detailed explanation of the principle of linear interpolation:

[0124] Define the application scenario:

[0125] 1.16 sets of values ​​'a' used for linear interpolation are stored in the lower half-word of each word in the SIMD register vr1 as half-words;

[0126] 2.16 sets of linear interpolation algorithms' y0 values ​​are stored in half-word form in the lower half-word of each word in the SIMD register vr2, and 16 sets of linear interpolation algorithms' y1 values ​​are stored in half-word form in the lower half-word of each word in the SIMD register vr4.

[0127] 3. The final results of the 16 linear interpolation algorithms are stored in half-word form in the lower half-word of each word in the SIMD register vr2;

[0128] 4. Perform linear interpolation on 16 sets of data simultaneously;

[0129] Specific implementation steps:

[0130] S1: The simd register required for initializing the algorithm.

[0131] vr12: 65536 words are stored in each word.

[0132] S2: Calculate the value of 'a' set by the linear interpolation algorithm and the value of 65536-a.

[0133] Where vr1[2i](H) is the value of a.

[0134] vr5[](H)=vr12[](H)-vr1[](H) where vr5[2i](H) is the value of 65536-a.

[0135] => subh vr5,vr12,vr3: Subtract the corresponding halfword from vr3 from each halfword in vr12, and update the result to vr5.

[0136] S3: Obtain the values ​​of y0 and y1 set by the linear interpolation algorithm (Note: The values ​​of y0 and y1 can be passed from the previous algorithm or obtained by looking up a table. This invention does not concern itself with the process of obtaining the values ​​of y0 and y1).

[0137] Where vr2[2i](H) is the value of y0;

[0138] Where vr4[2i](H) is the value of y1.

[0139] S4: Calculate the value of y according to the linear interpolation formula described above.

[0140] vr2[](W)=vr5[2i](H)*vr2[2i](H)(corresponding to the linear interpolation formula: vr2=(65536-a)*y0)=>smulhe vr2,vr2,vr5: multiply each even-numbered signed halfword in vr2 by the corresponding halfword in vr5, and update the corresponding word in vr2 with the result.

[0141] vr4[](W)=vr3[2i](H)*vr4[2i](H)(corresponding to the linear interpolation formula: vr4=a*y1)

[0142] => smulhe vr4,vr4,vr3: Multiply each even-numbered signed halfword in vr4 by the corresponding halfword in vr3, and update the corresponding word in vr4 with the result.

[0143] vr2[](W)=vr2[](W)+vr4[](W) (Corresponding to the linear interpolation formula: vr2=y0*(65536-a)+y1*a)=>addw vr2,vr2,vr4: Add each word in vr2 to the corresponding word in vr4, and update the corresponding word in vr2 with the result.

[0144] vr2[](W)=vr2[](W)>>16(corresponding to the linear interpolation formula: y={y0*(65536-a)+y1*a} / 65536)=>srlriw vr2,vr2,16: Shift each word in vr2 to the right by 16 bits, insert zeros into empty higher-order bits, add the shift result to the last bit of the shifted element, and update the corresponding word in vr2 with the final rounded result.

[0145] In summary, such as Figure 3 As shown, the method described in this application can be summarized as follows, including:

[0146] S1, 16 sets of values ​​a used for linear interpolation are stored in the lower half word of each word in the simd register vr1 in the form of half words;

[0147] S2, the y0 values ​​of the 16 linear interpolation algorithms are stored in halfword form in the lower halfword of each word in the SIMD register vr2, and the y1 values ​​of the 16 linear interpolation algorithms are stored in halfword form in the lower halfword of each word in the SIMD register vr4.

[0148] S3, the final results of the 16 sets of linear interpolation algorithms are stored in the lower half-word of each word in the simd register vr2 in half-word form;

[0149] S4 performs linear interpolation on 16 sets of data simultaneously:

[0150] S4.1: Initialize the simd register required for the algorithm;

[0151] Register vr12: Stores 65536 bytes per word;

[0152] That is, each word in vr12 is used to store 65536. Since 65536-a needs to be calculated in S4.2, which corresponds to the SIMD subtraction instruction subh vrd, vrs, vrp, and all operands of the subh instruction are registers, 65536 is loaded into the vr12 register.

[0153] S4.2: Calculate the value of 'a' set by the linear interpolation algorithm and the value of 65536-a;

[0154] Where vr1[2i](H) is the value of a;

[0155] vr5[](H)=vr12[](H)-vr1[](H) where vr5[2i](H) is the value of 65536-a;

[0156] Execute the subh vr5,vr12,vr3 command: Subtract the corresponding halfword from vr3 from each halfword in vr12, and update the result to vr5;

[0157] S4.3: Obtain the values ​​of y0 and y1 set by the linear interpolation algorithm; the method of this application does not need to concern itself with the process of obtaining the values ​​of y0 and y1. The values ​​of y0 and y1 can be directly given as input parameters of this algorithm, or they can be obtained by looking up a table:

[0158] Where vr2[2i](H) is the value of y0;

[0159] Where vr4[2i](H) is the value of y1;

[0160] S4.4: The value of y is calculated using the linear interpolation formula described above:

[0161] vr2[](W)=vr5[2i](H)*vr2[2i](H), which corresponds to the linear interpolation formula:

[0162] vr2 = (65536 - a) * y0;

[0163] Execute the smulhe vr2,vr2,vr5 instruction: multiply each even-numbered signed halfword in vr2 by the corresponding halfword in vr5, and update the corresponding word in vr2 with the result;

[0164] vr4[](W)=vr3[2i](H)*vr4[2i](H), which corresponds to the linear interpolation formula:

[0165] vr4 = a*y1;

[0166] Execute the smulhe vr4,vr4,vr3 instruction: multiply each even-numbered signed halfword in vr4 by the corresponding halfword in vr3, and update the corresponding word in vr4 with the result;

[0167] vr2[](W)=vr2[](W)+vr4[](W), which corresponds to the linear interpolation formula:

[0168] vr2 = y0*(65536-a) + y1*a;

[0169] The `addw vr2,vr2,vr4` command adds each word in `vr2` to the corresponding word in `vr4` and updates the corresponding word in `vr2` with the result.

[0170] vr2[](W)=vr2[](W)>>16, which corresponds to the linear interpolation formula:

[0171] y={y0*(65536-a)+y1*a} / 65536;

[0172] The instruction `srlriw vr2,vr2,16` shifts each word in `vr2` 16 bits to the right, inserts zeros into empty higher-order bits, adds the shift result to the last bit of the shifted element, and then updates the corresponding word in `vr2` with the final rounded result.

[0173] The method can simultaneously perform the operation of querying 16 bits of data.

[0174] To address the shortcomings and deficiencies of current research solutions, this invention proposes an optimization of the linear interpolation algorithm using SIMD instructions. The key points are: based on the principle of linear interpolation, an innovative and improved linear interpolation algorithm using SIMD instructions is implemented, enabling simultaneous linear interpolation operations on multiple sets of data and improving the speed of linear interpolation operations. In particular, the instruction sequence of the improved linear interpolation algorithm based on SIMD instructions is described.

[0175] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, various modifications and variations can be made to the embodiments of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An optimization method for a linear interpolation algorithm based on SimD instructions, characterized in that, The method includes: S1, 16 sets of values ​​a used for linear interpolation are stored in the lower half word of each word in the simd register vr1 in the form of half words; S2, the y0 values ​​of the 16 linear interpolation algorithms are stored in halfword form in the lower halfword of each word in the SIMD register vr2, and the y1 values ​​of the 16 linear interpolation algorithms are stored in halfword form in the lower halfword of each word in the SIMD register vr4. S3, the final results of the 16 sets of linear interpolation algorithms are stored in the lower half-word of each word in the simd register vr2 in half-word form; S4 performs linear interpolation on 16 sets of data simultaneously: The linear interpolation algorithm flow is as follows: S4.1, Initialization; S4.2, Calculate using the value of a The value; S4.3, get the values ​​of y0 and y1; S4.4, according to formula Calculate the final value; In this context, assuming the coordinates A(x0, y0) and B(x1, y1) are known, the formula y represents the value of x at a certain position on the straight line within the interval [x0, x1]; a is the weight of x in the interval [x0, x1], the larger a is, the closer x is to x1, and the smaller a is, the closer x is to x0; y0 and y1 are two adjacent values. The simd commands used in the method are as follows: The `subh vrd vrs vrp` command: This command subtracts the signed element of each halfword in `vrs` from the signed element of each halfword in `vrp` and updates the corresponding halfword in `vrd` with the result. The smulhe vrd vrs vrp instruction: This instruction multiplies the signed element of the even-numbered halfword in vrs by the signed element of the even-numbered halfword in vrp, and updates the word in vrd with the result. The `addw vrd vrs vrp` command adds each word in `vrs` to each word in `vrp` and updates the corresponding word in `vrd` with the result. The `srlriw vrd vrs imm` instruction: This instruction right-shifts and rounds `vrs`, updating `vrd` with the final result. The specific design is as follows: Shift each word in vrs to the right by the number of bits specified by imm, insert zeros into empty higher-order bits, add the shift result to the last bit of the word, and update the corresponding word in vrd with the result; In the above instructions, vrp: the first source operand in the simd instruction; vrs: The second source operand in the simd instruction; vrd: The destination operand in the simd instruction; imm: The immediate value in the simd instruction; bit: the smallest unit of data storage; word: a character, 32 bits in length; halfword: a word or phrase with a length of 16 bits; byte: A byte, with a length of 8 bits.

2. The optimization method for a linear interpolation algorithm based on SIMD instructions according to claim 1, characterized in that, The formula middle, set up This means dividing the interval from x0 to x1 into 65536 equal parts; the reason for this 65536 equal parts is that 65536 occupies 16 bits in a computer, which is called a half word. ;but .

3. The optimization method for a linear interpolation algorithm based on SimD instructions according to claim 1, characterized in that, The method uses a 512-bit SIMD instruction width, which contains 32 registers, represented by vr0~vr31; vrx[](W): The x-th register in the 32 512-bit SIMD registers is divided into words, and operations are performed on each of its units. ; vrx[](H): The x-th register in the 32 512-bit SIMD registers is divided into half-word segments, and operations are performed on each of its units. ; vrx[2i](H): The x-th register in the 32 512-bit SIMD registers is divided into half-word segments, and operations are performed on the even-numbered units within it. , .

4. The optimization method for a linear interpolation algorithm based on SimD instructions according to claim 1, characterized in that, Step S4 further includes: S4.1: Initialize the simd register required for the algorithm; Register vr12: Stores 65536 bytes per word; That is, vr12 is used to store 65536, because S4.2 needs to calculate This corresponds to the SIMD subtraction instruction subh vrd, vrs, vrp. Since all operands of the subh instruction are registers, 65536 needs to be loaded into the vr12 register. S4.2: Calculate the value of 'a' set by the linear interpolation algorithm and... The value; Where vr1[2i](H) is the value of a; Where vr5[2i](H) is The value; Execute the subh vr5, vr12, vr3 command: Subtract the corresponding halfword in vr3 from each halfword in vr12, and update the result to vr5; S4.3: Obtain the values ​​of y0 and y1 set by the linear interpolation algorithm; Where vr2[2i](H) is the value of y0; Where vr4[2i](H) is the value of y1; S4.4: The value of y is calculated using the linear interpolation formula described above: ； Execute the smulhe vr2, vr2, vr5 instruction: multiply each even-numbered signed halfword in vr2 by the corresponding halfword in vr5, and update the corresponding word in vr2 with the result; ； Execute the smulhe vr4, vr4, vr3 instruction: multiply each even-numbered signed halfword in vr4 by the corresponding halfword in vr3, and update the corresponding word in vr4 with the result; ； The `addw vr2, vr2, vr4` command adds each word in `vr2` to the corresponding word in `vr4` and updates the corresponding word in `vr2` with the result. ； The instruction `srlriw vr2, vr2, 16` shifts each word in `vr2` 16 bits to the right, inserts zeros into empty higher-order bits, adds the shift result to the last bit of the shifted element, and then updates the corresponding word in `vr2` with the final rounded result.

5. The optimization method for a linear interpolation algorithm based on SimD instructions according to claim 4, characterized in that, In step S4.3, the values ​​of y0 and y1 can be directly given as input parameters of this algorithm, or they can be found by looking up a table.

6. The optimization method for a linear interpolation algorithm based on SimD instructions according to claim 5, characterized in that, In step S4.4, Corresponding linear interpolation formula: ； Corresponding linear interpolation formula: ； Corresponding linear interpolation formula: ； Corresponding linear interpolation formula: 。 7. The optimization method for a linear interpolation algorithm based on SimD instructions according to claim 1, characterized in that, The application scenario defined by the method is: 1) The data length of y0 and y1 in the linear interpolation algorithm is no greater than 16 bits; 2) Values ​​in linear interpolation algorithms ; 3) It can perform linear interpolation operations on up to 16 sets of data simultaneously.

8. The optimization method for a linear interpolation algorithm based on SIMD instructions according to claim 1, characterized in that, The method described above can perform the operation of querying 16 bits of data simultaneously.

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