Layout method and related non-transitory computer readable medium

Abstract

The present disclosure relates to a layout method and a related non-transitory computer readable medium. The layout method is used to design a layout of a bridge circuit between a source circuit and a destination circuit in a circuit system. The layout method comprises: classifying the bridge circuit into a plurality of sub-blocks according to physical structure attributes; obtaining a plurality of preset block model units corresponding to the plurality of sub-blocks from a database; setting the plurality of preset block model units by a plurality of parameters to obtain a plurality of sub-block models; extracting a plurality of electrical models from the plurality of sub-block models respectively by using electromagnetic simulation software; concatenating the plurality of electrical models to obtain an overall electrical model; evaluating whether the overall electrical model meets specification requirements of the circuit system for the bridge circuit by using circuit simulation software; and if the overall electrical model meets the specification requirements, obtaining layout rules according to the plurality of sub-block models.

Description

Technical Field

[0001] This invention relates to a layout method and an associated non-transitory computer-readable medium, and more particularly to a layout method for obtaining layout rules and an associated non-transitory computer-readable medium. Background Technology

[0002] When manufacturing circuits, there is considerable freedom in circuit layout design. However, regardless of the layout design, the circuit must meet the system's specifications. Therefore, when the designed circuit layout fails to meet the specifications, the entire circuit layout must be redesigned. The high degree of freedom in layout design leads to numerous design options, making the circuit layout design process extremely time-consuming. Therefore, how to effectively design circuit layouts has become an important issue in this field. Summary of the Invention

[0003] This invention discloses a layout method for designing the layout of bridging circuits between source and destination circuits in a circuit system. The layout method includes: classifying the bridging circuit into multiple sub-blocks based on physical structural attributes; obtaining multiple preset block model units corresponding to these sub-blocks from a database; setting these preset block model units through multiple parameters to obtain multiple sub-block models; extracting multiple electrical models from these sub-block models using electromagnetic simulation software; cascading these electrical models to obtain an overall electrical model; evaluating whether the overall electrical model meets the specifications of the circuit system for the bridging circuit using circuit simulation software; and if the overall electrical model meets the specifications, obtaining layout rules based on the sub-block models.

[0004] This invention discloses a non-transitory computer-readable medium for storing source code. When the source code is executed by a processor, the processor performs the following steps: classifying the bridging circuit in the circuit system into multiple sub-blocks according to physical structural attributes; obtaining multiple preset block model units corresponding to these sub-blocks from a database; setting these preset block model units through multiple parameters to obtain multiple sub-block models; extracting multiple electrical models from these sub-block models using electromagnetic simulation software; cascading these electrical models to obtain an overall electrical model; evaluating whether the overall electrical model meets the specifications of the circuit system for the bridging circuit using circuit simulation software; and if the overall electrical model meets the specifications, obtaining layout rules based on these sub-block models.

[0005] Compared to prior art, the layout method of the present invention and the associated non-transitory computer-readable medium for obtaining layout rules for circuit layout make circuit manufacturing more efficient. Attached Figure Description

[0006] The various aspects of the invention can be best understood by reading the following embodiments and accompanying drawings. It should be noted that, in accordance with standard practice in the art, the various features in the figures are not drawn to scale. In fact, the dimensions of certain features may be intentionally enlarged or reduced for clarity of description.

[0007] Figure 1 The diagram shows a circuit system in some embodiments of the present invention.

[0008] Figure 2 This is a flowchart of a layout method in some embodiments of the present invention.

[0009] Figure 3 This is a schematic diagram of a computer system in another embodiment of the present invention. Detailed Implementation

[0010] Figure 1 A schematic diagram of a circuit system 10 is shown for some embodiments of the present invention. The circuit system 10 includes a source circuit 11, a destination circuit 12, a printed circuit board 13, and a bridging circuit 14 connecting the source circuit 11 and the destination circuit 12.

[0011] The source circuit 11 is disposed on a die D1, which is packaged in a package structure P1. The die D1 is connected to the pin PIN1 of the package structure P1 via a bonding wire B1, a bonding wire pad BP1, and a trace T1 inside the package structure P1.

[0012] Package structure P1 is connected to pin PIN2 of package structure P2 via pin PIN1, trace T2 on printed circuit board 13, via pad VP1, via VIA1, via pad VP2, trace T3 on printed circuit board 13, via pad VP3, via VIA2, via pad VP4 and trace T4 on printed circuit board 13.

[0013] Pin PIN2 is connected to the destination circuit 12 located on the die D2 via trace T5 inside the package structure P2, bonding pad BP2 and bonding wire B2.

[0014] Bridge circuit 14 includes a CHL channel connecting the source circuit 11 to the destination circuit 12. Figure 1In the diagram, the channel CHL is represented by multiple dashed arrows, meaning that the structure of the bridging circuit 14 includes bond lines B1-B2, bond line pads BP1-BP2, pins PIN1-PIN2, vias VIA1-VIA2, via pads VP1-VP4, and traces T1-T5. In some embodiments, the structure of the bridging circuit 14 only includes some of the components among bond lines B1-B2, bond line pads BP1-BP2, pins PIN1-PIN2, vias VIA1-VIA2, via pads VP1-VP4, and traces T1-T5. For example, the bridging circuit 14 may not include bond line pads BP1-BP2.

[0015] In some embodiments, the circuit system 10 has predetermined performance requirements for the transmitted signal from the source circuit 11 to the destination circuit 12, and the transmitted signal is transmitted via the channel CHL of the bridging circuit 14, thereby the circuit system 10 has a specification requirement for the bridging circuit 14. When the bridging circuit 14 meets this specification requirement, it can be determined that the transmitted signal from the source circuit 11 to the destination circuit 12 meets the specifications of the circuit system 10.

[0016] Generally, the specifications of the bridging circuit 14 in the circuit system 10 are known, and there is relatively great flexibility in how the bridging circuit 14 is manufactured to meet these specifications. More specifically, when manufacturing the bridging circuit 14, its layout is first designed, and this layout must essentially conform to a layout rule so that the bridging circuit 14 manufactured using this layout meets the specifications. However, the layout rule for the bridging circuit 14 is unknown. Therefore, in some prior art, the manufacturing of the bridging circuit 14 involves a lengthy manual layout design. The designed layout undergoes electrical characteristic testing, and if the electrical characteristics of the designed layout do not meet the specifications, the layout of the bridging circuit 14 must be redesigned. Only after the electrical characteristics of the redesigned layout meet the specifications are the bridging circuit 14 manufactured according to the final layout that meets the specifications. In summary, because the layout rule for the bridging circuit 14 is unknown, the manufacturing of the bridging circuit 14 is a rather time-consuming operation in the prior art.

[0017] Compared to prior art, the present invention provides a layout method 20 for designing a bridging circuit 14. The layout method 20 is used to obtain a layout rule for the bridging circuit 14, generate a layout of the bridging circuit 14 according to the layout rule, and then manufacture the bridging circuit 14 according to the generated layout.

[0018] refer to Figure 2 . Figure 2A flowchart illustrating a layout method 20 according to some embodiments of the present invention is provided. The layout method 20 includes steps S21, S22, S23, S24, S25, S26, S27, S28, and S29. For ease of understanding, the layout method 20 follows... Figure 1 The reference table number in the document, and also refer to the reference table number in the document. Figure 1 Explanation.

[0019] In step S21, the bridging circuit 14 is classified into multiple sub-blocks according to the physical structural attributes of the circuit elements. In some embodiments, these sub-blocks include bonding wire sub-blocks, trace sub-blocks, and via sub-blocks, wherein the bonding wire sub-blocks, trace sub-blocks, and via sub-blocks correspond to... Figure 1 The bridging circuit 14 includes bonding lines B1-B2, traces T1-T5, and vias VIA1-VIA2. However, the invention is not limited thereto; the bridging circuit 14 may be classified into more or fewer sub-blocks according to the physical structural properties of the circuit elements.

[0020] In some embodiments, when establishing a circuit layout, corresponding preset model blocks can be obtained from a database based on the circuit components. For example, a circuit includes traces, resistors, and capacitors. When establishing the layout of this circuit, preset model blocks for traces, resistors, and capacitors can be selected from the database. Then, according to the connection method of the circuit, the preset model blocks for traces, resistors, and capacitors are connected to form an overall circuit layout. In other words, the database is used to store various preset model blocks, and these preset model blocks correspond to various sub-blocks in the circuit classified by physical structural attributes.

[0021] In step S22, multiple preset block model units corresponding to these sub-blocks are obtained from the database. For example, a sub-block includes a bonding wire sub-block, a trace sub-block, and a via sub-block. In step S22, a bonding wire preset block model unit, a trace preset block model unit, and a via preset block model unit are obtained from the multiple preset block model units.

[0022] These preset block model units are parameterized block model units, which retain design flexibility while maintaining design simplicity. For example, when the bridging circuit 14 contains traces with two different linewidths, the designer can use the same trace preset block model unit and set the trace preset block model unit according to the different linewidths to obtain two trace block models with different parameters.

[0023] In step S23, multiple sub-block models are obtained by setting the preset block model units using multiple parameters. In some embodiments, these parameters include bond wire arc height, trace length, trace width, trace spacing, ground shielding, pad size, substrate thickness, and substrate material. In some embodiments, the bond wire preset block model unit has an adjustable bond wire arc height, the trace preset block model unit has adjustable trace length, trace width, trace spacing, and ground shielding, and the via preset block model unit has adjustable pad size and substrate thickness. In step S23, the bond wire preset block model unit is set by the bond wire arc height to obtain a bond wire sub-block model, the trace preset block model unit is set by the trace length, trace width, trace spacing, and ground shielding to obtain a trace sub-block model, and the via preset block model unit is set by the pad size and substrate thickness to obtain a via sub-block model.

[0024] In step S24, multiple electrical models are extracted from the sub-block models using electromagnetic simulation software. In some embodiments, the electromagnetic simulation software is a three-dimensional full-wave electromagnetic simulation software, such as Ansys HFSS simulation software provided by Ansys. The electromagnetic simulation software is used to set the input nodes, output nodes, and excitation sources for each sub-block model, thus allowing the software to independently extract the electrical model of each sub-block model. In some embodiments, the electrical model includes information related to S-parameters and / or RLGC. In a further embodiment, the electromagnetic simulation software is used to pre-build preset model blocks in a database.

[0025] Generally, the electrical characteristics of a circuit are calculated using fixed sub-blocks and simple mathematical formulas. However, when the circuit structure is complex, such as structures involving multiple signal interactions (e.g., bond wires, vias), or structures with incomplete return paths (e.g., traces on multilayer circuit boards), using only fixed sub-blocks for calculations will result in inaccurate results. Because these fixed sub-blocks only pre-determine fixed structures, their flexibility is limited. In contrast to the above methods, this invention utilizes three-dimensional full-wave electromagnetic simulation software to establish pre-defined sub-blocks according to actual needs, and extracts the electrical model of the circuit based on these pre-defined sub-blocks. Because the three-dimensional full-wave electromagnetic simulation software parameterizes the established pre-defined sub-blocks, it maintains high flexibility for different structures, is more adaptable to various situations, and thus results in a more accurate extracted electrical model.

[0026] In step S25, these electrical models are cascaded into a unified electrical model. This unified electrical model corresponds to the bridging circuit 14. Specifically, the unified electrical model is the electrical model of the channel CHL. In some embodiments, the bridging circuit 14 may have multiple channels CHL, and the unified electrical model obtained in step S25 corresponds to the critical path in these channels CHL, that is, the unified electrical model represents the electrical model of the longest channel or the channel causing the greatest delay in the bridging circuit 14.

[0027] Since these sub-block models each correspond to a portion of the CHL channel, the electromagnetic simulation software only needs to consider the limitations of that sub-block when extracting the electrical model from these sub-block models. Therefore, less computation or simulation is required, and the time consumption is lower than extracting the electrical model from the entire channel model. In other words, obtaining the overall electrical model is more efficient, which in turn makes the design layout more efficient.

[0028] In step S26, circuit simulation software is used to evaluate whether the overall electrical model meets the specifications of the bridging circuit 14 of the circuit system 10. In some embodiments, the electrical characteristics of the overall electrical model are obtained using circuit simulation software, and then the specifications of the bridging circuit 14 of the circuit system 10 are compared based on these electrical characteristics. In some embodiments, the circuit simulation software is an EDA design tool, such as HSPICE or SPECTRE software. In some embodiments, the electrical characteristics of the overall electrical model can be represented by an eye diagram. In other embodiments, the electrical characteristics of the overall electrical model can be represented by digitized data or other graphical data, and the invention is not limited thereto.

[0029] In other embodiments, in order to obtain the effect of inter-channel coupling, the overall electrical model is copied into multiple parallel electrical models in step S25, and the electrical characteristics of the multiple parallel overall electrical models are obtained in step S26.

[0030] When the overall electrical model meets the specifications of the bridging circuit 14 of the circuit system 10, the layout method 20 proceeds to step S27. When the overall electrical model does not meet the specifications of the bridging circuit 14 of the circuit system 10, the layout method 20 returns to step S23 and readjusts at least one of the parameters to set the preset block model units to obtain the adjusted multiple sub-block models. For example, only the trace linewidth is adjusted to set the trace sub-block model, while the other parameters remain unchanged. However, the present invention is not limited to this, and various combinations of adjusting these parameters are within the consideration of the present invention. After the layout method 20 returns to step S23, steps S23 to S26 are executed again until the overall electrical model meets the specifications of the bridging circuit 14 of the circuit system 10, and then the layout method 20 proceeds to step S27.

[0031] In step S27, layout rules are obtained based on these sub-block models. Specifically, layout rules are obtained based on the parameters used to set the preset block model units in step S23. For example, if the trace spacing is set to X units in step S23 for the preset block model unit, a layout rule is obtained that the trace spacing must be at least X units, where X is only illustrative and the unit can be any length unit; the invention is not limited thereto. Or, for example, if the ground shield is set to add one ground shield to one of the Y signal lines in step S23 for the preset block model unit, a layout rule is obtained that at least one ground shield must be present among the Y signal lines.

[0032] In step S28, the layout of the bridging circuit 14 is generated according to the layout rules. After obtaining the layout, in step S29, the bridging circuit 14 is manufactured according to the layout.

[0033] refer to Figure 3 . Figure 3 A schematic diagram of a computer system 30 is illustrated according to some embodiments of the present invention. The computer system 30 includes a storage device 31, a processor 32, an input / output device 33, and a display device 34. The storage device 31 stores source code and provides it to the processor 32 for execution. The input / output device 33 is used to receive information from outside the computer system 30 and / or transmit information to outside the computer system 30. The display device 34 is used to display the process and / or result of the processor 32 executing the source code.

[0034] In some embodiments, storage device 31 includes a non-transitory computer-readable medium 310. The non-transitory computer-readable medium 310 is used to store source code and to provide the source code to processor 32 for execution. Figure 2 The layout method 20 is described above.

[0035] The foregoing description briefly outlines the features of certain embodiments of the present invention, enabling those skilled in the art to gain a more comprehensive understanding of the various forms of the invention. Those skilled in the art should understand that they can readily use the present invention as a basis to design or modify other processes and structures to achieve the same objectives and / or advantages as the embodiments described herein. Those skilled in the art should understand that these equivalent embodiments still fall within the spirit and scope of the present invention, and that various changes, substitutions, and modifications can be made without departing from the spirit and scope of the present invention.

[0036] [Symbol Explanation]

[0037] 10: Circuit System

[0038] 11: Source Circuit

[0039] 12: Destination Circuit

[0040] 13: Printed Circuit Board

[0041] 14: Bridging circuit

[0042] 20: Layout Methods

[0043] 30: Computer System

[0044] 31: Processor

[0045] 32: Storage device

[0046] 33: Input / Output System

[0047] 34: Display device

[0048] 310 Non-transitory computer-readable media

[0049] B1: Bond wire

[0050] B2: Bond wire

[0051] BP1: Bonding wire pad

[0052] BP2: Bonding wire pad

[0053] CHL: Channel

[0054] D1: Nude Film

[0055] D2: Nude Film

[0056] PIN1: Pin

[0057] PIN2: Pin

[0058] S21: Steps

[0059] S22: Steps

[0060] S23: Steps

[0061] S24: Steps

[0062] S25: Steps

[0063] S26: Steps

[0064] S27: Steps

[0065] S28: Steps

[0066] S29: Steps

[0067] T1: Trace

[0068] T2: Trace

[0069] T3: Trace

[0070] T4: Trace

[0071] T5: Trace

[0072] VIA1: Via

[0073] VIA2: Via

[0074] VP1: Via Pad

[0075] VP2: Via pad

[0076] VP3: Via Pad

[0077] VP4: Via Pad

Claims

1. A layout method for designing a layout of a bridging circuit between a source circuit and a destination circuit in a circuit system, comprising: The bridging circuit is classified into multiple sub-blocks according to its physical structure attributes, wherein the multiple sub-blocks include a bonding wire sub-block, a trace sub-block, and a via block; Multiple preset block model units corresponding to the multiple sub-blocks are obtained from a database, wherein the multiple preset block model units include a bonding wire preset block model unit, a trace preset block model unit and a via preset block model unit. Multiple sub-block models are obtained by setting multiple preset block model units with multiple parameters, wherein the multiple sub-block models include a bonding line sub-block model, a trace line sub-block model and a via sub-block model. Using an electromagnetic simulation software, multiple electrical models are extracted from the multiple sub-block models respectively; Using a circuit simulation software, the multiple electrical models are cascaded to obtain a unified electrical model; Assess whether the overall electrical model meets the circuit system's specification requirements for the bridging circuit; and If the overall electrical model meets the specification requirements, a layout rule is obtained based on the multiple sub-block models.

2. The layout method according to claim 1, wherein the source circuit is disposed on a first die and packaged in a first package structure, the destination circuit is disposed on a second die and packaged in a second package structure, and the first package structure and the second package structure are disposed on a printed circuit board. The bridging circuit includes a channel from the source circuit to the destination circuit, wherein the channel passes sequentially from the first die through the first package structure, the printed circuit board, and the second package structure to the second die.

3. The layout method according to claim 1, wherein setting the plurality of preset block model units through the plurality of parameters to obtain the plurality of sub-block models includes: The bonding wire preset block model unit is set by one of the multiple parameters, namely the bonding wire arc height, to obtain the bonding wire sub-block model.

4. The layout method according to claim 1, wherein setting the plurality of preset block model units through the plurality of parameters to obtain the plurality of sub-block models includes: The trace sub-block model is obtained by setting the trace preset block model unit by using the line length, line width, line spacing and grounding shield among the multiple parameters.

5. The layout method according to claim 1, wherein setting the plurality of preset block model units through the plurality of parameters to obtain the plurality of sub-block models includes: The via preset block model unit is set by one of the multiple parameters, namely, the pad size and the substrate thickness, to obtain the via sub-block model.

6. The layout method according to claim 1, wherein the electromagnetic simulation software is a three-dimensional full-wave electromagnetic simulation software.

7. The layout method according to claim 1, further comprising: A layout for the bridging circuit is generated according to the layout rules; and The bridge circuit is manufactured according to the described layout.

8. The layout method according to claim 1, further comprising: If the overall electrical model does not meet the specification requirements, the multiple parameters are adjusted, and the multiple preset block model units are set using the adjusted multiple parameters to obtain the multiple sub-block models.

9. A non-transitory computer-readable medium storing source code that, when executed by a processor, causes the processor to perform the following steps: A bridging circuit in a circuit system is classified into multiple sub-blocks according to its physical structure attributes, wherein the multiple sub-blocks include a bonding wire sub-block, a trace sub-block, and a via block. Multiple preset block model units corresponding to the multiple sub-blocks are obtained from a database, wherein the multiple preset block model units include a bonding wire preset block model unit, a trace preset block model unit and a via preset block model unit. Multiple sub-block models are obtained by setting multiple preset block model units with multiple parameters, wherein the multiple sub-block models include a bonding line sub-block model, a trace line sub-block model and a via sub-block model. Using an electromagnetic simulation software, multiple electrical models are extracted from the multiple sub-block models respectively; The multiple electrical models are cascaded to obtain a unified electrical model; Using circuit simulation software, evaluate whether the overall electrical model meets the circuit system's specification requirements for the bridging circuit; and If the overall electrical model meets the specification requirements, a layout rule is obtained based on the multiple sub-block models.

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