Patterned layout, method of forming the same, and method of forming a semiconductor structure

Abstract

The application discloses a patterned layout, a forming method of the patterned layout and a forming method of a semiconductor structure. The forming method of the patterned layout comprises the following steps: providing an initial layout, wherein the initial layout comprises a plurality of main patterns; dividing the initial layout into a plurality of adjacent sub-regions; forming a first auxiliary pattern corresponding to the main pattern in each of the sub-regions; obtaining a boundary region of the initial layout, wherein a central axis of the boundary region is a boundary of adjacent sub-regions; removing at least part of the first auxiliary pattern located in the boundary region; and forming a plurality of second auxiliary patterns, wherein the second auxiliary patterns are located between two first auxiliary patterns on two sides of the boundary region, and the distance between each second auxiliary pattern and any two adjacent first auxiliary patterns is the same. The forming method of the patterned layout improves the continuity of the auxiliary pattern in the patterned layout, improves the correction effect of the auxiliary pattern on the main pattern, and optimizes the process window of the main pattern exposure and development.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically to a patterned layout, a method for forming the patterned layout, and a method for forming a semiconductor structure. Background Technology

[0002] As semiconductor device dimensions continue to shrink, the size of patterns in semiconductor layouts also gradually decreases, thus placing increasingly higher demands on photolithography resolution. To enable better transfer of semiconductor layout patterns onto photoresist patterns and reduce pattern distortion caused by optical proximity effects, SRAF (Sub Resolution Assist Feature) patterns are typically added around the target pattern in the semiconductor layout to optimize the process window for exposure and development of the target pattern.

[0003] In the process of generating SRAF patterns, the semiconductor layout is typically divided into multiple sub-regions, and SRAF patterns are formed separately in each sub-region, thereby improving computational efficiency. After the SRAF patterns in each sub-region are formed, they are merged to generate the final SRAF pattern used for optical proximity correction.

[0004] However, in the prior art, since the formation process of SRAF patterns in each sub-region is independent of each other, after merging the SRAF patterns of each sub-region, the SRAF patterns at the boundaries of each sub-region are discontinuous, which affects the correction effect of the auxiliary pattern on the main pattern and reduces the process window for exposure and development of the main pattern. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a patterned layout, a method for forming the patterned layout, and a method for forming a semiconductor structure. By improving the continuity of auxiliary patterns in the patterned layout, the correction effect of auxiliary patterns on the main pattern is improved, and the process window for exposure and development of the main pattern is optimized.

[0006] To address the aforementioned technical problems, embodiments of the present invention provide a method for forming a graphical layout, comprising: providing an initial layout, the initial layout including a plurality of main graphics; dividing the initial layout into a plurality of adjacent sub-regions; forming a first auxiliary graphic corresponding to the main graphics in each of the sub-regions; obtaining a boundary region of the initial layout, the central axis of the boundary region being the boundary of the adjacent sub-regions; removing at least a portion of the first auxiliary graphics located within the boundary region; and forming a plurality of second auxiliary graphics, the second auxiliary graphics being located between two adjacent first auxiliary graphics on both sides of the boundary region, and the spacing between any two adjacent second auxiliary graphics and each first auxiliary graphic being the same.

[0007] Optionally, the method for forming the first auxiliary graphic includes: forming a first initial auxiliary graphic in each of the sub-regions; and performing boundary merging processing on the first initial auxiliary graphics in adjacent sub-regions to form the first auxiliary graphic.

[0008] Optionally, the method for obtaining the boundary region includes: obtaining the length of the boundary region; forming a boundary region with a length equal to the length of the boundary region at the boundary of an adjacent sub-region, wherein the central axis of the boundary region is the boundary of the adjacent sub-region.

[0009] Optionally, the method for obtaining the length of the boundary region includes: obtaining the first auxiliary graphic correction quantity, the minimum pitch of the auxiliary graphic, and the first auxiliary graphic spacing; multiplying the first auxiliary graphic correction quantity by the minimum pitch of the auxiliary graphic and adding the first auxiliary graphic spacing to obtain the length of the boundary region.

[0010] Optionally, the method for obtaining the minimum pitch of the auxiliary graphic includes: obtaining the minimum length of the auxiliary graphic and the first spacing between the auxiliary graphics; adding the minimum length of the auxiliary graphic and the first spacing between the auxiliary graphics to obtain the minimum pitch of the auxiliary graphic.

[0011] Optionally, the first auxiliary graphic correction quantity N1 satisfies:

[0012]

[0013] Among them, P min To minimize the pitch of the auxiliary graphic, P max The maximum pitch for auxiliary graphics.

[0014] Optionally, the method for obtaining the minimum pitch and maximum pitch of the auxiliary graphic includes: obtaining the minimum length of the auxiliary graphic, the maximum length of the auxiliary graphic, and the first spacing of the auxiliary graphic; adding the minimum length of the auxiliary graphic and the first spacing of the auxiliary graphic to obtain the minimum pitch of the auxiliary graphic; and adding the maximum length of the auxiliary graphic and the first spacing of the auxiliary graphic to obtain the maximum pitch of the auxiliary graphic.

[0015] Optionally, the method for forming the second auxiliary graphic includes: after removing at least a portion of the first auxiliary graphic located within the boundary region, obtaining a second auxiliary graphic insertion area, the second auxiliary graphic insertion area covering the boundary region; obtaining the length of the second auxiliary graphic insertion area, the number of second auxiliary graphics, and the spacing between the second auxiliary graphics; obtaining the length of the second auxiliary graphic based on the length of the second auxiliary graphic insertion area, the number of second auxiliary graphics, and the spacing between the second auxiliary graphics; forming the second number of second auxiliary graphics within the second auxiliary graphic insertion area, wherein the length of each second auxiliary graphic is the length of the second auxiliary graphic and the spacing is the spacing between the second auxiliary graphics.

[0016] Optionally, the method for obtaining the second auxiliary graphic insertion area includes: after removing at least a portion of the first auxiliary graphic located within the boundary area, the area between the adjacent side edges of the two first auxiliary graphics on both sides of the boundary area forms the second auxiliary graphic insertion area.

[0017] Optionally, the length of the second auxiliary graphic insertion area is greater than or equal to the length of the boundary area, and the length of the second auxiliary graphic insertion area is less than or equal to the maximum length of the second auxiliary graphic insertion area.

[0018] Optionally, the method for obtaining the maximum length of the second auxiliary graphic insertion area includes: obtaining the boundary area length and the maximum pitch of the auxiliary graphic; adding twice the maximum pitch of the auxiliary graphic to the boundary area length to obtain the maximum length of the second auxiliary graphic insertion area.

[0019] Optionally, the number of the second auxiliary graphics is equal to the number of corrections to the first auxiliary graphics.

[0020] Optionally, the spacing between the second auxiliary graphics is equal to the spacing between the first auxiliary graphics.

[0021] Optionally, the method for obtaining the length L of the second auxiliary graphic includes: obtaining the length L2 of the second auxiliary graphic insertion area, the number N2 of the second auxiliary graphics, and the spacing S2 of the second auxiliary graphics; and obtaining the length of the second auxiliary graphic based on the length L2 of the second auxiliary graphic insertion area, the number N2 of the second auxiliary graphics, and the spacing S2 of the second auxiliary graphics.

[0022] Optionally, the length of the second auxiliary graphic is greater than or equal to the minimum length of the auxiliary graphic, and the length of the second auxiliary graphic is less than or equal to the maximum length of the auxiliary graphic.

[0023] Accordingly, this embodiment of the invention also provides a graphical layout, characterized in that it includes: an initial layout, the initial layout including a plurality of main graphics, the initial layout including a plurality of adjacent sub-regions; a boundary region located at the boundary of the adjacent sub-regions, the central axis of the boundary region being the boundary of the adjacent sub-regions; a first auxiliary graphic located outside the boundary region; and a second auxiliary graphic located between two adjacent first auxiliary graphics on both sides of the boundary region, wherein the spacing between any two adjacent second auxiliary graphics and each first auxiliary graphic is the same.

[0024] Accordingly, embodiments of the present invention also provide a method for forming a semiconductor structure, comprising: providing a substrate; providing a patterned layout, the patterned layout comprising: an initial layout, the initial layout comprising a plurality of main patterns, the initial layout comprising a plurality of adjacent sub-regions; a boundary region located at the boundary of the adjacent sub-regions, the central axis of the boundary region being the boundary of the adjacent sub-regions; a first auxiliary pattern located outside the boundary region; a second auxiliary pattern located between two adjacent first auxiliary patterns on both sides of the boundary region, wherein the spacing between any two adjacent second auxiliary patterns and each first auxiliary pattern is the same; forming a patterned layer on the substrate according to the patterned layout; and etching the substrate using the patterned layer as a mask to form a semiconductor structure.

[0025] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0026] In the method for forming a graphical layout provided by the technical solution of the present invention, by removing at least a portion of the first auxiliary graphic located within the boundary area and forming a plurality of second auxiliary graphics, and making the spacing between any two adjacent second auxiliary graphics and each first auxiliary graphic the same, the spacing between each first auxiliary graphic and each second auxiliary graphic is uniform. Therefore, the problem of discontinuity of the first auxiliary graphics at the boundary of the sub-region is corrected, thereby improving the correction effect of each auxiliary graphic on the main graphic and increasing the process window for exposure and development of the main graphic.

[0027] Furthermore, since the method of removing at least part of the first auxiliary graphic located within the boundary region and forming several second auxiliary graphics is based on rule-based operations, the method is executed quickly and consumes less computing resources.

[0028] In the graphical layout provided by the technical solution of the present invention, since the spacing between any two adjacent second auxiliary graphics and each first auxiliary graphics is the same, the problem of discontinuity of the first auxiliary graphics at the boundary of the sub-region is corrected, thereby improving the correction effect of each auxiliary graphics on the main graphic and increasing the process window for exposure and development of the main graphic.

[0029] In the semiconductor structure formation method provided by the technical solution of the present invention, since the spacing between any two adjacent second auxiliary patterns and first auxiliary patterns in the patterned layout is the same, the main pattern is better corrected, the process window for exposure and development of the main pattern is optimized, and the formed patterned layer can more realistically reflect the design of the patterned layout, thereby improving the process window of the semiconductor structure formation process. Attached Figure Description

[0030] Figure 1 It is a structural diagram illustrating the formation process of a graphical map;

[0031] Figure 2 This is a flowchart illustrating a method for forming a graphical layout according to an embodiment of the present invention;

[0032] Figures 3 to 6 This is a schematic diagram of the formation process of a graphical layout according to an embodiment of the present invention;

[0033] Figure 7 This is a flowchart illustrating a method for forming a plurality of second auxiliary graphics in one embodiment of the present invention;

[0034] Figure 8 and Figure 9 This is a schematic diagram of the process of forming several second auxiliary graphics in one embodiment of the present invention. Detailed Implementation

[0035] As described in the background art, after merging the SRAF graphics of each sub-region in the graphic layout, the SRAF graphics at the boundaries of each sub-region are discontinuous, which affects the correction effect of the auxiliary graphics on the main graphics and reduces the process window for exposure and development of the main graphics.

[0036] Figure 1 It is a structural diagram illustrating the formation process of a graphical map.

[0037] Please refer to Figure 1 The method for forming the graphical layout includes: obtaining an initial layout 100; the initial layout 100 includes several main graphics 101; dividing the initial layout 100 into several sub-regions; forming initial auxiliary graphics (not shown) in each of the sub-regions according to the several main graphics 101, the initial auxiliary graphics being located on both sides of the main graphics 101; and performing boundary merging processing on the initial auxiliary graphics in adjacent sub-regions to form several auxiliary graphics 102.

[0038] Since the formation processes of the initial auxiliary patterns in each sub-region are independent, and the process of merging the initial auxiliary patterns in adjacent sub-regions introduces layout boundary defects, the spacing of the auxiliary patterns 102 near the boundary AA' of each sub-region becomes uneven. Because the auxiliary patterns 102 near the boundary AA' of the sub-region are discontinuous, the correction effect of the auxiliary patterns 102 on some main patterns (such as region B) is affected, reducing the process window for the exposure and development of the main pattern.

[0039] To address the aforementioned technical problems, the present invention provides a method for forming a graphical layout, comprising: after forming a first auxiliary graphic, obtaining a boundary region with the boundary of adjacent sub-regions as the central axis; removing at least a portion of the first auxiliary graphic located within the boundary region, and forming a plurality of second auxiliary graphics, wherein the spacing between any two adjacent second auxiliary graphics and each first auxiliary graphic is the same. Therefore, the method for forming the graphical layout ensures uniform spacing between the first and second auxiliary graphics, thus correcting the problem of discontinuity in the first auxiliary graphics at the boundaries of sub-regions, thereby improving the correction effect of each auxiliary graphic on the main graphic and increasing the process window for exposure and development of the main graphic.

[0040] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0041] Figure 2 This is a flowchart illustrating a method for forming a graphical layout according to an embodiment of the present invention.

[0042] Please refer to Figure 2 Methods for forming graphical maps include:

[0043] Step S200: Provide an initial layout, which includes several main graphics;

[0044] Step S201: Divide the initial map into several adjacent sub-regions;

[0045] Step S202: Form a first auxiliary graphic corresponding to the main graphic in each of the sub-regions;

[0046] Step S203: Obtain the boundary region of the initial layout, wherein the central axis of the boundary region is the boundary of the adjacent sub-region;

[0047] Step S204: Remove at least a portion of the first auxiliary graphic located within the boundary region;

[0048] Step S205: A plurality of second auxiliary graphics are formed. The second auxiliary graphics are located between two adjacent first auxiliary graphics on both sides of the boundary, and the spacing between any two adjacent second auxiliary graphics and each first auxiliary graphic is the same.

[0049] The following is a detailed description in conjunction with the accompanying drawings.

[0050] Figures 3 to 6 This is a schematic diagram of the formation process of a graphical layout according to an embodiment of the present invention.

[0051] Please refer to Figure 3 and Figure 4 , Figure 4 yes Figure 3An enlarged view of region C provides an initial layout 200, which includes several main graphics 202; the initial layout 200 is divided into several adjacent sub-regions 201.

[0052] In the subsequent semiconductor structure formation process, the main pattern 202 is exposed and developed to form a patterned layer, thereby forming a corresponding semiconductor structure based on the patterned layer.

[0053] The purpose of dividing the initial layout 200 into several adjacent sub-regions 201 is that, in the subsequent process of forming auxiliary graphics, auxiliary graphics can be formed in each sub-region 201, thereby improving computational efficiency and saving computational resources.

[0054] In this embodiment, the length of each sub-region 201 ranges from 50 micrometers to 100 micrometers, and the width of each sub-region 201 ranges from 50 micrometers to 100 micrometers.

[0055] Please Figure 4 Based on reference Figure 5 A first auxiliary graphic 203 corresponding to the main graphic 202 is formed in each of the sub-regions 201.

[0056] The function of the first auxiliary pattern 203 is to correct the pattern distortion of the main pattern 202 caused by the optical proximity effect during exposure, thereby optimizing the process window for exposure and development of the main pattern 202, so that the subsequently formed patterned layer and semiconductor structure can better correspond to the main pattern 202. The first auxiliary patterns 203 need to have a uniform spacing to ensure a good correction effect on the main pattern 202.

[0057] In order for the device forming the graphical layout to form a clear first auxiliary graphic 203, the length of the first auxiliary graphic 203 needs to be greater than or equal to the minimum length L of the auxiliary graphic. min Meanwhile, since the first auxiliary pattern 203 will not remain on the wafer to form a patterning layer during subsequent exposure processes, the length of the first auxiliary pattern 203 needs to be less than or equal to the maximum length L of the auxiliary pattern. max .

[0058] In this embodiment, the method for forming the first auxiliary graphic 203 includes: forming a first initial auxiliary graphic (not shown) in each of the sub-regions 201; and performing boundary merging processing on the first initial auxiliary graphics in adjacent sub-regions 201 to form the first auxiliary graphic 203.

[0059] Each of the first initial auxiliary graphics is arranged independently around the main graphic 201. Each of the first initial auxiliary graphics has the same length; the spacing between each of the first initial auxiliary graphics is equal, and the spacing is denoted as the first auxiliary graphic spacing S1'.

[0060] However, since the formation process of the first initial auxiliary pattern in each sub-region 201 is independent of each other, and the process of merging the first initial auxiliary patterns in adjacent sub-regions 201 introduces a layout boundary defect, the spacing between some of the first auxiliary patterns 203 in region D near the boundary XX' of adjacent sub-regions 201 is different from the spacing between the first auxiliary patterns 203 outside region D. As a result, the first auxiliary patterns 203 in region D near the boundary XX' are discontinuous, thus reducing the process window for the exposure and development of the main pattern 202.

[0061] Please refer to Figure 6 After forming the first auxiliary graphic 203, the boundary region H of the initial layout 200 is obtained, and the central axis of the boundary region H is the boundary XX' of the adjacent sub-region 201.

[0062] The boundary region H defines the range of the first auxiliary graphic 203 that needs to be corrected. The boundary region H covers several unevenly spaced first auxiliary graphics 203 near the boundary XX' with the boundary XX' of the adjacent sub-region 201 as the central axis, so that the unevenly spaced first auxiliary graphics 203 can be corrected in the future to solve the problem of discontinuity of the first auxiliary graphics 203 near the boundary XX'.

[0063] In this embodiment, the method for obtaining the boundary region H includes: obtaining the boundary region length L1; forming a boundary region H of length L1 at the boundary of the adjacent sub-region 201, wherein the central axis of the boundary region H is the boundary of the adjacent sub-region 201.

[0064] The length L1 of the boundary region H ensures that the boundary region H covers the discontinuous areas of the first auxiliary graphic 203, while also making the process of correcting the unevenly spaced first auxiliary graphic 203 highly efficient. If the boundary region length L1 is too small, the boundary region H cannot completely cover the discontinuous areas of the first auxiliary graphic 203, resulting in the inability to solve the problem of discontinuity of the first auxiliary graphic 203 near the boundary XX'; if the boundary region length L1 is too large, the boundary region H includes too many first auxiliary graphics 203 that need to be corrected, which increases the complexity of the correction process of the first auxiliary graphic 203 and the required computing resources, thereby reducing the correction efficiency of the correction process.

[0065] Specifically, the method for obtaining the boundary region H length L1 includes: obtaining the first auxiliary graphic correction quantity N1 and the minimum pitch P of the auxiliary graphic.min and the first auxiliary graphic spacing S1; based on the first auxiliary graphic correction quantity N1, the minimum pitch P of the auxiliary graphic min The boundary region length L1 = N1 * P is obtained by first auxiliary graphic spacing S1. min +S1.

[0066] The spacing S1 of the first auxiliary graphic is determined by the structure and position of the first initial auxiliary graphic, and the minimum pitch P of the auxiliary graphic is... min The length of the first auxiliary graphic is determined by the device parameters that form the graphical layout and the spacing S1 of the first auxiliary graphic. By selecting an appropriate correction amount N1 for the first auxiliary graphic, a suitable boundary length L1 can be set, thereby making the process of correcting the first auxiliary graphic 203 more efficient while covering the discontinuous areas of the first auxiliary graphic 203.

[0067] In this embodiment, the minimum pitch P of the auxiliary graphic is obtained. min The methods include: obtaining the minimum length L of the auxiliary graphic. min and the spacing S1 of the first auxiliary graphic; based on the minimum length L of the auxiliary graphic min And the minimum pitch P of the auxiliary graphic is obtained by the first auxiliary graphic spacing S1. min =L min +S1.

[0068] The minimum length L of the auxiliary graphic min It is the minimum length that the auxiliary graphics are allowed to have by the device that forms the graphical layout.

[0069] In this embodiment, the first auxiliary graphic correction quantity N1 satisfies: N1≥ P min To minimize the pitch of the auxiliary graphic, P max The maximum pitch for auxiliary graphics.

[0070] Where ROUNDUP is used for rounding up, that is,

[0071] The value is greater than or equal to The smallest integer.

[0072] Specifically, obtain the minimum pitch P of the auxiliary graphic. min And the maximum pitch P of the auxiliary graphics max The methods include: obtaining the minimum length L of the auxiliary graphic. min Maximum length L of auxiliary graphics max and the spacing S1 of the first auxiliary graphic; based on the minimum length L of the auxiliary graphic min Maximum length L of auxiliary graphics maxAnd the first auxiliary graphic spacing S1, to obtain the minimum pitch P of the auxiliary graphic. min =L min +S1, and the maximum pitch P of the auxiliary graphic max =L max +S1.

[0073] The maximum length L of the auxiliary graphic max It refers to the maximum length that the auxiliary pattern can have after exposure, without leaving a patterning layer on the wafer.

[0074] After obtaining the boundary region H, the first auxiliary graphic 203, which is at least partially located within the boundary region H, is removed.

[0075] By removing at least a portion of the first auxiliary graphic 203 located within the boundary region H, it is ensured that the unevenly spaced first auxiliary graphic 203 near the boundary is completely removed, while the remaining first auxiliary graphic 203 has a uniform spacing.

[0076] In this embodiment, since the edge of the boundary region H passes through a portion of the first auxiliary graphic 203, the removed first auxiliary graphic 203 includes: a first auxiliary graphic 203 completely located within the boundary region H, and a first auxiliary graphic 203 partially located within the boundary region H. Specifically, the first auxiliary graphic 203 completely located within the boundary region H is denoted as the first sub-graphic, and the first auxiliary graphic 203 partially located within the boundary region H is denoted as the second sub-graphic.

[0077] In another embodiment, the edge of the boundary region H does not intersect with each of the first auxiliary graphics, so the removed first auxiliary graphics only include the first auxiliary graphics that are completely located within the boundary region.

[0078] After removing at least a portion of the first auxiliary graphic 203 located within the boundary region H, a plurality of second auxiliary graphics 204 are formed. The second auxiliary graphics 204 are located between two adjacent first auxiliary graphics 203 on both sides of the boundary region H, and the spacing between any two adjacent second auxiliary graphics 204 and each first auxiliary graphic 203 is the same.

[0079] The function of the second auxiliary pattern 204 is to replace the unevenly spaced first auxiliary pattern 203 near the boundary XX' of the sub-region 201, thereby correcting the discontinuity of the first auxiliary pattern 203 at the boundary XX' of the sub-region 201. Specifically, since the spacing between any two adjacent second auxiliary patterns 204 and first auxiliary patterns 203 is the same, the first auxiliary patterns 203 and second auxiliary patterns 204 are evenly distributed near the boundary XX' of adjacent sub-regions 201, thus correcting the discontinuity of the first auxiliary pattern 203 near the boundary XX', improving the correction effect of each auxiliary pattern on the main pattern 202, and increasing the process window for exposure and development of the main pattern 202.

[0080] After removing at least part of the first auxiliary graphic located within the boundary area, step S205 is executed to form a plurality of second auxiliary graphics. The second auxiliary graphics are located between two adjacent first auxiliary graphics on both sides of the boundary, and the spacing between any two adjacent second auxiliary graphics and each first auxiliary graphic is the same.

[0081] In this embodiment, the flowchart of the method for forming a plurality of second auxiliary graphics is shown below. Figure 7 As shown, it includes:

[0082] Step S220: Obtain the second auxiliary graphic insertion area, which covers the boundary area;

[0083] Step S221: Obtain the length L2 of the second auxiliary graphic insertion area, the number N2 of the second auxiliary graphics, and the spacing S2 of the second auxiliary graphics;

[0084] Step S222: Obtain the length L of the second auxiliary graphic based on the length L2 of the second auxiliary graphic insertion area, the number N2 of the second auxiliary graphics, and the spacing S2 of the second auxiliary graphics;

[0085] Step S223: N2 second auxiliary graphics with length L and spacing S2 are formed in the second auxiliary graphic insertion area.

[0086] The following is a detailed description in conjunction with the accompanying drawings.

[0087] Figure 8 and Figure 9 It is a structural diagram illustrating the process of forming several second auxiliary graphics.

[0088] Please refer to Figure 8 The second auxiliary graphic insertion area is obtained, and the second auxiliary graphic insertion area covers the boundary area.

[0089] In this embodiment, the method for obtaining the second auxiliary graphic insertion area G includes: after removing at least a portion of the first auxiliary graphic 203 located within the boundary area H, the area between the adjacent side edges of the two first auxiliary graphics 203 on both sides of the boundary area H forms the second auxiliary graphic insertion area G.

[0090] The second auxiliary graphic insertion area G defines the range in which the second auxiliary graphic is formed. The second auxiliary graphic within the second auxiliary graphic insertion area G is connected to the first auxiliary graphic outside the second auxiliary graphic insertion area G, so that any adjacent second auxiliary graphic and each first auxiliary graphic have a uniform spacing.

[0091] Please continue to refer to this. Figure 8 Obtain the length L2 of the second auxiliary graphic insertion area.

[0092] The length L2 of the second auxiliary graphic insertion area satisfies: L1 < L2 < L3; L1 is the length of the boundary area, and L3 is the maximum length of the second auxiliary graphic insertion area.

[0093] Please continue to refer to this. Figure 8 The reason why the length L2 of the second auxiliary graphic insertion area is greater than the length L1 of the boundary area is that the edge of the boundary area H passes through part of the first auxiliary graphic 203. The removed first auxiliary graphic 203 includes a first sub-graphic 221 that is completely located within the boundary area H and a second sub-graphic 222 that is partially located within the boundary area H. Since the second sub-graphic 222 is partially located outside the boundary area H, after removing the first sub-graphic 221 and the second sub-graphic 222, the length L2 of the second auxiliary graphic insertion area is greater than the length L1 of the boundary area.

[0094] In this embodiment, the method for obtaining the maximum length L3 of the second auxiliary graphic insertion area G includes: obtaining the boundary area length L1 and the maximum pitch P of the auxiliary graphic. max Based on the boundary region length L1 and the maximum pitch P of the auxiliary graphic. max Obtain the maximum length L3 of the second auxiliary graphic insertion area: L3 = L1 + 2 * P max The maximum pitch P of the auxiliary graphic is... max =L max +S1.

[0095] Specifically, the length L2 of the second auxiliary graphic insertion area is less than the maximum length L3 of the second auxiliary graphic insertion area, that is, L2 < L1 + 2*P maxThe reason is as follows: After removing the first sub-figure 221 and the second sub-figure 222, the lengths of the two second sub-figures 222 located outside the boundary region H are denoted as Q1 and Q2, thus, L2 = L1 + Q1 + Q2 + 2*S1; secondly, since the second sub-figures are at least partially located within the boundary region H, Q1 < L max Q2 < L max According to P max =L max +S1, therefore Q1+S1<L max +S1, that is, Q1+S1<P max and Q2+S1<L max +S1, that is, Q2+S1<P max Therefore, L2 < L1 + 2*P max .

[0096] In another embodiment, the edge of the boundary region H does not intersect with each of the first auxiliary graphics, so the removed first auxiliary graphics only include the first auxiliary graphics that are completely located within the boundary region H; at the same time, the edge of the boundary region H is infinitely close to but does not overlap with the sides of the two first auxiliary graphics on both sides of the boundary region H, so the length L2 of the second auxiliary graphics insertion area is equal to the length L1 of the boundary region.

[0097] In another embodiment, the edge of the boundary region H coincides with the edge of a portion of the first auxiliary graphic, and the first auxiliary graphic 203, except for the portion coinciding with the edge of the boundary region H, is located outside the boundary region H. Therefore, after the first auxiliary graphic 203 is removed, the length of the second auxiliary graphic insertion area L2 = L1 + 2*P max That is, the length L2 of the second auxiliary graphic insertion area is equal to the maximum length L3 of the second auxiliary graphic insertion area.

[0098] Please refer to Figure 9 Obtain the number of second auxiliary graphics N2 and the spacing between the second auxiliary graphics S2.

[0099] In this embodiment, the spacing S2 of the second auxiliary graphic 204 is equal to the spacing S1 of the first auxiliary graphic 203, so that the spacing between any two adjacent second auxiliary graphics 204 and each first auxiliary graphic 203 is the same.

[0100] In this embodiment, the number of second auxiliary graphics N2 is equal to the number of first auxiliary graphics corrections N1.

[0101] Please continue to refer to this. Figure 9Based on the number of second auxiliary graphics N2 and the spacing between the second auxiliary graphics S2, the length L of the second auxiliary graphics is obtained; N2 second auxiliary graphics with a length of L and a spacing of S2 are formed in the second auxiliary graphics insertion area.

[0102] In this embodiment, the method for obtaining the length L of the second auxiliary graphic includes: obtaining the length L2 of the second auxiliary graphic insertion area, the number N2 of the second auxiliary graphics, and the spacing S2 of the second auxiliary graphics; and obtaining the length of the second auxiliary graphic based on the length L2 of the second auxiliary graphic insertion area, the number N2 of the second auxiliary graphics, and the spacing S2 of the second auxiliary graphics.

[0103] Specifically, the length L of the second auxiliary graphic satisfies: L min ≤L≤L max L min To determine the minimum length of the auxiliary figure, L max The maximum length of the auxiliary pattern is defined as L. The range of the length L of the second auxiliary pattern ensures that the equipment forming the patterned layout can form the second auxiliary pattern 204, and that the second auxiliary pattern 204 will not remain on the wafer to form a patterned layer during subsequent exposure processes.

[0104] In this embodiment, since the method of removing at least part of the first auxiliary graphic 203 located within the boundary region H and forming a plurality of second auxiliary graphics 204 is based on rule-based operations, the method is executed quickly and consumes less computing resources.

[0105] Accordingly, the present invention also provides a graphical layout. The following is a detailed description in conjunction with the accompanying drawings.

[0106] Please continue to refer to this. Figure 9 The graphical layout includes: an initial layout 200, which includes several main graphics 202 and several adjacent sub-regions 201; a boundary region H located at the boundary XX' of the adjacent sub-regions 201, the central axis of the boundary region H being the boundary XX' of the adjacent sub-regions 201; a first auxiliary graphic 203 located outside the boundary region H; and a second auxiliary graphic 204 located between two adjacent first auxiliary graphics 203 on both sides of the boundary region H, wherein the spacing between any two adjacent second auxiliary graphics 204 and each first auxiliary graphic 203 is the same.

[0107] Since the spacing between any two adjacent second auxiliary graphics 204 and each first auxiliary graphics 203 is the same, the first auxiliary graphics 203 and each second auxiliary graphics 204 are evenly arranged near the boundary XX' of the adjacent sub-regions 201. Therefore, the problem of discontinuity of the first auxiliary graphics 203 at the boundary XX' of the sub-regions 201 is corrected, thereby improving the correction effect of each auxiliary graphics on the main graphic 202 and increasing the process window for exposure and development of the main graphic 202.

[0108] Accordingly, the present invention also provides a method for forming a semiconductor structure.

[0109] The method for forming the semiconductor structure includes: providing a substrate; providing a patterned layout; forming a patterned layer on the substrate according to the patterned layout; and etching the substrate using the patterned layer as a mask to form a semiconductor structure.

[0110] The graphical layout is as follows: Figure 9 The details mentioned above will not be repeated here.

[0111] During the formation of the patterned layer, since the spacing between any two adjacent second auxiliary graphics and first auxiliary graphics in the patterned layout is the same, the first and second auxiliary graphics are uniformly arranged near the boundaries of adjacent sub-regions. Therefore, during the exposure process of the patterned layout, the first and second auxiliary graphics have a uniform correction effect on the main pattern, thereby improving the process window for the exposure and development of the main pattern, enabling the formed patterned layer to better reflect the design of the actual main pattern; and after etching the substrate using the patterned layer as a mask, the formed semiconductor structure can better correspond to the design of the main pattern in the patterned layout.

[0112] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a graphical layout, characterized in that, include: An initial layout is provided, which includes several main graphics; The initial map is divided into several adjacent sub-regions; A first auxiliary graphic corresponding to the main graphic is formed in each of the sub-regions; Obtain the boundary region of the initial layout, where the central axis of the boundary region is the boundary of adjacent sub-regions; Remove at least a portion of the first auxiliary graphic located within the boundary region; Several second auxiliary graphics are formed, and the second auxiliary graphics are located between two adjacent first auxiliary graphics on both sides of the boundary area, and the spacing between any two adjacent second auxiliary graphics and each first auxiliary graphic is the same.

2. The method for forming a graphical layout as described in claim 1, characterized in that, The method for forming the first auxiliary graphic includes: forming a first initial auxiliary graphic in each of the sub-regions; and performing boundary merging processing on the first initial auxiliary graphics in adjacent sub-regions to form the first auxiliary graphic.

3. The method for forming a graphical layout as described in claim 1, characterized in that, The method for obtaining the boundary region includes: obtaining the length of the boundary region; forming a boundary region with a length equal to the length of the boundary region at the boundary of an adjacent sub-region, wherein the central axis of the boundary region is the boundary of the adjacent sub-region.

4. The method for forming a graphical layout as described in claim 3, characterized in that, The method for obtaining the length of the boundary region includes: obtaining the first auxiliary graphic correction quantity, the minimum pitch of the auxiliary graphic, and the first auxiliary graphic spacing; multiplying the first auxiliary graphic correction quantity by the minimum pitch of the auxiliary graphic and adding the first auxiliary graphic spacing to obtain the length of the boundary region.

5. The method for forming a graphical layout as described in claim 4, characterized in that, The method for obtaining the minimum pitch of the auxiliary graphic includes: obtaining the minimum length of the auxiliary graphic and the first auxiliary graphic spacing; adding the minimum length of the auxiliary graphic and the first auxiliary graphic spacing to obtain the minimum pitch of the auxiliary graphic.

6. The method for forming a graphical layout as described in claim 4, characterized in that, The first auxiliary graphic correction quantity N1 satisfies: N1≥ ; Among them, P min To minimize the pitch of the auxiliary graphic, P max The maximum pitch of the auxiliary graphic.

7. The method for forming a graphical layout as described in claim 6, characterized in that, The method for obtaining the minimum pitch and maximum pitch of the auxiliary graphic includes: obtaining the minimum length, maximum length, and first spacing of the auxiliary graphic; adding the minimum length and first spacing of the auxiliary graphic to obtain the minimum pitch of the auxiliary graphic; and adding the maximum length and first spacing of the auxiliary graphic to obtain the maximum pitch of the auxiliary graphic.

8. The method for forming a graphical layout as described in claim 4, characterized in that, The method for forming a second auxiliary graphic includes: after removing at least a portion of a first auxiliary graphic located within the boundary region, obtaining a second auxiliary graphic insertion area, the second auxiliary graphic insertion area covering the boundary region; obtaining the length of the second auxiliary graphic insertion area, the number of second auxiliary graphics, and the spacing between the second auxiliary graphics; obtaining the length of the second auxiliary graphic based on the length of the second auxiliary graphic insertion area, the number of second auxiliary graphics, and the spacing between the second auxiliary graphics; forming the second number of second auxiliary graphics within the second auxiliary graphic insertion area, wherein the length of each second auxiliary graphic is the length of the second auxiliary graphic and the spacing is the spacing between the second auxiliary graphics.

9. The method for forming a graphical layout as described in claim 8, characterized in that, The method for obtaining the second auxiliary graphic insertion area includes: after removing at least a portion of the first auxiliary graphic located within the boundary area, the area between the adjacent side edges of the two first auxiliary graphics on both sides of the boundary area forms the second auxiliary graphic insertion area.

10. The method for forming a graphical layout as described in claim 8, characterized in that, The length of the second auxiliary graphic insertion area is greater than or equal to the length of the boundary area, and the length of the second auxiliary graphic insertion area is less than or equal to the maximum length of the second auxiliary graphic insertion area.

11. The method for forming a graphical layout as described in claim 10, characterized in that, The method for obtaining the maximum length of the second auxiliary graphic insertion area includes: obtaining the boundary area length and the maximum pitch of the auxiliary graphic; adding twice the maximum pitch of the auxiliary graphic to the boundary area length to obtain the maximum length of the second auxiliary graphic insertion area.

12. The method for forming a graphical layout as described in claim 8, characterized in that, The number of the second auxiliary graphics is equal to the number of corrections to the first auxiliary graphics.

13. The method for forming a graphical layout as described in claim 8, characterized in that, The spacing between the second auxiliary graphics is equal to the spacing between the first auxiliary graphics.

14. The method for forming a graphical layout as described in claim 8, characterized in that, The method for obtaining the length L of the second auxiliary graphic includes: obtaining the length L2 of the second auxiliary graphic insertion area, the number N2 of the second auxiliary graphics, and the spacing S2 of the second auxiliary graphics; and obtaining the length of the second auxiliary graphic based on the length L2 of the second auxiliary graphic insertion area, the number N2 of the second auxiliary graphics, and the spacing S2 of the second auxiliary graphics. .

15. The method for forming a graphical layout as described in claim 8, characterized in that, The length of the second auxiliary graphic is greater than or equal to the minimum length of the auxiliary graphic, and the length of the second auxiliary graphic is less than or equal to the maximum length of the auxiliary graphic.

16. A method for forming a semiconductor structure, characterized in that, include: Provide substrate; A graphical layout is provided, comprising: an initial layout, the initial layout including a plurality of main graphics, the initial layout including a plurality of adjacent sub-regions; a boundary region located at the boundary of the adjacent sub-regions, the central axis of the boundary region being the boundary of the adjacent sub-regions; a first auxiliary graphic located outside the boundary region; and a second auxiliary graphic located between two adjacent first auxiliary graphics on both sides of the boundary region, wherein the spacing between any two adjacent second auxiliary graphics and each first auxiliary graphic is the same, and the graphical layout is formed by the forming method of any one of claims 1 to 15; A patterned layer is formed on the substrate based on the patterned layout; Using the patterned layer as a mask, the substrate is etched to form a semiconductor structure.

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