Method of forming a semiconductor structure

Abstract

A method for forming a semiconductor structure includes: providing a substrate; forming a trench in the substrate, a sidewall and a bottom surface of the trench having a damage layer; performing an oxidation treatment on the damage layer to form an oxidation layer; removing the oxidation layer to expose the substrate surface of the trench; and forming a channel structure in the trench. The method for forming a semiconductor structure can improve the structural defects of a silicon germanium channel in a semiconductor device and improve the performance of the semiconductor device.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically to a method for forming a semiconductor structure. Background Technology

[0002] With the development of semiconductor technology, the size of semiconductor devices continues to shrink. In recent years, in order to achieve smaller device sizes and higher device integration, MOSFET devices have gradually transitioned from planar structures to three-dimensional structures, such as fin transistor structures. Compared with planar transistors, three-dimensional transistors can effectively improve carrier mobility, reduce leakage current, and alleviate short-channel effects.

[0003] As device size decreases, traditional silicon channels have low carrier mobility. To improve device performance, silicon-germanium channels are now commonly introduced in semiconductor processes.

[0004] However, the existing silicon-germanium channel structure has defects, with a large number of dislocations at the interface between the silicon-germanium channel and the substrate, which leads to a decrease in the carrier migration capability within the silicon-germanium channel, thereby affecting the performance of semiconductor devices. Summary of the Invention

[0005] The technical problem solved by the present invention is to provide a method for forming a semiconductor structure to improve the structural defects of silicon-germanium channels in semiconductor devices and enhance the performance of semiconductor devices.

[0006] To solve the above-mentioned technical problems, the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a trench in the substrate, wherein the sidewalls and bottom surface of the trench have a damage layer; oxidizing the damage layer to form an oxide layer; removing the oxide layer to expose the trench to the substrate surface; and forming a channel structure in the trench.

[0007] Optionally, the method of forming the trench includes: forming a mask structure on the surface of the substrate, the mask structure exposing a portion of the substrate surface; and etching the substrate using the mask structure as a mask to form the trench.

[0008] Optionally, the mask structure includes an initial protective layer on the substrate and a plurality of mask layers on the initial protective layer.

[0009] Optionally, after forming the trench, the method for forming the semiconductor structure further includes: removing several mask layers located on the initial protective layer, wherein the initial protective layer forms a protective layer.

[0010] Optionally, the material of the protective layer includes silicon oxide.

[0011] Optionally, the etching process for the substrate includes a plasma dry etching process.

[0012] Optionally, after the trench is formed in the substrate, before oxidizing the damaged layer, the method for forming the semiconductor structure further includes: etching and cleaning the trench.

[0013] Optionally, the cleaning agents used in the cleaning process include ozone and hydrofluoric acid.

[0014] Optionally, the thickness of the damaged layer ranges from 0.3 nanometers to 2.5 nanometers.

[0015] Optionally, before oxidizing the damaged layer, the method for forming the semiconductor structure further includes: nitriding the damaged layer and the protective layer, forming a first nitriding layer located on the top and sidewall surfaces of the damaged layer within the damaged layer, and forming a second nitriding layer within the protective layer.

[0016] Optionally, the method for performing the nitriding treatment includes: performing an initial nitriding treatment on the damaged layer and the protective layer to form an initial nitriding film of the damaged layer in the damaged layer and an initial nitriding film of the protective layer in the protective layer; performing heat treatment on the initial nitriding film of the damaged layer and the initial nitriding film of the protective layer to form a first nitriding layer and to form a second nitriding layer.

[0017] Optionally, the thickness of the first nitride layer is less than or equal to 2 nanometers, and the thickness of the second nitride layer is less than or equal to 8 nanometers.

[0018] Optionally, the gas used in the initial nitriding treatment includes a nitrogen-containing precursor and a dilution gas, wherein the nitrogen-containing precursor accounts for 5% to 20% of the gas composition; the nitrogen-containing precursor includes nitrogen hydroxides, and the dilution gas includes argon, nitrogen, hydrogen, or helium.

[0019] Optionally, the heat treatment includes an annealing process; the annealing temperature includes 800℃ to 1100℃, and the annealing time includes 5 seconds to 30 seconds.

[0020] Optionally, the oxidation process for the damaged layer includes in-situ water vapor generation, wet oxidation, or chemical vapor deposition.

[0021] Optionally, the oxidation treatment process temperature range is 300℃~850℃; the oxidation treatment reaction time is 15 minutes~45 minutes.

[0022] Optionally, after forming the oxide layer and before removing the oxide layer, the method for forming the semiconductor structure further includes performing a heat treatment.

[0023] Optionally, the heat treatment process includes a baking process, and the gas used in the baking process includes hydrogen.

[0024] Optionally, the method for removing the oxide layer includes: using the protective layer as a mask, etching the oxide layer until the trench exposes the substrate surface.

[0025] Optionally, the etching process for the oxide layer includes a wet etching process or a dry etching process.

[0026] Optionally, the etching solution used in the wet etching process includes ozone and hydrofluoric acid.

[0027] Optionally, the dry etching process includes the SiCoNi process.

[0028] Optionally, the process for forming the channel structure is an epitaxial growth process.

[0029] Optionally, the channel structure may be made of silicon germanium.

[0030] Optionally, after forming the channel structure, the method for forming the semiconductor structure further includes: removing the protective layer.

[0031] Optionally, after forming the channel structure, the channel structure is etched to form a fin structure located on the substrate.

[0032] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0033] In the semiconductor structure formation method provided by the technical solution of the present invention, the damaged layer on the trench surface is oxidized to form an oxide layer. By removing the oxide layer, the damaged layer penetrated by impurity ions can be removed more thoroughly, thereby optimizing the lattice arrangement on the trench surface, reducing the number of dislocations at the interface between the channel structure formed in the trench and the substrate, improving the defects of the channel structure, enhancing the migration capability of charge carriers in the channel structure, increasing the process window of the subsequent fabrication process, and improving the device performance.

[0034] Furthermore, the method for forming the semiconductor structure further includes: after forming a trench in the substrate, and before oxidizing the damaged layer, performing a nitriding treatment on the damaged layer and the protective layer to form a first nitriding layer and a second nitriding layer. During the subsequent oxidation of the damaged layer, the nitrogen-silicon-oxygen bonds within the first and second nitriding layers inhibit the diffusion and penetration of oxygen ions into the substrate at the upper corner formed by the sidewalls of the damaged layer and the surface of the protective layer, and at the lower corner formed by the sidewalls of the damaged layer and the bottom surface. This reduces the oxidation of silicon in the substrate at the upper and lower corners. Therefore, during the subsequent removal of the oxide layer, the corners of the substrate are less likely to be passivated into rounded corners, and the partial removal of the protective layer on the substrate surface is also reduced, improving the integrity of the protective layer. This allows for better control of the morphology of the subsequently formed trench structure, increases the process window for subsequent fabrication processes, and improves device performance. Attached Figure Description

[0035] Figures 1 to 5 This is a cross-sectional schematic diagram of the formation process of a semiconductor structure in one embodiment of the present invention. Detailed Implementation

[0036] As described in the background section, the existing silicon-germanium channel structure has defects, with a large number of dislocations at the interface between the silicon-germanium channel and the substrate, which leads to a decrease in the carrier migration capability within the silicon-germanium channel, thereby affecting the performance of semiconductor devices.

[0037] To address the aforementioned technical problems, the present invention provides a method for forming a semiconductor structure, comprising: forming a trench in a substrate, wherein the sidewalls and bottom surface of the trench have a damage layer; oxidizing the damage layer to form an oxide layer; removing the oxide layer; and forming a channel structure in the trench. This method for forming a semiconductor structure removes the damage layer by oxidizing the damage layer to an oxide layer, thereby removing the damage layer caused by doped impurity ions while removing the oxide layer. This optimizes the lattice arrangement on the trench surface, reduces the number of dislocations at the interface between the channel structure subsequently formed in the trench and the substrate, and thus improves device performance.

[0038] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0039] Figures 1 to 5 This is a cross-sectional schematic diagram of the formation process of a semiconductor structure in one embodiment of the present invention.

[0040] Please refer to Figure 1 A substrate 100 is provided; a trench 102 is formed in the substrate 100, and the sidewalls and bottom surfaces of the trench 102 have a damage layer 101.

[0041] The substrate 100 is made of a semiconductor material. The constituent materials of the substrate 100 include silicon, silicon-germanium, silicon carbide, silicon-on-insulator (SOI), germanium-on-insulator (GOI), etc. Specifically, in this embodiment, the substrate 100 is made of silicon.

[0042] In this embodiment, the method for forming the trench 102 includes: forming a mask structure (not shown) on the surface of the substrate 100, the mask structure exposing a portion of the surface of the substrate 100; and etching the substrate 100 using the mask structure as a mask to form the trench 102.

[0043] In this embodiment, the mask structure includes an initial protective layer (not shown) on the substrate 100, and a plurality of mask layers on the initial protective layer.

[0044] The method for forming the mask structure includes: forming an initial protective material layer and a plurality of mask material layers on the surface of the substrate 100; forming a patterned layer on the top mask material layer, the patterned layer exposing a portion of the surface of the mask material layer; and sequentially etching the plurality of mask material layers and the initial protective material layer using the patterned layer as a mask until the surface of the substrate 100 is exposed, wherein the initial protective material layer forms an initial protective layer and the mask material layers form a mask layer.

[0045] In this embodiment, the method for etching the substrate 100 includes plasma dry etching. The gas used in the dry etching contains one or more elements selected from chlorine, sulfur, bromine, carbon, and silicon.

[0046] During the formation of the trench 102, elements in the etching gas penetrate and remain on the substrate 100 on the surface of the trench 102, disrupting the original lattice arrangement of the substrate 100. This results in a damage layer 101 on the sidewalls and bottom surface of the trench 102. The thickness of the damage layer 101 ranges from 0.3 nm to 2.5 nm. Due to the presence of the damage layer 101, a large number of dislocations exist at the interface between the channel structure subsequently formed in the trench 102 and the substrate 100, thereby reducing the carrier migration capability within the channel structure and affecting the electrical performance of the device.

[0047] During the etching process of the substrate 100, by increasing the etching cycle of the etching process, it is possible to reduce the impurity elements that penetrate into and remain in the substrate 100 on the surface of the trench 102, thereby reducing the thickness of the damaged layer 101.

[0048] In this embodiment, the initial protective layer of the mask structure is made of a different material than each of the mask layers.

[0049] In this embodiment, the method for forming the semiconductor structure further includes: after forming the trench 102, removing several mask layers located on the initial protective layer, wherein the initial protective layer forms a protective layer 103. The method for removing the mask layers includes wet etching. Since the initial protective layer and each mask layer are made of different materials, a suitable etchant can be selected to allow the initial protective layer and the mask layers to have different etching rates, thereby removing the several mask layers simultaneously with the formation of the protective layer 103.

[0050] Specifically, the material of the protective layer 103 includes silicon oxide.

[0051] In this embodiment, after forming trenches 102 and a protective layer 103 in the substrate 100, the trenches 102 are cleaned. The purpose of the cleaning process is to remove impurities remaining on the surface of the trenches 102 during the etching process, thereby reducing the impact of the etching process on the lattice arrangement on the substrate 100 on the surface of the trenches 102, and at the same time, to remove the oxide layer on the surface of the trenches 102 due to contact with air.

[0052] Specifically, the cleaning agents used in the cleaning process include ozone and hydrofluoric acid.

[0053] In other embodiments, after the trench 102 is formed in the substrate 100, the trench 102 is cleaned. The cleaning process removes impurities remaining in the etching process and removes several mask layers located on the initial protective layer, so that the initial protective layer forms a protective layer 103, thereby simplifying the process steps.

[0054] Please refer to Figure 2 The damaged layer 101 and the protective layer 103 are subjected to nitriding treatment, and a first nitriding layer 105 is formed in the damaged layer 101 located on the top and sidewall surfaces of the damaged layer 101, and a second nitriding layer 104 is formed in the protective layer 103.

[0055] In this embodiment, by nitriding the damaged layer 101 and the protective layer 103, some silicon-oxygen bonds on the surface of the damaged layer 101 and the protective layer 103 are converted into silicon-nitrogen-oxygen bonds to form a first nitrided layer 105 and a second nitrided layer 104. During the subsequent oxidation of the damaged layer 101, the silicon-nitrogen-oxygen bonds on the surfaces of the damaged layer 101 and the protective layer 103 can effectively inhibit the diffusion and penetration of oxygen ions into the substrate 100 at the upper corner 106 formed by the sidewall of the damaged layer 101 and the surface of the protective layer 103, and at the lower corner 107 formed by the sidewall of the damaged layer 101 and the bottom surface. This reduces the oxidation of silicon in the substrate 100 at the upper corner 106 and the lower corner 107. Therefore, it reduces the possibility that the upper corner 106 and the lower corner 107 will be passivated into rounded corners when the oxidized damaged layer 101 is removed. In addition, it also avoids the damage to part of the protective layer 103 on the upper corner 106 due to the removal of excess silicon oxide at the upper corner 106, thereby improving the integrity of the protective layer 103. Therefore, the presence of the first nitriding layer 105 and the second nitriding layer 104 effectively protects the morphology at the upper corner 106 and the lower corner 107 of the trench 102 and improves the integrity of the protective layer 103. Thus, it improves the morphology of the channel structure subsequently formed in the trench 102 and increases the process window for subsequent fabrication processes.

[0056] In this embodiment, the thickness of the first nitride layer 105 is less than or equal to 2 nanometers, and the thickness of the second nitride layer 104 is less than or equal to 8 nanometers.

[0057] In this embodiment, the method for performing the nitriding treatment includes: performing an initial nitriding treatment on the damaged layer 101 and the protective layer 103 to form an initial nitriding film (not shown) in the damaged layer 101 and an initial nitriding film (not shown) in the protective layer 103; performing heat treatment on the initial nitriding film of the damaged layer and the initial nitriding film of the protective layer to form a first nitriding layer 105 and a second nitriding layer 104.

[0058] In this embodiment, the gas used in the initial nitriding treatment includes a nitrogen-containing precursor and a dilution gas, wherein the nitrogen-containing precursor accounts for 5% to 20% of the total gas content; the nitrogen-containing precursor includes nitrogen hydroxides, and the dilution gas includes argon, nitrogen, hydrogen, or helium.

[0059] In this embodiment, the heat treatment includes an annealing process, wherein the annealing temperature ranges from 800°C to 1100°C, and the annealing time ranges from 5 seconds to 30 seconds. The purpose of the heat treatment is to release excess stress within the initial nitride film of the damaged layer and the initial nitride film of the protective layer, and further remove impurities remaining after the aforementioned processes.

[0060] Please refer to Figure 3 After the first nitrided layer 105 and the second nitrided layer 104 are formed, the damaged layer 101 is oxidized to form an oxide layer 108.

[0061] In this embodiment, since the damaged layer 101 is oxidized to form an oxide layer 108, the damaged layer 101 that has been penetrated by impurity ions can be removed more thoroughly by removing the oxide layer 108. This optimizes the lattice arrangement on the surface of the trench 102, reduces the number of dislocations at the interface between the channel structure formed in the trench 102 and the substrate 100, improves the defects of the channel structure, enhances the carrier migration capability in the channel structure, and thus improves the device performance.

[0062] During the oxidation process of the damaged layer 101, the silicon-nitrogen-oxygen bonds in the first nitride layer 105 and the second nitride layer 104 effectively inhibit the diffusion and penetration of oxygen ions in the substrate 100, reducing the oxidation of silicon in the substrate 100 at the upper corner 106 and lower corner 107 of the trench 102 surface, thereby protecting the morphology at the upper corner 106 and lower corner 107 of the trench 102.

[0063] In this embodiment, the oxidation process for the damaged layer 101 includes an in-situ water vapor generation process, a wet oxidation process, or a chemical vapor deposition oxidation process. The oxidation process temperature range is 300℃ to 850℃; the reaction time is 15 minutes to 45 minutes.

[0064] In this embodiment, the method for forming the semiconductor structure further includes performing a heat treatment after forming the oxide layer 108. The heat treatment process includes a baking process, and the gas used in the baking process includes hydrogen. The heat treatment is used to repair the lattice damage suffered by the silicon substrate 100 in the aforementioned process, thereby optimizing the lattice arrangement and surface morphology of the silicon substrate 100.

[0065] In other embodiments, after the trench is formed in the substrate, the damaged layer and the protective layer are not nitrided, but the damaged layer is directly oxidized, thereby simplifying the process steps.

[0066] Please refer to Figure 4 Remove the oxide layer 108 to expose the trench 102 on the surface of the substrate 100.

[0067] In this embodiment, the method for removing the oxide layer 108 includes: using the protective layer 103 as a mask, etching the oxide layer 108 until the trench 102 exposes the surface of the substrate 100.

[0068] By removing the oxide layer 108, the damaged layer 101, which has been penetrated by impurity ions, is removed, thereby clearing impurities from the substrate 100 on the surface of the trench 102. This optimizes the lattice arrangement of the substrate 100 surface exposed by the trench 102, thus reducing the number of dislocations at the interface between the channel structure subsequently formed in the trench 102 and the substrate 100. Furthermore, due to the presence of the first nitride layer 105 and the second nitride layer 104, the morphology at the upper corner 106 and the lower corner 107 of the trench 102 remains relatively intact after removing the oxide layer 108, preventing the corners from being blunted into rounded corners. Moreover, after removing the oxide layer 108, the protective layer 103 still maintains good integrity, thereby effectively controlling the morphology of the channel structure subsequently formed in the trench 102.

[0069] In this embodiment, the thickness of the protective layer 103 is much greater than the thickness of the oxide layer 108. Therefore, during the etching and removal of the oxide layer 108 using the protective layer 103 as a mask, the thickness of the protective layer 103 is slightly reduced. However, because the protective layer 103 is relatively thick, after the oxide layer 108 is completely removed, the protective layer 103 can still completely cover the substrate 100 surface on both sides of the trench 102.

[0070] In this embodiment, the etching process for the oxide layer 108 includes a wet etching process or a dry etching process. Specifically, the etching solution used in the wet etching process includes ozone and hydrofluoric acid. The dry etching process includes a SiCoNi process.

[0071] Please refer to Figure 5 After removing the oxide layer 108, a channel structure 110 is formed in the trench 102.

[0072] Because the lattice arrangement on the surface of the substrate 100 exposed by the trench 102 is relatively uniform, the number of dislocations at the interface 111 between the channel structure 110 formed in the trench 102 and the substrate 100 is small, and the morphology of the interface 111 is relatively perfect. This improves the carrier migration capability within the channel structure 110 and expands the subsequent fabrication process window of the channel structure 110. Furthermore, because the morphology at the upper corner 106 and lower corner 107 of the trench 102 is relatively complete, the channel structure 110 formed in the trench 102 has a better morphology at the corners. Additionally, because the protective layer 103 on the surface of the substrate 100 is relatively complete, the growth of the channel structure 110 on the substrate 100 surfaces on both sides of the trench 102 is reduced during the formation of the channel structure 110, and the dimensions of the channel structure 110 along the direction perpendicular to the sidewall of the trench 102 are better controlled. Therefore, the process window for subsequent processing of the channel structure 110 is larger, the electrical performance of the channel structure 110 is improved, and more space is reserved for other processes performed on the substrate 100.

[0073] In this embodiment, the material of the channel structure 110 includes silicon and germanium. The process for forming the channel structure 110 is an epitaxial growth process.

[0074] In this embodiment, the germanium concentration in the channel structure 110 varies in a gradient. Specifically, the portion of the channel structure 110 adjacent to the substrate 100 has a lower germanium concentration. Furthermore, the farther the distance from each portion of the channel structure 110 to the bottom of the trench 102, the higher the germanium concentration in that portion. By forming a silicon-germanium channel structure 110 with a gradually increasing germanium concentration within the trench 102, the bonding between the channel structure 110 and the substrate 100 is made more stable, further reducing the number of dislocations at the interface 111 between the channel structure 110 and the substrate 100, thereby improving the electrical performance of the channel structure 110.

[0075] In other embodiments, the germanium concentration in each part of the channel structure 110 is uniform, thereby simplifying the formation process of the channel structure 110.

[0076] In this embodiment, after the channel structure 110 is formed, the protective layer 103 is removed, thereby allowing other process steps to be performed on the substrates 100 on both sides of the channel structure 110. Specifically, the method for removing the protective layer 103 includes dry etching or wet etching.

[0077] In this embodiment, the method for forming the semiconductor structure further includes: after forming the channel structure 110, etching the channel structure 110 to form a fin structure (not shown) located on the substrate 100.

[0078] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, include: Provide substrate; A trench is formed in the substrate, and the sidewalls and bottom surface of the trench have a damage layer. When the trench is formed, the substrate has an initial protective layer and several mask layers located on the initial protective layer. After the trench is formed, several mask layers located on the initial protective layer are removed, and the initial protective layer located on the substrate is retained as a protective layer. The damaged layer and the protective layer are subjected to nitriding treatment, forming a first nitriding layer located on the top and sidewall surfaces of the damaged layer within the damaged layer, and forming a second nitriding layer within the protective layer; The damaged layer is oxidized to form an oxide layer; Remove the oxide layer to expose the trench to the substrate surface; A channel structure is formed within the trench.

2. The method for forming a semiconductor structure as described in claim 1, characterized in that, The method of forming the trench includes: forming a mask structure on the surface of the substrate, the mask structure exposing a portion of the substrate surface; and etching the substrate using the mask structure as a mask to form the trench.

3. The method for forming a semiconductor structure as described in claim 2, characterized in that, The mask structure includes an initial protective layer on the substrate and a plurality of mask layers on the initial protective layer.

4. The method for forming a semiconductor structure as described in claim 1, characterized in that, The material of the protective layer includes silicon oxide.

5. The method for forming a semiconductor structure as described in claim 2, characterized in that, The etching process for the substrate includes a plasma dry etching process.

6. The method for forming a semiconductor structure as described in claim 2, characterized in that, After the trench is formed in the substrate, before oxidizing the damaged layer, the process further includes etching and cleaning the trench.

7. The method for forming a semiconductor structure as described in claim 6, characterized in that, The cleaning agents used in the cleaning process include ozone and hydrofluoric acid.

8. The method for forming a semiconductor structure as described in claim 1, characterized in that, The thickness of the damaged layer ranges from 0.3 nanometers to 2.5 nanometers.

9. The method for forming a semiconductor structure as described in claim 1, characterized in that, The method for performing the nitriding treatment includes: performing an initial nitriding treatment on the damaged layer and the protective layer to form an initial nitriding film of the damaged layer in the damaged layer and an initial nitriding film of the protective layer in the protective layer; performing heat treatment on the initial nitriding film of the damaged layer and the initial nitriding film of the protective layer to form a first nitriding layer and to form a second nitriding layer.

10. The method for forming a semiconductor structure as described in claim 1, characterized in that, The thickness of the first nitrided layer is less than or equal to 2 nanometers, and the thickness of the second nitrided layer is less than or equal to 8 nanometers.

11. The method for forming a semiconductor structure as described in claim 9, characterized in that, The gases used in the initial nitriding treatment include nitrogen-containing precursors and dilution gases, wherein the nitrogen-containing precursors account for 5% to 20% of the total gas content; the nitrogen-containing precursors include nitrogen-hydrogen compounds, and the dilution gases include argon, nitrogen, hydrogen, or helium.

12. The method for forming a semiconductor structure as described in claim 9, characterized in that, The heat treatment includes an annealing process; the annealing temperature includes 800℃~1100℃, and the annealing time includes 5 seconds~30 seconds.

13. The method for forming a semiconductor structure as described in claim 1, characterized in that, The process for oxidizing the damaged layer includes in-situ water vapor generation, wet oxidation, or chemical vapor deposition.

14. The method for forming a semiconductor structure as described in claim 13, characterized in that, The oxidation process temperature range is 300℃~850℃; the reaction time is 15 minutes~45 minutes.

15. The method for forming a semiconductor structure as described in claim 1, characterized in that, After the oxide layer is formed and before the oxide layer is removed, the process further includes: performing heat treatment.

16. The method for forming a semiconductor structure as described in claim 15, characterized in that, The heat treatment process includes baking, and the gas used in the baking process includes hydrogen.

17. The method for forming a semiconductor structure as described in claim 1, characterized in that, The method for removing the oxide layer includes: using the protective layer as a mask, etching the oxide layer until the trench exposes the substrate surface.

18. The method for forming a semiconductor structure as described in claim 17, characterized in that, The etching process for the oxide layer includes wet etching or dry etching.

19. The method for forming a semiconductor structure as described in claim 18, characterized in that, The etching solution used in the wet etching process includes ozone and hydrofluoric acid.

20. The method for forming a semiconductor structure as described in claim 18, characterized in that, The dry etching process includes the SiCoNi process.

21. The method for forming a semiconductor structure as described in claim 1, characterized in that, The process for forming the channel structure is an epitaxial growth process.

22. The method for forming a semiconductor structure as described in claim 1, characterized in that, The channel structure is made of silicon and germanium.

23. The method for forming a semiconductor structure as described in claim 1, characterized in that, After forming the channel structure, the process also includes removing the protective layer.

24. The method for forming a semiconductor structure as described in claim 1, characterized in that, After the channel structure is formed, the channel structure is etched to form a fin structure located on the substrate.

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