Narrow-band phase-locked loop system and method for adaptive adjustment of the phase-discrimination frequency
By using an adaptive adjustment method for the phase detection frequency in a narrowband phase-locked loop (PLL) system, the problems of prolonged locking time and decreased loop stability in the PLL system were solved. This method achieved low phase noise and high frequency stability of the frequency signal, improved the locking speed and loop stability of the PLL, and suppressed the influence of environmental factors and aging on the output frequency of the temperature-controlled crystal oscillator.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHINA STATE SHIPBUILDING CORP NO 707 RES INST
- Filing Date
- 2022-11-25
- Publication Date
- 2026-05-29
AI Technical Summary
Existing narrowband phase-locked loop (PLL) systems suffer from problems such as prolonged locking time, decreased loop stability, and environmental factors when adjusting the PLL phase detection frequency, especially the deterioration of phase noise in rubidium atomic clocks and the drift of the output frequency signal of the isothermal crystal oscillator.
A narrowband phase-locked loop system is adopted, including a prescaler, a reference frequency source selector, a frequency multiplier, a phase detection module, a phase detection frequency adjustment module, a programmable read-only memory, a phase detection frequency control module, an analog-to-digital converter, a temperature-controlled crystal oscillator, a digital phase detection module, a phase detection pulse selector, and a narrowband loop filter. By adaptively adjusting the phase detection frequency, combined with FPGA chip integration and a Kalman filter, the system achieves frequency locking of the temperature-controlled crystal oscillator and improves loop stability.
While ensuring low phase noise and high frequency stability of the frequency signal, the locking speed and loop stability of the phase-locked loop system are improved, effectively suppressing the influence of environmental factors, aging and power supply ripple on the output frequency signal of the temperature-controlled crystal oscillator.
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Figure CN116418339B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of autonomous navigation technology, and in particular to a narrowband phase-locked loop system and a method for adaptively adjusting the phase detection frequency thereon. Background Technology
[0002] Time and frequency reference equipment needs to provide a unified frequency reference to frequency users, requiring the frequency output of the equipment to have high frequency accuracy, high frequency stability, and low phase noise. Existing time and frequency references use rubidium atomic clocks, which offer high frequency accuracy and stability, as the reference frequency source. A phase-locked loop (PLL) locks the output of a low-phase-noise, temperature-controlled crystal oscillator to the rubidium atomic clock reference, ensuring that the frequency output possesses both the high frequency accuracy and stability characteristics of the rubidium atomic clock and the low phase noise characteristics of the temperature-controlled crystal oscillator.
[0003] To reduce the degradation of phase noise in the phase-locked loop (PLL) frequency output caused by the phase noise of the rubidium atomic clock, a narrowband loop filter is used. However, as the PLL phase detection frequency increases, phase noise from the reference frequency source is introduced into the system, causing deterioration of the near-end phase noise of the PLL frequency output. Furthermore, as the PLL phase detection frequency decreases, the near-end phase noise of the PLL frequency output decreases, but this leads to a longer lock-in time, decreased loop stability, and in severe cases, PLL loss of lock-in. Summary of the Invention
[0004] This invention aims to at least solve one of the technical problems existing in related technologies. To this end, this invention provides a narrowband phase-locked loop (PLL) system and a method for adaptively adjusting the phase detection frequency, thereby improving the locking speed and loop stability of the PLL system while ensuring low phase noise and high frequency stability of the output frequency signal. Simultaneously, it effectively suppresses the influence of environmental factors, aging, and power supply ripple on the frequency signal drift of the temperature-controlled crystal oscillator output.
[0005] This invention provides a narrowband phase-locked loop system, including a prescaler, a reference frequency source selector, a frequency multiplier, a phase detection module, a phase detection frequency adjustment module, a programmable read-only memory, a phase detection frequency control module, an analog-to-digital converter module, a temperature-controlled crystal oscillator, a digital phase detection module, a phase detection pulse selector, and a narrowband loop filter.
[0006] The prescaler is used to receive and prescale multiple reference frequency sources;
[0007] The reference frequency source selector is used to receive a first control command, select one of the multiple reference frequency sources according to the first control command, and output the corresponding output.
[0008] The frequency multiplier is electrically connected to the reference frequency source selector, and is used to perform frequency multiplication processing on the reference frequency source selected by the reference frequency source selector, and output the result.
[0009] The phase detection module is electrically connected to the prescaler, the temperature-controlled crystal oscillator, and the frequency multiplier, respectively, to receive and process the multi-channel reference frequency source after prescaler processing, the reference frequency source after frequency multiplication processing, and the first frequency signal output by the temperature-controlled crystal oscillator after power division and shaping, and output phase data.
[0010] The phase detection frequency adjustment module is electrically connected to the programmable read-only memory, the analog-to-digital converter module, and the phase detection module, respectively, and is used to process the phase data output by the phase detection module, the voltage control voltage data output by the analog-to-digital converter module, and the preset reference data and algorithm parameter data stored in the programmable read-only memory according to the received second control instruction, generate the algorithm parameter correction word, and output the phase detection frequency adjustment control word;
[0011] The phase detection frequency control module is electrically connected to the prescaler, the thermostatic crystal oscillator, and the phase detection frequency adjustment module, respectively, to receive and process the multi-channel reference frequency source processed by the prescaler, the first frequency signal output by the thermostatic crystal oscillator after power division and shaping, and the phase detection frequency adjustment control word output by the phase detection frequency adjustment module, and output a signal with the same frequency as the target phase detection frequency.
[0012] The digital phase detection module is electrically connected to the phase detection frequency control module to receive and process the signal output by the phase detection frequency control module that is at the same frequency as the target phase detection frequency, and output multiple phase detection pulses.
[0013] The phase detection pulse selector is electrically connected to the digital phase detection module and is used to select one of the multiple phase detection pulses according to the received third control command and output the corresponding pulse.
[0014] The narrowband loop filter is electrically connected to the phase detection pulse selector to convert the phase detection pulse output by the phase detection pulse selector into a voltage-controlled voltage signal and transmit it to the temperature-controlled crystal oscillator.
[0015] The second frequency signal output by the isothermal crystal oscillator via the power divider serves as the output frequency signal of the narrowband phase-locked loop system.
[0016] According to a narrowband phase-locked loop system provided by the present invention, the reference frequency source selector, the prescaler, the frequency multiplier, the phase detection module, the phase detection frequency adjustment module, the phase detection frequency control module, the digital phase detection module, and the phase detection pulse selector are all integrated on an FPGA chip.
[0017] According to a narrowband phase-locked loop system provided by the present invention, the phase detection frequency adjustment module includes a first comparator, a second comparator, a first filter, a second filter, a third filter, a fourth filter, a parameter correction controller, a first PID controller, a second PID controller, and a third PID controller. The first comparator is electrically connected to the phase detection module, the analog-to-digital conversion module, and the programmable read-only memory. The second comparator is electrically connected to the first filter, the second filter, the third filter, the fourth filter, and the programmable read-only memory. The first filter, the second filter, and the third filter are all electrically connected to the phase detection module and the parameter correction controller. The fourth filter is electrically connected to the analog-to-digital conversion module and the parameter correction controller. The first PID controller is electrically connected to the parameter correction controller, the first filter, and the fourth filter. The second PID controller is electrically connected to the parameter correction controller, the second filter, and the fourth filter. The third PID controller is electrically connected to the parameter correction controller, the third filter, and the fourth filter.
[0018] The phase detection frequency control module is electrically connected to the first PID controller, the second PID controller, and the third PID controller, respectively.
[0019] According to a narrowband phase-locked loop system provided by the present invention, the programmable read-only memory is provided with a first storage area, a second storage area, a third storage area and a fourth storage area. The first storage area is used to store algorithm parameter data, the second storage area is used to store preset reference pre-detection data, the third storage area is used to store preset reference post-filtering data, and the fourth storage area is set as an index area.
[0020] According to a narrowband phase-locked loop system provided by the present invention, a power divider and a shaper are further included. The power divider is electrically connected to the thermostatic crystal oscillator. The first output terminal of the power divider is electrically connected to the shaper. The shaper is electrically connected to the phase detection module and the phase detection frequency control module respectively, for outputting a first frequency signal.
[0021] The second output terminal of the power divider is used to output a second frequency signal.
[0022] According to a narrowband phase-locked loop system provided by the present invention, the narrowband loop filter includes a low-pass filter and a differential integrator circuit, the low-pass filter is electrically connected to the differential integrator circuit, and the low-pass filter is used to output a voltage-controlled voltage signal with a bandwidth of 0.01Hz to 1Hz.
[0023] The present invention also provides a method for adaptively adjusting the phase detection frequency of a narrowband phase-locked loop system, comprising the following steps:
[0024] S10. The reference frequency source selector selects one of the multiple reference frequency sources according to the received first control command, and after frequency multiplication by the frequency multiplier, it is used as the reference frequency source of the phase detection module.
[0025] S20. The multi-channel reference frequency source is pre-divided by the pre-divider to adjust the frequency of the reference frequency source to be the same as the output frequency of the constant temperature crystal oscillator, and then output to the phase detection module and the phase detection frequency control module.
[0026] S30. The phase data of the current isothermal crystal oscillator and the multiple reference frequency sources are detected in real time through the phase detection module, and the phase data is output to the phase detection frequency adjustment module.
[0027] S40. The voltage-controlled voltage of the isothermal crystal oscillator output by the narrowband loop filter is acquired in real time through the analog-to-digital conversion module, and the voltage-controlled voltage data is output to the phase detection frequency adjustment module.
[0028] S50. The algorithm parameter data of the programmable read-only memory is read through the phase detection frequency adjustment module to complete the initialization;
[0029] S60. Receive phase data and voltage-controlled voltage data through the phase detection frequency adjustment module, input them as pre-detection data into the first preset reference data comparator, complete the comparison and analysis with the preset reference pre-detection data, and output the pre-comparison result.
[0030] S70. Input the pre-detection data into the corresponding filter, and input the generated post-filtered data into the second preset reference data comparator to complete the comparison and analysis with the preset reference post-filtered data, and output the post-comparison result.
[0031] S80. Input the post-filtered data into the corresponding PID controller, calculate and generate the phase detection frequency adjustment control word, and then output it to the phase detection frequency control module.
[0032] S90. Input the pre-comparison result and post-comparison result into the parameter correction controller to generate the algorithm parameter correction word, and then output it to the filter and PID controller to complete the algorithm parameter correction.
[0033] S100: The phase detection frequency adjustment module stores the pre-detection data, post-filter data, and algorithm parameter data into the corresponding storage area of the programmable read-only memory according to the second control instruction.
[0034] S110. The phase detection frequency control module divides the pre-divided multi-channel reference frequency signal and the shaped isothermal crystal oscillator output frequency signal into a signal with the same frequency as the target phase detection frequency according to the phase detection frequency adjustment control word, and outputs it to the digital phase detection module.
[0035] S120. The phase detection module performs phase detection processing on the output signal of the phase detection frequency control module through the digital phase detection module, and then outputs the phase detection pulse of the frequency signal output by the constant temperature crystal oscillator relative to the multiple reference frequency signals.
[0036] S130. According to the received third control command, the phase pulse selector selects one of the phase pulses of the frequency signal output by the thermostatic crystal oscillator relative to the multiple reference frequency signals, and then outputs it to the narrowband loop filter.
[0037] S140. The phase detection pulse output by the digital phase detection module is converted into the voltage-controlled voltage of the thermostatic crystal oscillator through a narrow-band loop filter, thereby controlling the frequency output of the thermostatic crystal oscillator.
[0038] S150. The frequency signal output by the constant temperature crystal oscillator is processed by the power divider to output a first frequency signal and a second frequency signal. The first frequency signal is output to the phase detection module and the phase detection frequency control module, and the second frequency signal is used as the output frequency signal of the phase-locked loop system.
[0039] The above-described one or more technical solutions in the embodiments of the present invention have at least the following technical effects:
[0040] The present invention provides a narrowband phase-locked loop system and a method for adaptively adjusting the phase detection frequency, comprising a prescaler, a reference frequency source selector, a frequency multiplier, a phase detection module, a phase detection frequency adjustment module, a programmable read-only memory, a phase detection frequency control module, an analog-to-digital converter, a temperature-controlled crystal oscillator, a digital phase detection module, a phase detection pulse selector, and a narrowband loop filter. The narrowband loop filter locks the output of the low-phase-noise temperature-controlled crystal oscillator to a reference frequency source with high frequency stability. Through adaptive adjustment of the phase detection frequency, the locking speed and loop stability of the phase-locked loop system are improved while ensuring that the output frequency signal has low phase noise and high frequency stability. Simultaneously, the influence of environmental factors, aging, and power supply ripple on the output frequency signal of the temperature-controlled crystal oscillator is effectively suppressed.
[0041] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description
[0042] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0043] Figure 1 This is a structural block diagram of the narrowband phase-locked loop system provided by the present invention;
[0044] Figure 2 This is a schematic diagram of the phase detection frequency adjustment module in the narrowband phase-locked loop system provided by the present invention. Detailed Implementation
[0045] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention. The following embodiments are used to illustrate this invention but should not be used to limit the scope of this invention.
[0046] In the description of the embodiments of the present invention, it should be noted that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of the present invention. In addition, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0047] In the description of the embodiments of the present invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of the present invention based on the specific circumstances.
[0048] In embodiments of the present invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0049] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0050] The following is combined Figures 1 to 2 The present invention describes a narrowband phase-locked loop system, comprising a prescaler, a reference frequency source selector, a frequency multiplier, a phase detection module, a phase detection frequency adjustment module, a programmable read-only memory, a phase detection frequency control module, an analog-to-digital conversion module (i.e., a high-precision ADC module), a temperature-controlled crystal oscillator, a digital phase detection module, a phase detection pulse selector, and a narrowband loop filter.
[0051] The prescaler is used to receive and prescale multiple reference frequency sources; in this embodiment, the reference frequency sources are set to three, namely reference frequency source 1, reference frequency source 2, and reference frequency source 3.
[0052] The reference frequency source selector is used to receive the first control command, namely the upper-level device control command 1, and select one of the multiple reference frequency sources according to the first control command, and output the corresponding output.
[0053] The frequency multiplier is electrically connected to the reference frequency source selector to perform frequency multiplication on the reference frequency source selected by the reference frequency source selector and output the result.
[0054] The phase detection module is electrically connected to the prescaler, the temperature-controlled crystal oscillator, and the frequency multiplier, respectively, to receive and process the multi-channel reference frequency source after prescaler processing, the reference frequency source after frequency multiplication processing, and the first frequency signal output by the temperature-controlled crystal oscillator after power division and shaping, and output phase data.
[0055] The phase detection frequency adjustment module is electrically connected to the programmable read-only memory, the analog-to-digital converter module, and the phase detection module, respectively. It is used to process the phase data output by the phase detection module, the voltage control voltage data output by the analog-to-digital converter module, and the preset reference data and algorithm parameter data stored in the programmable read-only memory according to the received second control command, namely the upper-level device control command 2, to generate the algorithm parameter correction word and output the phase detection frequency adjustment control word.
[0056] The phase detection frequency control module is electrically connected to the prescaler, the temperature-controlled crystal oscillator, and the phase detection frequency adjustment module, respectively. It is used to receive and process the multi-channel reference frequency source processed by the prescaler, the first frequency signal output by the temperature-controlled crystal oscillator after power division and shaping, and the phase detection frequency adjustment control word output by the phase detection frequency adjustment module, and output a signal with the same frequency as the target phase detection frequency.
[0057] The digital phase detection module is electrically connected to the phase detection frequency control module to receive and process the signal output by the phase detection frequency control module that is in the same frequency as the target phase detection frequency, and output multiple phase detection pulses.
[0058] The phase detection pulse selector is electrically connected to the digital phase detection module to select one of the multiple phase detection pulses according to the received third control command, namely the upper-level equipment control command 3, and output the corresponding pulse.
[0059] The narrowband loop filter is electrically connected to the phase pulse selector to convert the phase pulse output by the phase pulse selector into a voltage-controlled voltage signal and transmit it to the temperature-controlled crystal oscillator.
[0060] The second frequency signal output from the thermostatic crystal oscillator via the power divider serves as the output frequency signal of the narrowband phase-locked loop system.
[0061] According to the present invention, a narrowband phase-locked loop system is provided in which a reference frequency source selector, a prescaler, a frequency multiplier, a phase detection module, a phase detection frequency adjustment module, a phase detection frequency control module, a digital phase detection module, and a phase detection pulse selector are all integrated on an FPGA chip.
[0062] According to a narrowband phase-locked loop system provided by the present invention, the phase detection frequency adjustment module includes a first comparator (i.e., a preset reference data comparator 1), a second comparator (i.e., a preset reference data comparator 2), a first filter, a second filter, a third filter, a fourth filter, a parameter correction controller, a first PID controller, a second PID controller, and a third PID controller. The first comparator is electrically connected to a phase detection module, an analog-to-digital conversion module, and a programmable read-only memory. The second comparator is electrically connected to the first filter, the second filter, the third filter, the fourth filter, and the programmable read-only memory. The first filter, the second filter, and the third filter are all electrically connected to the phase detection module and the parameter correction controller. The fourth filter is electrically connected to the analog-to-digital conversion module and the parameter correction controller. The first PID controller is electrically connected to the parameter correction controller, the first filter, and the fourth filter. The second PID controller is electrically connected to the parameter correction controller, the second filter, and the fourth filter. The third PID controller is electrically connected to the parameter correction controller, the third filter, and the fourth filter.
[0063] The phase detection frequency control module is electrically connected to the first PID controller, the second PID controller, and the third PID controller, respectively. It should be noted that, as... Figure 2 As shown, the first filter, the second filter, the third filter and the fourth filter are all set as Kalman filters, and are respectively set as Kalman filter 1, Kalman filter 2, Kalman filter 3 and Kalman filter 4.
[0064] According to a narrowband phase-locked loop system provided by the present invention, a programmable read-only memory is provided with a first storage area, a second storage area, a third storage area, and a fourth storage area. The first storage area is used to store algorithm parameter data, the second storage area is used to store preset reference pre-detection data, the third storage area is used to store preset reference post-filtering data, and the fourth storage area is set as an index area. It can be understood that the second and third storage areas each contain two sub-areas. Specifically, when storing or retrieving preset reference data, the fourth storage area is read first, and the sub-area pointed to by its index is the previous preset reference data storage area. Then, the other sub-area is stored this time, ensuring that while performing preset reference data comparison, the phase data and voltage-controlled voltage data of the current locking process are stored simultaneously.
[0065] According to the present invention, a narrowband phase-locked loop system further includes a power divider and a shaper. The power divider is electrically connected to a temperature-controlled crystal oscillator. The first output terminal of the power divider is electrically connected to the shaper. The shaper is electrically connected to a phase detection module and a phase detection frequency control module, respectively, for outputting a first frequency signal.
[0066] The second output terminal of the power divider is used to output a second frequency signal.
[0067] According to the present invention, a narrowband phase-locked loop system is provided, wherein the narrowband loop filter includes a low-pass filter and a differential integrator circuit. The low-pass filter is electrically connected to the differential integrator circuit, and the low-pass filter is used to output a voltage-controlled voltage signal with a bandwidth of 0.01Hz to 1Hz.
[0068] The method for adaptively adjusting the phase detection frequency of a narrowband phase-locked loop system provided by the present invention is described below. The method for adaptively adjusting the phase detection frequency of a narrowband phase-locked loop system described below can be referred to in correspondence with the narrowband phase-locked loop system described above.
[0069] The present invention also provides a method for adaptively adjusting the phase detection frequency of a narrowband phase-locked loop system, comprising the following steps:
[0070] S10. The reference frequency source selector selects one of the multiple reference frequency sources according to the received first control command, and the source is multiplied by the frequency multiplier to serve as the reference frequency source for the phase detection module.
[0071] S20. The multi-channel reference frequency source is pre-divided by the pre-divider to adjust the frequency of the reference frequency source to be the same as the output frequency of the constant temperature crystal oscillator, and then output to the phase detection module and the phase detection frequency control module.
[0072] S30. The phase data of the current isothermal crystal oscillator and the multi-channel reference frequency source are detected in real time through the phase detection module, and the phase data is output to the phase detection frequency adjustment module.
[0073] S40. The voltage-controlled voltage of the thermostatic crystal oscillator output by the narrowband loop filter is acquired in real time through the analog-to-digital conversion module, and the voltage-controlled voltage data is output to the phase detection frequency adjustment module.
[0074] S50. The algorithm parameter data of the programmable read-only memory is read through the phase detection frequency adjustment module to complete the initialization;
[0075] S60. Receive phase data and voltage-controlled voltage data through the phase detection frequency adjustment module, input them as pre-detection data into the first preset reference data comparator, complete the comparison and analysis with the preset reference pre-detection data, and output the pre-comparison result.
[0076] S70. Input the pre-detection data into the corresponding filter, and input the generated post-filtered data into the second preset reference data comparator to complete the comparison and analysis with the preset reference post-filtered data, and output the post-comparison result.
[0077] S80. Input the post-filtered data into the corresponding PID controller, calculate and generate the phase detection frequency adjustment control word, and then output it to the phase detection frequency control module.
[0078] S90. Input the pre-comparison result and post-comparison result into the parameter correction controller to generate the algorithm parameter correction word, and then output it to the filter and PID controller to complete the algorithm parameter correction.
[0079] S100: The phase detection frequency adjustment module stores the pre-detection data, post-filter data, and algorithm parameter data into the corresponding storage area of the programmable read-only memory according to the second control instruction.
[0080] S110. The phase detection frequency control module divides the pre-divided multi-channel reference frequency signal and the shaped isothermal crystal oscillator output frequency signal into a signal with the same frequency as the target phase detection frequency according to the phase detection frequency adjustment control word, and outputs it to the digital phase detection module.
[0081] S120. The phase detection module performs phase detection processing on the output signal of the phase detection frequency control module through the digital phase detection module, and then outputs the phase detection pulse of the frequency signal output by the constant temperature crystal oscillator relative to the multiple reference frequency signals.
[0082] S130. According to the received third control command, the phase pulse selector selects one of the phase pulses of the frequency signal output by the thermostatic crystal oscillator relative to the multiple reference frequency signals, and then outputs it to the narrowband loop filter.
[0083] S140. The phase detection pulse output by the digital phase detection module is converted into the voltage-controlled voltage of the thermostatic crystal oscillator through a narrow-band loop filter, thereby controlling the frequency output of the thermostatic crystal oscillator.
[0084] S150. The frequency signal output by the constant temperature crystal oscillator is processed by the power divider to output a first frequency signal and a second frequency signal. The first frequency signal is output to the phase detection module and the phase detection frequency control module, and the second frequency signal is used as the frequency signal of the phase-locked loop system.
[0085] The following is combined Figure 2 The implementation process of the phase detection frequency adjustment module is described in detail:
[0086] The phase detection module detects the phase data of the current temperature-controlled crystal oscillator and the three reference frequency sources in real time, and converts the phase data ΔΦ 1(k) , ΔΦ 2(k) , ΔΦ 3(k) Output to the phase detector frequency adjustment module; where ΔΦ 1(k) , ΔΦ 2(k) , ΔΦ 3(k) These represent the phase deviations between the output frequency of the isothermal crystal oscillator at time k and the reference frequency source 1, reference frequency source 2, and reference frequency source 3, respectively.
[0087] The high-precision ADC module acquires the temperature-controlled crystal voltage output from the loop filter in real time and converts the voltage-controlled voltage data U...VCO(k) Output to the phase detector frequency adjustment module; where U VCO(k) This represents the temperature-controlled voltage of the crystal oscillator read at time k.
[0088] Phase detection frequency adjustment module receives ΔΦ 1(k) , ΔΦ 2(k) , ΔΦ 3(k) U VCO(k) As the input of the pre-detection data into the preset reference data comparator 1, the pre-detection data comparison and analysis with the preset reference pre-detection data is completed, and the pre-comparison result is output.
[0089] ΔΦ 1(k) Input Kalman filter 1, ΔΦ 2(k) Input Kalman filter 2, ΔΦ 3(k) Input Kalman filter 3, U VCO(k) The data is input into Kalman filter 4, which generates the corresponding post-filtered data ΔΦ. 1(k) '、ΔΦ 2(k) '、ΔΦ 3(k) '、U VCO(k) ';
[0090] The output ΔΦ of Kalman filter 1 1(k) '、Kalman filter 2 output ΔΦ 2(k) '、Kalman filter 3 output ΔΦ 3(k) '、Kalman filter 4 output U VCO(k) 'Input the preset reference data comparator 2, complete the comparison and analysis with the preset reference post-filtered data, and output the post-comparison result;
[0091] ΔΦ 1(k) 'with U VCO(k) Input PID controller 1, set ΔΦ 2(k) 'with U VCO(k) 'Input PID controller 2, set ΔΦ 3(k) 'with U VCO(k) Input to PID controller 3 to calculate and generate the phase detection frequency adjustment Δf. PD1(k) , Δf PD2(k) , Δf PD3(k) The output is sent to the phase detection frequency control module;
[0092] The pre-comparison results and post-comparison results are input into the parameter correction controller to generate Kalman filter parameter correction word 1, Kalman filter parameter correction word 2, Kalman filter parameter correction word 3, Kalman filter parameter correction word 4, PID parameter correction word 1, PID parameter correction word 2, and PID parameter correction word 3, which are then output to the corresponding Kalman filter and PID controller to complete the algorithm parameter correction.
[0093] In one embodiment of the present invention, the preset reference data comparison process is as follows (taking preset reference data comparator 1 as an example):
[0094] According to the second control command, i.e., the upper-level device control command 2, the phase detection frequency adjustment module stores the received pre-detection data into a programmable read-only memory as preset reference pre-detection data ΔΦ. ref_1(k) , ΔΦ ref_2(k) , ΔΦ ref_3(k) U ref_VCO(k) ;
[0095] Calculate ΔΦ ref_n(k) U ref_VCO(k) The change relative to time k-1, i.e.:
[0096] Δψ ref_n(k) =ΔΦ ref_n(k) -ΔΦ ref_n(k-1) (n = 1, 2, 3),
[0097] ΔU ref_VCO(k) =U ref_VCO(k) -U ref_VCO(k-1) ;
[0098] Δψ is fitted using an algorithm. ref_n(k) -ΔU ref_VCO(k) Curve, ΔΦ ref_n(k) -U ref_VCO(k) The curve can reflect the phase-locked process corresponding to the preset reference data and the frequency-voltage control relationship of the isothermal crystal oscillator under the conditions.
[0099] Preset reference data comparator 1 compares the previous detection data with the preset reference previous detection data to obtain ΔΦ. n(k) U VCO(k) Relative to Δψ ref_n(k) -ΔU ref_VCO(k) Fitted curve, ΔΦ ref_n(k) -U ref_VCO(k) The deviation of the fitted curve, expressed as Δψ e_n(k) , ΔΦ e_n(k) or ΔU e_VCO(k) U e_VCO(k) express;
[0100] Based on the comparative analysis results, calculate the algorithm parameter correction values, such as the phase data compensation value ΔΦ. n+(k) Covariance correction coefficient ζ pn(k) PID control correction coefficient ΔK Pn(k) ΔK In(k) ΔK Dn(k) The output is sent to the corresponding Kalman filter and PID controller to complete parameter correction.
[0101] The above-described one or more technical solutions in the embodiments of the present invention have at least the following technical effects:
[0102] The narrowband phase-locked loop system and its adaptive adjustment method for phase detection frequency provided by this invention include a prescaler, a reference frequency source selector, a frequency multiplier, a phase detection module, a phase detection frequency adjustment module, a programmable read-only memory, a phase detection frequency control module, an analog-to-digital conversion module, a temperature-controlled crystal oscillator, a digital phase detection module, a phase detection pulse selector, and a narrowband loop filter. By using a narrowband loop filter to lock the output of the low-phase-noise temperature-controlled crystal oscillator to a reference frequency source with high frequency stability, the frequency output can be guaranteed to have both the high frequency accuracy and high frequency stability characteristics of the reference frequency source and the low phase noise characteristics of the temperature-controlled crystal oscillator.
[0103] By real-time detection of the phase data between the current temperature-controlled crystal oscillator and the reference source, and real-time acquisition of the temperature-controlled crystal oscillator voltage data output by the loop filter, the phase detection frequency is adaptively adjusted based on an algorithm. Generally, when the phase-locked loop (PLL) is in the capture state, the phase detection frequency is increased to shorten the lock-in time; when the PLL is in the locked state, the phase detection frequency is decreased to suppress the influence of the reference frequency source on the near-end phase noise of the PLL output. The system adjusts the phase detection frequency in real time based on the detection data, greatly increasing loop stability.
[0104] The detection data and algorithm parameters during the locking process are stored in a programmable read-only memory as preset reference data. By comparing and analyzing this data with the current detection data, the algorithm parameters are corrected. Under the same voltage control, the output frequency of the temperature-controlled crystal oscillator may drift due to environmental factors, aging, power supply ripple, etc. By comparing and analyzing the current detection data with the preset reference data, this drift can be reflected to a certain extent. Therefore, after algorithm parameter correction, the system will have the ability to suppress the effects of environmental factors, aging, and power supply ripple.
[0105] Based on the control instructions from the superior equipment, one of the three reference frequency sources is selected as the system reference. The system synchronously completes the phase detection frequency adaptive adjustment, phase detection, and locking processes of the isothermal crystal oscillator frequency signal relative to the three reference frequency signals. Finally, the phase detection pulse selector selects the isothermal crystal oscillator phase detection pulse according to the third control instruction received from the superior equipment, locking the isothermal crystal oscillator output to the selected reference frequency source. This avoids the impact of phase jumps caused by direct switching of reference frequency sources on the system, reduces the risk of phase-locked loop system loss of lock, and increases loop stability.
[0106] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A narrowband phase-locked loop system, characterized in that, It includes a prescaler, a reference frequency source selector, a frequency multiplier, a phase detection module, a phase detection frequency adjustment module, a programmable read-only memory, a phase detection frequency control module, an analog-to-digital converter, a temperature-controlled crystal oscillator, a digital phase detection module, a phase detection pulse selector, and a narrowband loop filter. The prescaler is used to receive and prescale multiple reference frequency sources; The reference frequency source selector is used to receive a first control command, select one of the multiple reference frequency sources according to the first control command, and output the corresponding output. The frequency multiplier is electrically connected to the reference frequency source selector, and is used to perform frequency multiplication processing on the reference frequency source selected by the reference frequency source selector, and output the result. The phase detection module is electrically connected to the prescaler, the temperature-controlled crystal oscillator, and the frequency multiplier, respectively, to receive and process the multi-channel reference frequency source after prescaler processing, the reference frequency source after frequency multiplication processing, and the first frequency signal output by the temperature-controlled crystal oscillator after power division and shaping, and output phase data. The phase detection frequency adjustment module is electrically connected to the programmable read-only memory, the analog-to-digital converter module, and the phase detection module, respectively, and is used to process the phase data output by the phase detection module, the voltage control voltage data output by the analog-to-digital converter module, and the preset reference data and algorithm parameter data stored in the programmable read-only memory according to the received second control instruction, thereby generating an algorithm parameter correction word and outputting a phase detection frequency adjustment control word; The phase detection frequency control module is electrically connected to the prescaler, the thermostatic crystal oscillator, and the phase detection frequency adjustment module, respectively, to receive and process the multi-channel reference frequency source processed by the prescaler, the first frequency signal output by the thermostatic crystal oscillator after power division and shaping, and the phase detection frequency adjustment control word output by the phase detection frequency adjustment module, and output a signal with the same frequency as the target phase detection frequency. The digital phase detection module is electrically connected to the phase detection frequency control module to receive and process the signal output by the phase detection frequency control module that is at the same frequency as the target phase detection frequency, and output multiple phase detection pulses. The phase detection pulse selector is electrically connected to the digital phase detection module and is used to select one of the multiple phase detection pulses according to the received third control command and output the corresponding pulse. The narrowband loop filter is electrically connected to the phase detection pulse selector to convert the phase detection pulse output by the phase detection pulse selector into a voltage-controlled voltage signal and transmit it to the temperature-controlled crystal oscillator. The second frequency signal output by the power divider from the isothermal crystal oscillator serves as the output frequency signal of the narrowband phase-locked loop system.
2. The narrowband phase-locked loop system according to claim 1, characterized in that, The reference frequency source selector, the prescaler, the frequency multiplier, the phase detection module, the phase detection frequency adjustment module, the phase detection frequency control module, the digital phase detection module, and the phase detection pulse selector are all integrated on the FPGA chip.
3. The narrowband phase-locked loop system according to claim 1, characterized in that, The phase detection frequency adjustment module includes a first comparator, a second comparator, a first filter, a second filter, a third filter, a fourth filter, a parameter correction controller, a first PID controller, a second PID controller, and a third PID controller. The first comparator is electrically connected to the phase detection module, the analog-to-digital conversion module, and the programmable read-only memory. The second comparator is electrically connected to the first filter, the second filter, the third filter, the fourth filter, and the programmable read-only memory. The first filter, the second filter, and the third filter are all electrically connected to the phase detection module and the parameter correction controller. The fourth filter is electrically connected to the analog-to-digital conversion module and the parameter correction controller. The first PID controller is electrically connected to the parameter correction controller, the first filter, and the fourth filter. The second PID controller is electrically connected to the parameter correction controller, the second filter, and the fourth filter. The third PID controller is electrically connected to the parameter correction controller, the third filter, and the fourth filter. The phase detection frequency control module is electrically connected to the first PID controller, the second PID controller, and the third PID controller, respectively.
4. The narrowband phase-locked loop system according to claim 1, characterized in that, The programmable read-only memory has a first storage area, a second storage area, a third storage area and a fourth storage area. The first storage area is used to store algorithm parameter data, the second storage area is used to store preset reference pre-detection data, the third storage area is used to store preset reference post-filtering data, and the fourth storage area is set as an index area.
5. The narrowband phase-locked loop system according to claim 1, characterized in that, It also includes a power divider and a shaper. The power divider is electrically connected to the thermostatic crystal oscillator. The first output terminal of the power divider is electrically connected to the shaper. The shaper is electrically connected to the phase detection module and the phase detection frequency control module, respectively, to output a first frequency signal. The second output terminal of the power divider is used to output a second frequency signal.
6. The narrowband phase-locked loop system according to claim 1, characterized in that, The narrowband loop filter includes a low-pass filter and a differential integrator circuit. The low-pass filter is electrically connected to the differential integrator circuit. The low-pass filter is used to output a voltage-controlled voltage signal with a bandwidth of 0.01Hz to 1Hz.
7. A method for adaptively adjusting the phase detection frequency of a narrowband phase-locked loop system as described in any one of claims 1 to 6, characterized in that, Includes the following steps: S10. The reference frequency source selector selects one of the multiple reference frequency sources according to the received first control command, and the source is multiplied by the frequency multiplier to serve as the reference frequency source for the phase detection module. S20. The multi-channel reference frequency source is pre-divided by the pre-divider to adjust the frequency of the reference frequency source to be the same as the output frequency of the constant temperature crystal oscillator, and then output to the phase detection module and the phase detection frequency control module. S30. The phase data of the current isothermal crystal oscillator and the multi-channel reference frequency source are detected in real time through the phase detection module, and the phase data is output to the phase detection frequency adjustment module. S40. The voltage-controlled voltage of the thermostatic crystal oscillator output by the narrowband loop filter is acquired in real time through the analog-to-digital conversion module, and the voltage-controlled voltage data is output to the phase detection frequency adjustment module. S50. The algorithm parameter data of the programmable read-only memory is read through the phase detection frequency adjustment module to complete the initialization; S60. Receive phase data and voltage-controlled voltage data through the phase detection frequency adjustment module, input them as pre-detection data into the first preset reference data comparator, complete the comparison and analysis with the preset reference pre-detection data, and output the pre-comparison result. S70. Input the pre-detection data into the corresponding filter, and input the generated post-filtered data into the second preset reference data comparator to complete the comparison and analysis with the preset reference post-filtered data, and output the post-comparison result. S80. Input the post-filtered data into the corresponding PID controller, calculate and generate the phase detection frequency adjustment control word, and then output it to the phase detection frequency control module. S90. Input the pre-comparison result and post-comparison result into the parameter correction controller to generate the algorithm parameter correction word, and then output it to the filter and PID controller to complete the algorithm parameter correction. S100: The phase detection frequency adjustment module stores the pre-detection data, post-filter data, and algorithm parameter data into the corresponding storage area of the programmable read-only memory according to the second control instruction. S110. The phase detection frequency control module divides the pre-divided multi-channel reference frequency signal and the shaped isothermal crystal oscillator output frequency signal into a signal with the same frequency as the target phase detection frequency according to the phase detection frequency adjustment control word, and outputs it to the digital phase detection module. S120. The phase detection module performs phase detection processing on the output signal of the phase detection frequency control module through the digital phase detection module, and then outputs the phase detection pulse of the frequency signal output by the constant temperature crystal oscillator relative to the multiple reference frequency signals. S130. According to the received third control command, the phase pulse selector selects one of the phase pulses of the frequency signal output by the thermostatic crystal oscillator relative to the multiple reference frequency signals, and then outputs it to the narrowband loop filter. S140. The phase detection pulse output by the digital phase detection module is converted into the voltage-controlled voltage of the thermostatic crystal oscillator through a narrow-band loop filter, thereby controlling the frequency output of the thermostatic crystal oscillator. S150. The frequency signal output by the constant temperature crystal oscillator is processed by the power divider to output a first frequency signal and a second frequency signal. The first frequency signal is output to the phase detection module and the phase detection frequency control module, and the second frequency signal is used as the output frequency signal of the phase-locked loop system.