A test device supporting remote and automatic power on / off in a linux embedded environment

Abstract

The application discloses the technical field of test equipment, and discloses a test equipment supporting remote and automatic on-off under a Linux embedded environment, which comprises an upper cover plate, a bottom cover assembly, a left side plate assembly, a front cover assembly, a rear cover assembly and a right side plate assembly. The test equipment supporting remote and automatic on-off under the Linux embedded environment is a control equipment based on the Linux embedded environment, has high adaptability, high matching degree with the test equipment, can be remotely controlled, can automatically operate only by setting time, saves manpower and greatly improves efficiency. Meanwhile, based on the technical design of the test equipment, full-automatic and manual working modes can be realized. In addition, the test equipment has simple structure, low cost and is suitable for test equipment used in research and development experiments.

Description

Technical Field

[0001] This application relates to the field of test equipment technology, specifically a test equipment that supports remote and automatic power on / off in a Linux embedded environment. Background Technology

[0002] To verify product stability, repeated power-on and power-off tests are required. Manual verification would be extremely time-consuming and labor-intensive. While some existing automated testing equipment can automatically perform power-on and power-off tests, similar to remotely controllable power switches on x86 Intel platforms, their testing efficiency is relatively low, and their remote control capabilities are poor. In today's rapidly evolving industrial landscape, this inefficient method, lacking remote control capabilities, is no longer adequate for demanding production needs. Summary of the Invention

[0003] The purpose of this application is to provide a test device that supports remote and automatic power on / off in a Linux embedded environment, so as to solve the technical problems mentioned in the background.

[0004] To achieve the above objectives, this application discloses the following technical solutions:

[0005] A test device that supports remote and automatic power on / off in a Linux embedded environment includes an upper cover plate, a bottom cover assembly, a left side plate assembly, a front cover assembly, a rear cover assembly, and a right side plate assembly.

[0006] The left side panel assembly includes a left side panel and an output power socket disposed on the left side panel;

[0007] The front cover assembly includes a front cover plate, and trigger terminals 1, 2, and 3, an LED counting display, a mode switch, a start switch, a reset switch, a second / minute toggle switch slot 1, a toggle switch slot 1, a power-on time knob slot, an error mode switch slot, a mode toggle switch slot, a power-off time knob slot, a second / minute toggle switch slot 2, and a start-up indicator light slot, all disposed on the front cover plate.

[0008] The rear cover assembly includes a rear cover plate, and an input power socket, a first thyristor switch, a second thyristor switch, and an AC-DC power module mounted on the rear cover plate.

[0009] The right side panel assembly includes a right side panel, and a control serial port slot, a monitoring serial port slot, a remote network interface slot, and a Mini-USB power supply interface slot disposed on the right side panel.

[0010] The bottom cover assembly includes a bottom cover plate and a main control board mounted on the bottom cover plate. The main control board is equipped with a second / minute toggle switch, a toggle switch, a power-on time knob, an error mode switch, a mode toggle switch, a power-off time knob, a second second / minute toggle switch, a start indicator light, a Mini-USB power supply interface, a remote network interface, a monitoring serial port, a control serial port, an I2C interface, an I2C interface, a CN13 interface, a CN12 interface, a CN14 interface, a GPIO interface, a MODE interface, a CN15 interface, a power switch interface, a reset switch interface, a U1 chip, a U2 chip, a U3 chip, an MCU reset button SW, a U4 chip, and a U6 chip. The minute-second toggle switch 1, toggle switch 1, power-on time knob, error mode switch, mode toggle switch, power-off time knob, minute-second toggle switch 2, toggle switch 2, start indicator light, control serial port, monitoring serial port, remote network interface, and Mini-USB power supply interface correspond one-to-one with the minute-second toggle switch slot 1, toggle switch slot 1, power-on time knob slot, error mode switch slot, mode toggle switch slot, power-off time knob slot, minute-second toggle switch slot 2, toggle switch slot 2, start indicator light slot, control serial port slot, monitoring serial port slot, remote network interface slot, and Mini-USB power supply interface slot, respectively. The U2 chip is an MCU chip, the U1 chip is an SPI NAND Flash, the U3 chip is adapted to the remote network interface to connect to the RJ45 network, the U4 chip is adapted to the control serial port, and the U6 chip is adapted to the monitoring serial port.

[0011] The tops of the left side plate, the right side plate, the front cover plate, and the rear cover plate are respectively fixed to the upper cover plate, and the periphery of the bottom cover plate is respectively fixed to the left side plate, the right side plate, the front cover plate, and the rear cover plate.

[0012] In one embodiment, the U2 chip is model GD32F407RKT6 LQFP64.

[0013] In one embodiment, the U1 chip is connected to the SPI pin of the U2 chip for storing operational data.

[0014] In one embodiment, the first second-minute toggle switch, the first toggle switch, and the power-on time knob are connected to the GPIO pin of the U2 chip to set the power-on time value of the test equipment.

[0015] In one embodiment, the second second-minute toggle switch, the second toggle switch, and the power-off time knob are connected to the GPIO pin of the U2 chip to set the power-off time value of the test equipment.

[0016] In one embodiment, the MCU reset button SW is connected to the NRST pin of the U2 chip and is used to reset the MCU.

[0017] In one embodiment, the start switch interface, the reset switch interface, and the mode toggle switch are connected to the GPIO pins of the U2 chip and are respectively used to enable or disable test operation, reset test data, and select AT / ATX mode.

[0018] In one embodiment, the GPIO pin of the U2 chip is connected to the gate of the Q1 field-effect transistor, the source of the Q1 field-effect transistor is grounded, the drain of the Q1 field-effect transistor is connected to the PWR_BTN# signal terminal of the device under test, and the drain of the Q1 field-effect transistor is connected to the ground terminal of the device under test through a TVS transient voltage suppressor.

[0019] In one embodiment, the GPIO pin of the U2 chip is connected to the gate of the Q2 MOSFET, the source of the Q2 MOSFET is grounded, the drain of the Q2 MOSFET is connected to the first contact on the first side of the Q3 SCR switch, the first contact on the second side of the Q3 SCR switch is connected to the positive terminal of a 220V AC voltage source, and the second contact on the second side of the Q3 SCR switch is connected to the negative terminal of the power supply of the device under test. The positive terminal of the power supply of the device under test is connected to the negative terminal of the 220V AC voltage source.

[0020] In one embodiment, the MI1 pin of the U2 chip is connected to the U3 chip, and the U3 chip is connected to the RJ45 network port through a network transformer.

[0021] Beneficial Effects: This application presents a test device that supports remote and automatic power-on / off in a Linux embedded environment. It is a control device based on the Linux embedded environment, exhibiting strong adaptability and high compatibility with test equipment. Furthermore, it can be remotely controlled; simply setting the time allows for automatic operation, saving manpower and significantly improving efficiency. Based on the technical design of the test equipment, it can achieve both fully automatic and manual working modes. Moreover, it has a simple structure, low cost, and is suitable for use as a test device in research and development experiments. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1This is a schematic diagram of the structure of a test device supporting remote and automatic power on / off in a Linux embedded environment, as described in this application embodiment.

[0024] Figure 2 This is a schematic diagram showing the positional relationship between the top cover plate, right side plate, left side plate, front cover plate, and bottom cover plate in an embodiment of this application.

[0025] Figure 3 This is a left view of a test device supporting remote and automatic power on / off in a Linux embedded environment, as described in this application embodiment.

[0026] Figure 4 This is a right view of a test device supporting remote and automatic power on / off in a Linux embedded environment as described in this application embodiment;

[0027] Figure 5 This is a front view of a test device supporting remote and automatic power on / off in a Linux embedded environment, as described in this application embodiment.

[0028] Figure 6 This is a rear view of a test device supporting remote and automatic power on / off in a Linux embedded environment, as described in this application embodiment.

[0029] Figure 7 This is a schematic diagram showing the positional relationship between the bottom cover assembly and the rear cover assembly in an embodiment of this application;

[0030] Figure 8 This is a schematic diagram of the main control board in the embodiments of this application. Figure 1 ;

[0031] Figure 9 This is a schematic diagram of the main control board in the embodiments of this application. Figure 2 ;

[0032] Figure 10 This is a schematic diagram of the main control board in the embodiments of this application. Figure 3 .

[0033] Figure 11 This is a schematic diagram of the component connections of a test device supporting remote and automatic power-on / off in a Linux embedded environment, as described in this application embodiment.

[0034] Figure 12 This is a schematic diagram of the component arrangement in AT mode and ATX mode in the embodiments of this application.

[0035] Attached reference numerals: 1. Top cover; 2. Right side panel; 3. Left side panel; 4. Output power socket; 5. Front cover; 6. Trigger terminal 1; 7. Trigger terminal 2; 8. Trigger terminal 3; 9. LED counting display screen; 10. Mode switch; 11. Start switch; 12. Reset switch; 13. Second / minute toggle switch slot 1; 14. Toggle switch slot 1; 15. Power-on time knob slot; 16. Error mode switch slot; 17. Mode 18. Toggle switch slot; 19. Power off time knob slot; 20. Second / minute toggle switch slot 2; 21. Start indicator light slot; 22. Rear cover; 23. Input power socket; 24. SCR switch 1; 25. SCR switch 2; 26. AC-DC power module; 27. Bottom cover; 28. Main control board; 29. ​​Second / minute toggle switch 1; 30. Toggle switch 1; 31. Power on time knob; 32. [Missing information] 33. Mode Toggle Switch; 34. Power Off Time Knob; 35. Second / Minute Toggle Switch II; 36. Toggle Switch II; 37. Start Indicator Light; 38. Mini-USB Power Supply Interface; 39. Remote Network Interface; 40. Monitoring Serial Port; 41. Control Serial Port; 42. I2C Interface I; 43. I2C Interface II; 44. CN13 Interface; 45. CN12 Interface; 46. CN14 Interface; 47. GPIO Interface; 48. MODE Interface; 49. CN15 Interface; 50. Power Switch Interface; 51. Reset Switch Interface; 52. U1 Chip; 53. U2 Chip; 54. U3 Chip; 55. MCU Reset Button SW; 56. U4 Chip; 57. U6 Chip; 58. Control Serial Port Slot; 59. Monitoring Serial Port Slot; 60. Remote Network Interface Slot; 61. Mini-USB Power Supply Interface Slot. Detailed Implementation

[0036] The technical solutions in the embodiments of this application will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0037] In this document, the term "comprising" is intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0038] Please see Figure 1-12

[0039] A test device that supports remote and automatic power on / off in a Linux embedded environment includes an upper cover plate 1, a bottom cover assembly, a left side plate assembly, a front cover assembly, a rear cover assembly, and a right side plate assembly.

[0040] Specifically, the left side panel assembly includes a left side panel 3 and an output power socket 4 disposed on the left side panel 3. The output power socket 4 is an AC 220V two-in-one socket.

[0041] Specifically, the front cover assembly includes a front cover plate 5, and trigger terminals 6, 7, and 8, an LED counting display screen 9, a mode switch 10, a start switch 11, a reset switch 12, a second-minute toggle switch slot 13, a toggle switch slot 14, a power-on time knob slot 15, an error mode switch slot 16, a mode toggle switch slot 17, a power-off time knob slot 18, a second-minute toggle switch slot 19, a toggle switch slot 20, and a start-up indicator light slot 21, all located on the front cover plate 5.

[0042] Specifically, the rear cover assembly includes a rear cover plate 22, and an input power socket 23, a first SCR switch 24, a second SCR switch 25, and an AC-DC power module 26 mounted on the rear cover plate 22.

[0043] Specifically, the bottom cover assembly includes a bottom cover plate 27 and a main control board 28 mounted on the bottom cover plate 27. The main control board 28 is equipped with a second / minute toggle switch 29, a toggle switch 30, a power-on time knob 31, an error mode switch 32, a mode toggle switch 33, a power-off time knob 34, a second second / minute toggle switch 35, a second toggle switch 36, a start indicator light 37, a Mini-USB power supply interface 38, a remote network interface 39, a monitoring serial port 40, a control serial port 41, an I2C interface 1 42, an I2C interface 2 43, a CN13 interface 44, a CN12 interface 45, a CN14 interface 46, a GPIO interface 47, a MODE interface 48, a CN15 interface 49, a power switch interface 50, a reset switch interface 51, a U1 chip 52, a U2 chip 53, a U3 chip 54, an MCU reset button SW55, a U4 chip 56, and a U6 chip 57. The minute toggle switch 29, toggle switch 30, power-on time knob 31, error mode switch 32, mode toggle switch 33, power-off time knob 34, minute toggle switch 2 35, toggle switch 2 36, start indicator light 37, control serial port 41, monitoring serial port 40, remote network interface 39, and Mini-USB power interface 38 correspond one-to-one with the minute toggle switch slot 13, toggle switch slot 14, power-on time knob slot 15, error mode switch slot 16, mode toggle switch slot 17, power-off time knob slot 18, minute toggle switch slot 2 19, toggle switch slot 2 20, start indicator light slot 21, control serial port slot 58, monitoring serial port slot 59, remote network interface slot 60, and Mini-USB power interface slot 61. For example, the lever of minute toggle switch 29 passes through the corresponding minute toggle switch slot 13 and extends to the outside of the test equipment. The other correspondences are similar. Chip U2 53 is an MCU chip, chip U1 52 is an SPI NAND Flash, and chip U3 54 is adapted to the remote network interface 39 to connect to the RJ45 network. In this embodiment, pin MI1 of chip U2 53 is connected to chip U3 54, and chip U3 54 is connected to the RJ45 network port through a network transformer. Chip U4 56 is adapted to the control serial port 41, and chip U6 57 is adapted to the monitoring serial port 40. The toggle switches 30 and 35 are both X1 x10 toggle switches, the mode toggle switch 33 is an AT ATX mode toggle switch, and the power-on time knob 31 and power-off time knob 34 are both 8421 rotary DIP switches.

[0044] Specifically, the tops of the left side plate 3, right side plate 2, front cover plate 5, and rear cover plate 22 are screwed to the top cover plate 1 for fixation, and the periphery of the bottom cover plate 27 is screwed to the left side plate 3, right side plate 2, front cover plate 5, and rear cover plate 22 for fixation. In the actual implementation process, the test equipment structure is extremely simple, requiring only 6 structural components to be processed. The materials can be selected according to price (such as plastic, wooden blocks, etc.). Except for the main control board 28, the materials of other components can be standard products on the market, which are convenient to purchase.

[0045] In this embodiment, the U2 chip 53 is model GD32F407RKT6 LQFP64.

[0046] In this embodiment, the SPI pins of chip U1 52 and chip U2 53 are connected to store operating data.

[0047] In this embodiment, the second-minute toggle switch 29, the toggle switch 30, and the power-on time knob 31 are connected to the GPIO pin of the U2 chip 53 to set the power-on time value of the test equipment.

[0048] In this embodiment, the second toggle switch 35, the second toggle switch 36, and the power-off time knob 34 are connected to the GPIO pin of the U2 chip 53 to set the power-off time value of the test equipment.

[0049] In this embodiment, the MCU reset button SW55 is connected to the NRST pin of the U2 chip 53 and is used to reset the MCU.

[0050] In this embodiment, the start switch interface 50, the reset switch interface 51, and the mode toggle switch 33 are connected to the GPIO pins of the U2 chip 53, and are respectively used to enable or disable test operation, reset test data, and select AT / ATX mode.

[0051] In this embodiment, the GPIO pin of U2 chip 53 is connected to the gate of Q1 field-effect transistor. A grounding resistor is provided between the GPIO pin of U2 chip 53 and the gate of Q1 field-effect transistor to protect U2 chip 53 and Q1 field-effect transistor. The source of Q1 field-effect transistor is grounded, and the drain of Q1 field-effect transistor is connected to the PWR_BTN# signal terminal of the device under test. The drain of Q1 field-effect transistor is connected to the ground terminal of the device under test through a TVS transient voltage suppressor to protect Q1 field-effect transistor. When running in ATX mode, the GPIO pin of U2 chip 53 connected to Q1 field-effect transistor is set to a time value. When the GPIO output is high, Q1 field-effect transistor is turned on, and the PWR_BTN# signal of the device under test is pulled low. When the set time is completed, the GPIO output goes low, and Q1 field-effect transistor is turned off.

[0052] In this embodiment, the GPIO pin of U2 chip 53 is connected to the gate of Q2 field-effect transistor. A grounding resistor is provided between the GPIO pin of U2 chip 53 and the gate of Q2 field-effect transistor to protect U2 chip 53 and Q2 field-effect transistor. The source of Q2 field-effect transistor is grounded, and the drain of Q2 field-effect transistor is connected to the first contact on the first side of Q3 thyristor switch. The first contact on the second side of Q3 thyristor switch is connected to the positive terminal of 220V AC voltage source, and the second contact on the second side of Q3 thyristor switch is connected to the negative terminal of the power supply of the device under test. The positive terminal of the power supply of the device under test is connected to the negative terminal of 220V AC voltage source. When running in AT mode, the U2 chip 53 is connected to the GPIO of the Q2 MOSFET for a set time. When the GPIO output is high, the Q2 MOSFET is turned on, the Q3 SCR switch is closed, and the 220V AC power supply powers the device under test. When the set time is completed, the GPIO output goes low, the Q2 MOSFET is turned off, the Q3 SCR switch is open, and the device under test is disconnected from the 220V AC power supply. The power-on and power-off time values ​​of the test device can be set as needed, allowing for repeated power-on and power-off tests. Using a SCR switch avoids the contact problems caused by oxidation of mechanical switches.

[0053] The LED counting display 9 is connected to the GPIO pin of the U2 chip 53 to display the number of tests.

[0054] In the specific implementation of this embodiment, the configuration process of the automatic mode is as follows:

[0055] (1) Set the mode switch 10 to automatic mode;

[0056] (2) Connect the remote network interface 39 and the control serial port 41 to the host computer;

[0057] (3) Connect the output power socket 4 to the device under test;

[0058] (4) Plug the external power supply into the input power socket 23 to turn on the power to the test equipment;

[0059] (5) Set the power-on and power-off time, clear the count, set the start and end times through the host computer, and start the test equipment to perform automatic testing on the device under test.

[0060] In the specific implementation of this embodiment, the configuration process for manual mode is as follows:

[0061] (1) Switch the mode switch 10 to manual mode;

[0062] (2) Connect the output power socket 4 to the device under test;

[0063] (3) Plug the external power supply into the input power socket 23 to turn on the power to the test equipment;

[0064] (4) Turn on the start switch 11, and adjust the 10X1 X10 toggle switch 1, the 11 start time knob (8421), the second toggle switch 36, the second second toggle switch 35, the stop time knob 34, and the mode toggle switch 33 as needed to obtain the desired settings such as start and stop time, reset count, set start and stop parameters, etc. After starting the test equipment, test the device under test.

[0065] In this embodiment, the main hardware design principle of the remote switching device specifically includes:

[0066] First, the U2 chip 53 (hereinafter referred to as "MCU") needs to be programmed with a firmware and configured with the required GPIO functions.

[0067] The MCU reset button SW55 (hereinafter referred to as "SW2") is the MCU reset button. When the MCU's logic function has a problem, it initializes the MCU. An external 10K resistor is connected to pull up the voltage to 3V to keep the MCU in normal working state.

[0068] The U1 chip 52 can be used to save the running data of the MCU after power failure;

[0069] Use the 12 GPIOs of the MCU to set the power-off and power-on time values ​​during the test. The 8421 encoder can be set to a value from 0 to 15. Then you can choose whether to use minutes or seconds, and then choose whether to multiply the value by 10. This allows you to easily set many time combinations.

[0070] Use the high / low level state of one GPIO pin of the MCU to control whether to start running the set program;

[0071] Use the high / low level state of one GPIO of the MCU to clear the running program and restore the program to its initial state;

[0072] The high or low level state of one GPIO pin of the MCU determines whether the MCU runs in AT mode or ATX mode.

[0073] When running in AT mode, the U2 chip 53 is connected to the GPIO of the Q2 MOSFET for a set time. When the GPIO output is high, the Q2 MOSFET is turned on, the Q3 SCR switch is closed, and the 220V AC power supply powers the device under test. When the set time is completed, the GPIO output goes low, the Q2 MOSFET is turned off, the Q3 SCR switch is open, and the device under test is disconnected from the 220V AC power supply. The power-on and power-off time values ​​of the test device can be set as needed, allowing for repeated power-on and power-off tests. Using a SCR switch avoids the contact problems caused by oxidation of mechanical switches.

[0074] When running in ATX mode, the GPIO of chip 53 connected to Q1 MOSFET is set to a specific time. When the GPIO output is high, Q1 MOSFET is turned on, and the PWR_BTN# signal of the device under test is pulled low. When the set time is completed, the GPIO output goes low, and Q1 MOSFET is turned off. D4 is a TVS transient voltage suppressor, protecting Q8.

[0075] The LED counting display screen 9 can display the number of runs in real time;

[0076] The U3 chip 54, connected to an RJ45 connector, can be used for remote debugging of the MCU program and remote reading of the operation results.

[0077] Finally, it should be noted that the above description is only a preferred embodiment of this application and is not intended to limit this application. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A test device supporting remote and automatic power on / off in a Linux embedded environment, characterized in that, Includes an upper cover (1), a bottom cover assembly, a left side panel assembly, a front cover assembly, a rear cover assembly, and a right side panel assembly; The left side panel assembly includes a left side panel (3) and an output power socket (4) disposed on the left side panel (3); The front cover assembly includes a front cover plate (5), and trigger terminals 1 (6), 2 (7), 3 (8), LED counting display (9), mode switch (10), start switch (11), reset switch (12), second minute toggle switch slot 1 (13), toggle switch slot 1 (14), power-on time knob slot (15), error mode switch slot (16), mode toggle switch slot (17), power-off time knob slot (18), second minute toggle switch slot 2 (19), toggle switch slot 2 (20), and start running indicator light slot (21) disposed on the front cover plate (5). The rear cover assembly includes a rear cover plate (22), and an input power socket (23), a first thyristor switch (24), a second thyristor switch (25), and an AC-DC power module (26) mounted on the rear cover plate (22); The right side panel assembly includes a right side panel (2), and a control serial port slot (58), a monitoring serial port slot (59), a remote network interface slot (60), and a Mini-USB power supply interface slot (61) disposed on the right side panel (2). The bottom cover assembly includes a bottom cover plate (27) and a main control board (28) mounted on the bottom cover plate (27). The main control board (28) is equipped with a second / minute toggle switch (29), a toggle switch (30), a power-on time knob (31), an error mode switch (32), a mode toggle switch (33), a power-off time knob (34), a second second / minute toggle switch (35), a second toggle switch (36), a start indicator light (37), a Mini-USB power supply interface (38), and a remote network interface (39). ), Monitoring serial port (40), Control serial port (41), I2C interface 1 (42), I2C interface 2 (43), CN13 interface (44), CN12 interface (45), CN14 interface (46), GPIO interface (47), MODE interface (48), CN15 interface (49), Start switch interface (50), Reset switch interface (51), U1 chip (52), U2 chip (53), U3 chip (54), MCU reset button SW (55), U4 chip (56) ), U6 chip (57); the second and minute toggle switch one (29), toggle switch one (30), power-on time knob (31), error mode switch (32), mode toggle switch (33), power-off time knob (34), second and minute toggle switch two (35), toggle switch two (36), start running indicator (37), control serial port (41), monitoring serial port (40), remote network interface (39), and Mini-USB power supply interface (38) are respectively connected to the second and minute toggle switch slot one (13), toggle switch one (36), and start running indicator (37), control serial port (41), monitoring serial port (40), remote network interface (39), and Mini-USB power supply interface (38) and are respectively connected to the second and minute toggle switch slot one (13), toggle switch one (36), and start running indicator (37), control serial port (41), monitoring serial port (40), remote network interface (39), and Mini-USB power supply interface (38). The following are corresponding slots: switch slot 1 (14), power-on time knob slot (15), error mode switch slot (16), mode toggle switch slot (17), power-off time knob slot (18), second minute toggle switch slot 2 (19), toggle switch slot 2 (20), start running indicator light slot (21), control serial port slot (58), monitoring serial port slot (59), remote network interface slot (60), and Mini-USB power supply interface slot (61); the U2 chip (53) is an MCU chip, the U1 chip (52) is an SPI NAND Flash, the U3 chip (54) is adapted to the remote network interface (39) to connect to the RJ45 network, the U4 chip (56) is adapted to the control serial port (41), and the U6 chip (57) is adapted to the monitoring serial port (40); The tops of the left side plate (3), the right side plate (2), the front cover plate (5), and the rear cover plate (22) are respectively fixed to the upper cover plate (1), and the periphery of the bottom cover plate (27) is respectively fixed to the left side plate (3), the right side plate (2), the front cover plate (5), and the rear cover plate (22).

2. The test device supporting remote and automatic power-on / off in a Linux embedded environment according to claim 1, characterized in that, The model number of the U2 chip (53) is GD32F407RKT6 LQFP64.

3. The test device supporting remote and automatic power-on / off in a Linux embedded environment according to claim 1, characterized in that, The U1 chip (52) is connected to the SPI pin of the U2 chip (53) for storing operating data.

4. The test device supporting remote and automatic power-on / off in a Linux embedded environment according to claim 1, characterized in that, The first second / minute toggle switch (29), the first toggle switch (30), and the power-on time knob (31) are connected to the GPIO pin of the U2 chip (53) to set the power-on time value of the test equipment.

5. The test device supporting remote and automatic power on / off in a Linux embedded environment according to claim 1, characterized in that, The second minute toggle switch (35), the second toggle switch (36), and the power-off time knob (34) are connected to the GPIO pin of the U2 chip (53) to set the power-off time value of the test equipment.

6. The test device supporting remote and automatic power-on / off in a Linux embedded environment according to claim 1, characterized in that, The MCU reset button SW (55) is connected to the NRST pin of the U2 chip (53) and is used to reset the MCU.

7. The test device supporting remote and automatic power-on / off in a Linux embedded environment according to claim 1, characterized in that, The start switch interface (50), the reset switch interface (51), and the mode toggle switch (33) are connected to the GPIO pin of the U2 chip (53) and are used to turn on or off the test operation, reset the test data, and select the AT / ATX mode, respectively.

8. The test device supporting remote and automatic power-on / off in a Linux embedded environment according to claim 7, characterized in that, The GPIO pin of the U2 chip (53) is connected to the gate of the Q1 field-effect transistor. The source of the Q1 field-effect transistor is grounded. The drain of the Q1 field-effect transistor is connected to the PWR_BTN# signal terminal of the device under test. The drain of the Q1 field-effect transistor is connected to the ground terminal of the device under test through a TVS transient voltage suppressor.

9. The test device supporting remote and automatic power-on / off in a Linux embedded environment according to claim 7, characterized in that, The GPIO pin of the U2 chip (53) is connected to the gate of the Q2 field-effect transistor. The source of the Q2 field-effect transistor is grounded. The drain of the Q2 field-effect transistor is connected to the first contact on the first side of the Q3 thyristor switch. The first contact on the second side of the Q3 thyristor switch is connected to the positive terminal of the 220V AC voltage source. The second contact on the second side of the Q3 thyristor switch is connected to the negative terminal of the power supply of the device under test. The positive terminal of the power supply of the device under test is connected to the negative terminal of the 220V AC voltage source.

10. The test device supporting remote and automatic power-on / off in a Linux embedded environment according to claim 1, characterized in that, The MI1 pin of the U2 chip (53) is connected to the U3 chip (54), and the U3 chip (54) is connected to the RJ45 network port through a network transformer.

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