A method for manufacturing a thin film transistor and a thin film transistor

Abstract

The embodiment of the present application provides a preparation method of a thin film transistor and the thin film transistor, and relates to the technical field of semiconductor devices, to solve the problem that the current preparation method of the thin film transistor can cause damage and pollution to an active layer in the process of setting a source electrode and a drain electrode, so that the roughness of the surface of the active layer is increased, and then the carrier is affected by the roughness of the surface of the active layer, and the carrier mobility is reduced. The preparation method of the thin film transistor comprises the following steps: arranging an active layer on one side of a substrate; arranging a protective layer on the side, away from the substrate, of the active layer; etching the protective layer and the active layer in sequence to obtain a first protective layer structure and an active layer structure, wherein the orthographic projection of the first protective layer structure on the substrate layer covers the orthographic projection of the active layer structure on the substrate layer.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, and in particular to a method for fabricating a thin-film transistor and the thin-film transistor itself. Background Technology

[0002] Current methods for fabricating thin-film transistors involve first creating an active layer, and then using etching or other methods to create the source and drain electrodes on the surface of the active layer. This process damages and contaminates the active layer, increasing its surface roughness. Consequently, the roughness of the active layer surface affects the carrier mobility, leading to a decrease in carrier mobility. Summary of the Invention

[0003] This application provides a method for fabricating a thin-film transistor and a thin-film transistor, in order to solve the problem that current methods for fabricating thin-film transistors can damage and contaminate the active layer during the process of setting the source and drain electrodes, resulting in increased surface roughness of the active layer, which in turn leads to a decrease in carrier mobility due to the influence of the surface roughness of the active layer.

[0004] The first aspect of this application provides a method for fabricating a thin-film transistor, comprising:

[0005] An active layer is disposed on one side of the substrate;

[0006] A protective layer is provided on the side of the active layer away from the substrate;

[0007] The protective layer and the active layer are etched sequentially to obtain a first protective layer structure and an active layer structure, wherein the orthogonal projection of the first protective layer structure on the substrate layer covers the orthogonal projection of the active layer structure on the substrate layer.

[0008] In some embodiments, the method for fabricating the thin-film transistor further includes:

[0009] The first protective layer structure is etched to obtain a second protective layer structure, such that the second protective layer structure covers a portion of the active layer structure, wherein the portion of the active layer structure exposed relative to the second protective layer structure forms a source region and a drain region, and the orthogonal projections of the source region and the drain region on the substrate layer do not overlap;

[0010] A source / drain electrode layer is disposed on the side of the first protective layer structure away from the substrate layer, so that the active layer structures of the source region and the drain region are respectively connected to the source / drain electrode layer.

[0011] In some embodiments, etching the first protective layer structure includes:

[0012] Photoresist is disposed on the side of the first protective layer structure away from the substrate layer;

[0013] The photoresist is sequentially exposed and developed to obtain a photoresist pattern, wherein the photoresist pattern covers a portion of the active layer structure;

[0014] Based on the photoresist pattern, the first protective layer structure is etched to obtain a second protective layer structure, so that the second protective layer structure covers a portion of the active layer structure;

[0015] The provision of a source / drain electrode layer on the side of the first protective layer structure away from the substrate includes:

[0016] The source and drain electrode layers are disposed on the side of the photoresist pattern away from the substrate layer.

[0017] In some embodiments, after forming the source / drain electrode layer on the side of the first protective layer structure away from the substrate layer, the method further includes:

[0018] Remove the photoresist pattern to remove the source / drain electrode layers on the side of the photoresist pattern away from the substrate layer, wherein the source / drain electrode layers electrically connected to the active layer structure of the source region form the source, and the source / drain electrode layers electrically connected to the active layer structure of the drain region form the drain, and the orthogonal projections of the source and the drain on the substrate layer do not overlap.

[0019] In some embodiments, the provision of a protective layer on the side of the active layer away from the substrate includes:

[0020] The protective layer is grown on one side of the active layer using atomic layer deposition.

[0021] In some embodiments, prior to the provision of the active layer on one side of the substrate, the method further includes:

[0022] A first gate is disposed on one side of the substrate layer;

[0023] A first insulating layer is disposed on the side of the first gate away from the substrate layer, wherein the first insulating layer is located between the first gate and the active layer.

[0024] In some embodiments, the method for fabricating the thin-film transistor further includes:

[0025] A second insulating layer is provided on the side of the protective layer away from the active layer;

[0026] A second gate is disposed on the side of the second insulating layer away from the active layer.

[0027] In some embodiments, the active layer includes indium gallium zinc oxide, monocrystalline silicon, and polycrystalline silicon.

[0028] In some embodiments, the protective layer includes aluminum oxide, silicon oxide, and silicon nitride.

[0029] A second aspect of this application also provides a thin-film transistor, comprising:

[0030] The thin-film transistor was prepared using any of the methods described in the first aspect above.

[0031] This application provides a method for fabricating a thin-film transistor (TFT) and a TFT itself, relating to the field of semiconductor device technology. It addresses the problem that current TFT fabrication methods often damage and contaminate the active layer during the source and drain electrode setup, leading to increased surface roughness of the active layer. This increased roughness, in turn, affects carrier mobility. The TFT fabrication method includes: depositing an active layer on one side of a substrate; depositing a protective layer on the side of the active layer away from the substrate; and sequentially etching the protective layer and the active layer to obtain a first protective layer structure and an active layer structure. The orthographic projection of the first protective layer structure onto the substrate covers the orthographic projection of the active layer structure onto the substrate. By first depositing a protective layer on the active layer and then sequentially etching the protective layer and the active layer, a first protective layer structure can be formed on the active layer structure to protect it from damage or contamination by subsequent fabrication processes. This can improve the smoothness and integrity of the active layer surface, prevent the influence of external light and water-oxygen environment on the active layer, reduce the interface state density of the active layer, optimize the subthreshold swing of short-channel thin-film transistors, reduce the scattering effect of rough surface on carriers in the active layer, thereby improving the carrier mobility of the active layer, and further improving the carrier mobility of the thin-film transistor, thus improving the performance of the thin-film transistor. Attached Figure Description

[0032] To more clearly illustrate the technical solution of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 A schematic flowchart illustrating a method for fabricating a thin-film transistor according to an embodiment of this application;

[0034] Figure 2 This is a schematic structural diagram of a thin-film transistor provided in an embodiment of this application. Detailed Implementation

[0035] The embodiments will now be described in detail, with examples illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described below do not represent all embodiments consistent with this application. They are merely examples of systems and methods consistent with some aspects of this application as detailed in the claims. In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways, and the apparatus embodiments described below are merely exemplary. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0036] like Figure 1 As shown in the figure, this application provides a method for fabricating a thin-film transistor, the method comprising:

[0037] Step S110: An active layer is formed on one side of the substrate.

[0038] Step S120: A protective layer is provided on the side of the active layer away from the substrate.

[0039] Step S130: Etch the protective layer and the active layer sequentially to obtain the first protective layer structure and the active layer structure, wherein the orthogonal projection of the first protective layer structure on the substrate covers the orthogonal projection of the active layer structure on the substrate.

[0040] For example, the time interval between the completion time of setting an active layer on one side of the substrate and the start time of setting a protective layer on the side of the active layer away from the substrate is negatively correlated with the carrier mobility of the active layer. The shorter the time interval, the shorter the contact time between the active layer and the external light and water-oxygen environment, the less corrosion the external environment causes to the active layer, and the smaller the oxygen defect between the active layer and the protective layer, the higher the carrier mobility of the active layer.

[0041] First, a protective layer is deposited on the active layer. Then, both the protective layer and the active layer are etched sequentially to form a first protective layer structure, protecting the active layer structure from damage or contamination caused by subsequent fabrication processes. This improves the smoothness and integrity of the active layer surface, reduces oxygen defects between the protective layer and the active layer, prevents the influence of external light and water / oxygen environments on the active layer, reduces the interface state density of the active layer, optimizes the subthreshold swing of short-channel thin-film transistors, and reduces the scattering effect of rough surfaces on carriers in the active layer, thereby improving the carrier mobility of the active layer and ultimately the carrier mobility of the thin-film transistor, thus enhancing the performance of the thin-film transistor.

[0042] In some feasible embodiments, the method for fabricating a thin-film transistor further includes:

[0043] Step S210: Etch the first protective layer structure to obtain the second protective layer structure, so that the second protective layer structure covers part of the active layer structure, wherein the part of the active layer structure exposed relative to the second protective layer structure forms a source region and a drain region, and the orthogonal projections of the source region and the drain region on the substrate layer do not overlap.

[0044] Step S220: A source / drain electrode layer is provided on the side of the first protective layer structure away from the substrate layer, so that the active layer structures of the source region and the drain region are respectively connected to the source / drain electrode layer.

[0045] For example, such as Figure 2 As shown, Figure 2 A schematic structural diagram of a thin-film transistor provided in an embodiment of this application includes: a substrate layer 210, an active layer 220, a second protective layer structure 230, a source electrode 240, and a drain electrode 250. (The last sentence appears to be incomplete and possibly refers to a different application.) Figure 1 The method for fabricating a thin-film transistor (TFT) as shown involves first depositing an active layer 220 on one side of a substrate layer 210, and then immediately depositing a protective layer. The active layer 220 and the protective layer are sequentially etched for the first time to determine the first protective layer structure and the first contact areas between the source and drain electrodes and the substrate. The first protective layer structure is then etched a second time to obtain a second protective layer structure and the second contact areas between the source and drain electrodes and the surfaces of the active layer away from the substrate. The source region and drain region are determined based on the first and second contact areas. A source electrode 240 is deposited in the source region, and a drain electrode 250 is deposited in the drain region.

[0046] The second protective layer structure, obtained by etching the first protective layer structure, protects the associated active layer structure. This prevents damage to the associated active layer structure when the source / drain electrode layers are located on the side of the first protective layer structure away from the substrate. This protects the active layer structure and prevents subsequent fabrication processes from damaging or contaminating its surface. This improves the smoothness and integrity of the active layer surface, prevents the influence of external light and water / oxygen environments on the active layer, reduces the interface state density of the active layer, optimizes the subthreshold swing of short-channel thin-film transistors, and reduces the scattering effect of rough surfaces on carriers in the active layer. Ultimately, this improves the carrier mobility of the active layer, thereby increasing the carrier mobility of the thin-film transistor and ultimately enhancing its performance.

[0047] In some feasible implementations, etching the first protective layer structure includes:

[0048] Step S310: Photoresist is applied to the side of the first protective layer structure away from the substrate.

[0049] Step S320: Expose and develop the photoresist sequentially to obtain a photoresist pattern, wherein the photoresist pattern covers the active layer structure.

[0050] Step S330: Based on the photoresist pattern, etch the first protective layer structure to obtain the second protective layer structure, so that the second protective layer structure covers part of the active layer structure.

[0051] In some feasible implementations, a source / drain electrode layer is disposed on the side of the first protective layer structure away from the substrate layer, including:

[0052] Source and drain electrode layers are formed on the side of the photoresist pattern away from the substrate layer.

[0053] For example, source and drain electrode layers can be formed on the side of the photoresist pattern away from the substrate layer by means of magnetron sputtering, chemical vapor deposition or physical vapor deposition.

[0054] Etching the first protective layer structure with photoresist reduces etching difficulty and improves etching precision. Furthermore, removing the photoresist from the source and drain regions after etching creates exposed areas, preventing prolonged contact between the photoresist and the active layer and thus avoiding carbon contamination. This improves the cleanliness, smoothness, and integrity of the active layer surface, prevents the influence of external light and water / oxygen environments, reduces the interface state density, optimizes the subthreshold swing of short-channel thin-film transistors, and reduces the scattering effect of rough surfaces on carriers in the active layer, thereby increasing carrier mobility and ultimately improving the performance of the thin-film transistor.

[0055] In some feasible implementations, after the source / drain electrode layers are formed on the side of the first protective layer structure away from the substrate layer, the method further includes:

[0056] Remove the photoresist pattern to remove the source and drain electrode layers on the side of the photoresist pattern away from the substrate. The source and drain electrode layers electrically connected to the active layer structure of the source region form the source, and the source and drain electrode layers electrically connected to the active layer structure of the drain region form the drain. The orthogonal projections of the source and drain on the substrate do not overlap.

[0057] For example, the photoresist pattern can be removed by a stripping process or by dissolving the photoresist.

[0058] It is understandable that, since the photoresist is directly deposited on the first protective layer structure, when the first protective layer structure is etched based on the photoresist pattern, photoresist will remain on the surface of the second protective layer structure on the side away from the substrate. If the source / drain electrode layers are deposited on the side of the photoresist pattern away from the substrate, the source / drain electrode layers will be disconnected from the source and drain regions at the location where the photoresist remains on the surface of the second protective layer structure. Therefore, the surface source / drain electrode layers of the second protective layer structure can be directly removed simultaneously with the photoresist by means of a stripping process or by dissolving the photoresist.

[0059] By removing the photoresist pattern and removing the source / drain electrode layer away from the substrate, compared to etching the source / drain electrode layer after it has been set up to expose the active layer, the fabrication difficulty of the source / drain electrode layer can be reduced, thus reducing the fabrication difficulty of thin-film transistors and improving the fabrication efficiency of thin-film transistors. This improves the practicality of the thin-film transistor fabrication method.

[0060] In some feasible implementations, a protective layer is provided on the side of the active layer away from the substrate, including:

[0061] A protective layer is grown on one side of the active layer using atomic layer deposition.

[0062] It should be noted that atomic layer deposition (ALD) allows for the layer-by-layer growth of a protective layer on one side of the active layer. Compared to methods such as chemical vapor deposition (CVD) and physical vapor deposition (PVD), this method has a smaller impact on the active layer. It can further avoid damage to the surface of the active layer structure during the growth of the protective layer, thereby improving the smoothness and integrity of the active layer surface, reducing the interface state density of the active layer, optimizing the subthreshold swing of short-channel thin-film transistors (TFTs), reducing the scattering effect of rough surfaces on carriers in the active layer, and improving the carrier mobility of the active layer. This, in turn, can improve the carrier mobility of the TFT, thus enhancing the performance of the TFT.

[0063] In some feasible implementations, before the active layer is formed on one side of the substrate, the method further includes:

[0064] A first gate is disposed on one side of the substrate layer;

[0065] A first insulating layer is disposed on the side of the first gate away from the substrate layer, wherein the first insulating layer is located between the first gate and the active layer.

[0066] A bottom-gate transistor can be formed by setting a first insulating layer and a first gate on the side of the substrate away from the active layer. This improves the smoothness and integrity of the active layer surface, prevents the influence of external light and water / oxygen environments on the active layer, reduces the interface state density of the active layer, optimizes the subthreshold swing of short-channel thin-film transistors, and reduces the scattering effect of rough surfaces on carriers in the active layer, thereby improving the carrier mobility of the active layer and consequently the carrier mobility of the thin-film transistor, thus improving the performance of the thin-film transistor.

[0067] In some feasible embodiments, the fabrication method of the thin-film transistor further includes:

[0068] A second insulating layer is provided on the side of the protective layer away from the active layer;

[0069] A second gate is disposed on the side of the second insulating layer away from the active layer.

[0070] By placing a second insulating layer and a second gate on the side of the protective layer away from the active layer, a dual-gate transistor with a bottom gate and a top gate can be formed. The addition of two gates can improve the carrier mobility of the active layer in the transistor, thereby enhancing the transistor's amplification capability, effectively suppressing the influence of external voltage on the current, and improving the practicality of thin-film transistors (TFTs). Furthermore, by improving the smoothness and integrity of the active layer surface, the influence of external light and water / oxygen environments on the active layer can be prevented, reducing the interface state density of the active layer in the TFT. This optimizes the subthreshold swing of short-channel TFTs and reduces the scattering effect of rough surfaces on carriers in the active layer, further improving the carrier mobility of the active layer and consequently enhancing the carrier mobility of the TFT, thus improving its performance.

[0071] In some feasible implementations, the active layer includes indium gallium zinc oxide, monocrystalline silicon, and polycrystalline silicon.

[0072] It should be noted that indium gallium zinc oxide (IGNOW) materials possess high electron mobility, good environmental tolerance, and excellent corrosion and wear resistance. Therefore, incorporating IGNOW into the active layer can improve the electron mobility of the active layer, thereby enhancing carrier conductivity. This allows for increased electron migration rate in the active layer under gate bias, shortening channel formation time and thus improving transistor switching speed. Furthermore, it extends the lifetime of the active layer, thereby extending transistor lifespan and improving transistor practicality.

[0073] In some feasible implementations, the protective layer includes aluminum oxide, silicon oxide, and silicon nitride.

[0074] For example, the channel region of the active layer and the contact region between the two can be doped with an alumina protective layer, which can increase the carrier concentration in the active layer, thereby improving the carrier mobility in the active layer and reducing the contact resistance.

[0075] It should be noted that alumina has good transmittance and insulation properties and does not easily react in air. Therefore, using alumina to prepare a protective layer can effectively protect the surface of the active layer from contact with the external water and oxygen environment, and can effectively reduce the fabrication cost of thin-film transistors. Fabricating thin-film transistors using the above-described method can reduce oxygen defects between the protective layer and the active layer, improve the protective effect of the protective layer on the active layer, and thus improve the carrier mobility of the active layer, thereby enhancing the electrical performance of the thin-film transistor.

[0076] For example, a 20 nm molybdenum layer can be magnetron sputtered onto a silicon oxide substrate as the first gate of a thin-film transistor, and the first gate can be patterned. Then, a 4.5 nm hafnium oxide layer can be fabricated on the patterned first gate as the first insulating layer using atomic layer deposition (ALD). Immediately after magnetron sputtering a 3 nm indium gallium zinc oxide layer as the active layer, a 2 nm aluminum oxide layer can be fabricated as the protective layer using ALD. The active layer and protective layer can be patterned sequentially using wet etching. The source and drain regions can be patterned using electron beam lithography (EBRT), and nickel and / or gold can be evaporated using an electron beam to remove the photoresist from the surface of the second protective layer structure, removing the nickel and / or gold from the side of the photoresist away from the second protective layer structure. Subsequently, a 2 / 4 ratio aluminum oxide / hafnium oxide stack can be fabricated using ALD as the passivation layer and the second insulating layer. The second gate region can be lithographically patterned using an electron beam, and titanium and / or gold can be evaporated using an electron beam to form the second gate, thus forming the final thin-film transistor.

[0077] A second aspect of this application also provides a thin-film transistor, comprising:

[0078] The thin-film transistor is prepared using any of the methods described in the first aspect above.

[0079] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0080] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

[0081] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for fabricating a thin-film transistor, characterized in that, include: An active layer is disposed on one side of the substrate layer; A protective layer is disposed on the side of the active layer away from the substrate layer, comprising: growing the protective layer layer by layer on one side of the active layer by atomic layer deposition, wherein the material of the protective layer includes aluminum oxide; The protective layer and the active layer are etched sequentially to obtain a first protective layer structure and an active layer structure, wherein the orthogonal projection of the first protective layer structure on the substrate layer covers the orthogonal projection of the active layer structure on the substrate layer; The first protective layer structure is etched to obtain the second protective layer structure, and the photoresist pattern covering the second protective layer structure is retained so that the second protective layer structure covers part of the active layer structure, wherein the active layer structure exposed relative to the second protective layer structure forms a source region and a drain region, and the orthogonal projections of the source region and the drain region on the substrate layer do not overlap; Source and drain electrode layers are formed on the side of the source region, the drain region, and the photoresist pattern away from the substrate, so that the active layer structures of the source region and the drain region overlap with the source and drain electrode layers respectively. Remove the photoresist pattern to remove the source / drain electrode layer covering the side of the photoresist pattern away from the substrate layer, wherein the source / drain electrode layer electrically connected to the active layer structure of the source region forms the source, and the source / drain electrode layer electrically connected to the active layer structure of the drain region forms the drain. Nano-alumina / hafnium oxide stacks are prepared as a passivation layer and a second insulating layer on the side of the second protective layer structure, the source electrode, and the drain electrode away from the substrate layer by atomic layer deposition.

2. The method for fabricating a thin-film transistor as described in claim 1, characterized in that, The etching of the first protective layer structure includes: Photoresist is disposed on the side of the first protective layer structure away from the substrate layer; The photoresist is sequentially exposed and developed to obtain a photoresist pattern, wherein the photoresist pattern covers a portion of the active layer structure; Based on the photoresist pattern, the first protective layer structure is etched to obtain a second protective layer structure, so that the second protective layer structure covers a portion of the active layer structure.

3. The method for fabricating a thin-film transistor as described in claim 1, characterized in that, Before the active layer is formed on one side of the substrate, the method further includes: A first gate is disposed on one side of the substrate layer; A first insulating layer is disposed on the side of the first gate away from the substrate layer, wherein the first insulating layer is located between the first gate and the active layer.

4. The method for fabricating a thin-film transistor as described in claim 1, characterized in that, Also includes: A second gate is disposed on the side of the second insulating layer away from the active layer.

5. The method for fabricating a thin-film transistor as described in claim 1, characterized in that, The active layer includes indium gallium zinc oxide, monocrystalline silicon, and polycrystalline silicon.

6. A thin-film transistor, characterized in that, include: It is prepared by the method for preparing a thin-film transistor as described in any one of claims 1 to 5.

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