基于FPGA的LCEVC视频编码装置及方法
By designing an LCEVC video encoding device on an FPGA platform and combining Lanczos interpolation, upsampling, conversion, and optimized entropy coding, the problem of low compression rate of LCEVC video encoding was solved, achieving efficient video encoding compression and fast encoding time.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHONGQING UNIV OF POSTS & TELECOMM
- Filing Date
- 2023-04-20
- Publication Date
- 2026-07-17
AI Technical Summary
Existing LCEVC video coding technology has a low compression rate in the entropy coding part and it is difficult to improve video coding efficiency without increasing complexity, especially when implemented on FPGA platforms, where there is a problem of long computation time.
An FPGA-based LCEVC video encoding device is adopted, including a storage module, a read/write module, a control module, an interface module, an upsampling module, a difference module, a conversion module, a quantization module, and an entropy encoding module. Lanczos interpolation is used for downsampling, upsampling, conversion, quantization, and entropy encoding optimization. The parallel processing capability of the FPGA is utilized to design run-length encoding and Huffman coding to optimize the entropy encoding part.
While maintaining low complexity, it significantly improves the compression rate of video encoding and greatly reduces encoding time through parallel processing.
Smart Images
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