Display device and multi-screen display device comprising a display device

Abstract

A display device and a multi-screen display device including the same are provided, in which the display device has a thin bezel width while preventing reliability degradation of a light emitting element due to moisture penetration. The display device includes a substrate having a display portion, a plurality of pixels disposed in the display portion, a pad portion separated from the plurality of pixels and disposed at an edge portion of one side of the substrate, a dummy portion adjacent to the display portion and disposed between the pad portion and the plurality of pixels, a pad connection line crossing the dummy portion and electrically connected to each pad portion, and a connection portion electrically connecting the dummy portion and the pad connection line.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of Korean Patent Application No. 10-2021-0175903, filed on December 9, 2021, which is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] This invention relates to a display device for displaying images and a multi-screen display device including the display device. Background Technology

[0004] With the development of the information age, the demand for display devices for displaying images has increased in various forms. Therefore, various types of display devices are now in use, such as liquid crystal display (LCD) devices, plasma display panel (PDP) devices, organic light-emitting diode (OLED) devices, and quantum dot light-emitting diode (QLED) devices.

[0005] Among these display devices, organic light-emitting diode (OLED) and quantum dot light-emitting diode (QLED) devices are self-emissive and offer advantages such as superior viewing angles and contrast ratios compared to liquid crystal displays (LCDs). Furthermore, because OLED and QLED devices do not require a separate backlight, they can be manufactured to be thin, lightweight, and consume less power.

[0006] Meanwhile, organic light-emitting display devices display images by emitting light through a light-emitting element layer, which includes light-emitting elements inserted between two electrodes. In this case, the light generated by the light emission of the light-emitting elements is emitted to the outside via electrodes, a substrate, etc.

[0007] An organic light-emitting display device includes a display panel implemented for displaying an image. The display panel may include a display area having a plurality of pixels for displaying the image and a border area surrounding the display area. Summary of the Invention

[0008] Organic light-emitting display devices of related technologies require a bezel (or mechanism) to cover the bezel area disposed on the edge (or edge portion) of the display panel, and the width of this mechanism can increase the bezel width. Furthermore, when the bezel width of the organic light-emitting display device is significantly reduced, moisture penetration can lead to the degradation of the light-emitting elements, thereby degrading the reliability of the light-emitting elements.

[0009] Recently, multi-screen display devices that achieve large screens by arranging multiple display devices in a grid shape have been commercialized.

[0010] However, in multi-screen display devices of related technologies, a boundary portion called a seam exists between adjacent display devices due to the presence of bezel areas or borders of each of the multiple display devices. When an image is displayed on the entire screen of a multi-screen display device, this boundary portion causes a sense of discontinuity (or discontinuity) in the image, thereby reducing the immersion of the image.

[0011] The present invention was conceived in view of various technical problems related to the aforementioned issues.

[0012] One or more embodiments of the present invention provide a display device with a thin bezel width while preventing reliability degradation of the light-emitting element due to moisture penetration, and a multi-screen display device including the display device.

[0013] In addition to the technical advantages of the present invention described above, additional advantages and features of the present invention will be clearly understood by those skilled in the art from the following description of the present invention.

[0014] According to one aspect of the present invention, the above and other objectives can be achieved by providing a display device comprising: a substrate having a display portion; a plurality of pixels disposed in the display portion; a pad portion separated from the plurality of pixels and disposed at an edge portion on one side of the substrate; a virtual portion adjacent to the display portion and disposed between the pad portion and the plurality of pixels; a pad connection line intersecting the virtual portion and electrically connected to each pad portion; and a connection portion electrically connecting the virtual portion to the pad connection line.

[0015] According to one aspect of the present invention, the above and other objectives can be achieved by providing a multi-screen display device comprising a plurality of display modules disposed along at least one of a first direction and a second direction intersecting the first direction, wherein each of the plurality of display modules comprises: a substrate having a display portion; a plurality of pixels disposed in the display portion; a pad portion separated from the plurality of pixels and disposed at an edge portion on one side of the substrate; a virtual portion adjacent to the display portion and disposed between the pad portion and the plurality of pixels; a pad connection line intersecting the virtual portion and electrically connected to each pad portion; and a connection portion electrically connecting the virtual portion to the pad connection line.

[0016] In addition to the objectives described above, details of the various embodiments of the present invention are included in the detailed description and drawings. Attached Figure Description

[0017] The above and other objects, features, and advantages of the invention will become more clearly understood from the following detailed description taken in conjunction with the accompanying drawings. In the drawings:

[0018] Figure 1 This is a view illustrating a display device according to an embodiment of the present invention;

[0019] Figure 2 It is a diagram Figure 1 An enlarged view of part A shown;

[0020] Figure 3 It is along Figure 1 The sectional view taken by line I-I' shown;

[0021] Figure 4 It is a diagram Figure 3 An enlarged view of part B shown;

[0022] Figure 5 This is a view illustrating a display device according to another embodiment of the present invention;

[0023] Figure 6 It is along Figure 5 The sectional view taken by line II-II' shown;

[0024] Figure 7 It is a diagram Figure 5 An enlarged view of part C shown;

[0025] Figure 8A It is along Figure 7 The sectional view taken by line III-III' shown;

[0026] Figure 8B It is along Figure 7 The sectional view taken by line IV-IV' shown;

[0027] Figure 8C It is along Figure 7 The sectional view taken by line V-V' shown;

[0028] Figure 8D It is along Figure 7 The sectional view taken by line VI-VI' shown;

[0029] Figure 9 This is a schematic front view illustrating a display device according to an embodiment of the present invention;

[0030] Figure 10A It is a diagram based on Figure 9 The image shown is a view of a subpixel in an example.

[0031] Figure 10B It is a diagram based on Figure 9A view of a subpixel in another example shown;

[0032] Figure 11 This is a view illustrating a multi-screen display device according to an embodiment of the present invention;

[0033] Figure 12 It is along Figure 11 The sectional view shown is taken along line VII-VII'. Detailed Implementation

[0034] The invention will now be described in detail with reference to embodiments thereof, some of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or similar parts. The advantages and features of the invention, as well as its implementation, will become apparent from the following description of the embodiments with reference to the accompanying drawings.

[0035] However, the present invention may be implemented in different forms and should not be construed as being limited to the embodiments set forth herein.

[0036] Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0037] The shapes, sizes, dimensions (e.g., length, width, height, thickness, radius, diameter, area, etc.), proportions, angles, and quantities of the elements disclosed in the accompanying drawings for the purpose of describing various embodiments of the invention are merely examples, and therefore the invention is not limited to the details shown. Similar reference numerals refer to similar elements throughout.

[0038] For ease of description, the dimensions of each component shown in the figures, including size and thickness, are shown. The invention is not limited to the size and thickness of the components shown in the figures, but it should be noted that the relative dimensions of the components shown in the various figures, including relative size, position and thickness, are part of the invention.

[0039] In the following description, detailed descriptions of relevant known functions or configurations will be omitted where it is determined that such detailed descriptions would unnecessarily obscure the focus of the invention.

[0040] Where the terms “including,” “having,” and “contains” are used in the description in this application, other parts may be added unless “only” is used.

[0041] When interpreting a factor, even if not explicitly stated, the factor should be interpreted as including a range of error.

[0042] When describing positional relationships, such as when the positional relationship between two parts is described as "on," "above," "below," and "after," one or more additional parts may be placed between the two parts, unless "exactly" or "directly" is used.

[0043] When describing temporal relationships, such as when time sequence is described as “after,” “following,” “next,” and “before,” discontinuous situations may be included unless “exactly” or “directly” is used.

[0044] It will be understood that although the terms "first," "second," etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are merely used to distinguish one element from another. For example, without departing from the scope of the invention, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0045] The “X-axis direction,” “Y-axis direction,” and “Z-axis direction” should not be interpreted as geometric relationships that are only perpendicular to each other, but rather as having a wider directional range within the functionally applicable scope of the elements of the invention.

[0046] The term "at least one" should be understood to include any and all combinations of one or more of the relevant listed items. For example, "at least one of the first, second and third items" means a combination of all items proposed from two or more of the first, second and third items, as well as the first, second or third item.

[0047] As will be fully understood by those skilled in the art, the features of the various embodiments of the present invention can be combined or integrated with each other, either partially or entirely, and can be technically interoperable and driven in various ways. The various embodiments of the present invention can be implemented independently of each other, or can be implemented together in an interdependent relationship.

[0048] Hereinafter, a display device according to various embodiments of the present invention, and a multi-screen display device including the display device, will be described in detail with reference to the accompanying drawings. In the drawings, the same or similar elements are referred to by the same reference numerals, even if they are shown in different figures. For ease of explanation, the dimensions of each element shown in the drawings are different from the actual dimensions, therefore the present invention is not limited to the dimensions shown in the drawings.

[0049] Figure 1 This is a view illustrating a display device according to an embodiment of the present invention; Figure 2 It is a diagram Figure 1 An enlarged view of part A shown; Figure 3 It is along Figure 1 The sectional view taken by line I-I' shown; Figure 4 It is a diagram Figure 3 An enlarged view of part B shown.

[0050] Reference Figures 1 to 4 According to one embodiment of the present invention, a display device 100 may include a substrate 110, a source driver integrated circuit (IC) 120, a flexible film 130, a circuit board 140, and a timing controller 150.

[0051] Substrate 110 may include a lower substrate and an upper substrate bonded to each other. The lower substrate may include, but is not limited to, a gate driver (GD). Substrate 110 may have a structure in which a film is covered on a single substrate rather than a bonding substrate.

[0052] The substrate 110 may be a glass substrate, or a thin glass substrate or plastic substrate that is flexible or bendable. The substrate 110 may include a display portion AA and a non-display portion IA surrounding the display portion AA. The display portion AA may further include: a plurality of pixels P, each pixel P including a plurality of sub-pixels SP; and a thin film transistor 112.

[0053] The display section AA is the area where images are displayed, and can be a pixel array area, an active area, a pixel array unit, a display unit, or a screen. For example, the display section AA can be located in a portion other than the edge of the substrate 110.

[0054] The non-display area IA can be a non-light-emitting area in which no image is displayed, and can be referred to as a non-display area, a non-active area, or a non-active part. For example, the non-display area IA can be provided at the edge of the substrate 110. The non-display area IA may include a pad portion PP, a virtual portion DP, a pad connection line PL, and a connection portion CP.

[0055] Each of the plurality of pixels P can be individually disposed in each of the plurality of pixel regions defined in the display unit AA. Each of the plurality of pixel regions can be defined by pixel driving lines disposed in the display unit AA, such as a plurality of gate lines and a plurality of data lines.

[0056] Each of the plurality of pixels P is disposed in each pixel region on the substrate 110, and displays a color image based on the gate signal provided from the adjacent gate line and the data voltage provided from the adjacent data line.

[0057] Each of a plurality of pixels P may include a plurality of subpixels SP that are adjacent to each other. A subpixel SP can be defined as the smallest unit of area that actually emits light. For example, at least three subpixels that are adjacent to each other can constitute a pixel P or a unit pixel P for displaying a color image.

[0058] According to one example, a pixel P may include first to third sub-pixels SP arranged adjacent to each other along a first direction X. In this case, the first sub-pixel may be a red sub-pixel, the second sub-pixel may be a green sub-pixel, and the third sub-pixel may be a blue sub-pixel, but the invention is not limited thereto.

[0059] According to another example, a pixel P may include first to fourth sub-pixels SP arranged adjacent to each other along at least one of a first direction X and a second direction Y. In this case, the first sub-pixel may be a red sub-pixel, the second sub-pixel may be a white sub-pixel, the third sub-pixel may be a blue sub-pixel, and the fourth sub-pixel may be a green sub-pixel, but the invention is not limited thereto.

[0060] According to one example, the light-emitting element layers set in the first to fourth sub-pixels SP can emit light of different colors individually or emit white light together.

[0061] When each of the first to fourth sub-pixels SP emits white light, the first, third, and fourth sub-pixels SP may include corresponding color filters (or different wavelength conversion components) for converting the white light into different colors of light. In this case, the second sub-pixel according to the example may not include a color filter. According to another example, at least a portion of the second sub-pixel may include the same color filter as any of the first, third, and fourth sub-pixels.

[0062] The source driver IC 120 receives digital video data and source control signals from the timing controller 150. Based on the source control signals, the source driver IC 120 converts the digital video data into analog data voltage and provides the analog data voltage to the data lines. When the source driver IC 120 is manufactured as a driver chip, it can be packaged in a flexible film 130 using either a chip-on-film (COF) method or a chip-on-plastic (COP) method.

[0063] Pads, such as data pads, may be formed in the edge of the substrate 110. Lines for connecting the pads to the source driver IC 120 and lines for connecting the pads to the circuit board 140 may be formed in the flexible film 130. The flexible film 130 may be attached to the pads using an anisotropic conductive film, thereby allowing the pads to be connected to the lines of the flexible film 130.

[0064] Circuit board 140 may be attached to flexible film 130. Multiple circuits implemented as driver chips may be packaged in circuit board 140. For example, timing controller 150 may be packaged in circuit board 140. Circuit board 140 may be a printed circuit board or a flexible printed circuit board.

[0065] The timing controller 150 receives digital video data and timing signals from an external system via a cable connected to the circuit board 140. Based on the timing signals, the timing controller 150 generates gate control signals for controlling the operating timing of the gate driver GD and source control signals for controlling the operating timing of the source driver IC 120. The timing controller 150 provides the gate control signals to the gate driver GD and the source control signals to the source driver IC 120.

[0066] Simultaneously, when a thin-film transistor is used to input a gate signal from the gate line, each sub-pixel SP provides a predetermined current to the organic light-emitting element according to the data voltage of the data line. Therefore, the light-emitting portion of each sub-pixel SP can emit light with a predetermined brightness corresponding to the predetermined current. Each of the first to fourth sub-pixels SP may include: a circuit element layer 111 disposed on the upper surface of the buffer layer BL, the circuit element layer 111 including a gate insulating layer 111a, an interlayer insulating layer 111b, a passivation layer 111c, and a thin-film transistor 112; a planarization layer 113 disposed on the circuit element layer 111; a pixel electrode 114 disposed on the planarization layer 113; a dam 115; an organic light-emitting layer 116; a common electrode 117; and an encapsulation layer 118. The pixel electrode 114, the organic light-emitting layer 116, and the common electrode 117 may be included in the light-emitting element.

[0067] According to one example, a buffer layer BL is disposed on substrate 110 to prevent moisture from penetrating into thin-film transistor 112. The buffer layer BL may be formed between substrate 110 and circuit element layer 111 (or gate insulating layer 111a) to protect thin-film transistor 112. The buffer layer BL may be disposed entirely on one surface (or front surface) of substrate 110. The buffer layer BL can be used to prevent material contained within substrate 110 from diffusing into transistor layers during the high-temperature processes of thin-film transistor fabrication.

[0068] The circuit element layer 111 may include a gate insulating layer 111a, an interlayer insulating layer 111b, a passivation layer 111c, and a thin-film transistor 112. The gate insulating layer 111a, the interlayer insulating layer 111b, and the passivation layer 111c may be made of inorganic materials.

[0069] The thin-film transistor 112 according to the example may include an active layer 112a, a gate 112b, a source 112c, and a drain 112d.

[0070] The active layer 112a may include a channel region, a drain region, and a source region formed in the thin-film transistor region of the circuit region of pixel P. The drain region and the source region may be separated from each other with a channel region interposed therebetween.

[0071] The active layer 112a may be formed of a semiconductor material based on any of amorphous silicon, polycrystalline silicon, oxide and organic materials.

[0072] The gate insulating layer 111a may be formed on the channel region of the active layer 112a. As an example, the gate insulating layer 111a may be formed in an island shape only on the channel region of the active layer 112a, or it may be formed on the entire front surface of the first substrate 110 or the buffer layer BL including the active layer 112a.

[0073] The gate 112b may be formed on the gate insulating layer 111a and overlap with the channel region of the active layer 112a.

[0074] An interlayer insulating layer 111b may be formed on the gate 112b and the drain and source regions of the active layer 112a. The interlayer insulating layer 111b may be formed in the circuit region and the entire light-emitting region that emits light to the pixel P. For example, the interlayer insulating layer 111b may be made of an inorganic material, but is not limited thereto.

[0075] The source electrode 112c can be electrically connected to the source region of the active layer 112a via a source contact hole disposed in the interlayer insulating layer 111b and overlapping with the source region of the active layer 112a.

[0076] The drain 112d can be electrically connected to the drain region of the active layer 112a via a drain contact hole disposed in the interlayer insulating layer 111b and overlapping with the drain region of the active layer 112a.

[0077] The drain 112d and source 112c can be made of the same metallic material. For example, each of the drain 112d and source 112c can be made of a single metal layer, a single alloy layer, or a multilayer of two or more layers, which may be the same as or different from the gate.

[0078] Furthermore, the circuit region may further include first and second switching thin-film transistors disposed together with the thin-film transistor 112, and a capacitor. Since each of the first and second switching thin-film transistors is disposed on the circuit region of pixel P and has the same structure as the thin-film transistor 112, its description will be omitted. The capacitor may be disposed in the overlap region between the gate 112b and source 112c of the thin-film transistor 112, which overlap each other and are interposed by an interlayer insulating layer 111b.

[0079] Furthermore, to prevent the threshold voltage of the thin-film transistors disposed in the pixel area from shifting due to light, the display panel or substrate 110 may further include a light-shielding layer (not shown) disposed below the active layer 112a of at least one of the thin-film transistors 112, the first switching thin-film transistor, and the second switching thin-film transistor. The light-shielding layer may be disposed between the substrate 110 and the active layer 112a to block light incident on the active layer 112a via the substrate 110, thereby reducing or minimizing the threshold voltage variation of the transistors caused by external light.

[0080] A passivation layer 111c may be disposed on the substrate 110 to cover the pixel area where the pixel P is disposed. The passivation layer 111c covers the drain 112d and source 112c of the thin-film transistor 112 and the interlayer insulating layer 111b. The passivation layer 111c may be formed entirely in the circuit area and the light-emitting area. The passivation layer 111c may be omitted.

[0081] A planarization layer 113 may be formed on the substrate 110 to cover the passivation layer 111c. When the passivation layer 111c is omitted, the planarization layer 113 may be disposed on the substrate 110 to cover the circuit area. The planarization layer 113 may be formed entirely in the circuit area and the light-emitting area.

[0082] According to the example, the planarization layer 113 can be formed to be relatively thick, thereby providing a flat surface on the display section AA. For example, the planarization layer 113 can be made of organic materials such as photo acrylic, styrene, polyimide, and fluoropolymers.

[0083] According to one example, the planarization layer 113 can be formed to cover the circuit element layer 111 except for the edge portion of the substrate 110. Therefore, the passivation layer 111c of the circuit element layer 111 disposed at the edge portion of the substrate 110 can be exposed and not covered by the planarization layer 113.

[0084] The light-emitting element layer may be disposed on the planarization layer 113. According to one example, the light-emitting element layer may include a pixel electrode 114, an organic light-emitting layer 116, and a common electrode 117.

[0085] The pixel electrode 114 can be represented as the anode, reflective electrode, lower electrode, or first electrode of the organic light-emitting layer 116.

[0086] Pixel electrodes 114 may be disposed on the planarization layer 113 and overlap with the light-emitting region EA of each pixel region PA. Pixel electrodes 114 may be patterned into island shapes and disposed in each pixel region PA, and may be electrically connected to the source 112c / drain 112d of the thin-film transistor (or driving TFT) 112 of the corresponding pixel circuit. One side of the pixel electrode 114 may extend to the source 112c / drain 112d of the thin-film transistor 112, and may be electrically connected to the source 112c / drain 112d of the thin-film transistor 112 via contact holes disposed in the planarization layer 113.

[0087] According to one example, the pixel electrode 114 may include a metallic material with a low work function and excellent reflection efficiency.

[0088] As an example, when the display device 100 is configured as a top-emitting type, the pixel electrode 114 may be formed of a stacked structure of a metal material with high reflectivity and a transparent metal material. For example, the pixel electrode 114 may have a stacked structure of a lower electrode 114a and an upper electrode 114b. The lower electrode 114a may be disposed between the planarization layer 113 and the upper electrode 114b, and the coupling force between the lower electrode 114a and the planarization layer 113 may be greater than the coupling force between the lower electrode 114a and the upper electrode 114b. According to one example, the lower electrode 114a may be configured as a stacked structure of MoTi and ITO (ITO / MoTi / ITO) to enhance the coupling force with the planarization layer 113. The upper electrode 114b is disposed on the upper surface (or upper side) of the lower electrode 114a, that is, between the lower electrode 114a and the organic light-emitting layer 116, and may be configured as a stacked structure of Ag and ITO (ITO / Ag / ITO). Compared to the lower electrode 114a, the upper electrode 114b can have a higher reflectivity to reflect light emitted from the organic light-emitting layer 116.

[0089] When the display device 100 is configured as a bottom-emitting type, the pixel electrode may be formed of a transparent conductive material (TCO) such as ITO and IZO that can transmit light; or a semi-transmissive conductive material such as magnesium (Mg), silver (Ag) or an alloy of magnesium (Mg) and silver (Ag).

[0090] like Figure 3 As shown, since the pixel electrode 114 is disposed in the display unit AA, the planarization layer 113 can be disposed below the pixel electrode 114 in the display unit AA. The planarization layer 113 is provided with a predetermined thickness to cover the thin-film transistor 112 that allows the organic light-emitting layer 116 to emit light, thereby its upper surface can be flat. Therefore, the pixel electrode 114 disposed on the planarization layer 113 can also be made flat along the profile of the upper surface of the planarization layer 113.

[0091] The pixel electrode 114 can be used as a metal layer to realize the first to third pad members PP1, PP2 and PP3 provided in the pad portion PP. That is, the pixel drive voltage pad, data pad, reference voltage pad, multiple pixel common voltage pad and gate pad provided in the pad portion PP can be formed together with the pixel electrode 114 using the same material as the pixel electrode 114.

[0092] The embankment 115 can be disposed in a non-light-emitting area, and can be disposed around each of the light-emitting areas (or light-emitting parts) of a plurality of sub-pixels. That is, the embankment 115 can separate (or define) each of the light-emitting areas (or light-emitting parts).

[0093] The embankment 115 may be formed to cover the edge of the pixel electrode 114, thereby separating (or defining) the light-emitting areas (or light-emitting portions) of multiple sub-pixels.

[0094] The dam 115 may be formed to cover the edge of each of the pixel electrodes 114 of the sub-pixel and expose a portion of each of the pixel electrodes 114. Therefore, the dam 115 prevents short circuits between the pixel electrode 114 and the common electrode 117 at the edges of the pixel electrode 114. The exposed portion of the pixel electrode 114 not covered by the dam 115 may be a light-emitting area (or light-emitting portion).

[0095] The embankment 115 may be formed of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin and polyimide resin, but is not limited thereto.

[0096] An organic light-emitting layer 116 is formed on the pixel electrode 114 and the embankment 115. When a voltage is applied to the pixel electrode 114 and the common electrode 117, holes and electrons migrate to the organic light-emitting layer 116 and combine with each other in the organic light-emitting layer 116 to emit light.

[0097] The organic light-emitting layer 116 can be formed from a common layer disposed on multiple sub-pixels SP and the embankment 115. In this case, the organic light-emitting layer 116 can be configured as a tandem structure of multiple light-emitting layers, such as a yellow-green light-emitting layer and a blue light-emitting layer, and can emit white light when an electric field is formed between the pixel electrode 114 and the common electrode 117.

[0098] A color filter (not shown) corresponding to the color of the respective sub-pixel can be formed on each of the plurality of sub-pixels SP. For example, a red color filter can be set in the red sub-pixel, a green color filter can be set in the green sub-pixel, and a blue color filter can be set in the blue sub-pixel. The white sub-pixel may not include a color filter because the organic light-emitting layer 116 emits white light.

[0099] A common electrode 117 is formed on the organic light-emitting layer 116. The common electrode 117 can be a second electrode or a cathode. The common electrode 117 can be a common layer formed together in the sub-pixel. The common electrode 117 can be formed of a transparent metal material, a semi-transparent metal material, or a metal material with high reflectivity.

[0100] When the display device 100 is configured as a top-emitting type, the common electrode 117 may be formed of a transparent conductive material (TCO) such as ITO and IZO that can transmit light; or a semi-transmissive conductive material such as magnesium (Mg), silver (Ag) or an alloy of magnesium (Mg) and silver (Ag).

[0101] When the display device 100 includes a bottom-emitting type, the common electrode 117 can be formed of a metallic material with high reflectivity, such as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an Ag alloy, and a stacked structure of Ag alloy and ITO (ITO / Ag alloy / ITO). The Ag alloy can be an alloy of metals such as silver (Ag), palladium (Pd), and copper (Cu).

[0102] An encapsulation layer 118 is formed on the common electrode 117. The encapsulation layer 118 is used to prevent oxygen or moisture from penetrating into the organic light-emitting layer 116 and the common electrode 117. Therefore, in some embodiments, the encapsulation layer 118 may include at least one inorganic layer and at least one organic layer.

[0103] According to one embodiment of the present invention, the display device 100 may further include a cover layer CL disposed on a substrate 110.

[0104] The cover layer CL can be implemented to provide a flat surface while covering the encapsulation layer 118. The cover layer CL can be disposed in the display section AA and the non-display section IA. According to one example, the cover layer CL can be made of an organic material. Optionally, the cover layer CL may further include a getter material capable of absorbing moisture and / or oxygen.

[0105] The display device 100 according to one embodiment of the present invention may further include a film FF disposed on a substrate 110.

[0106] The membrane FF can be disposed on the cover layer CL. For example, the membrane FF can be bonded to the cover layer CL via a transparent adhesive member.

[0107] According to one example, the film FF may include an anti-reflective layer (or anti-reflective film) to prevent reflection of external light and improve the outdoor visibility and contrast of the image displayed on the display device. For example, the anti-reflective layer may include a circular polarizing layer (or circular polarizing film) that blocks reflected light reflected by the TFTs and / or pixel drive lines disposed on the substrate 110 and then moved to the outside again.

[0108] According to one example, the membrane FF may further include a barrier layer (or barrier membrane) for initial prevention of moisture or oxygen penetration, wherein the barrier layer may be made of a material with low water permeability, such as a polymer material.

[0109] According to one example, the film FF may further include an optical path control layer (or optical path control film) for controlling the path of light emitted from each pixel P to the outside. The optical path control layer comprises a structure of alternating stacks of high-refractive-index layers and low-refractive-index layers, thereby altering the path of light incident from each pixel P to reduce or minimize viewing angle-based color shift. Thus, the film FF can be a functional film having at least one of the above-described functions.

[0110] The display device according to one embodiment of the present invention may further include a sealing member CM disposed on a substrate 110.

[0111] A sealing member CM may be formed between the substrate 110 and the film FF, and may cover both sides of each of the circuit element layer 111, the planarization layer 113, and the cover layer CL. That is, the sealing member CM may cover both sides of each of the circuit element layer 111, the planarization layer 113, and the cover layer CL located between the film FF and the substrate 110 and exposed to the outside of the display device. Furthermore, the sealing member CM may cover a portion of the flexible circuit film (not shown) attached to each pad portion PP located at an edge on one side of the substrate 110 and separated from multiple pixels. The sealing member CM can be used to prevent lateral light leakage caused by light moving outward from inside the cover layer CL in the light emitted from the organic light-emitting layer 116 of each sub-pixel SP. In particular, the sealing member CM overlapping with the pad portions PP of the substrate 110 can be used to prevent or minimize the reflection of external light caused by the first to third pad members disposed in the pad portions PP.

[0112] Optionally, the sealing member CM may further include an absorbent material capable of absorbing moisture and / or oxygen.

[0113] In the display device 100 according to the present invention, the encapsulation layer 118 may be disposed in the display section AA and the non-display section IA, such as Figure 3As shown. According to one example, the encapsulation layer 118 may include a first inorganic layer 118a disposed on the common electrode 117 of the display unit AA, an organic layer 118b disposed on the first inorganic layer 118a, and a second inorganic layer 118c disposed on the organic layer 118b. The organic layer 118b may be configured to have a thickness sufficient to cover impurities (not shown) such as particles generated when the light-emitting element including the organic light-emitting layer 116 is formed. If there is no organic layer 118b or the organic layer 118b is thin, the first inorganic layer 118a, which is thinner than the particles, will not cover the particles, or even if the first inorganic layer 118a covers the particles, the first inorganic layer 118a covering the particles is more easily damaged by external impacts compared to a first inorganic layer 118a positioned not to cover the particles. In this case, external moisture or water vapor can easily penetrate into the display unit AA, thereby damaging the light-emitting element. Therefore, the organic layer 118b of the encapsulation layer 118 can be set to be thicker than the first inorganic layer 118a or the second inorganic layer 118c, so as to fully cover the particles while preventing them from easily breaking due to external impact.

[0114] In addition to the display section AA, according to one example, the organic layer 118b may also extend to a dam DAM disposed in the non-display section IA. The organic layer 118b can be formed by coating a liquid organic material, and the dam DAM prevents the liquid organic material from flowing to the outside of the substrate 110. Therefore, as Figure 3 As shown, the organic layer 118b can be disposed in the display section AA and in the area located between the display section AA and the weir section DAM.

[0115] Meanwhile, in addition to the display section AA, the first inorganic layer 118a and the second inorganic layer 118c may be configured to extend further into the non-display section IA. For example, the first inorganic layer 118a and the second inorganic layer 118c may be configured to extend further toward the end of the substrate to cover the common electrode 117 that is configured to extend from the display section AA to the non-display section IA and the weir section DAM provided in the non-display section IA.

[0116] like Figure 3 As shown, the first inorganic layer 118a can be disposed between the common electrode 117 and the organic layer 118b located in the display section AA, and extends to the edge of the substrate 110 while covering the weir portion DAM located in the non-display section IA. Therefore, the first inorganic layer 118a can be configured to cover the entire lower surface of the organic layer 118b while covering the upper surface and side of the weir portion DAM.

[0117] Similarly, the common electrode 117 can be configured to extend from the display section AA to the non-display section IA to cover the upper surface and sides of the weir section DAM. As a result, the first inorganic layer 118a and the common electrode 117 can double-cover the upper surface and sides of the weir section DAM, thereby preventing external moisture or water vapor from penetrating into the display section AA through the weir section DAM.

[0118] The second inorganic layer 118c extends from the display portion AA to the non-display portion IA to cover the organic layer 118b, and can contact the first inorganic layer 118a on the weir portion DAM. The second inorganic layer 118c can contact the first inorganic layer 118a on the upper surface of the weir portion DAM, and can further extend together with the first inorganic layer 118a to the edge of the substrate 110. Therefore, as... Figure 3 As shown, the second inorganic layer 118c can cover the entire upper surface of the organic layer 118b, as well as part of the upper surface and sides of the dam portion DAM, and even be disposed in the edge portion of the substrate 110.

[0119] Since the first inorganic layer 118a and the second inorganic layer 118c are made of the same material, the adhesion (or coverage) can be further improved compared to the case where the first inorganic layer 118a and the second inorganic layer 118c are made of different materials, thereby more effectively preventing moisture penetration through the inorganic layers.

[0120] Meanwhile, in addition to the display unit AA, the organic light-emitting layer 116 disposed below (or on) the first inorganic layer 118a can extend to the non-display unit IA. The organic light-emitting layer 116 can be disposed on the display unit and the weir portion. Since the organic light-emitting layer 116 is even disposed in the non-display unit IA, the difference between the display unit AA and the display unit AA can be reduced when the organic light-emitting layer 116 of the display unit AA is not emitting light. At the same time, when the organic light-emitting layer 116 is positioned close to the outside or exposed to the outside, external moisture or water vapor can easily penetrate through the organic light-emitting layer 116, thereby damaging the light-emitting element or shortening the life of the light-emitting element. Therefore, the display device 100 according to the present invention can be configured such that the virtual unit DP disconnects the organic light-emitting layer 116 located in the non-display unit IA (or the edge portion of the substrate 110). Therefore, the display device 100 according to the present invention can prevent moisture penetration through the organic light-emitting layer 116 located in the non-display unit IA (or the edge portion of the substrate 110). The common electrode 117 disposed on the organic light-emitting layer 116 located in the non-display section IA can be disconnected from the organic light-emitting layer 116 via the virtual section DP. This will be described in detail with reference to the virtual section DP.

[0121] Meanwhile, each of the plurality of gate lines can be disposed in the display portion AA on the substrate 110. For example, each of the plurality of gate lines can extend longitudinally along a first direction X and can be separated from each other along a second direction Y intersecting the first direction X. According to one example, each of the plurality of gate lines may include a first gate line and a second gate line disposed parallel to each other along the first direction X.

[0122] Each of the multiple data lines can be disposed in a display portion AA on the substrate 110 and intersect with each of the multiple gate lines. For example, each of the multiple data lines can extend longitudinally along the second direction Y and can be separated from each other along the first direction X.

[0123] The pad portion PP includes multiple pad components, such as a first pad component PP1, a second pad component PP2, and a third pad component PP3. Each of the first pad component PP1, the second pad component PP2, and the third pad component PP3 may be disposed at an edge portion on one side of the substrate 110 along a first direction X. The first pad component PP1, the second pad component PP2, and the third pad component PP3 may be separated from each other at the edge portion of the substrate 110.

[0124] According to an example, the first pad component PP1, the second pad component PP2, and the third pad component PP3 may be at least one of a plurality of pixel drive voltage pads electrically connected to one side of each of a plurality of pixel drive power lines, a plurality of data pads electrically connected to one side of each of a plurality of data lines, a plurality of reference voltage pads electrically connected to one side of each of a plurality of reference voltage lines, and a plurality of pixel common voltage pads electrically connected to one side of each of a plurality of pixel common voltage lines.

[0125] Pad link lines PL can be connected to each pad component PP. For example, each of the first to third pad link lines PL1, PL2, and PL3, which are electrically connected to one of multiple pixel drive power lines, multiple data lines, multiple reference voltage lines, and multiple pixel common voltage lines, can be connected to each of the first pad component PP1, the second pad component PP2, and the third pad component PP3. The first pad link line PL1, the second pad link line PL2, and the third pad link line PL3 can be represented as a pad link line.

[0126] According to an example, a virtual part DP is configured to surround a display part AA between a pad part PP and multiple pixels P. The virtual part DP may be adjacent to the display part DP. The virtual part DP is configured to cross (or intersect) the pad connection line PL and is electrically connected to the pad connection line PL via a connector CP. The virtual part DP can be electrically connected to the pad part PP via the connector CP and the pad connection line PL, thereby maintaining the same potential with the multiple pixel common voltage lines. Therefore, the virtual part DP can discharge static electricity from the outside to the pad part PP and / or the pixel common voltage lines via the connector CP and the pad connection line PL, thereby preventing defects caused by static electricity.

[0127] According to an example, a connector CP can be disposed between the virtual part DP and the pad connection line PL. The connector CP electrically connects the virtual part DP and the pad connection line PL. The connector CP is made of metal, and one side (or upper surface) of its side can be connected to the virtual part DP, and the other side (or lower surface) of its side can be connected to the pad connection line PL, thereby electrically connecting the virtual part DP and the pad connection line PL.

[0128] Simultaneously, multiple pixel common voltage lines can be electrically connected to the connection portion CP and the virtual portion DP made of conductive material, thereby providing the pixel common voltage supplied to the common electrode from the multiple pixel common voltage lines to each pixel P located in the display portion AA more uniformly. As a result, the common electrode can be electrically connected to the virtual portion DP via the pad portion PP, the pad connection line PL, and the connection portion CP.

[0129] Reference Figure 2 and 3 A display device 100 according to one embodiment of the present invention may include a crossarea (CA).

[0130] According to one example, the crossover area CA can be the area where the virtual part DP and the pad connection line PL intersect each other, that is, the area where the pad connection line PL intersects with the virtual part DP. Therefore, the crossover area CA can have a size corresponding to the area where the virtual part DP and the pad connection line PL overlap each other in the thickness direction Z of the substrate 110.

[0131] According to an example connection CP, the virtual part DP can be electrically connected to the pad connection line PL in the cross area CA. Therefore, as Figure 4 As shown, the width CPW of the connector CP can be smaller than the width DPEW1 of the virtual part DP (or the first virtual electrode DPE1). Furthermore, the connector CP can overlap with the pad connection line PL together with the virtual part DP (or the first virtual electrode DPE1) in the cross region CA. Therefore, the connector CP and the virtual part DP prevent moisture from penetrating into the pad connection line PL, thereby preventing damage to the pad connection line PL due to moisture penetration.

[0132] Reference Figure 4 According to one embodiment of the present invention, the display device 100 may not include the first intermediate insulating layer MIL1 and the second intermediate insulating layer MIL2.

[0133] According to one example, a first intermediate insulating layer MIL1 may be disposed between the connector CP and the pad connection line PL. According to one example, the first intermediate insulating layer MIL1 may include a buffer layer BL disposed on the pad connection line PL in the cross region CA and an interlayer insulating layer 111b disposed on the buffer layer BL.

[0134] The first intermediate insulating layer MIL1 may include a first contact hole CNT1 for connecting the connector CP to the pad connection line PL. The connector CP can be electrically connected to the pad connection line PL via the first contact hole CNT1. More specifically, refer to Figure 4 The connector CP may be disposed in the crossover area CA, passing through a first through-hole VH1 through a buffer layer BL disposed on a pad connection line PL, and a second through-hole VH2 through an interlayer insulating layer 111b disposed on the first through-hole VH1. The first contact hole CNT1 may include the first through-hole VH1 and the second through-hole VH2. Therefore, the connector CP contacts the upper surface of the pad connection line PL exposed from the first through-hole VH1, thereby the connector CP can be electrically connected to the pad connection line PL.

[0135] A second intermediate insulating layer MIL2 may be disposed between the virtual portion DP and the connecting portion CP. According to one example, the second intermediate insulating layer MIL2 may include a passivation layer 111c disposed on the interlayer insulating layer 111b in the cross region CA.

[0136] The second intermediate insulating layer MIL2 may include a second contact hole CNT2 for connecting the virtual part DP to the connecting part CP. The virtual part DP can be electrically connected to the connecting part CP via the second contact hole CNT2. More specifically, refer to Figure 4 The virtual part DP (or the first virtual electrode DPE1) may be disposed in the third through hole VH3, which passes through the passivation layer 111c disposed on the second through hole VH2 in the cross region CA. The second contact hole CNT2 may include the third through hole. Therefore, the virtual part DP can be electrically connected to the connecting part CP by contacting the upper surface of the connecting part CP exposed from the third through hole VH3.

[0137] Meanwhile, the connecting portion CP may include: a first connecting line CP1 disposed in the first through hole VH1 and the second through hole VH2; and a second connecting line CP2 in contact with the upper surface of the first connecting line CP1 and the upper surface of the interlayer insulating layer 111b. According to one example, the first connecting line CP1 may be made of a metallic material such as Cu. According to one example, the second connecting line CP2 may be made of a transparent conductive material such as ITO.

[0138] like Figure 4 As shown, a display device 100 according to one embodiment of the present invention may have the following structural features: a first contact hole CNT1 and a second contact hole CNT2 overlap each other in the thickness direction Z of the substrate 110 in the cross region CA. That is, the first through hole VH1, the second through hole VH2, and the third through hole VH3 may overlap inside the cross region CA. According to this structure, the virtual portion DP and the connection portion CP can cover the upper surface of the exposed pad connection line PL in the cross region CA by overlapping, thereby further or to the greatest extent preventing moisture penetration into the pad connection line PL.

[0139] In a display device 100 according to an embodiment of the present invention, the substrate 110 may further include a weir portion DAM, which is disposed at the edge of the substrate 110 and surrounds the display portion AA.

[0140] The dam section DAM can be provided along the edge of the substrate 110 to have a closed-loop shape surrounding the display unit AA. This dam section DAM is used to prevent the diffusion or overflow of the encapsulation layer 118 provided on the substrate 110, thereby protecting the display unit AA. The dam section DAM can be formed of at least one of the same material as the dam layer 115 and the planarization layer 113 provided in the display unit AA.

[0141] The weir portion DAM can be implemented on the substrate 110, so that it surrounds or is surrounded by the virtual portion DP. For example, the virtual portion DP can be provided in at least one of the inner and outer regions of the weir portion DAM.

[0142] Reference Figures 2 to 4 The virtual section DP may include: a first virtual line DP1 and a second virtual line DP2 disposed in the outer area of ​​the weir section DAM; and a third virtual line DP3 disposed in the inner area of ​​the weir section DAM.

[0143] The first virtual line DP1 can be set between the pad portion PP and the weir portion DAM. For example... Figure 2 As shown, the first virtual line DP1 can be configured to intersect with each of the first pad connection line PL1 connected to the first pad member PP1, the second pad connection line PL2 connected to the second pad member PP2, and the third pad connection line PL3 connected to the third pad member PP3. This is because the first virtual line DP1 is configured to form a closed loop around the display portion AA at the edge of the substrate 110. Figure 4 As shown, the first virtual line DP1 may include a first virtual electrode DPE1 electrically connected to the first pad connection line PL1.

[0144] The second virtual line DP2 can be set between the first virtual line DP1 and the weir section DAM. For example... Figure 2As shown, the second virtual line DP2 can be positioned along the first virtual line DP1 at a location separated from it. Since the second virtual line DP2 is also configured as a closed loop, it can be positioned to intersect each of the first pad connection line PL1, the second pad connection line PL2, and the third pad connection line PL3. The second virtual line DP2 may include a second virtual electrode DPE2 electrically connected to the second pad connection line PL2.

[0145] The third virtual line DP3 can be disposed between the weir section DAM and the display section AA. The third virtual line DP3 can be configured as a closed loop and can be configured to intersect with each of the first pad connection line PL1, the second pad connection line PL2, and the third pad connection line PL3. The third virtual line DP3 may include a third virtual electrode DPE3 electrically connected to the third pad connection line PL3.

[0146] Reference Figure 3 and 4 The width of each of the first virtual electrode DPE1, the second virtual electrode DPE2, and the third virtual electrode DPE3 may be larger than the width of the passivation layer 111c disposed below it. For example, the cross region CA includes a buffer layer BL disposed on the pad connection line PL, an interlayer insulating layer 111b disposed on the buffer layer BL, and a passivation layer 111c disposed between the interlayer insulating layer 111b and the first virtual electrode DPE1, and the width DPEW1 of the first virtual electrode DPE1 disposed on the upper surface of the passivation layer 111c may be greater than the width PW1 of the passivation layer 111c. Figure 4 As shown, since the first virtual electrode DPE1 is formed to protrude further outward than the passivation layer 111c, the protruding portion of the first virtual electrode DPE1 serves as a mask to disconnect the organic light-emitting layer 116 formed in subsequent processes. The organic light-emitting layer 116 disposed in the non-display section IA is disconnected by the first virtual electrode DPE1 (or the protruding portion of the first virtual electrode DPE1), thereby preventing moisture penetration from the outside of the substrate 110 into the display section AA.

[0147] Therefore, the second virtual electrode DPE2 may have a wider width in the intersection area with the second pad connection line PL2 than the width of the passivation layer 111c located below it. The third virtual electrode DPE3 may have a wider width in the intersection area with the third pad connection line PL3 than the width of the passivation layer 111c located below it. Therefore, the display device 100 according to one embodiment of the present invention can disconnect the organic light-emitting layer 116 in the intersection area of ​​the virtual part DP and the pad connection line PL, thereby improving the effect of preventing moisture penetration into the display part AA. Although the organic light-emitting layer 116 is disconnected in the intersection area, the organic light-emitting layer 116 provided in the non-display part IA or the edge of the substrate 110 can be disconnected by the first to third virtual lines DP1, DP2 and DP3 provided in a closed loop.

[0148] The common electrode 117 formed on the organic light-emitting layer 116 can be disconnected from the organic light-emitting layer 116 through the virtual part DP, but is not limited thereto. The common electrode 117 provided on the non-display part IA can be configured to be integrally connected without being disconnected.

[0149] Return to reference Figure 2 The width of the third virtual electrode can be equal to or greater than the width W1 of the first virtual electrode. (Refer to...) Figure 2 and Figure 3 Since the width of the third virtual electrode DPE3 is equal to the width of the third virtual line DP3, the width of the third virtual electrode DPE3 can be the width W3 of the third virtual line DP3. As described above, since it is advantageous for the first to third virtual electrodes to have widths sufficient to disconnect the organic light-emitting layer 116, the width W3 of the third virtual electrode DPE3 can be equal to or greater than the width W1 of the first virtual electrode. When the width W3 of the third virtual electrode DPE3 is greater than the width W1 of the first virtual electrode DPE1, the organic light-emitting layer 116 extending from the display section AA to the non-display section IA can be disconnected for the first time (or the third time or finally). Therefore, due to the second disconnection of the organic light-emitting layer 116 via the second virtual electrode DPE2 and the third disconnection (or the first disconnection) of the organic light-emitting layer via the first virtual electrode DPE1, moisture penetration from the outside of the substrate 110 to the display section AA can be further or maximized. The width W3 of the third virtual electrode DPE3 can be equal to or greater than the width W2 of the second virtual electrode.

[0150] Simultaneously, due to the widths of the first virtual electrode DPE1 and the second virtual electrode DPE2, an undercut portion UC can be formed between the first virtual line DP1 and the second virtual line DP2. According to one example, the undercut portion UC can be disposed along either the first virtual line DP1 or the second virtual line DP2. Therefore, the undercut portion UC can have a closed-loop shape, and the organic light-emitting layer 116 can be interrupted within the undercut portion UC. For example... Figure 4 As shown, a portion of the organic light-emitting layer 116, which is disconnected by the virtual electrode, can be disposed in the undercut portion UC. A portion of the severed common electrode 117 can also be disposed in the undercut portion UC.

[0151] As a result, in the display device 100 according to one embodiment of the present invention, the organic light-emitting layer 116 is disconnected by the virtual portion DP located at the edge of the substrate 110, thereby preventing moisture penetration into the display portion AA from the outside, thus improving the reliability of the light-emitting element. Furthermore, in the display device 100 according to one embodiment of the present invention, the virtual electrode of the virtual portion DP is electrically connected to the pad connection line PL via the connection portion CP in the intersection area CA of the virtual portion DP and the pad connection line PL located at the edge of the substrate 110, thereby avoiding defects caused by static electricity.

[0152] Figure 5 This is a view illustrating a display device according to another embodiment of the present invention; Figure 6 It is along Figure 5 The sectional view taken by line II-II' shown; Figure 7 It is a diagram Figure 5 An enlarged view of part C shown; Figure 8A It is along Figure 7 The sectional view taken by line III-III' shown; Figure 8B It is along Figure 7 The sectional view taken by line IV-IV' shown; Figure 8C It is along Figure 7 The sectional view taken by line V-V' shown; Figure 8D It is along Figure 7 The sectional view shown is taken from line VI-VI'.

[0153] Reference Figures 5 to 8D According to another embodiment of the present invention, the display device 100 and the display device 100 according to the present invention are... Figure 2 The display device 100 is basically the same as the display device 100, except that the pad connection line PL further includes a protruding line PTL electrically connected to it in the non-crossing area NCA of the pad connection line PL. The protruding line PTL protrudes towards the non-crossing area NCA. The connecting part CP electrically connects the virtual part DP to the protruding line PTL on the protruding line PTL, and the width of the virtual part DP is changed. Therefore, the same reference numerals are used to refer to the same components, and the designation will be based on the same reference numerals. Figure 2 The following description will be based on the differences.

[0154] According to Figure 2 In the case of the display device 100, the connection part CP is configured to electrically connect the virtual part DP to the pad connection line PL in the cross area CA. Therefore, according to Figure 2In the case of the display device 100, the first contact hole CNT1 and the second contact hole CNT2 overlap each other in the thickness direction Z of the substrate 110 in the cross region CA.

[0155] In contrast, according to Figure 5 The display device 100 includes a non-crossing region NCA adjacent to the crossing region CA, wherein the virtual part DP and the pad connection line PL do not cross each other, and the connection part CP is configured to electrically connect the virtual part DP to the protruding line PTL located in the non-crossing region NCA.

[0156] like Figure 5 As shown, since the protruding line PTL and the virtual part DP are set in the non-crossing region NCA and overlap each other parallel to each other without intersecting, the non-crossing region NCA and Figure 2 The cross area CA (where the pad connection line PL and the virtual part DP cross each other in a cross shape) is separated.

[0157] According to Figure 5 In the display device 100, the connection portion CP is disposed in the non-crossing area NCA to prevent the first connection line CP1, made of a metal material such as Cu, from being damaged by the patterning material (or etching material) used in the patterning process for patterning the virtual part DP (or virtual electrode DPE) and / or pixel electrode 114. For example, the pixel electrode 114 or the virtual electrode DPE can be patterned by an etching material such as Ag etchant. This is because when the first connection line CP1, made of a metal material such as Cu, is directly disposed below the pixel electrode 114 or the virtual electrode DPE, the first connection line CP1 can be etched and damaged by Ag etchant. On the other hand, Ag etchant does not damage transparent conductive materials such as ITO. Therefore, according to Figure 5 In the display device 100, a first connection line CP1 made of a metal material such as Cu is positioned as far away as possible from the pixel electrode 114 or the virtual electrode DPE, and the first connection line CP1 is electrically connected to the virtual electrode DPE via a second connection line CP2 that is not damaged by Ag etchant, thereby preventing the first connection line CP1 from being damaged by Ag etchant used during the patterning of the virtual electrode DPE, and the virtual part DP can be electrically connected to the pad connection line PL. At the same time, when the protruding line PTL in contact with the first connection line CP1 is made of Cu, since the protruding line PTL is separated as far away as possible from the pixel electrode 114 or the virtual electrode DPE, the protruding line PTL will not be damaged by Ag etchant.

[0158] In a display device 100 according to another embodiment of the present invention, since the connecting portion CP is not positioned in the cross region CA, no contact hole is provided in the cross region CA between the pad connection line PL and the virtual portion DP, such as Figure 6 As shown in the cross-sectional view, on the pad connection line PL of the cross area CA, an interlayer insulating layer 111b, a passivation layer 111c on the interlayer insulating layer 111b, and a virtual electrode DPE wider than the passivation layer 111c on the passivation layer 111c can be provided. Therefore, the organic light-emitting layer 116 (or the organic light-emitting layer 116 and the common electrode 117) of the non-display section IA can be disconnected in the undercut section UC between the virtual sections, thereby preventing moisture from penetrating into the display section AA.

[0159] Reference Figure 8A According to another embodiment of the present invention, a first intermediate insulating layer MIL1 may be disposed between the connecting portion CP and the protruding line PTL. The first intermediate insulating layer MIL1 may include a buffer layer BL disposed on the protruding line PTL in the non-crossing region NCA and an interlayer insulating layer 111b disposed on the buffer layer BL. Furthermore, the first intermediate insulating layer MIL1 may include a first contact hole CNT1 for connecting the connecting portion CP and the protruding line PTL. More specifically, a first connecting line CP1 of the connecting portion CP may be electrically connected to the protruding line PTL via the first contact hole CNT1. The first connecting line CP1 may be located in each of a first through hole VH1 passing through the buffer layer BL disposed on the protruding line PTL in the non-crossing region NCA and a second through hole VH2 passing through the interlayer insulating layer 111b disposed on the first through hole VH1. Therefore, the first connecting line CP1 contacts the upper surface of the protruding line PTL exposed from the first through hole VH1, thereby being electrically connected to the protruding line PTL.

[0160] According to another embodiment of the present invention, a second intermediate insulating layer MIL2 may be disposed between the virtual portion DP and the connecting portion CP. The second intermediate insulating layer MIL2 may include a passivation layer 111c disposed on the interlayer insulating layer 111b in the non-crossing region NCA. The second intermediate insulating layer MIL2 may include a second contact hole CNT2 for connecting the virtual portion DP to the connecting portion CP (or the second connecting line CP2). The virtual portion DP may be electrically connected to the second connecting line CP2 via the second contact hole CNT2. The virtual portion DP (or the first virtual electrode DPE1) may be disposed in the non-crossing region NCA in a third through hole VH3 passing through the passivation layer 111c located on the second through hole VH2. Therefore, the virtual portion DP may be electrically connected to the second connecting line CP2 by contacting the upper surface of the second connecting line CP2 exposed from the third through hole VH3.

[0161] like Figure 8AAs shown, in a display device 100 according to another embodiment of the present invention, in order to prevent the protruding line PTL of the first connection line CP1 and / or the pad connection line PL from being damaged by Ag etchant, the first contact hole CNT1 may be configured to be separated from the second contact hole CNT2 on the protruding line PTL. Therefore, the first through hole VH1 and the second through hole VH2 of the first contact hole CNT1 may overlap each other in the thickness direction Z of the substrate 110, and the third through hole VH3 of the second contact hole CNT2 may not overlap with the second through hole VH2 (or the first through hole VH1) in the thickness direction Z of the substrate 110.

[0162] Since the first contact hole CNT1 and the second contact hole CNT2 are spaced apart from each other, the first connecting line CP1 can extend between the first contact hole CNT1 and the second contact hole CNT2 by contacting the protruding line PTL in the first contact hole CNT1. That is, the first connecting line CP1 can extend from the first contact hole CNT1 to the space between the first contact hole CNT1 and the second contact hole CNT2.

[0163] The second connecting line CP2 can contact the upper surface and / or side of the first connecting line CP1 between the first contact hole CNT1 and the second contact hole CNT2, and can contact the virtual part DP (or the first virtual electrode DPE1) in the second contact hole CNT2 by extending to the second contact hole CNT2, for example, by contacting the lower surface of the virtual part DP.

[0164] Therefore, according to another embodiment of the present invention, the display device 100 is configured such that the virtual part DP (or the first virtual electrode DPE1) and the protruding line PTL are connected to each other via the connecting part CP on the protruding line PTL provided in the non-crossing area NCA, thereby avoiding static electricity and preventing the first connecting line CP1 and / or the protruding line PTL from being damaged by Ag etchant, thereby improving reliability.

[0165] Return to reference Figure 5 In a display device 100 according to another embodiment of the present invention, the first pad connection line PL1 may include a first protruding line PTL1 protruding toward the non-crossing region NCA, and the second pad connection line PL2 may include a second protruding line PTL2 protruding toward the non-crossing region NCA. In this case, the non-crossing region NCA refers to the area where the virtual portion DP and the pad connection line PL do not intersect each other in a cross shape, and as... Figure 5As shown, the non-crossing area NCA where the first protruding line PTL1 is provided and the non-crossing area NCA where the second protruding line PTL2 is provided can be formed at different corresponding positions. Therefore, the display device 100 according to another embodiment of the present invention can be configured such that the first protruding line PTL1 is connected to the first pad connection line PL1 between the first pad connection line PL1 and the second pad connection line PTL, and the second protruding line PTL2 is connected to the second pad connection line PL2 between the second pad connection line PL2 and the third pad connection line PL3.

[0166] The first virtual line DP1 may include a first virtual electrode DPE1 electrically connected to the first protruding line PTL1. The second virtual line DP2 may include a second virtual electrode DPE2 electrically connected to the second protruding line PTL2. The third virtual line DP3 may include a third virtual electrode DPE3 electrically connected to the third protruding line PTL3. Since the first protruding line PTL1, the second protruding line PTL2, and the third protruding line PTL3 are arranged based on... Figure 5 The first virtual electrode DPE1, the second virtual electrode DPE2, and the third virtual electrode DPE3, electrically connected to the first protruding line PTL1, the second protruding line PTL2, and the third protruding line PTL3, can be disposed at different locations. Because... Figure 6 This is a cross-sectional view obtained along the pad connection line PL, which does not include the protruding line PTL. Therefore, each of the first virtual electrode DPE1 of the first virtual line DP1, the second virtual electrode DPE2 of the second virtual line DP2, and the third virtual electrode DPE3 of the third virtual line DP3 may not be connected to... Figure 6 The pad connection line PL in the middle.

[0167] According to another embodiment of the present invention, the display device 100 may be configured such that the width of the virtual electrode overlapping with the non-crossing region NCA is greater than the width of the virtual electrode overlapping with the crossing region CA.

[0168] For example, such as Figure 7As shown, the width DEW1 of the first virtual electrode overlapping with the first protruding line PTL1 can be greater than the width DEW2 of the first virtual electrode overlapping with the first pad connection line PL1 (or overlapping with the cross area CA) in the cross area CA. This is to ensure the process margins of the protruding line PTL and the first connection line CP1, the process margins of the first connection line CP1 and the second connection line CP2, and the process margins of the second connection line CP2 and the virtual electrode DPE in the process of electrically connecting the virtual part DP to the protruding line PTL via the connector CP. Since the width (or area) of the first protruding line PTL1 is ensured in the non-cross area NCA, even if process misalignment occurs, the virtual electrode of the virtual part DP can be electrically connected to the protruding line PTL via the connector CP, thereby avoiding static electricity.

[0169] Furthermore, in a display device 100 according to another embodiment of the present invention, since the virtual part DP and the protruding line PTL are electrically connected to each other via the connecting part CP in the non-crossing area NCA, more specifically, in the non-crossing area NCA separated from the crossing area CA, parasitic capacitance between them and different signal lines provided in a direction parallel to the pad connection line PL can be avoided, thereby avoiding signal line interference with the image signal.

[0170] like Figure 7 As shown, the second virtual electrode DPE2 of the second virtual line DP2 may include a first sub-virtual electrode SDE1 configured to face the first protruding line PTL1 in the second direction Y, and a second sub-virtual electrode SDE2 connected to the first sub-virtual electrode SDE1. The second sub-virtual electrode SDE2 may be a second virtual electrode DPE2 that does not face the first protruding line PTL1 in the second direction Y.

[0171] The width SDEW1 of the first sub-virtual electrode SDE1 can be smaller than the width SDEW2 of the second sub-virtual electrode SDE2. As described above, the width of the virtual electrode DPE (or the first virtual electrode DPE1 or the first protruding line PTL1) in the non-crossing region NCA can be formed to be greater than the width of the virtual electrode DPE in the crossing region CA in order to ensure process margin. Therefore, the adjacent virtual electrode DPE (or the second virtual electrode DPE2 or the first sub-virtual electrode SDE1) at the corresponding position of the virtual electrode DPE (or the first virtual electrode DPE1 or the first protruding line DPE1) in the non-crossing region NCA can be formed to be narrower, and the width of the non-display portion IA (or the edge portion or frame of the substrate 110) can be reduced or minimized. As a result, when multiple display devices 100 are configured in a multi-screen configuration, an image without discontinuity can be achieved.

[0172] like Figures 8B to 8DAs shown, in a display device 100 according to another embodiment of the present invention, the protruding line PTL can be connected to the virtual electrode DPE of the virtual part DP in the non-crossing region NCA, and the undercut portion UC can be formed by the virtual electrode DPE provided in the non-crossing region NCA to disconnect the organic light-emitting layer 116.

[0173] Reference Figure 8B In a non-crossing NCA, a portion of a protruding line PTL, which is formed as a connection to a pad connection line PL, may be provided on the substrate 110, including a protruding line PTL, a buffer layer BL on the protruding line PTL to cover the protruding line PTL, an interlayer insulating layer 111b on the buffer layer BL, a second connection line CP2 on the interlayer insulating layer 111b, a second contact hole CNT2 having a third through hole VH3 formed through the passivation layer 111c to expose a portion of the second connection line CP2, and a virtual portion DP (or a first virtual line DP1 or a first virtual electrode DPE1) that contacts the second connection line CP2 in the second contact hole CNT2 and is configured to cover the upper surface of the passivation layer 111c while being wider than the passivation layer 111c.

[0174] Therefore, the virtual portion DP disposed in the non-crossing region NCA can be electrically connected to the second connection line CP2, and the organic light-emitting layer 116 disposed at the edge of the substrate 110 can be disconnected by the undercut portions UC formed on both sides of the virtual portion DP. The common electrode 117 disposed on the organic light-emitting layer 116 can be disconnected in the undercut portion UC, or not in the undercut portion UC.

[0175] Reference Figure 8C In the non-crossing region NCA and between the first contact hole CNT1 and the second contact hole CNT2, a protruding line PTL on the substrate 110, a buffer layer BL on the protruding line PTL to cover the protruding line PTL, an interlayer insulating layer 111b on the buffer layer BL, a first connecting line CP1 on the interlayer insulating layer 111b, a second connecting line CP2 in contact with the upper surface of the first connecting line CP1, a passivation layer 111c configured to cover the upper surface and side of the second connecting line CP2 and the side of the first connecting line CP1, and a virtual portion DP (or a first virtual line DP1 or a first virtual electrode DPE1) configured to cover the upper surface of the passivation layer 111c while being wider than the passivation layer 111c.

[0176] Therefore, the first connecting line CP1 and the second connecting line CP2 can be electrically connected to each other between the first contact hole CNT1 and the second contact hole CNT2 in the non-crossing region NCA, and the organic light-emitting layer 116 can be disconnected by the undercut portions UC formed on both sides of the virtual portion DP. The common electrode 117 provided on the organic light-emitting layer 116 can be disconnected in the undercut portion UC, or not in the undercut portion UC.

[0177] Reference Figure 8D In a portion (or the end of the protruding line PTL) on the other side of the non-crossing region NCA, the following can be provided: a protruding line PTL on the substrate 110; a first through hole VH1 formed by passing through a buffer layer BL provided on the protruding line PTL to cover a portion of the protruding line PTL; a second through hole VH2 formed by passing through an interlayer insulating layer 111b provided on the first through hole VH1; a first contact hole CNT1 that contacts the upper surface of the protruding line PTL and covers the upper surface of the interlayer insulating layer 111b via the first contact hole CNT1 in which the first through hole VH1 and the second through hole VH2 overlap each other; a passivation layer 111c that contacts the upper surface of the interlayer insulating layer 111b while covering the upper surface of the first connection line CP1; and a virtual portion DP (or a first virtual line DP1 or a first virtual electrode DPE1) that is wider than the passivation layer 111c while covering the upper surface of the passivation layer 111c. In this case, the virtual part DP can be provided in the first contact hole CNT1 to have a recessed shape along the contour of the passivation layer 111c that is recessedly inserted in the first contact hole CNT1.

[0178] Therefore, the first connecting line CP1 located on a portion of the other side of the protruding line PTL in the non-crossing region NCA can be electrically connected to the protruding line PTL. The organic light-emitting layer 116 located at the edge of the substrate 110 can be disconnected by the undercut portions UC formed on both sides of the virtual portion DP. The common electrode 117 provided on the organic light-emitting layer 116 can be disconnected in the undercut portion UC, or not in the undercut portion UC.

[0179] As a result, the display device 100 according to another embodiment of the present invention can achieve the following effects.

[0180] First, in a display device 100 according to another embodiment of the present invention, the organic light-emitting layer 116 is disconnected by a virtual portion DP provided inside the non-crossing region NCA or on a protruding line provided at the edge of the substrate 110, thereby preventing moisture from penetrating into the display portion AA, thereby improving the reliability of the light-emitting element.

[0181] Secondly, in a display device 100 according to another embodiment of the present invention, the virtual electrode of the virtual part DP is electrically connected to the protruding line PTL via the connection part CP in the non-crossing area NCA located at the edge of the substrate 110, thereby avoiding defects caused by static electricity.

[0182] Third, in a display device 100 according to another embodiment of the present invention, the first contact hole CNT1 and the second contact hole CNT2 are configured to be separated from each other in the non-crossing area NCA, thereby preventing the first connecting line CP1 and / or the protruding line PTL from being damaged by etching materials (or patterning materials) such as Ag etchant used during the patterning of the virtual part DP (or pixel electrode 114), thereby improving reliability and lifespan.

[0183] Fourth, in a display device according to another embodiment of the present invention, the width of the virtual portion DP overlapping with the protruding line PTL and the width of the virtual portion DP not overlapping with the protruding line PTL are different from each other in the non-intersecting area NCA, thereby ensuring the process margin of the virtual portion DP and the protruding line PTL and reducing the width of the edge portion of the substrate 110. Therefore, when multiple display devices 100 are configured in a multi-screen configuration, an image without a sense of disconnection can be achieved.

[0184] Figure 9 This is a schematic front view illustrating a display device according to an embodiment of the present invention; Figure 10A It is a diagram based on Figure 9 The image shown is a view of a subpixel in an example. Figure 10B It is a diagram based on Figure 9 The view of a subpixel is shown in another example.

[0185] Reference Figure 9 In a display device 100 according to an embodiment of the present invention, the display panel may include a substrate 110 having a display portion AA and a plurality of pixels P formed on the display portion AA of the substrate 110.

[0186] The display section AA can be represented as an area for displaying an image, and can be represented as an active section, an active area, or a display area. The size of the display section AA can be equal to the size of the substrate 110 (or the display device). Therefore, the display section AA is implemented (or disposed) on the entire front surface of the substrate 110, such that the substrate 110 does not include a non-display area disposed along the edge of the substrate 110 to surround the entire display section AA. Therefore, the entire front surface of the display device can implement the display section AA.

[0187] The end (or outermost) of the display portion AA can be aligned with the outer surface of the substrate 110. For example, based on the thickness direction (Z or third direction) of the display device, the side surface of the display portion AA can be aligned with an extended vertical line perpendicular to the outer surface of the substrate 110. The side surface of the display portion AA can be surrounded only by air and not by a separate mechanism. That is, the entire side surface of the display portion AA can have a structure that is in direct contact with air and is not surrounded by a separate mechanism. Therefore, since the outer surface of the substrate 110 corresponding to the end of the display portion AA is surrounded only by air, the display device 100 according to the embodiment of the present invention can have an air bezel structure, wherein the end (or side surface) of the display portion AA is surrounded by air instead of an opaque non-display area; or it can have a structure without a bezel.

[0188] Multiple pixels P can be arranged (or configured) to have a first interval D1 on the display portion AA of the substrate 110 in each of the first direction (X) and the second direction (Y). The first direction (X) can be a horizontal direction, or a first length direction (e.g., a horizontal length direction) of the substrate 110 or the display device. The second direction (Y) can be a vertical direction, or a second length direction (e.g., a vertical length direction) of the substrate 110 or the display device.

[0189] Since multiple pixels P can be arranged with a first interval D1, the virtual portion DP, the pad portion PP, the connecting portion CP, and the weir portion DAM can be positioned within the first interval D1 without overlapping with sub-pixels SP1, SP2, SP3, and SP4. For example, based on Figure 10A The virtual portion DP, the pad portion PP, the connector portion CP, and the weir portion DAM can be separated from each other by a predetermined distance on the left side of the first sub-pixel SP1 within half of the first interval D1. According to another example, the pad portion PP can be located on the rear surface (or back side) of the substrate 110, and when the gate driver GD is provided, the gate driver GD can be implemented (or built into) the entire surface (or upper surface) of the substrate 110.

[0190] Each of the plurality of pixels P can be implemented on each of the plurality of pixel regions PA defined on the display portion AA of the substrate 110. Each of the plurality of pixel regions can have a first length L1 parallel to a first direction (X) and a second length L2 parallel to a second direction (Y). The first length L1 can be equal to the second length L2 or equal to a first interval D1. Each of the first length L1 and the second length L2 can be equal to the first interval D1. Therefore, the plurality of pixels P can all have the same size. For example, the first length L1 can be represented as a first width, a horizontal length, or a horizontal width. The second length L2 can be represented as a second width, a vertical length, or a vertical width.

[0191] Two adjacent pixels P in each of the first direction (X) and the second direction (Y) may have the same first interval D1 within the tolerance range of the manufacturing process. The first interval D1 may be the pitch (or pixel pitch) between the two adjacent pixels P. For example, the first interval D1 may be the shortest distance (or shortest length) between the centers of each of the two adjacent pixels P. Alternatively, the pixel pitch may be the dimension between one end of a pixel P parallel to the first direction (X) and the other end. Furthermore, in another example, the pixel pitch may be expressed as the dimension between one end of a pixel P parallel to the second direction (Y) and the other end.

[0192] Each of the plurality of pixels P may include: a circuit layer comprising pixel circuitry implemented in a pixel region of the substrate 110; and a light-emitting device layer disposed on the circuit layer and connected to the pixel circuitry. The pixel circuitry outputs a data current corresponding to the data signal in response to a data signal and a scan signal provided from a pixel driving line disposed in the pixel region. The light-emitting device layer may include a light-emitting layer that emits light through the data current provided from the pixel circuitry.

[0193] Multiple pixels P can be divided into outermost pixels Po and inner pixels Pi.

[0194] The outermost pixel Po (or the first pixel) can be the pixel closest to the weir portion DAM or closest to the outer surface of the substrate 110 among a plurality of pixels P. For example, the outermost pixel Po can be represented as the first pixel P1. The outermost pixel Po may include at least one virtual portion, a pad portion, and a connection portion.

[0195] The second interval D2 between the center of the outermost pixel Po and the outer surface or outer side of the substrate 110 can be half or less of the first interval D1. For example, the second interval D2 can be the shortest distance (or shortest length) between the center of the outermost pixel Po and the outer surface of the substrate 110.

[0196] When the second interval D2 exceeds half of the first interval D1, the substrate 110 has a size larger than the display portion AA due to the difference between half of the first interval D1 and the second interval D2. Therefore, the area between the end of the outermost pixel Po and the outer surface of the substrate 110 can be configured as a non-display area surrounding the entire display portion AA. For example, when the second interval D2 exceeds half of the first interval D1, the substrate 110 inevitably includes a border area based on the non-display area surrounding the entire display portion AA. Therefore, when multiple display devices 100 are arranged adjacent to each other, the sum of the second intervals D2 of each of the two substrates 110 is greater than the first interval D1, so that the sum of the border areas (or seams) of each substrate 110 can be identified by the user.

[0197] Meanwhile, when the second interval D2 is half or less than half of the first interval D1, the end of the outermost pixel Po can be aligned with the outer surface of the substrate 110, or the end or side of the display portion AA can be aligned with the outer surface or outer side of the substrate 110, thereby enabling the display portion AA to be realized (or disposed) on the entire surface of the substrate 110. Therefore, even if multiple display devices 100 according to the embodiment of the present invention are arranged adjacent to each other, the user will not perceive any seams.

[0198] An inner pixel Pi can be a pixel among a plurality of pixels P other than the outermost pixel Po, or a pixel among a plurality of pixels P surrounded by the outermost pixel Po. An inner pixel Pi can be represented as a second pixel. These inner pixels Pi can be implemented with a different construction or structure than the outermost pixel Po.

[0199] Reference Figure 9 and 10A According to an embodiment of the present invention, a pixel P may include first to fourth sub-pixels SP1, SP2, SP3 and SP4 disposed in pixel area PA.

[0200] The first sub-pixel SP1 can be set in the first sub-pixel area of ​​pixel area PA, the second sub-pixel SP2 can be set in the second sub-pixel area of ​​pixel area PA, the third sub-pixel SP3 can be set in the third sub-pixel area of ​​pixel area PA, and the fourth sub-pixel SP4 can be set in the fourth sub-pixel area of ​​pixel area PA.

[0201] As an example, the first sub-pixel SP1 can be implemented to emit light of a first color, the second sub-pixel SP2 can be implemented to emit light of a second color, the third sub-pixel SP3 can be implemented to emit light of a third color, and the fourth sub-pixel SP4 can be implemented to emit light of a fourth color. Each of the first to fourth colors can be different. For example, the first color can be red, the second color can be blue, the third color can be white, and the fourth color can be green.

[0202] As another example, some of the first through fourth colors can be the same. For example, the first color can be red, the second color can be first green, the third color can be second green, and the fourth color can be blue.

[0203] Each of the first to fourth sub-pixels SP1, SP2, SP3 and SP4 may include light-emitting areas EA1, EA2, EA3, EA4 and circuit areas CIA1, CIA2, CIA3, CIA4.

[0204] The light-emitting areas EA1, EA2, EA3, and EA4 can be set to be offset towards the center CP0 of pixel P within the sub-pixel area. For example, the light-emitting areas EA1, EA2, EA3, and EA4 can be represented as an opening area, an opening, or a light-emitting part.

[0205] According to the example, the corresponding light-emitting areas EA1, EA2, EA3, and EA4 of each of the first to fourth sub-pixels SP1, SP2, SP3, and SP4 may have the same size. For example, each of the light-emitting areas EA1, EA2, EA3, and EA4 of the first to fourth sub-pixels SP1, SP2, SP3, and SP4 may have a uniform quadrilateral structure or a uniform stripe structure. For example, the light-emitting areas EA1, EA2, EA3, and EA4 with a uniform quadrilateral structure or a uniform stripe structure may have a size smaller than one-quarter the size of pixel P, and may be set to be offset towards the center CP0 in the sub-pixel area, or may be set to be concentrated in the center CP0 of pixel P.

[0206] Reference Figure 9 and 10B According to another example, the corresponding light-emitting areas EA1, EA2, EA3, EA4 of each of the first to fourth sub-pixels SP1, SP2, SP3, and SP4 may have different sizes. For example, each of the light-emitting areas EA1, EA2, EA3, EA4 of the first to fourth sub-pixels SP1, SP2, SP3, and SP4 may have a non-uniform quadrilateral structure or a non-uniform stripe structure.

[0207] The size of each of the first to fourth sub-pixels SP1, SP2, SP3, and SP4, which have a non-uniform quadrilateral structure (or a non-uniform stripe structure), can be set according to resolution, luminous efficiency, or image quality. As an example, when the luminous areas EA1, EA2, EA3, and EA4 have an unequal quadrilateral structure (or an unequal stripe structure), among the corresponding luminous areas EA1, EA2, EA3, and EA4 of each of the first to fourth sub-pixels SP1, SP2, SP3, and SP4, the luminous area EA4 of the fourth sub-pixel SP4 may have the smallest size, and the luminous area EA3 of the third sub-pixel SP3 may have the largest size. For example, the luminous areas EA1, EA2, EA3, and EA4 with a non-uniform quadrilateral structure (or a non-uniform stripe structure) can be concentrated around the center CP0 of a pixel P. In a pixel P (or pixel area PA), the center of the luminous areas EA1, EA2, EA3, and EA4 can be aligned with or separated from the center CP0 of pixel P.

[0208] The corresponding circuit regions CIA1, CIA2, CIA3, and CIA4 of each of the first to fourth sub-pixels SP1, SP2, SP3, and SP4 may be disposed around the corresponding light-emitting regions EA1, EA2, EA3, and EA4. The circuit regions CIA1, CIA2, CIA3, and CIA4 may include circuitry for emitting light from the corresponding sub-pixel, as well as pixel driving lines. For example, the circuit regions CIA1, CIA2, CIA3, and CIA4 may be represented as non-light-emitting areas, non-aperture areas, non-light-emitting portions, non-aperture portions, or peripheral portions.

[0209] Optionally, in order to increase the aperture ratio of sub-pixels SP1, SP2, SP3, and SP4 corresponding to the sizes of light-emitting areas EA1, EA2, EA3, and EA4, or to decrease the pixel pitch D1, the corresponding light-emitting areas EA1, EA2, EA3, and EA4 of each of the first to fourth sub-pixels SP1, SP2, SP3, and SP4 may extend onto the circuit areas CIA1, CIA2, CIA3, and CIA4 to overlap with some or all of the circuit areas CIA1, CIA2, CIA3, and CIA4. For example, the corresponding light-emitting areas EA1, EA2, EA3, and EA4 of each of the first to fourth sub-pixels SP1, SP2, SP3, and SP4 may be implemented on the substrate 110 to overlap with the corresponding circuit areas CIA1, CIA2, CIA3, and CIA4. In this case, the light-emitting areas EA1, EA2, EA3, and EA4 may have sizes equal to or larger than the circuit areas CIA1, CIA2, CIA3, and CIA4.

[0210] Alternatively, each of the plurality of pixels P according to another example may include first to third sub-pixels SP1, SP2 and SP3.

[0211] The corresponding light-emitting areas EA1, EA2, and EA3 of each of the first to third sub-pixels SP1, SP2, and SP3 may be rectangles whose short sides are parallel to the first direction (X) and whose long sides are parallel to the second direction (Y), and may be arranged, for example, in a 1×3 form or a 1×3 stripe form. For example, the first sub-pixel SP1 may be a red sub-pixel, the second sub-pixel SP2 may be a blue sub-pixel, and the third sub-pixel SP3 may be a green sub-pixel.

[0212] Figure 11 This is a view illustrating a multi-screen display device according to an embodiment of the present invention; Figure 12 It is along Figure 11 The sectional view shown is taken along line VII-VII', which illustrates the tiling according to Figures 9 to 10B The multi-screen display device is implemented using a display device according to another embodiment of the present invention.

[0213] Reference Figure 11 and 12According to one embodiment of the present invention, a multi-screen display device may include multiple display modules DM1, DM2, DM3 and DM4.

[0214] Each of the multiple display modules DM1, DM2, DM3, and DM4 can display an image individually or display an image in a segmented manner. Each of the multiple display modules DM1, DM2, DM3, and DM4 includes, according to... Figures 9 to 10B The display device shown is another embodiment of the present invention, and therefore its repeated description will be omitted.

[0215] Each of the multiple display modules DM1, DM2, DM3, and DM4 can be tiled on a separate tiling frame so that their sides contact each other. For example, each of the multiple display modules DM1, DM2, DM3, and DM4 can be tiled in the form of N×M (where N is a positive integer of 2 or greater, and M is a positive integer of 2 or greater), thereby realizing a multi-screen display device with a large screen.

[0216] Each of the plurality of display modules DM1, DM2, DM3 and DM4 does not include a border area (or non-display area) surrounding the entire display portion AA of the displayed image, and has an air border structure in which the display portion AA is surrounded by air. That is, in each of the plurality of display modules DM1, DM2, DM3 and DM4, the entire front surface (or upper surface) of the substrate 110 is implemented as the display portion AA.

[0217] According to an embodiment of the present invention, in each of the plurality of display modules DM1, DM2, DM3, and DM4, the second interval D2 between the center portion CP0 of the outermost pixel Po (or the outermost pixel area PAo) and the outermost side of the substrate 110 is implemented as half or less than the first interval D1 between adjacent pixels. Therefore, in two adjacent display modules (DM1, DM2, DM3, and DM4) whose sides are connected (or in contact) with each other along the first direction X and the second direction Y based on the lateral bonding method, the interval D2+D2 between adjacent outermost pixels Po (or the outermost pixel area PAo) is equal to or less than the first interval D1 between the two adjacent pixels.

[0218] exist Figure 12 In the example, in the first and third display modules DM1 and DM3, which are connected (or in contact) to each other along the second direction Y on their sides, the distance D2+D2 between the center CP0 of the outermost pixel Po (or outermost pixel area PAo) of the first display module DM1 and the center CP0 of the outermost pixel Po (or outermost pixel area PAo) of the third display module DM3 can be equal to or less than the first distance D1 between two adjacent pixels respectively set in the first and third display modules DM1 and DM3.

[0219] Therefore, the distance D2+D2 between the center portions CP0 of the outermost pixel Po (or outermost pixel area PAo) of two adjacent display modules (DM1, DM2, DM3, and DM4) that are connected (or in contact) to each other along the first direction X and the second direction Y is equal to or less than the first distance D1 between two adjacent pixels respectively provided in display modules DM1, DM2, DM3, and DM4. Thus, there are no boundary portions or seams between two adjacent display modules (DM1, DM2, DM3, and DM4), and therefore no dark areas caused by boundary portions provided between multiple display modules DM1, DM2, DM3, and DM4. As a result, the image displayed on the multi-screen display device (where each of the multiple display modules DM1, DM2, DM3, and DM4 is tiled in a 2×2 configuration) can be displayed continuously, and there are no breaks (or discontinuities) in the boundary portions between the multiple display modules DM1, DM2, DM3, and DM4.

[0220] exist Figure 11 and 12 In this configuration, multiple display modules DM1, DM2, DM3 and DM4 can be tiled in a 2×2 configuration, but are not limited thereto. Multiple display modules DM1, DM2, DM3 and DM4 can be tiled in an x×1 configuration, a 1×y configuration, or an x×y configuration, where x can be a natural number of 2 or greater and can be equal to y, and y can be a natural number of 2 or greater and can be greater than or less than x.

[0221] As described above, in the multi-screen display device according to the present invention, when the display section AA of each of the plurality of display modules DM1, DM2, DM3 and DM4 displays a single image on one screen, images can be displayed continuously rather than sequentially at the boundaries between the plurality of display modules DM1, DM2, DM3 and DM4. As a result, the image immersion of the viewer viewing the images displayed on the multi-screen display device can be improved.

[0222] The display device according to the present invention, and the multi-screen display device including the display device, can be described as follows.

[0223] A display device according to some embodiments of the present invention may include: a substrate having a display portion; a plurality of pixels disposed in the display portion; a pad portion separated from the plurality of pixels and disposed at an edge portion on one side of the substrate; a virtual portion surrounding the display portion and disposed between the pad portion and the plurality of pixels; a pad connection line intersecting the virtual portion and connected to each pad portion; and a connection portion electrically connecting the virtual portion to the pad connection line.

[0224] A display device according to some embodiments of the present invention may include a crossover area, wherein the virtual portion and the pad connection line cross each other in the crossover area, wherein the connection portion can electrically connect the virtual portion and the pad connection line in the crossover area.

[0225] A display device according to some embodiments of the present invention may include: a first intermediate insulating layer disposed between the connecting portion and the pad connection line; and a second intermediate insulating layer disposed between the virtual portion and the connecting portion, wherein the first intermediate insulating layer may include a first contact hole for connecting the connecting portion and the pad connection line, and the second intermediate insulating layer may include a second contact hole for connecting the virtual portion and the connecting portion, wherein the first contact hole may overlap with the second contact hole in the intersection area.

[0226] According to some embodiments of the present invention, the connecting portion can be electrically connected to the pad connection line via the first contact hole, and the virtual portion can be electrically connected to the connecting portion via the second contact hole.

[0227] According to some embodiments of the present invention, the first intermediate insulating layer may include a buffer layer disposed on the pad connection line and an interlayer insulating layer disposed on the buffer layer; the second intermediate insulating layer may include a passivation layer disposed on the interlayer insulating layer; the first contact hole may include a first through hole passing through the buffer layer disposed on the pad connection line and a second through hole passing through the interlayer insulating layer disposed on the first through hole; the second contact hole may include a third through hole passing through the passivation layer disposed on the second through hole; the connection portion may be electrically connected to the pad connection line via the first through hole and the second through hole; and the virtual portion may be electrically connected to the connection portion via the third through hole.

[0228] A display device according to some embodiments of the present invention may include: a weir portion disposed at the edge of the substrate and surrounding the display portion; and a light-emitting element layer comprising an organic light-emitting layer disposed on the display portion and the weir portion and a common electrode disposed on the organic light-emitting layer, wherein each of the organic light-emitting layer and the common electrode may be disconnected through the virtual portion.

[0229] According to some embodiments of the present invention, the virtual portion may include a first virtual line disposed between the pad portion and the weir portion and a second virtual line disposed between the first virtual line and the weir portion. The pad portion may include a first pad component and a second pad component, the first pad component and the second pad component being separated from each other at the edge of the substrate. The pad connection line may include a first pad connection line connected to the first pad component and a second pad connection line connected to the second pad component. The first virtual line may include a first virtual electrode while intersecting with the first pad connection line, and the first virtual electrode is electrically connected to the first pad connection line. The second virtual line may include a second virtual electrode while intersecting with the second pad connection line, and the second virtual electrode is electrically connected to the second pad connection line.

[0230] A display device according to some embodiments of the present invention may include: a buffer layer disposed on the pad connection line; an interlayer insulating layer disposed on the buffer layer; and a passivation layer disposed between the interlayer insulating layer and the first virtual electrode, wherein the width of the first virtual electrode may be greater than the width of the passivation layer.

[0231] A display device according to some embodiments of the present invention may include an undercut portion disposed between the first virtual line and the second virtual line, wherein the undercut portion may be disposed along the first virtual line or the second virtual line.

[0232] According to some embodiments of the present invention, the virtual portion may include a third virtual line disposed between the weir portion and the display portion, the pad portion may include a third pad member, the third pad member being separated from the second pad member at the edge of the substrate, the pad connection line may include a third pad connection line connected to the third pad member, the third virtual line may include a third virtual electrode while intersecting with the third pad connection line, the third virtual electrode being electrically connected to the third pad connection line, and the width of the third virtual electrode may be equal to or greater than the width of the first virtual electrode.

[0233] A display device according to some embodiments of the present invention may include: a cross region, wherein the virtual portion and the pad connection line cross each other in the cross region; and a non-cross region adjacent to the cross region, wherein the virtual portion and the pad connection line do not cross each other in the non-cross region, wherein the pad connection line may include a protruding line protruding toward the non-cross region, and the connection portion may electrically connect the virtual portion and the protruding line on the protruding line.

[0234] A display device according to some embodiments of the present invention may include: a first intermediate insulating layer disposed between the connecting portion and the protruding line; and a second intermediate insulating layer disposed between the virtual portion and the connecting portion, wherein the first intermediate insulating layer may include a first contact hole for connecting the connecting portion and the protruding line, and the second intermediate insulating layer may include a second contact hole for connecting the virtual portion and the connecting portion, wherein the first contact hole may be separated from the second contact hole on the protruding line.

[0235] According to some embodiments of the present invention, the connecting portion may include: a first connecting line that contacts the protruding line and extends from the first contact hole to the space between the first contact hole and the second contact hole; and a second connecting line that connects to the first connecting line and extends to the second contact hole to contact the virtual portion, wherein the first connecting line may contact the second connecting line between the first contact hole and the second contact hole.

[0236] According to some embodiments of the present invention, the first intermediate insulating layer may include a buffer layer disposed on the protruding line and an interlayer insulating layer disposed on the buffer layer, the second intermediate insulating layer may include a passivation layer disposed on the interlayer insulating layer, the first contact hole may include a first through hole passing through the buffer layer and a second through hole passing through the interlayer insulating layer disposed on the first through hole, the second contact hole may include a third through hole passing through the passivation layer disposed on the second through hole, the first through hole may overlap with the second through hole, and the third through hole may not overlap with the second through hole.

[0237] A display device according to some embodiments of the present invention may include: a weir portion disposed at an edge portion of the substrate and surrounding the display portion, wherein the virtual portion may include a first virtual line disposed between the pad portion and the weir portion and a second virtual line disposed between the first virtual line and the weir portion, the pad portion may include a first pad member and a second pad member, the first pad member and the second pad member being separated from each other at an edge portion of the substrate, the pad connection line may include a first pad connection line connected to the first pad member and a second pad connection line connected to the second pad member, the first pad connection line may include a first protruding line protruding toward the non-crossing area, the second pad connection line may include a second protruding line protruding toward the non-crossing area, the first virtual line may include a first virtual electrode electrically connected to the first protruding line on the first protruding line, and the second virtual line may include a second virtual electrode electrically connected to the second protruding line on the second protruding line.

[0238] According to some embodiments of the present invention, the pad portion may include a third pad component, the third pad component being separated from the second pad component at the edge of the substrate, the pad connection line may include a third pad connection line connected to the third pad component, the first protruding line may be disposed between the first pad connection line and the second pad connection line, and the second protruding line may be disposed between the second pad connection line and the third pad connection line.

[0239] According to some embodiments of the present invention, the width of the first virtual electrode overlapping the first protruding line may be greater than the width of the first virtual electrode overlapping the intersection region.

[0240] According to some embodiments of the present invention, the second virtual electrode may include a first sub-virtual electrode configured to face the first protruding line and a second sub-virtual electrode connected to the first sub-virtual electrode, wherein the width of the first sub-virtual electrode may be smaller than the width of the second sub-virtual electrode.

[0241] According to some embodiments of the present invention, the side of the display portion may be aligned with the outer side of the substrate, or the size of the display portion may be the same as the size of the substrate.

[0242] According to some embodiments of the present invention, the outermost pixel of the plurality of pixels may include at least one virtual portion, the pad portion and the connection portion, or the plurality of pixels may be disposed on the substrate to have a pixel pitch along a first direction and a second direction intersecting the first direction, and the interval between the center portion of the outermost pixel and the outer side of the substrate may be half or less of the pixel pitch.

[0243] The display device according to one embodiment of the present invention can be applied to all electronic devices including display panels. For example, the display device according to the present invention can be applied to mobile devices, video phones, smartwatches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, bending devices, electronic notebooks, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop personal computers (PCs), laptop PCs, netbooks, workstations, navigators, vehicle navigators, vehicle display devices, televisions, wallpaper display devices, signage devices, game consoles, laptops, monitors, cameras, portable cameras, home appliances, etc.

[0244] According to the present invention, the following beneficial effects can be obtained.

[0245] According to some embodiments of the present invention, a display device that can prevent the reliability of the light-emitting element from being degraded due to moisture penetration, and a multi-screen display device including the display device, can be provided.

[0246] According to some embodiments of the present invention, a display device that can prevent defects caused by static electricity and a multi-screen display device including the display device can be provided.

[0247] According to some embodiments of the present invention, a borderless display device and a multi-screen display device including the display device can be provided.

[0248] According to some embodiments of the present invention, a multi-screen display device is provided that can display images without the feeling of disconnection.

[0249] It will be clear to those skilled in the art that the present invention is not limited to the described embodiments and drawings, and various substitutions, modifications, and variations can be made within the present invention without departing from its spirit or scope. Therefore, the scope of the present invention is intended to cover all variations or modifications derived from the meaning, scope, and equivalent concepts of the present invention.

Claims

1. A display device, comprising: A substrate having a display section; Multiple pixels are disposed in the display unit; A light-emitting element layer, the light-emitting element layer including an organic light-emitting layer and a common electrode disposed on the organic light-emitting layer; A pad portion, which is separated from the plurality of pixels and is disposed at the edge portion on one side of the substrate; A virtual unit surrounds the display unit and is disposed between the pad unit and the plurality of pixels; Pad connectors, which intersect the virtual portions and connect to each pad portion; and The connection part that electrically connects the virtual part to the pad connection line. The organic light-emitting layer is disconnected through the virtual part.

2. The display device according to claim 1, further comprising a crossover area, wherein the virtual portion and the pad connection line cross each other in the crossover area. The connection portion electrically connects the virtual portion to the pad connection line in the crossover area.

3. The display device according to claim 2, further comprising: A first intermediate insulating layer is disposed between the connection portion and the solder pad connection line; as well as A second intermediate insulating layer is disposed between the virtual part and the connecting part. The first intermediate insulating layer includes a first contact hole for connecting the connecting portion and the pad connection line. The second intermediate insulating layer includes a second contact hole for connecting the virtual part and the connecting part. The first contact hole overlaps with the second contact hole in the intersection area.

4. The display device according to claim 3, wherein the connecting portion is electrically connected to the pad connection line via the first contact hole. The virtual part is electrically connected to the connecting part via the second contact hole.

5. The display device according to claim 3, wherein the first intermediate insulating layer comprises a buffer layer disposed on the pad connection line and an interlayer insulating layer disposed on the buffer layer. The second intermediate insulating layer includes a passivation layer disposed on the interlayer insulating layer. The first contact hole includes a first through-hole passing through a buffer layer disposed on the pad connection line and a second through-hole passing through an interlayer insulating layer disposed on the first through-hole. The second contact hole includes a third through-hole that passes through a passivation layer disposed on the second through-hole. The connection portion is electrically connected to the pad connection line via the first through hole and the second through hole. The virtual part is electrically connected to the connecting part via the third through hole.

6. The display device according to claim 1, further comprising: A weir portion is provided at the edge of the substrate and surrounds the display portion. The organic light-emitting layer and the common electrode are disposed on the display part and the weir part. The common electrode is disconnected through the virtual part.

7. The display device according to claim 6, wherein the virtual portion includes a first virtual line disposed between the pad portion and the weir portion and a second virtual line disposed between the first virtual line and the weir portion. The pad portion includes a first pad component and a second pad component, the first pad component and the second pad component being spaced apart from each other at the edge of the substrate. The pad connection lines include a first pad connection line connected to the first pad component and a second pad connection line connected to the second pad component. The first virtual line includes a first virtual electrode when it intersects with the first pad connection line, and the first virtual electrode is electrically connected to the first pad connection line. The second virtual line includes a second virtual electrode while crossing the second pad connection line, and the second virtual electrode is electrically connected to the second pad connection line.

8. The display device according to claim 7, further comprising: A buffer layer is provided on the pad connection line; An interlayer insulation layer disposed on the buffer layer; as well as A passivation layer is disposed between the interlayer insulating layer and the first virtual electrode. The width of the first virtual electrode is greater than the width of the passivation layer.

9. The display device according to claim 7, further comprising an undercut portion disposed between the first virtual line and the second virtual line. The undercut portion is provided along the first virtual line or the second virtual line.

10. The display device according to claim 7, wherein the virtual portion includes a third virtual line disposed between the weir portion and the display portion. The pad portion further includes a third pad component, which is spaced apart from the second pad component at the edge of the substrate. The pad connection line also includes a third pad connection line connected to the third pad component. The third virtual line includes a third virtual electrode, which is electrically connected to the third pad connection line while crossing it. The width of the third virtual electrode is equal to or greater than the width of the first virtual electrode.

11. The display device according to claim 1, further comprising: Crossover area, wherein the virtual portion and the pad connection line intersect each other in the crossover area; and In the non-crossing regions adjacent to the crossover regions, the virtual portion and the pad connection lines do not intersect each other. The pad connection lines include protruding lines that project toward the non-crossing area. The connecting portion electrically connects the virtual portion and the protruding line on the protruding line.

12. The display device according to claim 11, further comprising: A first intermediate insulating layer is disposed between the connecting portion and the protruding wire; as well as A second intermediate insulating layer is disposed between the virtual part and the connecting part. The first intermediate insulating layer includes a first contact hole for connecting the connecting portion and the protruding wire. The second intermediate insulating layer includes a second contact hole for connecting the virtual part and the connecting part. The first contact hole is spaced apart from the second contact hole on the protruding line.

13. The display device according to claim 12, wherein the connecting portion comprises: A first connecting line, which contacts the protruding line and extends from the first contact hole to the space between the first contact hole and the second contact hole; as well as A second connecting line connects to the first connecting line and extends to the second contact hole to contact the virtual part. The first connecting line contacts the second connecting line between the first contact hole and the second contact hole.

14. The display device according to claim 12, wherein the first intermediate insulating layer comprises a buffer layer disposed on the protruding line and an interlayer insulating layer disposed on the buffer layer. The second intermediate insulating layer includes a passivation layer disposed on the interlayer insulating layer. The first contact hole includes a first through-hole passing through the buffer layer and a second through-hole passing through an interlayer insulating layer disposed on the first through-hole. The second contact hole includes a third through-hole that passes through a passivation layer disposed on the second through-hole. The first through hole overlaps with the second through hole. The third through hole does not overlap with the second through hole.

15. The display device according to claim 11, further comprising a weir portion disposed at the edge of the substrate and surrounding the display portion. The virtual portion includes a first virtual line disposed between the pad portion and the weir portion, and a second virtual line disposed between the first virtual line and the weir portion. The pad portion includes a first pad component and a second pad component, the first pad component and the second pad component being spaced apart from each other at the edge of the substrate. The pad connection lines include a first pad connection line connected to the first pad component and a second pad connection line connected to the second pad component. The first pad connection line includes a first protruding line that projects toward the non-crossover area. The second pad connection line includes a second protruding line that projects toward the non-crossing area. The first virtual line includes a first virtual electrode, which is electrically connected to the first protruding line. The second virtual line includes a second virtual electrode, which is electrically connected to the second protruding line on the second protruding line.

16. The display device according to claim 15, wherein the pad portion further comprises a third pad member, the third pad member being spaced apart from the second pad member at the edge portion of the substrate. The pad connection line also includes a third pad connection line connected to the third pad component. The first protruding line is positioned between the first pad connection line and the second pad connection line. The second protruding line is disposed between the second pad connection line and the third pad connection line.

17. The display device of claim 15, wherein the width of the first virtual electrode overlapping the first protruding line is greater than the width of the first virtual electrode overlapping the intersection area.

18. The display device of claim 17, wherein the second virtual electrode comprises a first sub-virtual electrode configured to face the first protruding line and a second sub-virtual electrode connected to the first sub-virtual electrode. The width of the first sub-virtual electrode is smaller than the width of the second sub-virtual electrode.

19. The display device according to any one of claims 1 to 18, wherein the side of the display portion is aligned with the outer side of the substrate, or the size of the display portion is the same as the size of the substrate.

20. The display device of claim 19, wherein the plurality of pixels are disposed on the substrate to have a pixel pitch along a first direction and a second direction intersecting the first direction, and the interval between the center of the outermost pixel of the plurality of pixels and the outer side of the substrate is half or less of the pixel pitch.

21. A multi-screen display device, comprising: Multiple display modules are arranged along at least one of a first direction and a second direction intersecting the first direction. Each of the plurality of display modules includes a display device according to any one of claims 1 to 18.

22. The multi-screen display device according to claim 21, wherein the side of the display portion is aligned with the outer side of the substrate, or the size of the display portion is the same as the size of the substrate.

23. The multi-screen display device of claim 22, wherein the plurality of pixels are disposed on the substrate to have a pixel pitch along the first direction and a second direction intersecting the first direction, and the interval between the center of the outermost pixel of the plurality of pixels and the outer side of the substrate is half or less of the pixel pitch.

Images